仕様書(PDF形式、229kバイト)
Contents
1. ROI 2 7 uh 7 DSP TXT PNG TXT2. CFD TCP IP Ethernet 2 1 DSP ul 1 DSP
3. 4 2 4 3 5 2013 1 15 DSP DSP 1
4. 1 2 5 2 7 k 5 0S Windows7 CPU Corei 2G HDD 250GB 14 LAN 5 DSP 3 1 DSP 3 2 DSP 3 6 1 20ns PMT
5. Cs 137 662keV 3 amp s 500kcps 2 0 01 Vpp nl 3 4 DSP 5 DSP 6
6. 1 1 1 2 1 1 1 1 1 DSP Digital Signal Processor i RI olmz2 ME 3 3 1 DSP 1 DSP YVME Ethernet DSP 100MHz 14Bit A D ADC FPGA b Trapezoidal Filter CFD
7. LED POWER CH 4 D sub9 NIM 12V 50mA 24V CH 50mA 20X262X187 WxHXD 3 3 4 7 VME DC 5V 60A DC 12V 8 5A DC 12V 1 3A 3 2 4 4 AC100V 5A 300Wmax DC 5V 30A 150Wmax DC 12V 8 5A 100Wmax DC 12V 1 3A 16Wmax 167X311X399 WXHXD 3 5 1 DSP
8. ADC 128 256 512 1024 2048 4096 8192 ADC ADC ADC 128 256 512 1024 2048 4096 8192 0 1ms ch 100ms ch 0 1ns ROI ROI 4 4 1 1 DSP Ge Eu 152
9. Ethernet 100Base T TCP IP 20X262X187 WXHXD 1 3 2 1 2CH CH LED TCP IP Ethernet 2 2 2
10. ON OFF CH 2 SHV LED POWER HV OUT POS NEG Ethernet 100BaseT TCP IP 0 2kV 1mA 500V LED LED 4 60X262X187 WXHXD 3 3 3 1 4ch 4 12V 20mA 24V 50mA D sub 9 NIM 2 3 3
11. CH 2 2J 1kQ 1V Coarse Gain X1 2 5 10 X0 1 30ns Fine Gain XxX0 5 X1 5 ADC 100MHz 14bit Fast Rise Time 50ns lgus Slow Rise Time 160ns 16 ws Fine Gain X1 X0 333 VR ON OFF 0 209 MCA ADC Gain 8192 4096 2048 1024 512 256 0 1009 0 100 1 2MByte ACCEPT REJECT DAC FAST SLOW CH LET CFD
12. H 50Q 50 s DSP 2 6 ul 6 lt 20ns 50 s lt 100 pg Vrms 0 1 typ gt 1Mcps Lemo 220 1000 2200pF 50 0Q Lemo D sub9pin NIM 50Q Lemo 70X20X75 WXHXD 3 7 TXT
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