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MVME8100-Installation and Use Manual

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1. S DAR cU ER 71 4 4 System Memo asien en bee HEN ER et es ERA 71 GNI c etu De 71 4 5 1 Real Time Clock eh 72 4 5 2 P5020 Internal Timers 2 72 4 5 3 Watchdog 7 4 72 4 5 3 1 Initial Hardware Watchdog 73 4 5 3 2 OS Watchdog scelere e I r tonit E RR nenn 73 4 5 4 TICK Timer Rx RUE IE RN PRESS 73 4 6 Ethernet Interfaces 2 2 22 22 73 4 SPlinterface zu PPP ee PARET PU E PP 74 4 7 1 SPELElash Memory sss essere ete meh re na allen 74 4 7 2 Firmware 74 74 4 8 MRAM DRESS 75 450 er eee ee 75 4 10 Processor Console 2 2 2 2 4 4 75 4 11 Rear Ports t erbe te eR Rer reum sce eor ee een ed 75 4 12 PCle Ports DX DIA 76 4 13 SRO POPES be e gua NAM RW Eis 77 4 14 5 2 2 2 ee heu cx E ER ERR E E 79 4 14 1 PMC Add on
2. 2 2 22 2 422 79 4 14 2 XMC Add on 2 22 20 02 2 2 80 4 15 SATA interface i E ry ep epa e UU UD Ges 80 4 100 Installation and Use 6806800P25F Contents 4 16 VMESuppOFt scies e cee ae 80 4 16 1 Tsi148 VME 81 4 16 2 Tsi384 81 ANT USB IEEE 81 4 18 122 DEVICES 2 82 4 19 Reset Control nern ___ WA ER E rs 82 4 20 Power Management 83 4 20 1 Power Distribution Structure 2 4 2 2 84 4 20 2 Power Sequence 84 4 21 ClockStr ct re EE Rx Ra 85 4 22 Reset Struct rer ce pie RU doen 86 4 23 Interrupt Controller 2 88 4 24 GPIO Electrical Characteristics 2 2 24 2 89 4 25 Thermal Management 2 2 4 4 89 5 JBOOESYSEGNY ood odio od o
3. 100 Mhz Differential HCSLJ P5020 SERDES REF1 100 Mhz Differential HCSLJ P5020 SERDES REF2 ICS9FG104 100 Mhz Differential HCSL 3l 32NT24AG2 GCLKO 100 Mhz Differential HCSL 32NT24AG2 GCLK1 25Mhz LVCMOS 25Mhz LVCMOS BCM5482 PHY 25Mhz 25MHz 1CS83905 gt BCM54616S PHY asme LVCMOS LVCMOS I 133Mhz LVCMOS TSI 148 133Mhz LVCMOS gt TSI 384 VME 133MhzLVCMOS P5020 SYSCLK 25Mhz LVCMOS 88SE9125 SATA CTRL 25Mhz LVCMOS L 125Mhz LVCMOS P5020 ETH 2 E00 Mhz Differential HGSL e XMC1 100 Mhz Differential XMC2 25Mhz LVCMOS 7100 Mhz Differential HCSL 8 32NT24AG2 PCLKO gt 100 Mhz Differential HCSL gt 32NT24AG2 PCLK2 ICS9FG108 0112 100 Mhz Differential HCSL gt TSI384 1 E100 Mhz Differential HCSL Rl TSI384 PMC2 100 Mhz Differential HCSL TSI 384 100 Mhz Differential HCSLJ 885 9125 SATA CTRL 156 25 Mhz Differential HCSL e 80HCPS1616 SRIO SW gt az 125 Mhz Differential HCSLJ f P5020 SERDES REF3 RTC 32 768 KHz 4 8432MHz QUART CPLD
4. 2 5 PWRGD LATTICE r PWR 1 0 PWRGD LCMXO2280C PCIE PERSTBRS T3199 PWR V1P1 PWRGD PWR 1 0 IDT PWRGD PCIE PERST SATA 88SE 9125SATA L V1P2 SW PWRGD L PWR_V1P5_ PWRGB gt PWR_VTT_ PWRGB gt PCIESWI_PERST_N 32NT 24 PCIe SW Power Supply L 25MHZ RST N 1 583905 Units 4 PWR V1P8 EN I PWR V1P2 L CLK M RST L 1 5840507 I PWR V3P3 EN PWR V2P5 EN 4 gt 1CS841664 4 PWR V1P0 EN V1P1 EN 4 I PWR V1P0 EN CPU PWR V1P2 SW EN CPU PORESETN gt I V1P5 S3 EN CPU HRESETN FREESCALE PWR V1P5 55 4 CPU RESET REQN P5020 PWR V3P3 MISC EN P2 BPSWITCH N 4 Connector MVME8100 Installation and Use 6806800P25F 87 Functional Description 4 23 Interrupt Controller Assignments The following table shows the external interrupts connected to the P5020 Table 4 1 P5020 External Interrupt Assignments None Reserved BCM5482 INT1 BCM5482 PHY interrupt 1 from LED P1 2 pin IRQ2 5482 INT2 BCM5482 PHY interrupt 2 from LED P2 2 pin
5. 300O0000000000000000000000000000000000000000000000 C Description Indicates a hazardous situation which if not avoided could result in death or serious injury Indicates a hazardous situation which if not avoided may result in minor or moderate injury Indicates a property damage message i 09090000000000000000000000000000000000000000000000 Q 3O000000000000000000000000000000000000000000000000 No danger encountered Pay attention to important information Summary of Changes This is the first edition of the MVME8100 Single Board Computer Installation and Use Part Number 6806800P25A Publication Date Description May 2012 First edition 6806800P25B November 2012 GA release 16 100 Installation and Use 6806800P25F About this Manual Part Number 6806800P25C 6806800P25D Publication Date December 2012 September 2
6. 2 4 9 mE m 8 das 212 5 5 3 al al 5 sls 4 5 ae 8 s s 8 48189 x 5 x 2 P1 P2BP 70 MVMES8100 Installation and Use 6806800P25F Functional Description 4 3 4 4 4 5 Processor The P5020 QorlQ processor combines two Power architecture processor cores with high performance data path acceleration logic and network and peripheral bus interfaces required for networking telecom datacom wireless infrastructure and aerospace applications This device can be used for combined control data path and application layer processing in routers switches base station controllers and general purpose embedded computing Its high level of integration offers significant performance benefits compared to multiple discrete devices while also greatly simplifies the board design The MVME8100 board ENP1 version is designed to use the 2 0 GHz core processor version while the ENP4 version uses the 1 8 GHz processor For more information refer P5020 QorlQ Integrated Multicore Communications Processor Family Reference Manual System Memory The MVME8100 supports four GB DDR3 ECC memory using two banks of 2Gb memory devices The memory devices are soldered down and not modular solution using DIMM sockets The supported data rate is 1333MT s The memory is evenly distributed across both memory channels e g memory capacity requirement 15 408 place 2GB of memory on each channel Timers This section describ
7. 1 8432MHz 82 768 KHz P5020 RTC 24MHz SC 24Mhz USB2512 24MHz on 24Mhz P5020 USB MVME8100 Installation and Use 6806800P25F 85 Functional Description eee EE SSs s _ MM 4 22 Reset Structure The MVME8100 reset begins after the power up sequence is completed A board reset can also be initiated using the front panel reset switch the RTM reset switch through P2 or under software control through the processor Reset Request MVME8100 Installation and Use 6806800P25F Functional Description Figure 4 7 illustrates the reset control structure Figure4 7 Control Diagram RST SRIO N gt _ SRIO SW ey 5V_PGOOD E BP_PHY_RST_N gt _ 546165 PHY 601 9 Monitor FP_PHY_RST_N _ BCM5482PHY QUART RESET gt QUART USBHUB_RST_N _ USB 2512HUB HRESET N 9 XMC XJ4 XJ2 FRONT FPSWITCH N PANEL gt TSI148 N 93 TSI148 VSYSRESET sw LSRSTI N VME Bus PURST N gt PCIX VME VSYSRESETIN LRSTO Bridge lt i From VME Bus PCIE PERST BR1 N gt 51384 PWR_V1P8_PWRGD gt PWR_V1P2_PWRGD gt CPLD ___ PCIE PERST BR2 N gt 751384 L V3P3 PWRGD L
8. Related Documentation Table B 2 Related Specifications continued Organization and Standard Document Title Processor PMC ANSI VITA 32 2003 PCI X for PMC and Processor PMC ANSI VITA 39 2003 XMC Switched Mezzanine Card Auxiliary Standard September 2005 VITA 42 0 2005 XMC PCI Express Protocol Layer Standard June 2006 VITA 42 3 2006 Conduction Cooled PMC ANSI VITA 20 2001 PMC I O Module PIM Draft Standard VITA 36 Draft Rev 0 1 July 19 1999 Universal Serial Bus Universal Serial Bus Specification Revision 2 0 April 27 2000 PCI Special Interest Group PCI Local Bus Specification Revision 2 2 PCI Rev 2 2 December 18 1998 PCI X Electrical and Mechanical Addendum to the PCI Local Bus Specification PCI X EM 2 0a Revision 2 0a August 22 2003 PCI X Protocol Addendum to the PCI Local Bus Specification Revision 2 0a PCI X PT 2 0a July 22 2003 Institute for Electrical and Electronics Engineers Inc IEEE Standard for a Common Mezzanine Card Family CMC IEEE1386 Oct 25 2001 IEEE Standard Physical and Environmental Layer for PCI Mezzanine Cards IEEE1386 1 PMC Oct 25 2001 Conduction cooled VME mechanics IEEE 1101 2 1992 Additional Mechanical Specifications IEEE 1101 10 1996 IEEE Standard for Mechanical Core Specifications for Microcomputers IEEE 1101 1 1998 102 MVME8100 Installation and Use 6806800P25F Related Documentation B 3 Manufacturers Documents For additiona
9. This section describes the recommended procedure for installing the MVM8100 board in a chassis The MVME8100 does not support hot swap you must remove power to the slot or system before installing the module Before installing the MVME8100 ensure that the serial ports and switches are properly configured Installation and Removal Procedure Before you install your module please read all cautions warnings and instructions presented in this section Damage of Circuits Electrostatic discharge and incorrect installation and removal can damage circuits or shorten their life Before touching the board or electronic components make sure that you are working in an ESD safe environment Product Damage Only use injector handles for board insertion to avoid damage to the front panel and or PCB Deformation of the front panel can cause an electrical short or other board malfunction 100 Installation and Use 6806800P25F Hardware Preparation and Installation Use the following steps to install the MVME8100 into your computer chassis 1 2 Wear an ESD strap to your wrist Attach the other end of the ESD strap to an electrical ground The ESD strap must be secured to your wrist and to ground throughout the procedure Remove any filler panel that might fill the slot Install the top and bottom edge of the MVME8100 into the guides of the chassis Ensure that the levers of the two IEEE locking injector eje
10. Artesyn therefore assumes that there usually is no need to exchange the battery except for example in case of long term spare part handling Board System Damage Incorrect exchange of lithium batteries can result in a hazardous explosion When exchanging the on board lithium battery make sure that the new and the old battery are exactly the same battery models If the respective battery model is not available contact your local Artesyn sales representative for the availability of alternative officially approved battery models Data Loss Exchanging the battery can result in loss of time settings Backup power prevents the loss of data during exchange Quickly replacing the battery may save time settings Data Loss If the battery has low or insufficient power the RTC is initialized Exchange the battery before seven years of actual battery use have elapsed PCB and Battery Holder Damage Removing the battery with a screw driver may damage the PCB orthe battery holder To prevent damage do not use a screw driver to remove the battery from its holder Exchange Procedure To exchange the battery proceed as follows 1 Remove the old battery 2 Install the new battery with the plus sign facing up 3 Dispose of the old battery according to your country s legislation and in an environmentally safe way 100 MVME8100 Installation and Use 6806800P25F Appendix B Related Documentation 1 2 Artesyn Em
11. BGINO BGOUTO BGOUT1 C5 C7 DATA 11 DATA 12 DATA 14 D5 D7 NC MVME8100 Installation and Use 6806800P25F 53 Controls LEDs and Connectors Table 3 5 P1 Connectors P1 Connector 1st Row P1 Connector 2nd Row P1 Connector 3rd Row P1 Connector 4th Row P1 Connector 5th Row Pin Signal Pin Signal Pin Signal Pin Signal Pin Signal Name Description Name Description Name Description Name m Name Description DATA 7 BGIN2 DATA 15 SYSCLK BGIN3 SYSFAIL 710 GND GND BGOUT3 BERR GAT 711 DS1 BRO SYSRESET 3 3V not used 3 3V not used GA3 3 3V not used 3 3V not used NC IACKIN B21 IACKOUT 3 3V not used 3 3V not used AM 4 NC ADD 7 ADD 5 B26 IRQ5 C26 ADD 12 3 3V not used D26 3 3V not used 226 GND 54 MVME8100 Installation and Use 6806800P25F Table 3 5 P1 Connectors Controls LEDs and Connectors P1 Connector 1st Row P1 Connector 2nd Row P1 Connector 3rd Row P1 Connector 4th Row P1 Connector 5th Row Pin Name Signal Description Pin Name Signal Description Pin Name Signal Description Pin Name Signal Description 3 3V not used Pin Name Signal Description NC Table 3 6 P2 Connectors P2 Connector 1
12. and the OS Watchdog OSWD The Initial Hardware Watchdog is used to guard loading of U Boot and to prevent board hanging up U Boot has to service IWD before timeout or IWD will request Power On Reset Following a board reset the board will try to boot from the U Boot Flash selected by the configuration switches If IWD is not serviced in time by U Boot then following the IWD reset the board will attempt to boot from the alternate SPI1 U Boot Flash device 100 Installation and Use 6806800P25F Functional Description 4 5 3 1 4 5 3 2 4 5 4 4 6 The OS Watchdog OSWD is used to quard loading of the operating system The OS has to service OSWD before timeout or OSWD will request a hard reset sequence to reset the board If IWD is not serviced after switching over to the SPI1 U Boot Flash board will infinitely try to boot to SPI1 U Boot Flash By default U Boot will disable both the IWD and the OSWD The configuration switch S2 1 is used to enable or disable both watchdogs By default the watchdogs are disabled Initial Hardware Watchdog Initial Hardware Watchdog IWD starts after reset deassertion This watchdog has to be serviced within 8s after a reset deassertion otherwise a IWD reset will be requested The Initial Hardware Watchdog is serviced by writing OxEEA1 to CPLD Command Status Register OS Watchdog The OS Watchdog OSWD is not armed after reset It is enabled right after IWD is disab
13. 19 82 2 Devices The P5020 provides four 12C controllers but only controller 1 and controller 4 are used The 12C ports are connected to multiple devices such as VPD SPD User EEPROMs switch configuration 5 temperature sensors EEPROM XMC EEPROMS and clock devices The RTM and XMC EEPROM addresses are configured such that they do not have an address conflict with other on board device address The I2C busses and device addresses are shown in Figure 4 4 For more information refer MVME8 100 Programmer s Reference Figure 4 4 2C Busses 0x51 local CPU PCIE FREESCALE rm P5020 0x50 0x52 079 0 50 loca PCIE SWI xa I2C 1 12C_4 RC EEPROM 0x5D 0x55 0x54 0x74 SRIO SRo SRO PCIE SWITCH EEPROM EEPROM SWITCH U6 U43 26 Eri TEMP TEMP RTM SENSE SENSE nu VPD 2 3 1 0118 022 EEPROM 0 4 0 48 0 6 0 68 0 57 Reset Control CPLD The MVME8100 uses Lattice LCMXO2280C CPLD to provide reset power up sequencing timers miscellaneous board logic and status control registers accessible through the P5020 LBC interface The CPLD uses early 3 3V power from the 5V backplane and can be programmed through JTAG interface pins through the JTAG connector It uses a 1 8 MHz oscillator
14. 6806800P25F 7 List of Tables E 8 100 Installation and Use 6806800P25F List of Figures EN Figure 1 1 Declaration 2 2 23 Figure 2 1 Switch Locations ENP1 33 Figure 2 2 Switch Locations 34 Figure 2 3 Typical Placement of a PMC XMC Module on Module 43 Figure 2 4 SATA drive Installation 45 Figure 3 1 ENP1 Board Front Panel LEDs Connectors Switch 49 Figure 3 2 ENP4 Front Panel LEDs 2 2 50 Figure 4 1 BIG CK Diag ea 70 Figure 4 2 ne aa 77 Figure 4 3 SRIO Bus Iopology e RS RUE ERU ud 78 Figure 4 4 piene ITEMS 82 Figure 4 5 Power DistribUtlon 1 344220 2 tre ame 84 Figure 4 6 Clock Structure 1 2 4422 15 0 ee Y nee 85 Figure 4 7 Reset Control 87 Figure 4 8 Thermal Management 90 Figure A 1 Battery LOCATION 99 MVME8100 Installation and Use 6806800P25F 9 List of Figures m 10 MVME8100 Installation and Use 6806800P25F About this Manua
15. 9 2 5 1 Reset Abort Switch A dual function switch can be found the front panel This switch can function either as a Reset or Abort button Ifthe button is pressed for less than 3 seconds the CPLD will generate an abort interrupt to the P5020 processor If the button is pressed for more than 3 seconds the CPLD will generate a board hard reset If the board is configured as System Controller the backplane VME SYSRESET signal is also asserted during a board hard reset Installing Accessories This section describes the procedures for installing the RTM of MVME8100 PMCs and the XMCspan on the baseboard Rear Transition Module The RTM of MVME8100 does not support hot swap You must remove power to the system before installing the module Before installing the transition module you may need to manually configure the RTM switches and install a PMC I O Module NOTICE Damage of Circuits Electrostatic discharge and incorrect installation and removal can damage circuits or shorten their life Before touching the board or electronic components make sure that you are working in an ESD safe environment Product Damage Only use injector handles for board insertion to avoid damage to the front panel and or PCB Deformation of the front panel can cause an electrical short or other board malfunction Board Malfunction Switches marked as reserved might carry production related functions and can cause the board to
16. Abort bee EC UR 39 2 5 Installing Accessories 2 2 4 39 2 5 1 RearTransition 2 24 39 2 5 2 PMC XMC Installation 2 24 4 4 40 2 53 SATA Installation ier teer Xr RU ae PUR PA 43 2 6 Installing and Removing the 0 2 46 2 7 Completing the Installation 22 2 24 2 48 MVME8100 Installation and Use 6806800P25F 3 Contents 3 Controls LEDs and 49 SMNE CTUM 49 3 2r oie ese be E e MM NRI 49 32 3 EDS oer ML n 51 3 2 1 1 FrontPanelLEDs 51 3 2 2 CONNECTS 52 3 2 2 1 52 3 2 2 2 On board Connectors 58 4 Functional Description 2s 29s ea n OW 69 41 Overview wie RR PP E se 69 42 BlockDiagraln een ea 70 4 3 1
17. FrontPanel The following switch LEDs and connectors are available on the MVME8100 front panel Refer to Figure 3 1 forthe location of each Figure 3 1 Board Front Panel LEDs Connectors Switch Board Fail LED Console Port Micro DB9 Reset Switch User LED USB 2 0 Link LED Gigabit Ethernet Activity LED Port MVME8100 Installation and Use 6806800P25F 49 Controls LEDs and Connectors Figure3 2 Front Panel LEDs Board FAIL LED USERILED RESET 50 100 Installation and Use 6806800P25F Controls LEDs and Connectors 3 2 1 LEDS 3 2 1 1 Front Panel LEDs Table 3 1 describes the LEDs on the front panel of the MVME8100 Refer to Figure 3 1 for LED locations Table 3 1 Front Panel LEDs Label Function Description User Defined Off By Default Yellow User Software Controllable Red User Software Controllable Board Fail Off Normal operation after successful firmware boot One or more on board power rails have failed and the board has shutdown to protect the hardware Normal during power up during hardware reset such as a front panel reset May be asserted by the BDFAIL bit in the Tsi148 VSTAT register Link Speed No link 10 100BASE T operation 1000 BASE T operation Activity No activity Blinking Green Activity proportional to bandwidth utilization MVME8100 Installation and Use 6806800P25
18. IP address of TFTP server setenv gatewayip gateway IP setenv netmask lt netmask gt setenv bootargs root dev ram rw console ttyS0 9600n8 ramdisk size 700000 cache sram size 0x10000 saveenv 3 Transfer the files through the TFTP from the server to the local memory tftp 1000000 kernel image tftp 2000000 ramdisk tftp 00000 kernel dtb gt 4 Boot the Linux from the memory bootm 1000000 2000000 00000 92 MVME8100 Installation and Use 6806800P25F Boot System 5 3 2 5 3 3 Booting from an Optional SATA Drive 1 Make surethatthekernel dtb andramdisk saved inthe SATA drive with ext2 partition Configure U Boot environment variable setenv File ulImage kernel image setenv File dtp kernel dtb gt setenv File ramdisk lt ramdisk gt Saveenv Copythe files from the SATA drive to the memory option scsi interface 0 1 device 0 partition 1 ext2load scsi 0 1 1000000 File_ulmage ext2load scsi 0 1 2000000 File_ramdisk ext2load scsi 0 1 f00000 SFile dtp Boot the Linux in memory bootm 1000000 2000000 00000 Booting from a USB Drive 1 Make sure thatthe kernel dtb and ramdi sk are saved in the USB drive with partition Configure the U Boot environment variable setenv File ulImage kernel image setenv File dtp kernel dtb gt setenv File ramdisk lt ramdisk gt saveenv Initialize USB drive usb start Load the file
19. Kilobytes KBAUD Kilo Baud LBC Local Bus Controller LCD Liquid Crystal Display LED Light Emitting Diode MB Megabytes Mbit Megabit Mbps Megabits Per Second MHz Megahertz MII Media Independent Interface MRAM Magnetoresistive random access memory NAND Not and Flash that is used for storage OSWD OS Watchdog PBGA Plastic Ball Grid Array PCI Peripheral Component Interconnect PCI X Peripheral Component Interconnect X PIC Programmable Interrupt Controller PIM PCI Mezzanine Card Input Output Module MVME8100 Installation and Use 6806800P25F 13 About this Manual TERM MEANING PCI Mezzanine Card IEEE 1386 1 PLD Programmable Logic Device PLL Phase Locked Loop Power On Reset Processor PCI Mezzanine Card Quad Universal Asynchronous Receiver Transmitter Reduced Gigabit Media Independent Interface Read Only Memory Real Time Clock Rear Transition Module Serial AT Attachment Single Board Computer Synchronous Dynamic Random Access Memory SMT Surface Mount Technology SODIMM Small Outline Dual In line Memory Module Serial Presence Detect Static Random Access Memory Three Speed Ethernet Controller Two edge Source Synchronous Transfer Universal Asynchronous Receiver Transmitter Universal Serial Bus V Volts VITA VMEbus International Trade Association VME VMEbus Versa Module Eurocard VPD Vital Product Data Watts 14 1
20. ON OFF ON OFF OFF 001011 OFF ON OFF ON OFF 101010 21 MVME8100 Installation and Use 6806800P25F 37 Hardware Preparation and Installation 2 4 1 3 2 4 1 4 38 S4 Switch The S4 switch includes the SCON control and PCIE SRIO PO root complex endpoint configuration switches The VME SCON AUTO switch is OFF to select Auto SCON mode The switch is ON to select manual SCON mode which works in conjunction with the VME SCON SEL switch The VME 5 SEL switch is OFF to manually select SCON mode This switch is ON to manually select non SYSCON mode This switch is only effective when the VME SCON AUTO switch is ON Table 2 8 54 Switch Settings 1 Clear Environment Variables OFF Disable Clear Environment Variables ON Enable Clear Environment Variables At reset uboot ENV variables are set to default values OFF Configure PCle SRlo Switches as PO Root Complex ON Configure PCle SRIO Switches as PO Endpoint OFF Auto VME System Controller ON Manual VME System Controller OFF VME System Controller ON VME Non System Controller S5 Switch The switch Bank S5 provides the boot SPI FLASH selection Table 2 9 S5 Switch Settings Position Default Description 1 OFF OFF Boot from SPI FLASH 0 ON Boot from SPI FLASH 1 2 OFF Reserved 100 Installation and Use 6806800P25F Hardware Preparation and Installation 2 4 1 5 2
21. for logic control 100 Installation and Use 6806800P25F Functional Description The CPLD provides the following functions Power control and fault detection Reset sequence and reset management Status and Control registers Miscellaneous control logics Watchdog timer 32 bit Tick Timers Clock generator Switch decoder and LED controller 4 20 Power Management The5 volt coming from the back plane is utilized to derive all on board voltage rails To provide the required voltage sequencing each voltage rail is controlled by the CPLD through enable pin of each regulator and the output is being monitored by CPLD through each regulator power good signal If one voltage rail fails the CPLD will disable all of the regulators and the only way to restart the board is by power cycling the chassis 5 volt power MVME8100 Installation and Use 6806800P25F 83 Functional Description 4 20 1 Power Distribution Structure Figure 4 5 displays the MVME8100 power distribution structure Figure 4 5 Power Distribution 3 3V MGT Early Power Lattice LCMXO 2280 C ETISS3AES ESPTREBE National SCANSTA112 400mA 1A max VME BACKPLANE 1 0V TPS40193DRCR Freescale P 5020 15A max 1 0V IDT IDT32NT24AG2 TPS40193DRCR IDT CPS1616 15A max MarvelB8SE9125 1 1V TPS40140RHHR Freescale P5020 20A max e 1 5V DDR V
22. for this product Safety Notes contains the cautions and warnings applicable to the use of this product Sicherheitshinweise is a German translation of the Safety Notes chapter MVME8100 Installation and Use 6806800P25F 11 About this Manual Abbreviations This document uses the following abbreviations MEANING AC Alternating Current ANSI American National Standard Institute BGA Ball Grid Array BLT Block Transfer Core Complex Bus Chip Enable CFM Cubic Feet per Minute CMC Common Mezzanine Card COM Communications COP Common On chip Processor Complex Programmable Logic Device CPU Central Processing Unit CRC Cyclic Redundancy Check DC Direct Current Double Data Rate Degrees Celsius Dual In line Memory Module Direct Memory Access Dynamic Random Access Memory Error Correction Code EEPROM Electrically Erasable Programmable Read Only Memory eMMC Enhanced Module Management Controller Federal Communications Commission FIFO First In First Out 100 Installation and Use 6806800P25F About this Manual TERM MEANING fpBGA Flip chip Plastic Ball Grid Array GB Gigabytes Gbit Gigabit Gbps Gigabits Per Second GMII Gigabit Media Independent Interface ID Identification IEEE Institute of Electrical and Electronics Engineers 2 Inter IC IWD Initial Hardware Watchdog JTAG Joint Test Access Group KB
23. local bus controller eL BC Two PCI Express controller ports One Serial Rapid IO controller ports SRIO port v1 3 compliant with features of v2 1 Enhanced secure digital host controller SD MMC Enhance Serial Peripheral Interfaces eSPI Two high speed USB 2 0 controllers with integrated PHYs Two banks of DDR3 SDRAM with ECC Total 4 GB 2GB per Bank 1333 MHz DDR3 data rate One 512 Kbit user configuration serial EEPROM 256B SPD EEPROMs One 64 Kbit VPD EEPROM RTC with battery backup Temperature Sensors RTM and XMC VPD EERPOMs System Memory MVME8100 Installation and Use 6806800P25F 19 Introduction Table 1 1 Features List continued Function Features Two soldered SPI FLASH 8MB each switchable for uboot primary backup support Hardware switch or Software bit write protection for entire logical bank Eight GB eMMC Flash NVRAM 512 KB MRAM PCI Express Two 4X Ports to VXS backplane PO muxed with SRIO ports One 8X Port to PMC XMC Site 1 One 4X Port to PMC XMC Site 2 SRIO Two 4X Ports to VXS backplane PO muxed with PCle ports USB One USB 2 0 for front panel Two USBs 2 0 for backplane RTM I O Ethernet 10 100 1000BASE T Ethernet port to front panel only in air cooled variant Two 10 100 1000BASE T Ethernet channels to P2 RTM Two 1000BASE BX Ethernet SERDES channels to PO backplane RTM e e Serial Ports One RS232 422 485 co
24. malfunction if their setting is changed Do not change settings of switches marked as reserved The setting of switches which are not marked as reserved has to be checked and changed before board installation MVME8100 Installation and Use 6806800P25F 39 Hardware Preparation and Installation 2 5 2 40 Installation and Removal Procedure To begin the installation of the RTM in a chassis proceed as follows 1 Turn all equipment power OFF and disconnect the power cable from the AC power source 2 Remove the chassis cover as instructed in the equipment user s manual Remove the filler panel s from the appropriate card slot s at the rear of chassis if the chassis has a rear card cage Install the top and bottom edge of the RTM into the rear guides of the chassis Ensure that the levers of the two injector ejectors are in the outward position Slide the RTM into the chassis until resistance is felt Simultaneously move the injector ejector levers in an inward direction oo A Verify that the RTM is properly seated and secure it to the chassis using the two screws located adjacent to the injector ejector levers 9 Connectthe appropriate cables to the RTM To remove the RTM from the chassis reverse the procedure and press the red locking tabs IEEE handles only to extract the board Installation The PMC connectors are placed to support two single width PMC
25. sen 11 1 Introduction ooo 19 IMEEM 19 1 2 Standard Compliances cec ee E Rer ERREUR a a 22 1 3 Mechanical Data ernannt as a 24 1 4 Ordering Information 2 4 2 24 24 2 2 24 1 4 1 Supported Board 5 24 1 42 Board Accessories nee 25 2 Hardware Preparation and Installation 27 MEO DIM 27 2 2 Unpacking and Inspecting the Board 2 28 2 3 wen en 28 2 31 Environmental 29 2 3 2 Powe rRequirements occ ceca tis er ee es en 30 2 3 3 Thermal Requirements 24 31 2 3 4 Thermally Significant 31 2 3 5 Equipment 32 2 4 Configuring the Board 2 2 2 32 2 4 1 Configuration 2 24 2 35 2411 SZ Switch 35 2 4 1 2 S3 SWitChi i ee eerte es 36 24 1 3 S4SWUC n d e e esca 38 2 4 1 4 S5Switclr eere ee DPA A FE EE 38 2415
26. showvar Print local hushshell variables sleep Delay execution for some time soft_reset Soft reset the board source Run script from memory test Minimal test like bin sh tftpboot Boot image through network using TFTP protocol tsi148 Initialize and configure Tundra Tsi148 usb USB sub system usbboot Boot from USB device version Print monitor version 5 5 Updating U Boot To update the U Boot place the image in the RAM address 0x1000000 in this example before copying it to the SPI flash MVME8100 Installation and Use 6806800P25F 97 Boot System Thefollowing procedure will replace the image in SPI bank 0 1 Ensure FLASH WP N in SMT Configuration Switch S3 1 is in the OFF position 2 Select SPI flash 0 Sf probe 0 3 Erase 0x90000 bytes starting at SPI address 0 Sf erase 0 0x90000 4 Write 0x90000 bytes from RAM address 0x1000000 starting at SPI address 0 Sf write 0x1000000 0 0x90000 To replace the image in SPI bank 1 replace step 2 with Select SPI flash 1 sf probe 1 98 100 Installation and Use 6806800P25F Battery Exchange A 1 Battery Exchange The ENP1 variant contains an on board battery The battery location is shown in the following figure Figure A 1 Battery Location Battery MVMES8100 Installation and Use 6806800P25F 99 Battery Exchange The battery provides data retention of seven years summing up all periods of actual data use
27. sich auf dem Produkt kein Kondensat befindet MVME8100 Installation and Use 6806800P25F Sicherheitshinweise Besch digung von Schaltkreisen Elektrostatische Entladung und unsachgem er Ein und Ausbau des Produktes kann Schaltkreise besch digen oder ihre Lebensdauer verk rzen Bevor Sie das Produkt oder elektronische Komponenten ber hren vergewissern Sie sich da Sie in einem ESD gesch tzten Bereich arbeiten Fehlfunktion des Produktes Schalter die mit Reserved gekennzeichnet sind k nnen mit produktionsrelevanten Funktionen belegt sein Das dieser Schalter kann im normalen Betrieb St rungen ausl sen Verstellen Sie nur solche Schalter die nicht mit Reserved gekennzeichnet sind Pr fen und ggf ndern Sie die Einstellungen der nicht mit Reserved gekennzeichneten Schalter bevor Sie das Produkt installieren Installation Datenverlust Das Herunterfahren oder die Deinstallation eines Boards bevor das Betriebssystem oder andere auf dem Board laufende Software ordnungsmemass beendet wurde kann zu partiellem Datenverlust sowie zu Sch den am Filesystem f hren Stellen Sie sicher dass s mtliche Software auf dem Board ordnungsgem ss beendet wurde bevor Sie das Board herunterfahren oder das Board aus dem Chassis entfernen Besch digung des Produktes Fehlerhafte Installation des Produktes kann zu einer Besch digung des Produktes f hren Verwenden Sie die Handles um das Produkt zu installieren dei
28. touching the board or electronic components make sure that you are working in an ESD safe environment Board Malfunction Switches marked as reserved might carry production related functions and can cause the board to malfunction if their setting is changed Do not change settings of switches marked as reserved The setting of switches which are not marked as reserved has to be checked and changed before board installation 106 MVME8100 Installation and Use 6806800P25F Safety Notes Installation Data Loss Powering down or removing a board before the operating system or other software running on the board has been properly shut down may cause corruption of data or file systems Make sure all software is completely shut down before removing power from the board or removing the board from the chassis Product Damage Only use injector handles for board insertion to avoid damage to the front panel and or PCB Deformation of the front panel can cause an electrical short or other board malfunction Product Damage Inserting or removing modules with power applied may result in damage to module components Before installing or removing additional devices or modules read the documentation that came with the product Cabling and Connectors Product Damage RJ 45 connectors on modules are either twisted pair Ethernet TPE or E1 T1 J1 network interfaces Connecting an E1 T1 1 line to an Ethernet connector may damage your sys
29. 00 Installation and Use 6806800P25F About this Manual Conventions The following table describes the conventions used throughout this manual Courier Bold Notation Description 0x00000000 Typical notation for hexadecimal numbers digits are 0 through F for example used for addresses and offsets 0b0000 Same for binary numbers digits are 0 and 1 bold Used to emphasize a word Screen Used for on screen output and code related elements or commands in body text Used to characterize user input and to separate it from system output Reference File gt Exit text text Used for references and for table and figure descriptions Notation for selecting a submenu Notation for variables and keys Notation for software buttons to click on the screen and parameter description Repeated item for example node 1 node 2 node 12 Omission of information from example command that is not necessary at the time being Ranges for example 0 4 means one of the integers 0 1 2 3 and 4 used in registers MVME8100 Installation and Use 6806800P25F Logical OR 15 About this Manual Notation
30. 013 Description Updated Standard Compliances on page 22 Updated Table 1 2 Table 1 3 Table 2 2 Table 2 4 PMC XMC Installation on page 40 Table 3 3 on page 52 and Table 3 6 on page 55 Added Figure 2 2 on page 34 SATA Installation on page 43 Figure 2 4 on page 45 Figure 3 2 on page 50 Interrupt Controller Assignments on page 88 and GPIO Electrical Characteristics on page 89 6806800P25E 6806800P25F 100 Installation and Use 6806800P25F December 2013 June 2014 Added Chapter 5 Boot System on page 91 Re branded to Artesyn template 17 About this Manual _ _ _ m 18 100 Installation and Use 6806800P25F Chapter 1 Introduction 11 Features The MVME8100 Single Board Computer is a VMEbus board based on the Freescale QorlQ P5020 processor It is a high performance 6U VME VXS board targeted towards high end military and industrial automation applications using VMEbus The MVME8100 is compliant with the VITA standards VMEbus 2eSST and PCI X Table 1 1 Features List Function Features Freescale QorlQ P5020 Two e5500 Power Architecture cores Five Gigabit Ethernet controllers SGMII and RGMII interfaces Two 64 bit DDR3 3L SDRAM memory controllers with ECC Multicore Programmable Interrupt Controller PIC Processor Subset of P5020 features used on MVME8100 Four I2C controllers Two 4 pin UARTs Two 4 channel DMA engines Enhanced
31. 151384 and is keyed as such The power budget allocated to 3 3V is 16 5W max for either PMC or PrPMC The PMC site has two IDSELs two REQ GNT pairs and EREADY to support PrPMC modules as defined by VITA39 XMC Add on Card add on cards are required to operate off of 5V or 12V from carrier to XMC The 100 provides 5V to the VPWR Variable Power pins The MVME8100 does not provide 12V to the XMC VPWR pins Voltage tolerances for VPWR and all carrier supplied voltage 3 3V 12V 12V are defined by the base XMC standard SATA interface The MVME8100 is designed to support an optional 2 5 inch SATA HDD SDD in PMC XMC site 2 The heat frame has mounting holes to support the 2 5 SSD HDD on board The connector interface to the MVME8100 board is compatible with the Artesyn SATA mounting kit MVME8100 HDMNTKIT4 which contains a SATA adapter board screws and mounting brackets The SATA adapter board provides a standard SATA connector to support horizontal mounting of the HDD SSD MVME8100 utilizes Marvell s 885 9125 1 SATA controller This is a PCI Express 2 0 to dual SATA 3 0 Host Bus Adapter It employs the latest SATA PHY technology operating at 1 5Gbps or 3 0Gbps VME Support The MVME8100 is designed to comply with VME ANSI VITA 1 5 2003 2eSST The MVME8100 supports most of the addressing and data transfer modes defined by the VME64 VME64x and 2eSST specifications The MVME8100 can operate in System Cont
32. 42 3924 0493 03764 19 30h 3 1 4 RORIS ER 109 6 100 Installation and Use 6806800P25F List of Tables EN Table 1 1 Features oso rrpLere ie 19 Table 1 2 Board Standard Compliances 22 Table 1 3 Mechanical Data ores en RAN ra 24 Table 1 4 Board Valiant 2226 en pe a 24 Table 2 1 Startup uiua euh intesa En D e 27 Table 2 2 MVMES8100 Specifications 2 29 Table 2 3 Operating Voltages un ee ee Aq nena 30 Table 2 4 Power Requirements SCA OC SCELERE ERR Ce a 30 Table 2 5 52 Switch Settings ics 2A eee IH en 35 Table 2 6 S3 Switch Settings ous e pobre ee ep A AR ei Rs dd 36 Table 2 7 Three Row Backplane Manual Slot Addressing 36 Table 2 8 54 SwitchiSettings 32 re ee eee E ER 38 Table 2 9 S5 Switch Settings en a meet eee i D dp e e ein epe 38 Table 3 1 FrontPanel LEDS pte ee eh Un OR ORAT ERR RR 51 Table 3 2 Console Front Panel 1 2 52 Table 3 3 Front Panel Tri Speed Ethernet 1 52 Table 3 4 USB Connector eat nee 53 Table 3 5 S 5 53 Tabl
33. 5020 through the local bus controller QUART port A is multiplexed with the P5020 UART1 console port so that the console port can be routed to the RTM COM1 port The mux is controlled using configuration switches on S2 MVME8100 Installation and Use 6806800P25F 75 Functional Description 4 12 76 The four ports can be configured for RS 232 or RS 422 RS 485 modes RS 232 mode supports RX TX RTS and CTS signals Only four wire full duplex RX TX is supported in RS422 485 mode The signaling mode is selected through on board configuration switches on S2 PCle Ports The MVME8100 provides multiple PCI Express ports The P5020 is configured to use two x4 PCle controllers 1 and 3 on the MVME8100 Both controllers are configured to operate at Gen 1 data rate 2 5 Gbaud These ports are routed to an IDT 32NT24AC2 PCle switch for expansion of the PCle ports The IDT switch is a 32 lane Gen 2 device and can support up to 24 ports 8 of which are capable of NT function Each port of the switch is configured to operate at Gen 1 data rate The configuration of the ports and the partitioning of the switch into a single or multiple domains is controlled by an I2C eeprom connected to the PCle switch master SMbus and loaded into the switch following reset The board provides two separate eeproms so that separate configuration data can be maintained for the MVME8100 operating as a root complex or as an end point on the PO connector ports The selectio
34. Address Zhongshan General Carton Box Factory Co Ltd No 62 Qi Guan Road West Shiqi District 528400 Zhongshan City Guangdong PRC Declares that the following product in accordance with the requirements of 2004 108 EC 2006 95 EC 2011 65 EU and their amending directives MVME8100 Series VMEbus Single Board Computer Model Name Number MVME8100 202180404 MVME8100 202200401E MVME8100 202200401S MVME8100 202200404 has been designed and manufactured to the following specifications EN55022 2010 EN55024 2010 IEC 60950 1 2005 2nd Edition EN60950 1 2006 A11 2009 2011 65 EU RoHS Directive As manufacturer we hereby declare that the product named above has been designed to comply with the rele vant sections of the above referenced specifications This product complies with the essential health and safety requirements of the above specified directives We have an internal production control system that ensures compliance between the manufactured products and the technical documentation 04 028 2014 Tom Tuttle Manager Product Testing Services Date MM DD YYYY a rear SMBEODORD TECHNOLOGIES MVME8100 Installation and Use 6806800P25F 23 Introduction 1 3 Mechanical Data The MVME8100 is a full 60 board with added mounting holes to support an ENP4 board variant The MVME8100 will occupy a single VME card slot Table 1 3 provides details on the board s mechanical data Table 1 3 Mechanical Data Charac
35. BX Ethernet SERDES channels to backplane Two USB2 0 ports to RTM with USB type A connectors on RTM panel e e One SATA port to RTM with eSATA connector on RTM Four GPIOs to planar headers on RTM Note The front panel I O connectors are available only in ENP1 air cooled variants 1 signals in conduction cooled variant are accessed through P2 only MVME8100 Installation and Use 6806800P25F 21 Introduction 1 2 Standard Compliances The MVME8100 is designed to be CE compliant and to meet the following standard requirements Table 1 2 Board Standard Compliances Standard Description UL 60950 1 Safety Requirements legal EN 60950 1 IEC 60950 1 CAN CSA 22 2 No 60950 1 CISPR 22 EMC requirements legal on system level predefined Artesyn EN 55022 system EN 55024 FCC Class A VCCI Japan AS NZS CISPR 22 Environmental Requirements ETSI EN 300 019 series Directive 2002 95 EC Directive on the restriction of the use of certain hazardous substances in electrical and electronic equipment RoHS The ENP1 version complies with RoHs 6 of 6 The ENP4 version complies with RoHS 5 of 6 due to lead solder used in the ENP4 heat frame 22 100 Installation and Use 6806800P25F Introduction Figure 1 1 Declaration of Conformity EC Declaration of Conformity According to EN 17050 1 2004 Manufacturer s Name Artesyn Embedded Computing Embedded Computing Manufacturer s
36. COM1_RX COM1_RX_ N GND GIGE3_MD lO3 N PMCIO 32 PMC IO 34 DATA 17 DATA 18 PMC IO 31 PMC IO 33 COM1_CTS _N COM1_ RX_P COM2_RX COM2_RX_ N GND GIGE4_MD IO0 P PMC IO 36 PMC IO 38 DATA 19 DATA 20 PMC IO 35 PMC IO 37 COM2_CTS _N COM2_ RX_P COM3_RX COM3_RX_ N GND GIGE4_MD IO0 N PMC IO 40 56 DATA 21 DATA 22 PMC IO 39 COM3_CTS _N COM3_ RX_P GND MVME8100 Installation and Use 6806800P25F Table 3 6 P2 Connectors Controls LEDs and Connectors P2 Connector 1st P2 Connector 2nd P2 Connector 3rd P2 Connector 4th P2 Connector 5th Row Row Row Row Row Pin Signal Pin Signal Pin Signal Pin Signal Pin Signal Name Description Name Description Name Description Name Description Name Description PMCIO 42 PMCIO 41 RX COM4_RX_ N GIGE4_MD IO1_P PMCIO 44 PMC IO 46 DATA 23 GND PMC IO 43 PMC IO 45 COM4_CTS _N COM4_ RX_P COM1_TX COM1_TX_ N GND GIGE4_MD IO1_N PMCIO 48 PMCIO 50 DATA 24 DATA 25 PMC IO 47 PMC IO 49 COM1_RTS _N COM1_ TX_P COM2_TX COM2_TX_ N GND GIGE4_MD lO2 P PMCIO 52 PMCIO 54 DATA 26 DATA 27 PMCIO 51 PMC IO 53 COM2_RTS _N COM2_ TX_P COM3_TX COM3_TX_ N GND GIGE4_MD 102_N PMC IO 56 PMC IO 58 DATA 28 DATA 29 PMC IO 55 PMC IO 57 COM3_RTS _N COM3_ T
37. F 51 Controls LEDs and Connectors 3 2 2 Connectors This section describes the pin assignments and signals for the connectors the MVME8100 3 2 2 1 External Connectors 3 2 2 1 1 Front Panel Connectors The following are the Front Panel Connectors e Serial Console Port 1 e Front Panel Ethernet Connector 1 e USB Connector 5 Table 3 2 Console Front Panel Connector 1 PIN No 5232 SIGNALING RS485 SIGNALING 1 NC NC 0 RX COM 0 RX COM 0 TX COM 0 TX NC NC GND GND NC NC COM 0 RTS COMO TX COM 0 CTS COMO RX NC NC DM uM AJU Table 3 3 Front Panel Tri Speed Ethernet Connector 1 1 TDO 2 TDO 3 TD1 52 MVME8100 Installation and Use 6806800P25F Controls LEDs and Connectors Table 3 3 Front Panel Tri Speed Ethernet Connector 1 Pin No Signal Description TD3 Table 3 4 USB Connector 5 Pin No Signal Description 3 2 2 1 2 Backplane Connectors Table 3 5 P1 Connectors P1 Connector 1st Row Signal Description P1 Connector 2nd Row Pin Name Signal Description BBSY P1 Connector 3rd Row Signal Description DATA 8 P1 Connector 4th Row Signal Description P1 Connector 5th Row Pin Signal Name Description 71 DATA 9 Z2 GND ACFAIL DATA 10 A5 A7 DATA 4 DATA 6 B5 B7
38. IRQ3 GPIO21 QUART IRQO Quart Interrupt INTA IRQ4 GPIO22 QUART_IRQ1 Quart Interrupt INTB IRQ5 GPIO23 QUART IRQ2 Quart Interrupt INTC IRQ6 GPIO24 QUART IRQ3 Quart Interrupt INTD IRQ7 GPIO25 CPLD TEMP INT L Board Temperature interrupt routed through CPLD IRQ8 GPIO26 TIMER INT L CPLD Internal Timers and Abort IRQ IRQ9 GPIO27 BCM54616S INT BCM54616S PHY interrupt from LED4 pin IRQ10 GPIO28 SRIO IRQ INT L 80HCPS1616SRIOIRQ N pin IRQ11 GPIO29 RIC INT L RTC interrupt routed through CPLD 88 MVME8100 Installation and Use 6806800P25F Functional Description 4 24 Electrical Characteristics The four GPIO signals routed to the PO and P2 connectors have the following electrical characteristics Table 4 2 GPIO DC Electrical Characteristics VoH lot loH Min V mA mA 2 9 4 4 3 1 0 1 0 1 Table 4 3 GPIO Pull Down Characteristics Parameter Condition Min Max Units i nV 4 25 Thermal Management The MVME8100 provides three on board temperature sensors using an ADT7461 dual temperature sensor and a TMP112A temperature sensor The ADT7461 internal temperature sensor provides the temperature at the board edge on the CPU side of the board The ADT7461 remote temperature sensor measures the CPU temperature The ADT7461 can measure negative temperatures down to 64C with 1C accuracy on the remote sensor and 3C accuracy on the internal sensor The ADT7461 registers can be used to
39. IT MAX17000AETG T 12A max 5 0V 120V 120V Freescale P 5020 DDR3 Memory Devices 1 2V TPS54620RGYT 1 IDT TSI 384 2A max TOV 751148 h Pericom PI 3L301 DAE Pericom PI 2PCIE2412 Marvell 88SE9125 Broadcom 546165 12V SW Broadcom bh en BCM5482SHAR IFBG um IDT CPS1616 Freescale P5020 2 5V Broadcom BCM 546165 LTC3026EDD PBF 4 Broadcom 1 5A max 54825 2 IFBG IDT32NT24AG2 Freescale 5020 Freescale 2 16MRAM Broadcom BCM54616S Exar ST16C 554 QUART IDT 32NT24AG2 IDT TSI384 IDT TSI 148 IDT CPS 1616 Marvell 88SE9125 Maxim MAX 3160 E SMSC USB 2512 Bi USB Hub Texas SN74LVTH126 Texas SN74VMEH22501 Texas SN74LVC125A 3 3V TPS40193DRCR 15A max 4 20 2 Power Sequence Requirements The CPLD power sequence timing is designed to support all the MVME8100 devices supply voltage sequencing requirements 84 100 Installation and Use 6806800P25F Functional Description 4 21 Clock Structure Figure 4 7 shows the clock tree implementation for the MVME8100 Figure4 6 Clock Structure
40. Installation and Use 6806800P25F 67 Controls LEDs and Connectors E 68 100 Installation and Use 6806800P25F Chapter 4 Functional Description eee 4 1 Overview The MVME8100 Single Board Computer is a GU VME VXS board based on the Freescale QorlQ P5020 processor This section describes the features of MVME8100 MVME8100 Installation and Use 6806800P25F 69 Functional Description 4 2 Block Diagram Figure 4 1 illustrates the MVME8100 architecture Figure 4 1 Block Diagram Front Panel Micr NOTE Front panel connectors are not DB9 assembled on conductiorcooled variant USB ponti 245 PMC O1 PMC 1 O2 JACK RESET PAVO PMC XMC PMC XMC 2 5 Site1 HDD SSD Site2 8GB PCIe 8 zo 133MHz 512kB 2 ul MRAM sie SDHC PCIe to PCIe to PCI X Multi Protoco Transceiver 16MB DDR3 ECC PCle xt CPLD mr Flash MUX MUX DEMUX DEMUX DDR3 ECC 0 1 PCle o o 5 WE o SPI PCle xt SATA PCle 8 PCle Local PCle Bus SATA PCle Switc CTRL PCle Freescale PCle x QorIQ P5020 Quad pope PCIe to UART PCI X sromf ce che 3 E 5 Switch E M nis PCle PCIX s d z PCle x IDT 8 NTB TSI148 9 5 MUX MUX 4 Multi Protocol PHYL DEMUX DEMUX Transceivers 2 3 USB Hub a 1 8 d 8 z Io 4 E
41. MVMES100 Installation and Use P N 6806800P25F June 2014 22227 22 EEE 9 Copyright 2014 Artesyn Embedded Technologies Inc All rights reserved Trademarks Artesyn Embedded Technologies Artesyn and the Artesyn Embedded Technologies logo are trademarks and service marks of Artesyn Embedded Technologies 2 2014 Artesyn Embedded Technologies Inc All other product or service names are the property of their respective owners Intel is a trademark or registered trademark of Intel Corporation or its subsidiaries in the United States and other countries Java and all other Java based marks are trademarks or registered trademarks of Oracle America Inc in the U S and other countries Microsoft Windows and Windows Me are registered trademarks of Microsoft Corporation and Windows XP is a trademark of Microsoft Corporation PICMG CompactPCI AdvancedTCA and the PICMG CompactPCI and AdvancedTCA logos are registered trademarks of PCI Industrial Computer Manufacturers Group UNIX is a registered trademark of The Open Group in the United States and other countries Notice While reasonable efforts have been made to assure the accuracy of this document Artesyn assumes no liability resulting from any omissions in this document or from the use of the information obtained therein Artesyn reserves the right to revise this document and to make changes from time to time in the content hereof without obligation of Artesy
42. T_L T No Pin Key 12 Reserved NC GND 14 Reserved NC MVME8100 Installation and Use 6806800P25F GND 16 Reserved NC 65 Controls LEDs and Connectors Table 3 13 Asset TAG Header Pin Assignment PIN Number PIN Number Description Description XMC Connector 100 supports two XMC sites The board only supports 15 for XMC site 1 and 25 for XMC site 2 Table 3 14 XMC Connectors XJ1 2 ROW A X 1 2 ROW B XJ1 2 ROWC XJ1 2 ROW D 1 2 ROWE 1 2 ROW F Signal m Signal Signal Signal Signal Description Description Pin No Description Pin No Description Description Description JTAG TRST HRESET JTAG TCK MRSTO PULLED UP 3 3V JTAG TMS 12V JTAG TMS 12V JTAG TDO 0 BIST 3 3V PULLED UP GA 1 PRESENT 3 3V 2 DATA 3 3V 66 MVMES8100 Installation and Use 6806800P25F Table 3 14 XMC Connectors Controls LEDs and Connectors XJ1 2 ROW Xj1 2 ROW B 1 2 XJ1 2 ROW D 1 2 ROWE Xj1 2 ROW F Pin Signal Pin Signal Signal Signal Pin Signal Pin Signal No Description No Description PinNo Description Pin No Description No Description No Description MVMRO I2C CLOCK PULLED DOWN NC NC 18 GND 18 GND 18 NC 18 GND 18 GND 18 NC 19 19 CLK 19 NC 19 NC 19 ROOTO 19 NC PULLED UP MVME8100
43. X_P COMA TXJ 4 TX N GND GIGE4 MD IO3 P PMC IO 60 DATA 30 DATA 31 MVME8100 Installation and Use 6806800P25F PMC IO 59 COM4_RTS _N COM4_ TX_P GND 57 Controls LEDs and Connectors Table 3 6 P2 Connectors P2 Connector 1st P2 Connector 2nd P2 Connector 3rd P2 Connector 4th P2 Connector 5th Row Row Row Row Row Pin Signal Pin Signal Pin Signal Pin Signal Pin Signal Name Description Name Description Name Description Name Description Name Description PMCIO 62 PMCIO 61 231 GIGE4 MD 103_N A32 PMC IO 64 5V C32 PMCIO63 032 5V 232 GND Table 3 7 VXS Connector Pin RowG RowF Row E Row D Row C Row B RowA GND P1 TXO N P1 TX0O P GND P1 RXO NJ GND P1 TX1 N gt w Es P1 TX3 N P1 SG TXO N GND P1 RX1 N P1 RXI P P1 RXO P GND PI_TX2_N _TX2_P PI_RX2_N PI_RX2_P P1_TX3_P Pl RX3N P1_RX3_P ao SG RXO P NC GND GPIOO GND NC NC oo NI ODOJ SG_TX1_N SG_RX1_N NC NC GND NC NC GND GPIO1 0522 22 22 SATA TX N SATA TX P GND SATA N SATA P SG RX1 P P2 TXO N P2 TXO N P2 RXO N P2 RXO P GND GND P2 TX1 N P2_RX1_N P2_RX1_P P2_TX2_N P2_TX2_P P2_RX2_N P2_RX2_P 15 NC P2 DGN P2TX3P P2 RX3N P2_RX3_P 3 2 2 2 On board Connectors The on
44. a 5 row chassis in order to get the correct address from P1 connector This switch reflects the inverted states on the geographical address signals Table 2 6 S3 Switch Settings OFF SPI FLASH Write Protect is Disabled ON SPI FLASH Write Protect is Enabled PO Connector Port B PCIE SRIO Fabric Selection OFF Port B same as Port A selection and is controlled by SW2 8 ON Port B selection is opposite of SW2 8 selection OFF 1 OFF 1 OFF 1 OFF 1 omm fs Below is the switch configuration for corresponding slot address in a 21 slot chassis 3 row backplane Table 2 7 Three Row Backplane Manual Slot Addressing S13 51 4 51 5 51 6 51 7 51 8 GAP GA 4 0 Slot Address OFF OFF OFF 111110 IEEE OFF OFF OFF OFF ON 111101 2 ON OFF OFF OFF ON ON 011100 3 OFF OFF OFF ON OFF OFF 111011 4 MVME8100 Installation and Use 6806800P25F Hardware Preparation and Installation Table 2 7 Three Row Backplane Manual Slot Addressing 51 3 S1 4 51 5 51 6 51 7 51 8 GAP GA 4 0 Slot Address OFF OFF ON orr 011001 I6 OFF OFF ON ON ON 111000 LEN OFF OFF 110111 010110 010101 110100 ON 0 FF ON ON Babe 010011 OFF ON ON OFF 110010 ra OFF 110001 0 10000 101111 001110 OFF OFF ON OFF 001100 OFF OFF ON 101100 ON
45. age to module components Before installing or removing additional devices or modules read the documentation that came with the product 44 100 Installation and Use 6806800P25F Hardware Preparation and Installation Figure2 4 SATA drive Installation REMOVE PMC REMOVE PMC BRACKET Mounting Posts STEP 1 P sd V STEP2 ASSEMBLE FOUR MTG SCREWS FROM SIDE 2 OF THE BOARD STEP 3 STEP 6 Use the following steps to install a SATA drive 1 WearanESD strap to your wrist and fix the other end of the ESD strap to an electrical ground 2 Secure mounting brackets to each side of SATA drive as shown in step 1 of Figure 2 4 Attach SATA adapter board to SATA drive as shown in step 2 of Figure 2 4 4 Usetwo screws to secure adapter to mounting brackets as shown in step 3 of Figure 2 4 MVME8100 Installation and Use 6806800P25F 45 Hardware Preparation and Installation 2 6 46 5 Remove PMC XMC bracket and mounting posts from site 2 as shown in step 4 of Figure 2 4 6 Attach SATA drive assembly with adapter board and mounting brackets to MVME8100 board at PMC XMC site 2 as shown in step 5 of Figure 2 4 Make sure that the SATA adapter connectoris fully mated with the board SATA connector 7 Secure SATA drive assembly to board using four screws inserted from the bottom side of the board as shown in step 5 of Figure 2 4 Installing and Removing the Board
46. apitel enth lt Hinweise die potentiell gef hrlichen Prozeduren innerhalb dieses Handbuchs vorrangestellt sind Beachten Sie unbedingt in allen Phasen des Betriebs der Wartung und der Reparatur des Systems die Anweisungen die diesen Hinweisen enthalten sind Sie sollten au erdem alle anderen Vorsichtsma nahmen treffen die f r den Betrieb des Produktes innerhalb Ihrer Betriebsumgebung notwendig sind Wenn Sie diese Vorsichtsma nahmen oder Sicherheitshinweise die an anderer Stelle diese Handbuchs enthalten sind nicht beachten kann das Verletzungen oder Sch den am Produkt zur Folge haben Artesyn ist darauf bedacht alle notwendigen Informationen zum Einbau und zum Umgang mit dem Produkt in diesem Handbuch bereit zu stellen Da es sich jedoch um ein komplexes Produkt mit vielfaltigen Einsatzm glichkeiten handelt k nnen wir die Vollst ndigkeit der im Handbuch enthaltenen Informationen nicht garantieren Falls Sie weitere Informationen ben tigen sollten wenden Sie sich bitte an die f r Sie zust ndige Gesch ftsstelle von Artesyn Das Produkt wurde entwickelt um die Sicherheitsanforderungen f r SELV Ger te nach der Norm EN 60950 1 f r informationstechnische Einrichtungen zu erf llen Die Verwendung des Produkts in einer anderen Anwendung erfordert eine Sicherheits berpr fung f r diese spezifische Anwendung Einbau Wartung und Betrieb d rfen nur von durch Artesyn ausgebildetem oder im Bereich Elektronik oder Elektrotechnik quali
47. apter A fully implemented MVME8100 consists of the baseboard plus e Two single wide or one double wide PCI Mezzanine Card PMC slot for added versatility e Onereartransition module for support of the mapped I O from the MVME8100 baseboard to the P2 connector e Upto two optional cards in place of PMC modules Thefollowing table lists the things you need to do before using this board and explains where you can find the information for performing each step Be sure to read this entire chapter including all Caution and Warning notes before you begin Table 2 1 Startup Overview Task Page Unpack the hardware Unpacking and Inspecting the Board on page 28 Configure the hardware by setting jumpers Configuring the Board on page 32 on the board and RTM Install the RTM 51 1 of MVME8100 Rear Transition Module on page 39 in the chassis Install PMC module if required Installing Accessories on page 39 Install XMC module if required Installing Accessories on page 39 Install the MVME8100 in the chassis Installing and Removing the Board on page 46 Attach cabling and apply power Completing the Installation on page 48 Install on transition module if required Refer VXS1 RTM1 Installation and Use manual Examine and or change environmental 100 Single Board Computer Programmer s Reference parameters Program the board as needed for your 100 Single Board Comput
48. are Preparation and Installation 2 4 1 Configuration Switches The board provides the following configuration switches e S2Switch e S3Switch e S4Switch e S5Switch e Reset Abort Switch 2411 S2Switch The Switch Bank S2 provides watchdog control serial port configuration and PO fabric selection Table 2 5 S2 Switch Settings Position Default Description OFF Watchdog Disabled ON Watchdog Enabled OFF Serial Console Port to Front Panel ON Serial Console Port to P2 RTM panel OFF P2 Serial Port 0 is 5232 ON P2 Serial Port 0 is RS422 485 OFF P2 Serial Port 1 is 5232 ON P2 Serial Port 1 is RS422 485 OFF P2 Serial Port 2 is 5232 ON P2 Serial Port 2 is RS422 485 OFF P2 Serial Port is 5232 ON P2 Serial Port 3 is RS422 485 OFF Front Panel console Port is 5232 ON Front Panel console Port is RS422 485 OFF Select SRIO for PO Backplane Fabric ON Select PCle for PO Backplane Fabric MVME8100 Installation and Use 6806800P25F 35 Hardware Preparation and Installation 2 4 1 2 36 S3 Switch The TSI148 VMEbus Status Register provides the VMEbus geographical address of the 100 Applications not using a 5 row backplane can use these switches to manually assign board s VMEbus geographical address Note that this switch is wired parallel with geographical address pins on the 5 row connectorto these switches must beinthe off position when installed in
49. bedded Technologies Embedded Computing Documentation The publications listed below are referenced in this manual You can obtain electronic copies of Artesyn Embedded Technologies Embedded Computing publications by contacting your local Artesyn sales office For released products you can also visit our Web site for the latest copies of our product documentation 1 Goto www artesyn com computing 2 Under SUPPORT click TECHNICAL DOCUMENTATION 3 Under FILTER OPTIONS click the Document types drop down list box to select the type of document you are looking for 4 Inthe Search text box type the product name and click GO Table B 1 Artesyn Embedded Technologies Embedded Computing Publications Document Title Publication Number MVME8100 Programmer s Reference 6806800P28 MVMES8100 Quick start Guide 6806800P26 MVME8100 Safety Notes Summary 6806800P27 Related Specifications For additional information refer to the following table for related specifications As an additional help a source for the listed document is provided Please note that while these sources have been verified the information is subject to change without notice Table B 2 Related Specifications Organization and Standard Document Title VITA Standards Organization VME64 ANSI VITA 1 1994 VME64 Extensions ANSI VITA 1 1 1997 2eSST Source Synchronous Transfer ANSI VITA 1 5 2003 MVME8100 Installation and Use 6806800P25F 101
50. board customized SATA connector is compatible with the MVME8100 SATA kit 58 MVME8100 Installation and Use 6806800P25F Controls LEDs and Connectors Following are the onboard connectors SATA connector PMC connector Asset JTAG connector COP connector XMC connector SATA Connector The on board customized SATA connector is compatible with the Artesyn SATA kit MVME8100 HDMNTKITA Table 3 8 Customized SATA Connector PinName Signal Description Pin Name Signal Description SATA DETECT NC 13 NC 16 GND MVME8100 Installation and Use 6806800P25F 59 Controls LEDs and Connectors 60 Table 3 8 Customized SATA Connector PinName Signal Description Pin Name Signal Description 20 GND 40 5V PMC Connectors MVME8100 supports two sites The connector is located on the middle portion of the board It utilizes 14 to support I O that goes to RTM PMC Table 3 9 11 21 Connector 34 GND 35 GND 36 IRDY 37 DEVSEL INTC 38 LOCK INTD 41 NC NC 42 NC 43 PA R 14 GND 46 AD 15 15 GND 47 AD 12 16 GNTA 48 AD 11 MVMES8100 Installation and Use 6806800P25F Table 3 9 11 21 Connector Controls LEDs and Connectors Pin Name Signal Description Pin Name Signal Description Table 3 10 J12 J22 Connector Pin Name Signal Descript
51. configure the low temperature limit and high temperature limit for the local sensor as well as for the remote sensor An interrupt can be generated if limits are exceeded The TMP112A temperature sensor is used to measure the temperature at the board edge opposite from the CPU Since the airflow direction can be different in some VME chassis either temperature sensor can be used to get a measure of the board inlet air temperature depending on the air flow direction MVME8100 Installation and Use 6806800P25F 89 Functional Description eee However to maintain proper CPU temperature the recommended airflow direction is to enter the board from the CPU side that is the air should flow in the direction from PMC XMC site 1 to PMC XMC Site 2 Figure 4 8 Thermal Management USER 1 LED Console Port Micro DB9 Reset Switch Board FAIL LED Recommended air flow direction USB 20 Link LED Gigabit Ethernet Activity LED Port 90 MVME8100 Installation and Use 6806800P25F Chapter 5 Boot System NEN 5 1 5 2 Overview MVME8100 uses Das U Boot a boot loader software based on the GNU Public License It boots the blade and is the first software to be executed after the system is powered on Its main functions are Initialize the hardware e Pass boot parameters to the Linux kernel e Start the Linux kernel e Update Linux kernel and U Boot images This section describes U Boot features and proced
52. ctors if equipped are in the unlocked outward position Slide the MVME8100 into the chassis until you feel resistance Simultaneously move the injector ejector levers if equipped an inward direction until locked If fitted with SCANBE ejectors adjust them inward and apply pressure to them to seat the board Verify that the MVME8100 is properly installed and secure it to the chassis using the two screws located adjacent to the injector ejector levers When installing an ENP4 version board the maximum torque that should be used on the wedge lock screws is 6 in Ibs 10 Connect the appropriate cables to the MVME8100 When the MVME8100 and optionally an RTM is installed in a chassis you are ready to connect peripherals and apply power to the slot or system The front panel Micro DB9 connector provides a console interface to U boot It presents an RS 232 DTE interface TX RX CTS RTS The default serial configuration is 9600 8 N 1 This mates with an ITT MDSM 9SGZ11 or equivalent The Artesyn part number SERIAL MINI D2 converts this to a standard male DB9 interface To remove the board from the chassis reverse the procedure and press the red locking tabs IEEE handles only to extract the board MVME8100 Installation and Use 6806800P25F 47 Hardware Preparation and Installation 2 7 48 Completing the Installation The MVME8100 is designed to operate as an application specific compute blade or a
53. e 3 6 PZ CONECTO S esisi 56 erac Que ua E REC I E REG RE RE 55 Table 3 7 VXS PO CORTIGCEOF 2 55 sine pra be n ER ees es 58 Table 3 8 Customized SATA Connector 59 Table 3 9 PMCJ11 J21 Connector cia hr ae ne ae 60 Table 3 10 PMCJ12 J22 2 2 61 Table 3 11 13 23 Connectors sibs eret an ae ek X PEE 63 Table 3 12 14 Connector bated eee RE REA IRAE S 64 Table 3 13 Asset JTAG Header Pin Assignment 65 Table 3 14 AME CONNETTO p E 66 Table 4 1 P5020 External Interrupt Assignments 88 Table 4 2 GPIO DC Electrical Characteristics 89 Table 4 3 GPIO Pull Down Characteristics 2 89 Table 5 1 MVME8100 Specific U Boot Commands 95 Table B 1 Artesyn Embedded Technologies Embedded Computing Publications 101 Table B 2 Related Specifications 101 Table B 3 Manufacturer s Publications 2 103 MVME8100 Installation and Use
54. eS QUO D deed d s PEOR eS 91 NEED here 91 5 27 Accessing REN WP p ee das ea neg 91 3 3 cies eie Re ik 92 5 3 1 Booting from a 24 2 2 24 92 5 3 2 Booting from an Optional SATA 93 5 3 3 Booting from a USB Drive 93 5 3 4 2 2 2 94 5 3 5 Booting VxWorks Through the 94 5 4 MVME8100 Specific U Boot Commands 95 55 Updating U BOOT rennen ve DR S We rx ge Wes RE TRU aw sa ee 97 A Battery Exchange nee 99 Battery Exchange au ne san a nn an nenn 99 Related Documentation nern 101 Artesyn Embedded Technologies Embedded Computing Documentation 101 B 2 Related 5 22 2 22 2 101 MVME8100 Installation and Use 6806800P25F 5 Contents eee B 3 Manufacturers 103 Salety Notes a 105 Sichernheitshimelse
55. elp I2C sub system iminfo Print header information for application image imxtract Extract a part of a multi image Enable or disable interrupt Return true false on integer compare Load binary file over serial line Kermit mode Load S Record file over serial line Load binary file over serial line mode Infinite loop on address range mii MII utility commands Memory modify auto incrementing address MMC sub system mmcinfo Display MMC info Reset nvram serial and write monitor to SPI flash Memory write fill Boot image through network using NFS protocol Memory modify constant address List and access PCI Configuration Space Show information about devices on PCI bus Send ICMP ECHO REQUEST to network host 96 100 Installation and Use 6806800P25F Boot System Table 5 1 MVME8100 Specific U Boot Commands continued Command Description printenv Print environment variables rarpboot Boot image through network using RARP TFTP protocol reset Perform RESET of the CPU run Run commands in an environment variable Saveenv Save environment variables to persistent storage script Run a delimited terminated list of commands scsi SCSI sub system scsiboot Boot from SCSI device setenv Set environment variables setexpr Set environment variable as the result of eval expression sf SPI flash sub system
56. er Programmer s Reference applications MVME8100 Installation and Use 6806800P25F 27 Hardware Preparation and Installation 2 2 2 3 28 Unpacking and Inspecting the Board Read all notices and cautions prior to unpacking the product Damage of Circuits Electrostatic discharge and incorrect installation and removal can damage circuits or shorten their life Before touching the board or electronic components make sure that you are working in an ESD safe environment Shipment Inspection To inspect the shipment perform the following steps 1 Verify that you have received all items of your shipment 2 Check for damage and report any damage or differences to customer service 3 Remove the desiccant bag shipped together with the board and dispose of it according to your country s legislation The product is thoroughly inspected before shipment If any damage occurred during transportation or any items are missing contact customer service immediately Requirements Make sure that the board when operated in your particular system configuration meets the requirements specified in the next sections 100 Installation and Use 6806800P25F Hardware Preparation and Installation 2 3 1 Environmental Requirements The following table lists the currently available specifications for the environmental characteristics of the MVME8100 A complete functional description of the MVME8100 baseboard appea
57. er operation of the MVME8100 you may need to carry out certain hardware modifications before installing the module The MVME8100 provides software control over most options by setting bits in control registers after installing the module in a system you can modify its configuration 32 100 Installation and Use 6806800P25F Hardware Preparation and Installation Prior to installing PMC modules on the MVME8100 baseboard ensure that all switches that are user configurable are set properly To do this refer to Figure 2 1 orthe board itself for the location of specific switches and set the switches according to the following descriptions Figure 2 1 Switch Locations ENP1 board 54 Switch S5 Switch S2 Switch 53 Switch MVME8100 Installation and Use 6806800P25F 33 Hardware Preparation and Installation 34 Figure 2 2 Switch Locations ENP4 Board i Kor 53 Switch 52 Switch The following sections describe the on board switches and their configurations for the MVME8100 Board Malfunction Switches marked as reserved might carry production related functions and can cause the board to malfunction if their setting is changed Do not change settings of switches marked as reserved The setting of switches which are not marked as reserved has to be checked and changed before board installation MVME8100 Installation and Use 6806800P25F Hardw
58. erating as a root complex or as an end point on the PO ports The selection of the root complex or end point eeprom for MVME8100 Installation and Use 6806800P25F 77 Functional Description loading the configuration data after reset is determined by the root complex configuration switch S4 2 see S4 Switch on page 38 The eeproms can be reprogrammed over the processor 12C bus 4 interface The eeprom device addresses are listed in section 2 Devices on page 82 A diagram of the SRIO port topology is shown in the figure below The 80HCPS1616 SRIO switch does not support auto baud rate discovery The switch configuration EEPROMs must program the PO fabric ports to match the SRIO baud rate of the system The default baud rate for the PO fabric ports is 2 5 Gbaud Figure4 3 5 Bus Topology Port A Port B 78 MVME8100 Installation and Use 6806800P25F 4 14 4 14 1 Functional Description PMC XMC Sites The MVME8100 provides two PMC XMC sites Each PMC XMC site will accept either PMC or an XMC add on card For a given site only an XMC or a PMC maybe populated at any given time as they occupy the same physical space on the PCB Combination of PMC XMC cards not supported by MVME8100 The PMC XMC1 site provides rear PMC I O The PMC XMC sites are fully compliant with the following e VITA39 PCI Xfor PMC e VITA 35 2000 for to VME P2 Connection PMC XMC1 site only e PCI Rev 2 2 for PCI L
59. es These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instruction manual may cause harmful interference to radio communications MVME8100 Installation and Use 6806800P25F 105 Safety Notes Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense Changes or modifications not expressly approved by Artesyn Embedded Technologies could void the user s authority to operate the equipment Board products are tested in a representative system to show compliance with the above mentioned requirements A proper installation in a compliant system will maintain the required performance Use only shielded cables when connecting peripherals to assure that appropriate radio frequency emissions compliance is maintained Operation Product Damage High humidity and condensation on the board surface causes short circuits Do not operate the board outside the specified environmental limits Make sure the board is completely dry and there is no moisture on any surface before applying power Damage of Circuits Electrostatic discharge and incorrect installation and removal can damage circuits or shorten their life Before
60. es the timer functions implemented on MVME8100 MVME8100 Installation and Use 6806800P25F 71 Functional Description 4 5 1 4 5 2 4 5 3 72 Real Time Clock The MVME8100 implements an Real Time Clock RTC to maintain seconds minutes hours day date month and year accurately It includes a 32 768 KHZ crystal 051337 and back up power Forthe ENP1 version ofthe MVME8100 a battery is used for the RTC back up power For the ENP4 version a 3 3V regulator powered from the VME backplane 5V_STDBY voltage is used for back up power The 051337 has an interrupt output INTA which can be programmed to assert a processor IRQ on a time day date match The DS1337 also hasa 32 768 KHz clock output SQW which is used to drive the P5020 RTC input signal The RTC internal oscillator has been disabled before the board was shipped from the factory Use the following process to turn on the RTC oscillator from Uboot MVME8100 i2c mm 0x68 e 1 0000000e 98 18 0000000 80 n To set the date use the following uboot command MVME8100 gt date MMDDhhmm CC YY ss P5020 Internal Timers The P5020 provides a total of eight global timers it is divided into two groups group A and group B Each group has four timers Each timer has four individual configuration register However these two groups of timers cannot be cascaded together Watchdog Timers The CPLD has two watchdogs timers the Initial Hardware Watchdog IWD
61. fiziertem Personal durchgef hrt werden Die in diesem Handbuch enthaltenen Informationen dienen ausschlie lich dazu das Wissen von Fachpersonal zu erg nzen k nnen dieses jedoch nicht ersetzen Halten Sie sich von stromf hrenden Leitungen innerhalb des Produktes fern Entfernen Sie auf keinen Fall Abdeckungen am Produkt Nur werksseitig zugelassenes Wartungspersonal oder anderweitig qualifiziertes Wartungspersonal darf Abdeckungen entfernen um Komponenten zu ersetzen oder andere Anpassungen vorzunehmen Installieren Sie keine Ersatzteile oder f hren Sie keine unerlaubten Ver nderungen am Produkt durch sonst verfallt die Garantie Wenden Sie sich f r Wartung oder Reparatur bitte an die f r Sie zust ndige Gesch ftsstelle von Artesyn So stellen Sie sicher dass alle sicherheitsrelevanten Aspekte beachtet werden MVME8100 Installation and Use 6806800P25F 109 Sicherheitshinweise EMV Betrieb 110 Das Produkt wurde in einem Artesyn Standardsystem getestet Es erf llt die f r digitale Ger te der Klasse A g ltigen Grenzwerte in einem solchen System gem den FCC Richtlinien Abschnitt 15 bzw EN 55022 Klasse A Diese Grenzwerte sollen einen angemessenen Schutz vor St rstrahlung beim Betrieb des Produktes in Gewerbe sowie Industriegebieten gew hrleisten Das Produkt arbeitet im Hochfrequenzbereich und erzeugt St rstrahlung Bei unsachgem em Einbau und anderem als in diesem Handbuch beschriebenen Betrieb k nnen St ru
62. in this manual Because of the complexity of this product its various uses we do not guarantee that the given information is complete If you need additional information ask your Artesyn Embedded Technologies representative This product is a Safety Extra Low Voltage SELV device designed to meet the EN60950 1 requirements for Information Technology Equipment The use of the product in any other application may require safety evaluation specific to that application Only personnel trained by Artesyn or persons qualified in electronics or electrical engineering are authorized to install remove or maintain the product The information given in this manual is meant to complete the knowledge of a specialist and must not be used as replacement for qualified personnel Keep away from live circuits inside the equipment Operating personnel must not remove equipment covers Only Factory Authorized Service Personnel or other qualified service personnel may remove equipment covers for internal subassembly or component replacement or any internal adjustment Do not install substitute parts or perform any unauthorized modification of the equipment or the warranty may be voided Contact your local Artesyn Embedded Technologies representative for service and repair to make sure that all safety features are maintained This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rul
63. ion Pin Name Signal Description 1 12V 33 GND 2 JTAG TRST 34 IDSELB 3 JTAG TMS 35 TRDY 4 JTAG TDO 36 3 3V 5 JTAG TDI 37 GND 6 GND 38 STOP 7 GND 39 PERR 8 NC 40 GND MVME8100 Installation and Use 6806800P25F 61 Controls LEDs and Connectors Table 3 10 PMC J12 J22 Connector Pin Name Signal Description Pin Name Signal Description 9 NC 41 3 3V 10 NC 42 SERR 11 BUSMODE2 43 Pulled UP 12 3 3V 44 GND 13 PCI RESET 45 AD 14 14 BUSMODE3 46 AD 13 PULLED DWN 15 3 3V 47 M66EN 16 BUSMODE4 48 AD 10 PULLED DWN 17 NC 49 AD 8 18 GND 50 3 3V 19 AD 30 51 AD7 20 AD 29 52 REQB 21 GND 53 3 3V 22 AD 26 54 GNTB 23 AD 24 55 NC 24 3 3V 56 GND 25 IDSEL 57 NC 26 AD 23 58 EREADY 27 3 3V 59 GND 28 AD 28 60 RSTOUT 29 AD 18 61 ACK64 30 GND 62 3 3V 31 AD 16 63 GND 32 CBE2 64 NC 62 100 Installation and Use 6806800P25F Table 3 11 13 23 Connectors Controls LEDs and Connectors Pin Name Signal Description Pin Name Signal Description GND AD48 AD 47 AD 52 AD 45 GND 3 3V AD 40 AD 43 AD 42 AD 41 GND GND AD 40 AD 39 AD 38 AD 37 GND GND AD 36 AD 35 AD 34 NININ I NI NI INI IMN om BR WwW N MVME8100 Installation and Use 6806800 252 63 Controls LEDs and Connecto
64. l EN Overview of Contents This manual provides the information required to install and configure an MVME8100 Additionally this manual provides specific preparation and installation information and data applicable to the board The MVME8100 is a high performance dual core processor board featuring the Freescale QorlQ P5020 processor This manual is divided into the following chapters and appendices Chapter 1 Introduction lists the features of the MVME8100 baseboard standard compliances and model numbers for boards and accessories Chapter 2 Hardware Preparation and Installation includes a description of the MVME8100 unpacking instructions environmental thermal and power requirements and howto prepare and install the baseboard transition module and PMC module Chapter 3 Controls LEDs and Connectors provides an illustration ofthe board components and front panel details This chapter also gives descriptions for the onboard and front panel LEDs and connectors Chapter 4 Functional Description describes the major features of the MVME8100 baseboard These descriptions include both programming and hardware characteristics of major components Chapter 5 Boot System on page 91 describes the boot load software Appendix A Battery Exchange describes the procedure for replacing a battery Appendix B Related Documentation provides listings for publications manufacturer s documents and related industry specification
65. l information refer to the following table for manufacturers data sheets or user s manuals As an additional help a source for the listed document is provided Please note that while these sources have been verified the information is subject to change without notice Table B 3 Manufacturer s Publications Document Title and Source Publication Number Freescale Corporation P5020 P5010 QorlQ Integrated Processor Hardware Specifications P5020EC P5020 QorlQ Integrated Multicore Communication Processor Reference P5020RM Manual Integrated Devices IDT 89HPES32NT24xG2 PCI Express Switch User Manual CPS 1616 User Manual 100 Installation and Use 6806800P25F 103 Related Documentation EN 85 nhexXt cELUUIUGucc uUPeirco o BM 104 MVME8100 Installation and Use 6806800P25F Safety Notes EN EMC This section provides warnings that precede potentially dangerous procedures throughout this manual Instructions contained in the warnings must be followed during all phases of operation service and repair of this equipment You should also employ all other safety precautions necessary for the operation of the equipment in your operating environment Failure to comply with these precautions or with specific warnings elsewhere in this manual could result in personal injury or damage to the equipment Artesyn intends to provide all necessary information to install and handle the product
66. led The OSWD timeout is set to 108s If the timer terminates the OSWD reset sequence will be initiated OSWD is serviced and disabled by writing OXBBC2 to CPLD Command Status Register CPLD Tick Timer The MVME8100 is designed to provide three independent 32 bit timers These timers implemented in the CPLD which provides the fully programmable registers required for these timers Ethernet Interfaces The P5020 has five dTSEC controllers The controllers can be configured to implement RGMII GMII or SGMII interfaces to external Ethernet transceivers MVME8100 Installation and Use 6806800P25F 73 Functional Description 4 7 4 7 1 4 7 2 74 The MVME8100 utilizes dTSECA for a dedicated front panel 10 100 1000BASE T interface and dTSECS for a 10 100 1000BASE T interface to the RTM via P2 A Broadcom BCM5482 dual transceiver provides the RGMII gt 10 100 1000BASE T interfaces A second 10 100 1000BASE T interface to the RTM through P2 is provided using dTSEC3 in SGMII mode A Broadcom BCM54616S transceiver provides the SGMII gt 10 100 1000BASE T interface The registers of these transceivers be accessed via the P5020 s two wire Ethernet Management interface Thefront panel RJ45 connector has integrated speed and activity status indicator LED s Similar tothe front panel Ethernet the 45 connectors found in the RTM have integrated speed and activity status indicator LED s Isolation transformers are provided o
67. mponents make sure that you are working in an ESD safe environment Product Damage Inserting or removing modules with power applied may result in damage to module components Before installing or removing additional devices or modules read the documentation that came with the product 1 Attach an ESD strap to your wrist Attach the other end of the strap to the chassis as a ground Make sure that it is securely fastened throughout the procedure 2 If the PMC XMC has a front filler panel remove the PMC XMC filler plate from the front panel cut out 3 Remove the two rear stand offs from the PMC XMC The 100 heat frame has built in rear stand offs MVME8100 Installation and Use 6806800P25F 41 Hardware Preparation and Installation 4 Slide the front bezel of the PMC XMC into the cut out from behind The front bezel of the PMC XMC module will be flushed with the board when the connectors on the module align with the mating connectors on the board Note modules do not have front bezels 5 Alignthe mating connectors properly and apply minimal pressureto the PMC XMC until it is seated to the board 6 Insertthe two front PMC XMC mounting screws through the mounting holes on the bottom side of the board and then install the top side screws Tighten the screws Note Rugged PMC XMC modules installed on an ENP4 MVME8100 have more than four mounting screws 7 Install the board into the approp
68. n intelligent I O board carrier It can be used in any slot a VME chassis When the MVME8100 is installed in a chassis you are ready to connect peripherals and apply power to the board Figure 3 1 on page 49 show the locations of the various connectors on the MVME8100 Product Damage RJ 45 connectors modules are either twisted pair Ethernet TPE or E1 T1 1 network interfaces Connecting an E1 T1 J1 line to an Ethernet connector may damage your system e Make sure that TPE connectors near your working area are clearly marked as network connectors e Verify thatthe length of an electric cable connected to a TPE bushing does not exceed 100 meters e Make sure the TPE bushing of the system is connected only to safety extra low voltage circuits SELV circuits If in doubt ask your system administrator The console settings for the MVME8100 are e Eightbits per character e Onestopbit per character e Parity disabled no parity e Baud rate of 9600 baud Verify that hardware is installed and the cables connected are appropriate for your system configuration Replace the chassis or system cover reconnect the chassis to the AC or DC power source and turn the equipment power on 100 Installation and Use 6806800P25F Controls LEDs and Connectors eee Si m 3 1 Overview This chapter summarizes the controls LEDs and connectors for the MVME8100 baseboard 3 2
69. n and Installation Table 2 2 MVME8100 Specifications continued Characteristics ENP1 4 Conformal Coating Option Acrylic Product Damage High humidity and condensation on the board surface causes short circuits Do not operate the board outside the specified environmental limits Make sure the board is completely dry and there is no moisture on any surface before applying power 2 3 2 Power Requirements The MVME8100 uses the backplane 5V source to power each on board power supply The 3 3V backplane supply is not utilized in order to have backward compatibility with old 3 row chassis The 12V and 12V is routed through to the XMC and PMC connectors The power estimates provided in the following table is the total board consumption from 5V excluding the PMC XMC SATA HDD SSD and USB devices Table 2 3 Operating Voltages Voltages Minimum Normal Maximum TEES Table 2 4 Power Requirements Board Variant MVME8100 2022004015 E Board idle at OS prompt 38 Watts typical ENP1 Operating load 42 Watts typical 54 Watts Max 55 C Operating conditions No RTM PMC XMC or peripherals 30 MVME8100 Installation and Use 6806800P25F Hardware Preparation and Installation Table 2 4 Power Requirements Board Variant Power MVME8100 202180404 Operating load 65 Watts max 85 C card edge ENP4 temperature The following table shows the power limits due t
70. n board for each of the RTM ports The MVME8100 utilizes dTSEC1 and dTSEC2 in SGMII mode for two additional 1000Base BX Ethernet ports to PO SPI Interface Firmware boot Flash resides on the P5020 eSPI bus interface SPI Flash Memory The P5020 contains two Eight MB serial flash devices These devices contain the 512 bits of the Reset Configuration Word the boot firmware image U boot and the ENV environment variables Firmware Redundancy The MVME8100 utilizes two separate Eight MB boot devices in order to provide boot firmware redundancy The P5020 SPI device controller uses Chip Select 0 as the boot device so CPLD logic is used on the MVME8100 in order to swap the chip select to the boot devices The chip select control is based upon the configuration switch 55 1 At power up the selection of the SPI boot device is strictly based upon the switch 55 1 setting The selected SPI device must contain a boot image The MVME8100 supports automatic SPI FLASH fail over If booting on one device is not successful then the watchdog will trigger a board reset and the CPLD logic automatically toggle chip selects and tries to boot on the other device MVMES8100 Installation and Use 6806800P25F Functional Description 4 8 MRAM The MVME8100 includes one MR2A16AVYS35 512 KB MRAM device to provide a non volatile memory that has virtually unlimited writes 100 trillion fast access and ten years data retention without power The MRAM i
71. n of the root complex or end point eeprom for loading the configuration data after reset is determined by the root complex configuration switch S4 2 see 54 Switch on page 38 eeproms can be reprogrammed from the processor using the 2 master interface in the IDT device A swap bit in CPLD control register can be used to temporarily swap the eeprom device addressing so that the alternate eeprom can be reprogrammed A diagram of the PCle port configuration is shown in the figure below 100 Installation and Use 6806800P25F Functional Description 4 13 Figure4 2 Ports PCle 8 PCLX64 100 X4 5 D Port B X4 SRIO SRIO Ports The MVME8100 also provides multiple SRIO ports The P5020 provides a single x4 SRIO configured for 2 5 GBaud data rate This port is routed to an IDT 80HCPS1616 SRIO switch for expansion of the SRIO ports The SRIO switch supports multiple lane speeds including 1 25 2 5 3 125 and 5 0 Gbaud The MVME8100 provides two x4 SRIO ports which may be routed to the PO connector through a high speed mux The selection of SRIO or PCle ports to PO is controlled by the 52 8 configuration switch see 52 Switch on page 35 The configuration of the SRIO switch ports is controlled by an I2C eeprom connected to the SRIO switch I2C bus and loaded into the switch following reset The board provides two separate eeproms so that separate configuration data can be maintained for the MVME8100 op
72. n to notify any person of such revision or changes Electronic versions of this material may be read online downloaded for personal use or referenced in another document as a URL to an Artesyn website The text itself may not be published commercially in print or electronic form edited translated or otherwise altered without the permission of Artesyn It is possible that this publication may contain reference to or information about Artesyn products machines and programs programming or services that are not available in your country Such references or information must not be construed to mean that Artesyn intends to announce such Artesyn products programming or services in your country Limited and Restricted Rights Legend If the documentation contained herein is supplied directly or indirectly to the U S Government the following notice shall apply unless otherwise agreed to in writing by Artesyn Use duplication or disclosure by the Government is subject to restrictions as set forth in subparagraph b 3 of the Rights in Technical Data clause at DFARS 252 227 7013 Nov 1995 and of the Rights in Noncommercial Computer Software and Documentation clause at DFARS 252 227 7014 Jun 1995 Contact Address Artesyn Embedded Technologies Artesyn Embedded Technologies Marketing Communications Lilienthalstr 17 19 2900 S Diablo Way Suite 190 85579 Neubiberg Munich Tempe Arizona 85282 Germany Contents About this Manual
73. ngen im Hochfrequenzbereich auftreten Wird das Produkt in einem Wohngebiet betrieben so kann dies mit grosser Wahrscheinlichkeit zu starken St rungen f hren welche dann auf Kosten des Produktanwenders beseitigt werden m ssen nderungen oder Modifikationen am Produkt welche ohne ausdr ckliche Genehmigung von Artesyn Embedded Technologies durchgef hrt werden k nnen dazu f hren dass der Anwender die Genehmigung zum Betrieb des Produktes verliert Boardprodukte werden in einem repr sentativen System getestet um zu zeigen dass das Board den oben aufgef hrten EMV Richtlinien entspricht Eine ordnungsgem sse Installation in einem System welches die EMV Richtlinien erf llt stellt sicher dass das Produkt gem ss den EMV Richtlinien betrieben wird Verwenden Sie nur abgeschirmte Kabel zum Anschluss von Zusatzmodulen So ist sichergestellt dass sich die Aussendung von Hochfrequenzstrahlung im Rahmen der erlaubten Grenzwerte bewegt Warnung Dies ist eine Einrichtung der Klasse A Diese Einrichtung kann im Wohnbereich Funkst rungen verursachen In diesem Fall kann vom Betreiber verlangt werden angemessene Ma nahmen durchzuf hren 1 Besch digung des Produktes Hohe Luftfeuchtigkeit und Kondensat auf der Oberfl che des Produktes k nnen zu Kurzschl ssen f hren Betreiben Sie das Produkt nur innerhalb der angegebenen Grenzwerte f r die relative Luftfeuchtigkeit und Temperatur Stellen Sie vor dem Einschalten des Stroms sicher dass
74. nsole port to front panel or P2 RTM Up to 4 5232 422 485 COM ports to P2 VME Bus VME64x and 2eSST Timers Fight 32 bittimers in CPU Watchdog timer in CPU PMC XMC Two PMC XMC sites with 64 bit PMCIO on Site 1 SATA SSD Option for one 2 5 inch SATA drive PMC XMC Site 2 GPIO Interface Four GPIOs to RTM VXS Interface VITA 41 Specification compliant Support backplane PO connector Form Factor Standard 6U one slot Support 0 8 and 0 85 inch slot chassis Support heat frame on both sides for Conduction cooled board 20 MVME8100 Installation and Use 6806800P25F Introduction Table 1 1 Features List continued Function Features Miscellaneous One front panel RESET Switch LED front panel status indicators four user fail ready LEDs Planar status indicators Boundary scan support Software Support e e e e VxWorks OS support e Linux OS support RTM Compatible with RTM assembly 0106852M Onemicro DB9 connector for console port on front panel OneUSB2 0type A connector on front panel One front panel RJ45 connector with integrated LEDs for 10 100 1000 Ethernet channel site 1 front I O and rear PMC IJO site two front I O Four Serial ports to P2 RTM two with micro DB9 connectors on RTM panel and two on planar headers Two 10 100 1000BASE T Ethernet channels to RJ45 connectors on RTM panel Two 1000 BASE
75. nstallieren Auf diese Weise vermeiden Sie dass das Face Plate oder die Platine deformiert oder zerst rt wird Besch digung des Produktes und von Zusatzmodulen Fehlerhafte Installation von Zusatzmodulen kann zur Besch digung des Produktes und der Zusatzmodule f hren Lesen Sie daher vor der Installation von Zusatzmodulen die zugeh rige Dokumentation MVME8100 Installation and Use 6806800P25F 111 Sicherheitshinweise Kabel und Stecker Batterie 112 Besch digung des Produktes Bei den RJ 45 Steckern die sich an dem Produkt befinden handelt es sich entweder um Twisted Pair Ethernet oder um E1 T1 J1 Stecker Beachten Sie dass ein versehentliches Anschlie en einer E1 T1 1 Leitung an einen TPE Stecker das Produkt zerst ren kann e Sie deshalb TPE Anschl sse der Ihres Arbeitsplatzes deutlich als Netzwerkanschl sse e Stellen Sie sicher dass die L nge eines mit Ihrem Produkt verbundenen TPE Kabels 100 m nicht berschreitet e Das Produkt darf ber die TPE Stecker nur mit einem Sicherheits Kleinspannungs Stromkreis SELV verbunden werden Bei Fragen wenden Sie sich an Ihren Systemverwalter Besch digung des Blades Ein unsachgem er Einbau der Batterie kann gef hrliche Explosionen und Besch digungen des Blades zur Folge haben Verwenden Sie deshalb nur den Batterietyp der auch bereits eingesetzt wurde und befolgen Sie die Installationsanleitung Datenverl
76. o the available 5 volts pins when the MVME8 100 is installed in either a 3 row or 5 row chassis and when PMCs XMCs are present Chassis Type Power Limit Power limits PMCs or XMCs 70 W maximum Below 70 W 90 W maximum Below 90 W 1 Keep below power limit Cooling limitations must be considered 2 3 3 Thermal Requirements The MVME8100 module requires a minimum air flow of 10 CFM uniformly distributed across the board with the airflow traveling in the direction from PMC XMC 1 to PMC XMC 2 when operating at a 55 C 131 F ambient temperature 2 3 4 Thermally Significant Components The chassis into which the MVME8100 is installed must provide sufficient airflow to maintain proper board operating temperature The P5020 processor temperature should be monitored while the board is operational to ensure that the processor core temperature does not exceed 100 C The processor core temperature can be read using the I2C sensor at address 0x4C on the processor I2C bus 1 For more information refer MVME8 100 Single Board Computer Programmer s Reference MVME8100 Installation and Use 6806800P25F 31 Hardware Preparation and Installation 2 3 5 Equipment Requirements Thefollowing equipment is recommended to complete an MVME8100 system e VMEbus system enclosure System console terminal e Operating system and or application software 2 4 Configuring the Board To produce the desired configuration and ensure prop
77. ocal Bus Specification e PCI X PT 2 0 for PCI X Protocol Addendum to the PCI Local Bus Specs e Standard P1386 2001 for Standard for Common Mezzanine Card Family e Standard P1386 1 2001 for Standard Physical and Environmental Layer for PCI Mezzanine Card e VITA42for XMC e VITA 42 3 PCle for XMC sites are keyed for 3 3V PMC signaling 100 provides a x8 PCI Express interface link for PMC XMC1 and x4 PCI Express interface link for PMC XMC2 It is designed such that same PCI Express interface is used for either the or the PCle to PCI X bridge required for a PMC This is made possible by using Pericom PI3PCIE3412 PCle mux devices The PCle Mux at both sites is controlled by the CPLD The CPLD detects the presence signal provided by the XMC or PMC board and it will be used to configure the routing of PCle Mux accordingly PMC Add on Card The 100 supports up to two PMC cards PCI X operation to each site is provided using a separate IDT TSI384 PCle to PCI X bridge for each site Each Tsi384 can support up to 8 5Gbps 6465 x 133 Mhz An onboard switch will configure the TSI384 to run on either 100 MHz or 133 MHz The default is 133 MHz MVME8100 Installation and Use 6806800P25F 79 Functional Description 4 14 2 4 15 4 16 80 The MVME8100 supports multi function PMCs and Processor PMC s PrPMCs The PCI signaling voltage VIO for the site is 3 3V as required by the Tundra
78. orks_image gt setenv vxbootargs dtsec 3 0 IP address of TFTP server gt VxWorks h IP address of TFTP server e IP address of MVME8100 ffffff00 b unused IP u vxworks pw vxworks f 0x80 saveenv 94 MVME8100 Installation and Use 6806800P25F Boot System 3 TFTP the files from the server to local memory then boot run vxboot 5 4 MVME8100 Specific U Boot Commands Table 5 1 MVME8100 Specific U Boot Commands base Print or set address offset bdinfo Print board info structure boot Boot default i e run bootcmd Boot default i e run bootcmd Boot from an ELF image in memory bootm Boot application image from memory bootp Boot image through network using BOOTP TFTP protocol bootvx Boot VxWorks from an ELF image Memory compare cmp Print console devices and information cpu Multiprocessor CPU boot manipulation and release Checksum calculation Get set reset date amp time Runs POST diags ext2load Load binary file from a Ext2 file system ext2ls List files in a directory default fatinfo Print information about file system fatload Load binary file from a DOS file system MVME8100 Installation and Use 6806800P25F 95 Boot System Table 5 1 MVME8100 Specific U Boot Commands continued Command Description List files in a directory default Flattened device tree utility commands Start application at address addr Print online h
79. riate card slot Make sure that the board is well seated into the backplane connectors Do not damage or bend connector pins 42 100 Installation and Use 6806800P25F Hardware Preparation and Installation 8 Replace the chassis or system cover 9 Reconnect the system to the power source and then turn on the system Figure 2 3 Typical Placement of a PMC XMC Module on VME Module 2 5 3 SATA Installation A 2 5 SATA drive can be installed in PMC XMC site 2 The MVME8100 HDMTKIT4 SATA mounting kit 6706881A01x provides the mounting hardware A SATA drive which meets the intended board operating environment for temperature and vibration must be used MVME8100 Installation and Use 6806800P25F 43 Hardware Preparation and Installation Read all notices and follow these steps to install a SATA drive on the baseboard Logic Ground to Chassis Ground Isolation The MVME8100 ENP1 and ENP4 heat frames are isolated from the board logic ground Installing a SATA drive which has a metallic case connected to the drive logic ground will result in a short between chassis ground and the MVME8100 logic ground Damage of Circuits Electrostatic discharge and incorrect installation and removal can damage circuits or shorten their life Before touching the board or electronic components make sure that you are working in an ESD safe environment Product Damage Inserting or removing modules with power applied may result in dam
80. roller SCON mode or in Non SCON mode This is determined by on board switch settings on S4 100 Installation and Use 6806800P25F 4 16 1 4 16 2 4 17 Functional Description Tsi148 VME Controller The Tsi148 provides the required VME64 VME64X and 2eSST functions SN74VMEH22501 transceivers buffer the VME signals between Tsi148 and the VME backplane Refer to the DT Tsi148 User s Manual for additional details and programming information Tsi384 PCle to PCI PCI X Bridge The PCle to PCI PCI X Bridge function required to interface to the Tsi148 is provided by the Tundra 151384 device Tsi384 is responsible for bridging bi directional traffic between the PCle switch and the Tundra Tsi148 Per ANSI VITA 1 5 2003 the theoretical maximum transfer rate for a 6U VME card 2eSST mode is 320MBps or 2 62 Gbps USB The P5020 provides two USB 2 0 controllers with integrated PHYs The MVME8100 routes USB port 1 to the front panel to an upright USB Type A receptacle The DC power for the front panel USB port is supplied through Micrel s MIC2076 power switch which provides soft current limiting over current detection and power enable The P5020 USB port 2 is routed to a USB2512 hub device which provides two additional downstream USB 2 0 ports The two additional downstream ports are routed to the P2 connector for use on the RTM MVME8100 Installation and Use 6806800P25F 81 Functional Description 4 18 4
81. rs Table 3 11 13 23 Connectors 64 Pin Name Signal Description Pin Name Signal Description Table 3 12 14 Connector Pin Name Signal Description Pin Name Signal Description 1 PMCIO 1 33 PMCIO 33 4 PMC IO 4 36 PMC IO 36 5 5 37 PMCIO 37 6 PMCIO 6 38 PMCIO 38 7 PMCIO 7 39 PMCIO 39 8 PMCIO 8 40 PMCIO 40 10 PMCIO 10 42 PMCIO 42 11 PMCIO 11 43 PMCIO 43 12 PMCIO 12 44 PMCIO 44 13 PMCIO 13 45 PMCIO 45 14 PMCIO 14 46 PMCIO 46 16 PMCIO 16 48 PMCIO 48 17 PMCIO 17 49 PMCIO 49 18 PMCIO 18 50 PMCIO 50 19 PMCIO 19 51 PMCIO 51 MVME8100 Installation and Use 6806800P25F Table 3 12 14 Connector Controls LEDs and Connectors 20 PMC IO 20 PMCIO 52 2 23 24 PMCIO 21 1 22 PMC IO 22 PMC IO 23 PMC IO 53 PMC IO 54 PMC IO 55 PMC IO 24 PMC IO 56 25 PMC IO 25 PMC IO 57 26 PMC IO 26 PMC IO 58 27 PMC IO 27 PMC IO 59 28 PMC IO 28 PMC IO 60 30 PMC IO 30 PMC IO 62 31 PMC IO 31 63 PMC IO 63 32 PMC IO 32 64 PMC IO 64 Asset JTAG Connector The MVME8100 contains a 20 pin 0 1 header for an Asset JTAG header The pinout for the header is given in the following table Table 3 13 Asset JTAG Header Pin Assignment PIN Number Description PIN Number TCK ASSET_PRSNT_L GND on cable T 2 DO 4 GND rh DI 10 GND TRS
82. rs in Chapter 4 Functional Description The MVME8100 has ENP1 and ENP4 variants which comply with the following environmental and regulatory specifications viz ForENPI boards the operating temperatures refer to the temperature of the air circulating M around the board and not to the component temperature For ENP4 board the operating temperature refers to the temperature at the card edge frame Table 2 2 MVME8100 Specifications Characteristics ENP1 ENP4 Cooling Method Forced Air Conduction Operating temperature 0 to 55 C Storage Temperature 40 C to 85 C 40 C to 85 55 C to 105 C Note The MVME8100 ENP 4 version includes NAND Flash memory in the form of the eMMC The specified storage limits for the MVME8100 ENP 4 version are 55 C to 105 C However it should be noted that the industry standard for Flash as well as the specific vendor of this component only warrants performance without data degradation from 40 C to 85 C Storage of the MVME8100 outside this range while supported by other components on the board may result in an unspecified reduction in the data retention capabilities of the eMMC Relative humidity To 95 RH To 100 RH Vibration Sine 10min axis 2G 5 to 500Hz 10G 15 to 2000Hz Vibration Random 1hr axis 002g Hz 15 to 2000Hz 2G RMS 0 1g Hz 15 to 2000Hz 12GRMS MVME8100 Installation and Use 6806800P25F 29 Hardware Preparatio
83. s from the USB drive to the memory option usb interface 0 1 device 0 partition 1 fatload usb 0 1 1000000 File uImage fatload usb 0 1 2000000 File_ramdisk fatload usb 0 1 00000 File_dtb Bootthe Linux in memory bootm 1000000 2000000 00000 MVME8100 Installation and Use 6806800P25F 93 Boot System 5 3 4 Booting from eMMC 1 Makesurethatthekernel dtb andramdiskaresavedintheonboard eMMC device with FAT partition 2 Configure the U Boot environment variable setenv File ulImage kernel image setenv File dtp kernel dtb gt setenv File ramdisk lt ramdisk gt saveenv 3 Initialize eMMC mmcinfo 4 Loadthe files from the eMMC to the memory option mmc interface 0 1 device 0 partition 1 fatload mmc 0 1 1000000 File_ulmage fatload mmc 0 1 2000000 File ramdisk fatload mmc 0 1 f00000 SFile dtp 5 Bootthe Linux in memory bootm 1000000 2000000 00000 5 3 5 Booting VxWorks Through the Network In this mode the U Boot downloads and boots VxWorks from an external TFTP server 1 Make sure that the VxWorks image is accessible by the board from the TFTP server 2 Configure U Boot environment variables setenv ipaddr lt IP address of MVME8100 gt setenv serverip lt IP address of TFTP server gt setenv gatewayip lt gateway IP gt setenv netmask lt netmask gt setenv vxboot tftpboot vxbootfile amp amp setenv bootargs Svxbootargs amp amp bootvx setenv vxbootfile lt VxW
84. s or one double width PMC site 1 supports front PMC I O and rear PMC I O via the Jn4 connector 1 I O is routed to the VME P2 connector PMC site 2 only supports front I O and does not have Jn4 connector The PMC 1 n4 user I O signals only support low current high speed signals and thus do not support current bearing power supply usage The user configured switches are accessible with the PMC XMCs installed The onboard sites are configured to support 3 3 V I O modules The onboard sites do not support 5 0 V I O PMC modules MVMES8100 Installation and Use 6806800P25F Hardware Preparation and Installation ENP4 version only supports rugged conduction cooled PMC XMC modules see VITA 20 2001 for conduction cooled PMC for mechanical definition Follow these steps to install a PMC XMC module onto the MVME8100 board Installation Procedure Read all notices and follow these steps to install a PMC XMC on the baseboard NOTICE Logic Ground to Chassis Ground Isolation The MVME8100 ENP1 and ENP4 heat frames are isolated from the board logic ground Installing a PMC or XMC module which has mounting locations connected to the module logic ground will result in a short between chassis ground and the MVME8100 logic ground Damage of Circuits Electrostatic discharge and incorrect installation and removal can damage circuits or shorten their life Before touching the board or electronic co
85. s organized as 256Kx16 and accessible through the P5020 local bus 4 9 eMMC The MVME8100 contains a soldered down 8GB eMMC device connected to the P5020 eSDHC interface The eSDHC interface operates in four bit MMC mode and supports up to 200Mbps data transfer for MMC card using four parallel data lines 4 10 Processor Console Port The 100 utilizes P5020 port for the processor console interface This console interface can be routed to the front panel or the P2 connector using configuration switches The front panel port can be configured for RS 232 or RS 422 RS 485 modes 5 232 mode supports RX TX RTS and CTS signals Only four wire full duplex RX TX is supported in RS422 485 mode The signaling mode is selected through on board configuration switches The default baud rate on the front panel serial is 9600 baud The physical front panel console connector is a male micro min DB 9 A male to male micro mini DB9 to DB9 adapter cable is available under Artesyn Part Number SERIAL MINI D 30 W2400E01A 4 11 Rear UART Ports The MVME8100 provides four asynchronous serial UART interfaces to the P2 RTM connector by utilizing Exar s ST16C554 quad UART The QUART features 16 bytes of transmit and receive FIFO s it has a selectable receive FIFO trigger levels and data rates of up to 1 5Mbps Each UART has a set of registers that provide the user with operating status and control The QUART is a8 bit device connected to the P
86. st Row P2 Connector 2nd Row P2 Connector 3rd Row 3 3V not used P2 Connector 4th Row P2 Connector 5th Row Pin Signal Pin Signal Pin Signal Pin Signal Pin Signal Name Description Name Description Name Description Name Description Name Description A1 PMCIO 2 C1 PMCIO 1 D1 NC 71 GIGE3 MD 100_P PMC 104 C2 PMCIO3 D2 Nc 72 GND A3 PMCIO 6 RETRY C3 PMCIO 5 D3 GND Z3 GIGE3 MD IOO_N 4 8 ADDRESS PMCIO 7 D4 GND 24 A5 PMCIO 10 ADDRESS PMCIO 9 GIGE3 MD 25 lO1 P A6 PMCIO 12 B6 ADDRESS C6 PMCIO 11 D6 GND Z6 GND 26 A7 PMCIO 14 B7 ADDRESS C7 PMCIO 13 D7 USB2 P 77 GIGE3 MD 27 lO1 N MVME8100 Installation and Use 6806800P25F 55 Controls LEDs and Connectors Table 3 6 P2 Connectors P2 Connector 1st P2 Connector 2nd P2 Connector 3rd P2 Connector 4th P2 Connector 5th Row Row Row Row Row Pin Signal Pin Signal Pin Signal Pin Signal Pin Signal Name Description Name Description Name Description Name Description Name Description A8 PMCIO 16 B8 ADDRESS C8 28 PMCIO 18 ADDRESS 29 PMCIO 15 PMCIO 17 GIGE3_MD lO2 P PMC IO 20 o A11 PMC IO 22 ADDRESS 31 PMC IO 24 PMC IO 19 PMC IO 21 PMC IO 23 GPIO_3 GND 211 GIGE3_MD lO2 N GND PMC IO 26 PMC IO 25 2 DATA GIGE3 MD IO3 P PMC IO 28 PMC IO 30 DATA 16 PMC IO 27 PMC IO 29 I2C CLK
87. tem e Make sure that TPE connectors near your working area are clearly marked as network connectors e Verify that the length of an electric cable connected to a TPE bushing does not exceed 100 meters Make sure the TPE bushing of the system is connected only to safety extra low voltage circuits SELV circuits If in doubt ask your system administrator MVME8100 Installation and Use 6806800P25F 107 Safety Notes Battery 108 Board System Damage Incorrect exchange of lithium batteries can result in a hazardous explosion When exchanging the on board lithium battery make sure that the new and the old battery are exactly the same battery models If the respective battery model is not available contact your local Artesyn sales representative for the availability of alternative officially approved battery models Data Loss Exchanging the battery can result in loss of time settings Backup power prevents the loss of data during exchange Quickly replacing the battery may save time settings Data Loss If the battery has low or insufficient power the RTC is initialized Exchange the battery before seven years of actual battery use have elapsed PCB and Battery Holder Damage Removing the battery with a screw driver may damage the PCB or the battery holder prevent damage do not use a screw driver to remove the battery from its holder MVME8100 Installation and Use 6806800P25F Sicherheitshinweise EN Dieses K
88. teristic Value Height 233 44 mm 9 2inches 261 8 mm 10 3 inches Maximum Component Height 14 8 mm 0 58 inches Weight estimated 0 58 Kg ENP1 0 90 Kg ENP4 1 4 Ordering Information When ordering board variants or board accessories use the order numbers given in the following tables 1 4 1 Supported Board Models Table 1 4 Board Variants Marketing Processor MVME8100 202200401E P5020 2 0GHz 28W 4GB DDR3 VXS 2 PMC XMC IEEE ENP1 MVME8100 202200401S P5020 2 0GHz 28W 4GB DDR3 VXS 2 PMC XMC SCANBE ENP1 MVME8100 202200404 P5020 1 8GHz 27W 4GB DDR3 VXS 2 PMC XMC ENP4 24 MVME8100 Installation and Use 6806800P25F Introduction 1 4 2 Board Accessories This table lists the available expansion and transition modules for the MVME8100 Model Number Description VXS1 RTM1 RTM for MVME8100 supports ENP1 specifications only MVME8100 HDMNTKIT4 SSD Mounting kit HDD not included MVME8100 Installation and Use 6806800P25F 25 Introduction _ 26 100 Installation and Use 6806800P25F Chapter 2 Hardware Preparation and Installation 2 1 Overview This chapter provides startup and safety instructions related to this product hardware preparation instruction that includes default switch settings System considerations and installation instructions for the baseboard and Rear Transition Module RTM are also described in this ch
89. ures that are specific to the MVME8100 For general information on U Boot see http www denx de wiki UBoot WebHome Accessing U Boot 1 Connect the board to a computer with a serial interface connector and a terminal emulation software running on it The serial connector of the board is found on the face plate 2 Configure the terminal software to use the access parameters that are specified in U Boot By default the access parameters are as follows e Baud rate 9600 PCANSI 8 data bits No parity 1 stop bit These serial access parameters are the default values These can be changed from within the U Boot For details refer to the U Boot documentation 3 Boot the MVME8100 4 When prompted press the Ctrl C key MVME8100 Installation and Use 6806800P25F 91 Boot System U Boot aborts the boot sequence and enters into a command line interface mode YE Enter the command setenv bootdelay 1 saveenv to disable the U Boot auto boot M feature and let the U Boot directly enter the command line interface after the next reboot power up 5 3 BootOptions 5 31 Booting from a Network In this mode U Boot downloads and boots the Linux kernel from an external TFTP server and mounts a root file system located on a network server 1 Makesurethatthe kernel dtb and ramdisk are accessible to the board from the TFTP server 2 Configure U Boot environment variables setenv ipaddr IP address of MVME8100 setenv serverip
90. ust Wenn Sie die Batterie austauschen k nnen die Zeiteinstellungen verloren gehen Eine Backupversorgung verhindert den Datenverlust w hrend des Austauschs Wenn Sie die Batterie schnell austauschen bleiben die Zeiteinstellungen m glicherweise erhalten MVME8100 Installation and Use 6806800P25F Sicherheitshinweise Datenverlust Wenn die Batterie wenig oder unzureichend mit Spannung versorgt wird wird der RTC initialisiert Tauschen Sie die Batterie aus bevor sieben Jahre tats chlicher Nutzung vergangen sind Sch den an der Platine oder dem Batteriehalter Wenn Sie die Batterie mit einem Schraubendreher entfernen k nnen die Platine oder der Batteriehalter besch digt werden Um Sch den zu vermeiden sollten Sie keinen Schraubendreher zum Ausbau der Batterie verwenden Umweltschutz Entsorgen Sie alte Batterien und oder Blades Systemkomponenten RTMs stets gem der in Ihrem Land g ltigen Gesetzgebung wenn m glich immer umweltfreundlich MVME8100 Installation and Use 6806800P25F 113 Sicherheitshinweise _ _____ 114 MVME8100 Installation and Use 6806800P25F A mS S wm Eu E EMBEDDED TECHNOLOGIES Artesyn Embedded Technologies Artesyn and the Artesyn Embedded Technologies logo are trademarks and service marks of Artesyn Embedded Technologies Inc All other product or service names are the property of their respective owners 9 2014 Artesyn Embedded Technologies Inc

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