XTS UserManual
Contents
1. The CD contains technical documents of the XTS card Figure 1 2 XTS Card Package 1 2 Getting Help Here are some places to get help if you encounter any problem Email to support terasic com Taiwan amp China 886 3 550 8800 Korea 82 2 512 7661 Japan 81 428 77 7000 lt lt lt lt CHAPTER 2 Architecture This chapter describes the architecture of the XTS card including block diagram and components 2 1 Layout and Componets The picture of the XTS is shown in Figure 2 1 and Figure 2 2 It depicts the layout of the board and indicates the locations of the connectors and key components per Y TX SMAs und RX SMAs TMS 4 e m Cm Test Point e fe Tele Test Point Area di e p l RX0 L 9 HSMC TXO KIS 4 CLA 9 i kant SMA Output CLK SMA Input CLK Figure 2 1 The XTS Card PCB and component diagram ann ow HSMC Connector Pi aj aj UI TT LED AN gt 2 E Figure 2 2 The XTS card back side HSMC connector view The following components are provided on the XTS card HSMC expansion connector J8 TX SMAs J9 J11 J13 J15 J17 J19 J21 J23 RX SMAS J10 J12 J14 J16 J18 J20 J22 J24 e SMA Outpu2. and Instructions Transceiver Loopback Test Demo Project directory xts loopback test s4gfp Bit Stream used xts loopback test s4gfp sof Stratix IV GX FPGA Development Kit Setup Set SW4 switches 1 2 4 in the up position and switches 5 6 8 in the down position Setthe rotary switch SW2 to the 0 position Power on the Stratix IV GX FPGA Development Board and download the SOF file xts loopback test s4gfp sof LEDO LED3 shows the test results for transceiver channels 0 3 respectively If the LED is blinking it 16 indicates the test has passed e Remove one of the SMA cable from one of the connector so that the loopback will fail A Failure is indicated the Stratix IV GX FPGA Dev Kit when the LED turns ON e To reset the board test system press and release the PBO reset button on the host board e Press and release PB1 can insert error pattern and create failure condition CHAPTER Appendix 5 1 Revision History Date Change Log DEC 29 2009 Initial Version JAN 12 2010 Added demonstration chapter 5 2 Always Visit XTS Webpage for New Main board We will be continuing providing interesting examples and labs on our XTS webpage Please visit www altera com or xts terasic com for more information 17
3. CLKOUT N2 HSMC CLKIN N2 R21 159 HSMC PSNTn 0 GNDS Figure 3 1 The pin outs of the HSMC connector Table 3 1 below lists the HSMC signal direction and description Pin Numbers O JO N O O OQO N TO INI N C N C N C N C N C N C N C N C N C N C N C N C N C N C N C N C HSMC_TX_P3 HSMC_RX_P3 HSMC_TX_N3 HSMC_RX_N3 HSMC_TX_P2 HSMC_RX_P2 HSMC TX N2 HSMC RX N2 HSMC TX P1 HSMC P1 HSMC TX HSMC RX 1 HSMC TX HSMC RX HSMC_TX_NO HSMC_RX_NO N C N C HSMC_TCK Direction N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A N A Output Input Output Input Output Input Output Input Output Input Output Input Output Input Output Input N A N A Inout Description Not Connect Not Connect Not Connect Not Connect Not Connect Not Connect Not Connect Not Connect Not Connect Not Connect Not Connect Not Connect Not Connect Not Connect Not Connect Not Connect SMA Transceiver Output SMA Transceiver Input SMA Transceiver Output SMA Transceiver Input SMA Transceiver Output SMA Transceiver Input SMA Transceiver Output SMA Transceiver Input SMA Transceiver Output SMA Transceiver Input S
4. MA Transceiver Output SMA Transceiver Input SMA Transceiver Output SMA Transceiver Input SMA Transceiver Output SMA Transceiver Input Not Connect Not Connect JTAG 36 HSMC_TMS Inout JTAG 37 HSMC_TDO Inout JTAG 38 HSMC_TDI Inout JTAG 39 HSMC_CLKOUTO N A CLKOUTO Test Point 40 HSMC_CLKINO N A CLKINO Test Point 41 N C N A Not Connect 42 N C N A Not Connect 43 N C N A Not Connect 44 N C N A Not Connect 45 3V3 Power Power 3 3V 46 12V Power Power 12V 47 N C N A Not Connect 48 N C N A Not Connect 49 N C N A Not Connect 50 N C N A Not Connect 51 3V3 Power Power 3 3V 52 12V Power Power 12V 53 N C N A Not Connect 54 N C N A Not Connect 55 N C N A Not Connect 56 N C N A Not Connect 57 3V3 Power Power 3 3V 58 12V Power Power 12V 59 N C N A Not Connect 60 N C N A Not Connect 61 N C N A Not Connect 62 N C N A Not Connect 63 3V3 Power Power 3 3V 64 12V Power Power 12V 65 N C N A Not Connect 66 N C N A Not Connect 67 N C N A Not Connect 68 N C N A Not Connect 69 3V3 Power Power 3 3V 70 12V Power Power 12V 71 N C N A Not Connect 72 N C N A Not Connect 73 N C N A Not Connect 74 N C N A Not Connect 75 3V3 Power Power 3 3V 76 12V Power Power 12V 77 N C N A Not Connect 78 N C N A Not Connect 79 N C N A Not Connect 80 N C N A Not Connect 81 3V3 Power Power 3 3V 82 12V Power Power 12V 83 N C N A Not Connect 84 N C N A Not Connect 85 N C N A Not Connect 86 N C N A Not Connect 87 3V3 Powe
5. TadasiC www terasic com XTS Terasic XTS Daughter Card User Manual Preliminary Version 2009 by Terasic INTRODUCTION eu 1 T t 1 0 2 7 10 gt aa AN AAA PA NA TA AA AA AA SANA ANA AR 1 d BOUT FIE 2 2 ARCHITECTURE RR 3 1 3 2 1 LAYOUT rd e te itcm an 3 1 4 2 2 BLOCK DIAGRAM een sl sas tid ola ot a a lran l ano tv ala sl la dal l 5 BOARD COMPONENT uni ta e kos a ae ai ee 6 1 5 3 1 EXPANSION CONNECTOR oom nm 6 ON 13 INTRODUC 13 2 0 OE MEIN 14 452 SETUP THE DEMONSTRATION ets e Ke it tat al tet lt ta anle ka m 14 16 APPEND 17 SNN EY ON TO ie f esse 17 5 2 ALWAYS VISIT XTS WEBPAGE FOR NEW MAIN BOARD ssscccccccseeccccccceccccccecceccccuseeccccauececcccuacecceccuecscceceuececcecuaaceeseceaees 17 CHAPTER Introduction The XTS daughter card is designed to convert FPGA transceiver chann
6. ct Not Connect Not Connect Power 3 3V Power 12V Not Connect Not Connect Not Connect Not Connect Power 3 3V Power 12V Not Connect Not Connect Not Connect Not Connect Power 3 3V Power 12V Not Connect Not Connect Not Connect Not Connect Power 3 3V Power 12V Not Connect Not Connect Not Connect Not Connect Power 3 3V Power 12V Not Connect Not Connect Not Connect Not Connect Power 3 3V Power 12V Not Connect 150 151 152 153 154 155 156 157 158 159 160 3V3 12V HSMC CLKOUT P2 HSMC CLKIN P2 HSMC CLKOUT N2 HSMC 2 3V3 HSMC_PSNTn N A N A N A Power Power Output Input Output Input Power Power 12 Not Connect Not Connect Not Connect Power 3 3V Power 12V SMA differential Output CLK SMA differential Input CLK SMA differential Output CLK SMA differential Input CLK Power 3 3V Power Ground CHAPTER A Demonstration This chapter illustrates the reference design for the XTS HSMC card 4 1 Introduction This section describes the functionality of the demonstration briefly The demonstration illustrates a loopback test for transceiver channels using the XTS daughter card and the Stratix IV GX FPGA Development board Figure 4 1 depicts the basic block diagram for this demonstration The demonstration is intended for users to provide a basic introduction to the XTS daughter card with the procedures to control different hardware and software sett
7. els to SMA connectors through a High Speed Mezzanine Connector HSMC interface It is intended to allow users to evaluate the performance of transceiver based host boards with HMSC interface specifically Stratix IV GX Stratix Il GX Arria GX and Cyclone IV GX with integrated transceivers Through the SMA connectors the FPGA transceiver signals can be easily connected to measurement instruments as well as allowing gigabit data rate communication between multiple FPGA boards The XTS daughter is the ideal platform to allow users to prototype and test their high speed interfaces quickly and easily in support of transceiver performance for jitter protocol compliance and equalization 1 1 Features Figure 1 1 shows the photo of the XTS card The important functions of the XTS card are listed below e Convert transceiver channels to SMA connectors through interface e Support 4 transceiver channels e SMA connectors for PLL input and output differential clock e Applicable for large volume applications that require high speed Gigabit data transfer WW EN NN 2 li M MWN Sen 0 ER 10 AS py j 2 A ki Ses ON y QU f gt LOR 4 N N m l M 4 tx 7 Mu Figure 1 1 The picture of the XTS card 1 2 About the KIT This section describes the package content XTS Card x 1 e System CD ROM x 1
8. ings FPGA Host Board XTS Board HSMC Connector TX Transceiver TX_Pattern annes TX SMA Connector RX Transceiver Channels RX RX Verify PP SMA Connector Figure 4 1 Block diagram of the loopback test function 13 4 2 System Requirements The following items are required for the XTS loopback demonstration e XISx1 e Stratix IV GX FPGA Development Board x 1 e SMA Cable x 8 4 3 Setup the Demonstration Figure 4 2 4 3 4 4 and 4 5 shows how to setup hardware for the XTS demonstration Connect SMA Cable to J21 J23 as shown in Figure 4 2 to short the positive signal of the transceiver channel 0 HSMC TXOp Figure 4 2 Short J21 and J22 via SMA Cable li Connect SMA Cable to J22 and J24 as shown in Figure 4 3 to short the negative signal of the transceiver channel 0 HSMC TXOn 14 Figure 4 3 Short J23 and J24 via SMA Cable ii Repeat steps i and ii to short the other transceiver channels as shown in Figure 4 4 Figure 4 4 Short all the transceiver channels iv Connect the XTS card to Stratix IV GX FPGA Development Board See Figure 4 5 15 Figure 4 5 Transceiver loopback test setup Note The XTS card must be connected to HSMC Slot of the Stratix IV GX FPGA Development Board for this demonstration 4 4 Demo Operation This section describes the procedures of running the demonstration FPGA Configuration Demonstration Setup File Locations
9. r Power 3 3V 88 12V Power Power 12V 89 N C N A Not Connect 90 N C N A Not Connect 91 N C N A Not Connect 92 N C N A Not Connect 93 3V3 Power Power 3 3V 94 12V Power Power 12V 95 HSMC CLKOUT P1 N A Differential CLKOUT Test Point 96 HSMC CLKIN N A Differential CLKIN Test Point 97 HSMC CLKOUT N1 N A Differential CLKOUT Test Point 98 HSMC 1 Differential CLKIN Test Point 99 3V3 Power Power 3 3V 100 12V Power Power 12V 101 N C N A Not Connect 102 N C N A Not Connect 103 N C N A Not Connect 104 N C N A Not Connect 105 3V3 Power Power 3 3V 106 12V Power Power 12V 107 N C N A Not Connect 108 N C N A Not Connect 109 N C N A Not Connect 110 N C N A Not Connect 111 3V3 Power Power 3 3V 10 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 197 138 139 140 141 142 143 144 145 146 147 148 149 12V N C N C N C N C 3V3 12V N C 3V3 12V N C N C N C N C 3V3 12V 3V3 12V N C N C N C N C 3V3 12V 3V3 12V N C Power N A N A N A N A Power Power N A N A N A N A Power Power N A N A N A N A Power Power N A N A N A N A Power Power N A N A N A N A Power Power N A N A N A N A Power Power N A 11 Power 12V Not Connect Not Conne
10. t CLK J25 J27 SMA Input CLK J26 J28 2 2 Block Diagram Figure 2 3 shows the block diagram of the XTS card HSMC Connector Transceivers connected to SMA connectors Clock Inputs Outputs to L SMA Connectors Figure 2 3 The block diagram of the XTS Card CHAPTER Board Components This section will describe the detailed information of the components connector interfaces and the pin mappings on the XTS card 3 1 HSMC Expansion Connector This section describes the HSMC connector on the XTS card The XTS card contains an Altera standard HSMC connector All the other interfaces on the XTS card are connected to the HSMC connector Figure 3 1 shows the pin outs of the HSMC connector and Table 3 1 lists the description of each signals corresponding to the HSMC connector CLKOUTO 3 3V ZLKOUT P1 gt LKOUT_N1 J8 HSMC TX P3 RX HSMC TX N3 RX N3 HSMC TX P2 RX P2 HSMC TX N2 RX N2 HSMC TX 1 RX P1 HSMC TX N1 RX N1 HSMC TX PO RX PO HSMC TX NO RX NO HSMC TCK TMS HSMC TDO TDI HSMC CLKOUTO CLKINO P CLKINO 162 HSMC 3 3V AC HSMC 12V m Ag 12V AQ E 3 HSMC CLKOUT 1 95 HSMC CLKIN 1 HSMC CLKOUT 1 log HSMC CLKIN N1 1 d 100 CLKINTN1 H 167 1 0 8 8 09 HSMC CLKOUT 2 455J HSMC CLKIN P2 HSMC
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