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DT9800 Series User's Manual

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1. Unipolar Bipolar Function Module Output Input Module Series Name Range Range DT9800 Standard DT9802 Oto10Vor 10Vor Series O0to5V 5 V DT9804 N A 10V DT9806 DT9800 MAC Series DT9802 MAC O0to10Vor 10Vor O0to5V 5 V DT9804 MAC N A 10 V DT9800 EC Series DT9802 EC Oto10Vor 10Vor Oto5V 5 V DT9804 EC N A 10V DT9800 EC I Series DT9802 EC I O0to10Vor 10Vor O0to5V 5 V DT9804 EC N A 10 V Specify the range using software set the gain to 1 41 Chapter 2 Conversion Modes DT9802 DT9802 MAC DT9802 EC DT9802 EC I DT9804 DT9804 MAC DT9804 EC DT9804 EC I and DT9806 modules can perform single value analog output operations only Use software to specify the range gain and analog output channel then output the data from the specified channel You cannot specify a clock source trigger source or buffer Note You cannot perform a single value analog output operation while the A D subsystem is running The settling time for each DAC is 50 us 20 V steps Single value operations stop automatically when finished you cannot stop a single value operation Data Format Data from the host computer must use offset binary data encoding for analog output signals Using software specify the data encoding as binary In software you need to supply a code that corresponds to the analog output value you want the module to output To convert a voltage to a code use the fo
2. Table 12 Pulse Output Signals Screw Screw Counter Terminal J1 Pin Terminal on J5 Pin Module Timer on Module Number AC1324 Panel Number DT9800 Standard 0 TB53 53 aiia 1 TB49 49 DT9800 MAC Series DT9800 EC Series 0 TB19 19 piano ee 1 N T TB15 15 Series DT9800 Series function modules support the following pulse output types on the clock output signal e High to low transitions The low portion of the total pulse output period is the active portion of the counter timer clock output signal e Low to high transitions The high portion of the total pulse output period is the active portion of the counter timer pulse output signal You specify the pulse output type in software 51 Chapter 2 The duty cycle or pulse width indicates the percentage of the total pulse output period that is active A duty cycle of 50 then indicates that half of the total pulse is low and half of the total pulse output is high You specify the duty cycle in software Note The minimum pulse width must be 650 ns Figure 6 illustrates a low to high pulse with a duty cycle of approximately 30 Active Pulse ke high pulse Total Pulse Period low pulse Figure 6 Example of a Low to High Pulse Output Type 52 Principles of Operation Counter Timer Operation Modes DT9800 Series function modules support the following counter tim
3. Acquire a single value using olDaGetSingleValue or olDaGetSingleValueEx Acquiring data Convert the data from counts to voltage using olDaCodeToVolts or from voltage to counts using olDaVoltsToCode if desired Output a single value using olDaPutSingleValue another value Note To convert a voltage to temperature linearize the voltage for the specified i thermocouple type then subtract the CJC Release the subsystem using temperature 10 mV per C from the linearized olDaReleaseDASS value Refer to the Omega Complete J Temperature Measurement Handbook and Encyclopedia for more information on linearizing Release the driver and terminate the N values session using OlDaTerminate D 1 Analog input channels range from 0 to 15 for single ended and pseudo differential configurations or 0 to 7 for the differential configuration using the specified gain 1 2 4 or 8 for all modules except the DT9805 and DT9806 which support gains of 1 10 100 and 500 If you use olDaGetSingleValueEx the board can determine the best gain to use for the range autorange is True the value is returned in both counts and voltage 2 Eight digital input lines 0 to 7 are available on Port A and eight digital output lines 0 to 7 are available on Port B 3 The value is output to the specified analog output channel DAC 0 or 1 or to a digital output line using a
4. 000 e eee eee eee 45 Counter Timer Features 0 000000 ccc cece eee 46 NS e sccccscrereelocred se Vise sere steed seas bean ek 46 C T Clock Sources 0 ccc eee eee eee 47 Internal C T Clock occ 2aieceet teres tae eB kient kiu 47 External C T Clock 0 0 0 cc eee 47 Internally Cascaded Clock 0000008 48 Gate Types ntact wpe ddain tard aaa ei adelante 49 Pulse Output Types and Duty Cycles 51 Counter Timer Operation Modes 004 53 Event Counting oii cise iain edie ao Frequency Measurement 0 0000 ee eee 54 vi Contents Rate Generation 0 0 0 e eee eee ee ees 56 One Shot 2ccitenericuertdersdcines a a a 59 Repetitive One Shot 00 0000000008 61 Chapter 3 Supported Device Driver Capabilities 65 Chapter 4 Programming Flowcharts 77 Single Value Operations 0 0000 c eee eee eee eee 79 Continuous A D Operations 66666 c cece eee 81 Event Counting Operations 6 666 c cece eee eee 83 Frequency Measurement Operations 005 85 Pulse Output Operations 0 000 87 Chapter 5 Calibration 0 00 cece eee eee 101 Running the Calibration Utility 004 103 Calibrating the Analog Input Subsystem 104 Configuring for Calibration 008 104 Calibrating the Analog Input Circuitry
5. 114 Table 14 Troubleshooting Problems cont Symptom Possible Cause Possible Solution Device failure error reported The DT9800 Series function module cannot communicate with the Microsoft bus driver or a problem with the bus driver exists Check your cabling and wiring and tighten any loose connections see the instructions in the DT9800 Series Getting Started Manual The DT9800 Series function module was removed while an operation was being performed Ensure that your DT9800 Series function module is properly connected see the instructions in the DT9800 Series Getting Started Manual Data appears to be invalid An open connection exists Check your wiring and fix any open connections see the instructions in the DT9800 Series Getting Started Manual A transducer is not connected to the channel being read Check the transducer connections see the instructions in the DT9800 Series Getting Started Manual The module is set up for differential inputs while the transducers are wired as single ended inputs or vice versa Check your wiring and ensure that what you specify in software matches your hardware configuration see the instructions in the DT9800 Series Getting Started Manual Computer does not boot The power supply of the computer is too small to handle all the system resources Check the power requirements of your system resources and
6. 2 EC EC 8 DIe 8 output acd Serias DT9802 16SE 100kS s 2f 8input 2 EC 8 DIP 8 output DT9803 16 SE 100 kS s 0 8 input 2 EC 8 DIY 8 output DT9804 16SE 100kS s 2 8 input 2 ECP 8 DIS 8 output DT9800 Windows DT9801 16 SE 100 kS s 0 8 input 2 EC I EC I 8 DI 8 output acd ones DT9802 16SE 100kS s 2f 8input 2 EC I 8 DIe 8 output DT9803 16 SE 100 kS s 0 8 input 2 EC IP 8 DIY 8 output DT9804 16SE 100kS s 2h 8 input 2 EC I 8 DIS 8 output a The resolution is 12 bits b The resolution is 16 bits Overview c The gains provided on the DT9805 and DT9806 are 1 10 100 and 500 All other modules provide gains of 1 2 4 and 8 d The DT9800 EC Series boards are nonisolated the DT9800 EC I Series boards and all other DT9800 Series boards are isolated e The analog input range is 0 to 10 V or 10 V f The analog output range is 0 to 10 V 0 to 5 V 10 V or 5 V g The analog input range is 10 V h The analog output range is 10 V All DT9800 Series function modules share the following major features e USB compatibility e Software configurable termination resistance for differential inputs on a channel by channel basis e Input gains of 1 2 4 and 8 for all modules except the DT9805 and DT9806 which support gains of 1 10 100 and 500 e Continuously paced and triggered scan capability e A32 location channel gain list that su
7. Offset is the actual minus full scale value The minus full scale value is 0 0 V for the unipolar input range and 40 V for the bipolar input range For example assume that you are using a DT9801 with a unipolar input range If the software returns a code of 2010 for the analog input operation determine the analog input voltage as follows LSB __ 10 0 002441 V 0 0 V 4096 Vin 2010 0 002441 0 V Vin 4 906 V Principles of Operation Similarly assume that you are using a DT9804 board with a bipolar input range The actual minus full scale value is 40 0 V If the software returns a code of 2010 for the analog input operation determine the analog input voltage as follows LSB 20 0 000305 V 65536 Vin 2010 0 000305 4410 0 V Vin 9 370 V Table 7 lists the values that are returned when the DT9800 Series function module is overrange Table 7 Overrange Signal Values Function Module Above Range Below Range Module Series Name Signals Signals DT9800 Standard DT9801 FFFh 000h Series DT9802 plus full scale minus full scale DT9803 FFFFh 0000h DT9804 plus full scale minus full scale DT9805 DT9806 DT9800 MAC Series DT9801 MAC FFFh 000h DT9802 MAC plus full scale minus full scale DT9803 MAC FFFFh 0000h DT9804 MAC plus full scale minus full scale DT9800 EC Series DT9801 EC FFFh 000h DT9802 EC plus full scale minus full scale DT9803 EC FFFFh 0000h
8. The following conventions are used in this manual e Notes provide useful information or information that requires special emphasis cautions provide information to help you avoid losing data or damaging your equipment and warnings provide information to help you avoid catastrophic damage to yourself or your equipment e Items that you select or type are shown in bold About this Manual Related Information Refer to the following documents for more information on using the DT9800 Series function modules Benefits of the Universal Serial Bus for Data Acquisition This white paper describes why USB is an attractive alternative for data acquisition It is available on the Data Translation web site www datatranslation com DT9800 Series Getting Started Manual UM 17471 This manual included on the Data Acquisition OMNI CD describes the how to install the DT9800 Series function modules and related software DT Measure Foundry Getting Started Manual UM 19298 and online help These documents describe how to use DT Measure Foundry to build drag and drop test and measurement applications for Data Translation data acquisition devices without programming DataAcq SDK User s Manual UM 18326 For programmers who are developing their own application programs using the Microsoft C compiler this manual describes how to use the DT Open Layers DataAcq SDK to access the capabilities of Data Translation data acquisitio
9. 68 Supported Device Driver Capabilities Table 13 DT9800 Series Supported Options cont Triggered Scan Mode cont DT9800 Series A D D A DIN DOUT SRL C T Total Subsystems on Module Maximum Retrigger Frequency OLSSCE_MAXRETRIGGER Minimum Retrigger Frequency OLSSCE_MINRETRIGGER 1 100 kHz 50 kHz 0 75 Hz4 1 1 1 0 2 Channel Gain List Maximum Channel Gain List Depth OLSSC_CGLDEPTH Sequential Channel Gain List Support OLSSC_SUP_SEQUENTIAL_CGL Zero Start Sequential Channel Gain List Support OLSSC_SUP_ZEROSEQUENTIAL_ CGL Random Channel Gain List Support OLSSC_SUP_RANDOM_CGL Simultaneous Sample and Hold Support OLSSC_SUP_SIMULTANEOUS_SH 32 Yes Yes Yes Channel List Inhibit Support OLSSC_SUP_CHANNELLIST_ INHIBIT Gain Programmable Gain Support OLSSC_SUP_PROGRAMGAIN Number of Gains OLSSC_NUMGAINS Yes 48 Autoranging OLSSC_SINGLEVALUE_AUTORANGE Yes 69 Chapter 3 70 Table 13 DT9800 Series Supported Options cont Synchronous Digital I O DT9800 Series A D D A DIN DOUT SRL C T Total Subsystems on Module Synchronous Digital I O Support OLSSC_SUP_SYNCHRONOUS _ DIGITALIO Maximum Synchronous Digital I O Value OLSSC_MAX_DIGITALIOLIST_VALUE 1 Yes k 1 1 1 0 I O Channels Number of Channels OLSSC_NUMCHANNELS DT2896 Chan
10. Canadian Department of Communications Statement This digital apparatus does not exceed the Class A limits for radio noise emissions from digital apparatus set out in the Radio Interference Regulations of the Canadian Department of Communications Le pr sent appareil num rique n met pas de bruits radio lectriques d passant les limites applicables aux appareils num riques de la class A prescrites dans le R glement sur le brouillage radio lectrique dict par le Minist re des Communications du Canada Table of Contents About this Manual 000 cece eee eee eee ix Intended Audience 0 c ccc cece nt n eens ix What You Should Learn from this Manual ix Conventions Used in this Manual 0 000 e eee x Related Information aenn 00 0 ccc cece cece een nee xi Where To Get Help 0 0 0 xii Chapter 1 Overview 20 00 cece e eee eee 1 Features tes s ccete cet eee ade hada eh SE ee ake eee 2 Supported Software erys iei eee eee 7 Accessoris 4accu ban it Hi aed ee eh ee eee Bde Ghee 9 Chapter 2 Principles of Operation 11 Analog Input Features sunun nur eee eee eee 13 Input Resolution ssi cse caved ieren y ien EV 13 Analog Input Channels 000000 0000008 14 Specifying a Single Channel 0 15 Specifying One or More Channels 16 Specifying Digital Input Lines in the Analog Input
11. Name Phone Contract Number Address Data Translation hardware product s serial number configuration Data Translation device driver SPO number version Data Translation software SPO number serial number version PC make model operating system version Windows version processor speed RAM hard disk space network number of users disk cache graphics adapter data bus have the following boards and applications installed in my system am encountering the following problem s and have received the following error messages codes have run the board diagnostics with the following results You can reproduce the problem by performing these steps 1 Troubleshooting E Mail and Fax Support You can also get technical support by e mailing or faxing the Technical Support Department e E mail You can reach Technical Support at the following address tsupport datx com Ensure that you provide the following minimum information Your name Your company or organization A phone number An e mail address where you can be reached The hardware software product you need help on A summary of the issue you are experiencing Your contract number if applicable and Your product serial number or purchase date Omitting any of the ab
12. software or external input Figure 5 Counter Timer Channel Principles of Operation Each counter corresponds to a counter timer C T subsystem To specify the counter to use in software specify the appropriate C T subsystem Counter 0 corresponds to C T subsystem element 0 counter 1 corresponds to C T subsystem element 1 C T Clock Sources The following clock sources are available for the user counters e Internal C T clock e External C T clock and e Internally cascaded clock Refer to the following subsections for more information on these clock sources Internal C T Clock The internal C T clock uses a 12 MHz time base Counter timer operations start on the rising edge of the clock input signal Through software specify the clock source as internal and the frequency at which to pace the counter timer operation this is the frequency of the clock output signal The maximum frequency that you can specify for the clock output signal is 750 kHz The minimum frequency that you can specify for the clock output signal for each 16 bit counter is 183 1 Hz The rising edge of the clock is the active edge External C T Clock An external C T clock is useful when you want to pace counter timer operations at rates not available with the internal C T clock or if you want to pace at uneven intervals The rising edge of the external C T clock input signal is the active edge 47 Chapter 2 Using softw
13. 3 Click A D Ch 0 4 Click the increment or decrement arrows in the Gain box until the A D value on the screen reads 9 3750 V within 0 001 V for the DT9803 DT9803 EC DT9803 EC I DT9804 DT9804 EC DT9804 EC I DT9805 and DT9806 modules and within 0 010 V for the DT9801 DT9801 EC DT9801 EC I DT9802 DT9802 EC and DT9802 EC I modules Note If you are not satisfied with the analog input calibration you can load the factory default settings stored in the EEPROM by clicking Restore in the A D Configuration Factory Settings box Once you have finished this procedure the analog input circuitry is calibrated If you are using a DT9805 or DT9806 function module it is recommended that you calibrate the thermocouple circuitry using the instructions in the next section Otherwise you can calibrate the analog output circuitry if you wish following the instructions on page 109 106 Calibration Calibrating the Thermocouple Circuitry Note Ensure that the DT9805 or DT9806 module has been running for about 1 2 hour allowing the module to warm up and that you have calibrated the analog input circuitry using the procedure described on page 104 before calibrating the thermocouple circuitry To calibrate the thermocouple circuitry on the DT9805 or DT9806 modules perform the following steps 1 Disconnect all signals to Analog Input 0 TB1 leaving it open no connections 2 Connect Analog In 1 TB3 to Anal
14. 7 For A D operations on all modules except the Specify the gain for each channel in DT9805 and DT9806 use a gain of 1 2 4 or 8 the channel gain list using For A D operations on the DT9805 and DT9806 olDaSetGainListEntry use a gain of 1 10 100 or 500 Use a gain of 1 the default if you use digital channel 16 and for all other operations If you want to output data to the dynamic digital output line enable synchronous digital output operation For A D subsystems only enable or disable the default a synchronous digital output operation with olDaSetSynchronousDigitallOUsage Values range from 0 the default to 1 As each entry of the analog channel list is sampled the value of the corresponding entry in the digital list is output to the dynamic digital output line For A D subsystems only specify the values of the digital channel list with olDaSetDigitallOListEntry 90 Programming Flowcharts Set Clocks and Triggers Specify the clock source as OL_CLK_INTERNAL using olDaSetClockSource Specify the frequency of the internal Using an internal clock A D sample clock using olDaSetClockFrequency The minimum frequency is 0 75 Hz The maximum frequency for all modules except the DT9805 and DT9806 is 100 kHz The maximum frequency for the DT9805 and Specify the clock source as DT9806 is 50 kHz The driver sets the a
15. Channel List sesiis srieisrr esac iiin ee eGo ede 16 Performing Dynamic Digital Output Operations 17 Input Ranges and Gains 0 0 00 e eee eee 19 Specifying the Gain for a Single Channel 22 Specifying the Gain for One or More Channels 22 A D Sample Clock Sources 0 0000 e eee eee 23 Internal A D Sample Clock 000 23 External A D Sample Clock 00000 25 Contents WIS BCLS cesta tiers Re etier Beata ite dere ib destino Sue ane de EER 25 Analog Input Conversion Modes 406 26 Continuously Paced Scan Mode nn nananana 27 Triggered Scan Mode 6 0 60 cece eee eee 28 Internally Retriggered Scan Mode 28 Externally Retriggered Scan Mode 31 Data FORMAL ereere e toner alle taacths echuecwbie tare aie tual alie ee 33 Data WWanstet sn css wi teed wate was Seat oben we 36 Error Conditions sieer etsede rrsan sini nesas riei os 37 Analog Output Features 0 00 0 e eee eee eee 39 Output Resolution 0 66 39 Analog Output Channels n sanassa asasaran 40 Output Ranges and Gains 6 6 arren 41 Conversion Modes 000 e eee eee eee ee 42 Data Format s2 0c902 ree cried EEEIEE RENDE ieee tewe es 42 Digital I O Features 0 000 44 Digital I O Lines vse 4 coe See eee we ee 44 Resolutio 1 foc ede hea ered weet dee bee ee eu ob 45 Operation Modes
16. DT9803 EC DT9804 EC DT9800 EC I DT9801 EC I 100 kSamples s DT9802 EC DT9803 EC DT9804 EC a The maximum rate is 50 kSamples s for a single channel or a channel scan when the gain is 1 or 10 10 kSamples s for a channel scan when the gain is 100 and 2 kSamples s for a channel scan when the gain is 500 According to sampling theory Nyquist Theorem specify a frequency that is at least twice as fast as the input s highest frequency component For example to accurately sample a 20 kHz signal specify a sampling frequency of at least 40 kHz Doing so avoids an error condition called aliasing in which high frequency input components erroneously appear as lower frequencies after sampling 24 Principles of Operation External A D Sample Clock An external A D sample clock is useful when you want to pace acquisitions at rates not available with the internal A D sample clock or when you want to pace at uneven intervals Connect an external A D sample clock to screw terminal TB25 on the DT9800 Series function module pin 25 on connector J1 Conversions start on the rising edge of the external A D sample clock input signal Using software specify the clock source as external For DT9800 Series function modules the clock frequency is always equal to the frequency of the external A D sample clock input signal that you connect to the module through the screw terminal panel Triggers A trigger is an e
17. Interface Ground Micro Controller Isolated DC DC A and Power Control f 500 V Isolation Barrier Note that this is not isolated on the DT9800 EC Series Dynamic peeds yBiHq yed 2q p s Isolated Power Digital Out 4 Clock Two 16 bit Gate User Out lt Counter Timerg to Y Isolated Side Control Logic kq _ _ _ Channel Gain List 32 Entries 8 Digital lt 4 Outputs A 16 SE 8 DI Analog Analog Input 12 or 16 Bit Inputs gt MUX p PGA gt apc 5 gt Sample FIFO 10 kQ Bias t t Return v Termination B External 12 or 16 Bit D A Resistors 8 Digital Clock and Inputs Trigger Logic DACO DAC1 T Trigger Clock y Figure 1 Block Diagram of the DT9800 Series Function Modules Principles of Operation Analog Input Features This section describes the features of the analog input A D subsystem including the following e Input resolution described on this page e Analog input channels described on this page e Input ranges and gains described on page 19 e A D sample clock sources described on page 23 e Analog input conversion modes described on page 26 e Triggers described on page 25 e Data formats describe
18. Minimum pulse width Maximum frequency HCT Rising Edge Sensitive with 22 KQ pull up resistor 2 4 V minimum 0 8 V maximum 600 ns high 600 ns low 750 0 kHz Specifications Table 15 A D Subsystem Specifications cont DT9803 MAC EC EC I DT9801 MAC EC EC I DT9804 MAC EC EC I DT9802 MAC EC EC I DT9805 DT9806 Feature Specifications Specifications External A D digital TTL trigger Input type HCT Rising Edge Sensitive with 22 kQ pull up resistor High level input voltage 2 4 V minimum Low level input voltage 0 8 V maximum Minimum pulse width 600 ns high 600 ns low Maximum frequency 750 0 kHz Dynamic Digital Output Output driver TTL Output driver high voltage 2 4 V maximum IOH 1 mA Output driver low voltage 0 5 V maximum IOL 2 mA Back EMF Diodes Yes a On channel 0 only on the DT9805 and DT9806 modules the input impedance is 10 kQ b Broken thermocouples in differential mode will output plus full scale for gains equal to or greater than 10 125 Appendix A 126 Table 16 lists the specifications for the D A subsystem Table 16 D A Subsystem Specifications Feature DT9802 MAC EC EC I Specifications DT9804 MAC EC EC I DT9806 Specifications Number of analog output channels Resolution 12 bits 16 bits Data encoding input Offset binary Nonlinearity integral 1 LSBs 4 LSBs Di
19. if needed get a larger power supply consult the module s specifications on page 129 of this manual Troubleshooting Service and Support If you have difficulty using the DT9841 module Data Translation s Technical Support Department is available to provide technical assistance Telephone Technical Support For the most efficient service complete the form on page 116 and be at your computer when you call for technical support This information helps to identify specific system and configuration related problems and to replicate the problem in house if necessary You can reach the Technical Support Department by calling 508 481 3700 x1001 If you are located outside the USA call your local distributor The name and telephone number of you nearest distributor are provided in your Data Translation catalog If you are leaving a message to request a support call please include the following information e Your name please include proper spelling 6 e Your company or organization please include proper spelling e A phone number e An email address where you can be reached e The hardware software product you need help on e A summary of the issue or question you have e Your contract number if applicable and e Your product serial number or purchase date Omitting any of the above information may delay our ability to resolve your issue 115 Chapter 6 116 Information Required for Technical Support
20. olDaTerminate 99 Chapter 4 100 o Calibration Running the Calibration Utility 00 103 Calibrating the Analog Input Subsystem 104 101 Chapter 5 102 Note The DT9800 Series Calibration Utility is provided for Windows 98 Windows Me Windows 2000 and Windows XP only The DT9800 Series function modules are calibrated at the factory and should not require calibration for initial use It is recommended that you check and if necessary readjust the calibration of the analog I O circuitry on the DT9800 Series function modules every six months Note Ensure that you installed the DT9800 Series software and configured the device driver prior to using the DT9800 Series Calibration Utility Refer to the DT9800 Series Getting Started Manual for more information This chapter describes how to run the DT9800 Series Calibration Utility and calibrate the analog I O circuitry of the DT9800 Series function modules Calibration Running the Calibration Utility To run the DT9800 Series Calibration Utility perform the following step 1 Locate the DT9800 Series software program folder on your hard disk This program folder was created when you installed the DT9800 Series software 2 Double click the Calibration Utility icon in the program folder 3 Select the name of the DT9800 Series function module to configure from the combo box then click OK On
21. 105 Using the Auto Calibration Procedure 105 Using the Manual Calibration Procedure 106 Calibrating the Thermocouple Circuitry 107 Calibrating the Analog Output Subsystem 109 Chapter 6 Troubleshooting 2020eseeeees 111 General Checklist 000 000 cece neces 112 Service and Support 0 00 115 Telephone Technical Support 0008 115 E Mail and Fax Support 000000 117 World Wide Web Support 0 000000005 117 If Your Board Needs Factory Service 6 00 0 e eee 118 vii Contents viii Appendix A Specifications 02000 Appendix B Connector Pin Assignments About this Manual This manual describes the features of the DT9800 Series function modules the capabilities of the DT9800 Series Device Driver and how to program the DT9800 Series function modules using DT Open Layers software Calibration and troubleshooting information is also provided Intended Audience This document is intended for engineers scientists technicians or others responsible for using and or programming the DT9800 Series function modules for data acquisition operations in Microsoft Windows 98 Windows Me Millennium Edition Windows 2000 Windows XP or the Macintosh MAC OS 9 0 operating system It is assumed that you have some familiarity with data acquisition principl
22. 8 0 to 1 25 V 1 25 V DT9803 MAC 1 N A 10 V DT9804 MAC 2 N A 45V 4 N A 2 5 V 8 N A 1 25 V DT9800 EC DT9801 EC 1 Oto10V 10 V Series DT9802 EC 2 Oto5V 45V 4 Oto 2 5 V 2 5 V 8 0 to 1 25 V 1 25 V DT9803 EC 1 N A 10 V DT9804 EC 2 N A 45V 4 N A 2 5 V 8 N A 1 25 V Principles of Operation Table 3 Effective Input Range cont Unipolar Bipolar Function Module Input Input Module Series Name Gain Range Range DT9800 EC I DT9801 EC I 1 Oto 10V 10 V Series DT9802 EC I 2 Oto5V 5 V 4 0 to 2 5 V 2 5 V 8 0 to 1 25 V 1 25 V DT9803 EC I 1 N A 10 V DT9804 EC I 2 N A 45V 4 N A 2 5 V 8 N A 1 25 V Using software specify 0 to 10 V for unipolar ranges or 40 V to 10 V for bipolar ranges Note that you specify the range for the entire analog input subsystem not the range per channel For each channel choose the gain that has the smallest effective range that includes the signal you want to measure For example if you are using a DT9803 and the range of your analog input signal is 1 05 V specify a range of 40 V to 10 V for the module and use a gain of 8 for the channel the effective input range for this channel is then 1 25 V which provides the best sampling accuracy for that channel The way you specify gain depends on how you specified the channels as described in the following subsections 21 Chapter 2 22 Note The DT9805 and DT9806 modul
23. DT9802 DT9802 MAC DT9802 EC and DT9802 EC I modules support input ranges of 0 to 10 V or 10 V DT9803 DT9803 MAC DT9803 EC DT9803 EC I DT9804 DT9804 MAC DT9804 EC DT9804 EC I DT9805 and DT9806 modules support an input range of 10 V only 10 V 0 to 5 V 10 V or 0 to 10 V DT9804 DT9804 MAC DT9804 EC DT9804 EC I and DT9806 modules support an output range of 10 V only The external trigger is the rising edge External A D Trigger input The maximum throughput for analog input channels is 100 kHz for all modules except the DT9805 and DT9806 modules The maximum throughput for the DT9805 and DT9806 modules is 50 kHz for a single channel or channel scan with gains of 1 and 10 10 kHz for a channel scan with a gain of 100 and 2 kHz for a channel scan and a gain of 500 Counter timers 0 and 1 can be cascaded If you are not using cascaded timers this value is approximately 183 Hz High edge and low edge are supported for one shot and repetitive one shot modes High level and low level are supported for event counting and rate generation modes 75 Chapter 3 76 B Programming Flowcharts Single Value Operations 0 0 0 eee e eee eee 79 Continuous A D Operations 6666 81 Event Counting Operations 0 000 000008 83 Frequency Measurement Operations 004 85 Pulse Output Operations 00 0000s 87 77 Chapter 4 78 The fo
24. Gate Signal 1 ms period p gt Pulse Output signa 50 duty cycle Figure 12 Example of One Shot Mode Using a 50 Duty Cycle Repetitive One Shot Use repetitive one shot mode to generate a pulse output signal each time the module detects a trigger determined by the gate input signal You can use this mode to clean up a poor clock input signal by changing its pulse width then outputting it In repetitive one shot mode the internal C T clock source is more useful than an external C T clock source refer to page 47 for more information on the internal C T clock source 61 Chapter 2 62 Use software to specify the counter timer mode as repetitive one shot oneshot rpt for SDK users the polarity of the output pulses high to low transitions or low to high transitions the duty cycle of the output pulses the C T clock source and the gate type to trigger the operation as rising edge or falling edge Refer to page 51 for more information on pulse output types and to page 49 for more information on gates Note In the case of a one shot operation use a duty cycle as close to 100 as possible to output a pulse immediately Using a duty cycle closer to 0 acts as a pulse output delay When the one shot operation is triggered determined by the gate input signal a pulse is output When the module detects the next trigger another pulse is output This operation continues until you stop the operation Note
25. a Analog input signals 8 to 15 are not available on the 5B08 or 7BP08 1 backplane Analog input signals 4 to 15 are not available on the 7BP04 1 backplane b This signal is not isolated on the DT9800 EC Series boards Table 25 Connector J5 Pin Assignments AC1324 AC1324 J5 Screw J5 Screw Pin Terminal Signal Name Pin Terminal Signal Name 1 TB1 Analog Output 0 2 TB2 Analog Output 0 Return 3 TB3 Analog Output 1 4 TB4 Analog Output 1 Return 5 TB5 Isolated Digital 6 TB6 External A D Ground Trigger 7 TB7 External A D Sample 8 TB8 Isolated Digital Clock Ground 9 TB9 Isolated 5 V 10 TB10 Not Connected Output 11 TB11 Not Connected 12 TB12 Dynamic Digital Output 136 Connector Pin Assignments Table 25 Connector J5 Pin Assignments cont AC1324 AC1324 J5 Screw J5 Screw Pin Terminal Signal Name Pin Terminal Signal Name 13 TB13 Isolated Digital 14 TB14 User External Gate Ground 1 15 TB15 User Counter Output 1 16 TB16 User Clock Input 1 17 TB17 Isolated Digital 18 TB18 User External Gate Ground 0 19 TB19 User Counter Output 0 20 TB20 User Clock Input 0 21 TB21 Not Connected 22 TB22 Not Connected 23 TB23 Not Connected 24 TB24 Not Connected 25 TB25 Not Connected 26 TB26 Not Connected a This signal is not isolated on the DT9800 EC Series b 5 V output is available only when one of the subsystems is activ
26. avoid this error use a slower sampling rate 37 Chapter 2 38 e A D FIFO Full Flag set to 1 The data was not read fast enough by the host computer The host computer can clear this error To avoid this error ensure that you allocated at least three buffers each at least as large as the sampling rate for example if you are using a sampling rate of 100 kSamples s 100 kHz specify a buffer size of 100 000 samples for each buffer If one of these error conditions occurs the module reports the error but continues to acquire and transfer data to the host computer Note The LED on the front panel will not blink green if the hardware detects an error Principles of Operation Analog Output Features An analog output D A subsystem is provided on the following DT9800 Series function modules only DT9802 DT9802 MAC DT9802 EC DT9802 EC I DT9804 DT9804 MAC DT9804 EC DT9804 EC I and DT9806 This section describes the following features of the D A subsystem e Output resolution described on this page e Analog output channels described on this page e Output ranges and gains described on page 41 e Conversion modes described on page 42 and e Data format described on page 42 Output Resolution Table 2 lists the output resolution of the DT9800 Series function modules Note that the resolution is fixed it cannot be programmed in software Table 8 Output Resolution Function Module
27. buffer in your program Convert the data from counts to voltage using olDaCodeToVolts or from voltage to counts using olDaVoltsToCode if desired Put the buffer on the ready queue using olDaPutBuffer Recycle the buffer if you want the subsystem to fill it again when in OL_WRP_NONE or OL_WRP_ MULTIPLE mode See page 94 if you want to transfer data from an in process Return to page 95 buffer i Yes Wait for message 1 The buffer done message is OLDA_WM_BUFFER_DONE or OLDA_WM_PRETRIGGER_BUFFER_DONE Programming Flowcharts Set Clocks and Gates for Counter Timer Operations Using an Specify the clock source as Internal is the default OL_CLK_INTERNAL using olDaSetClockSource l internal clock Specify the fi fth The driver sets the actual A eT frequency as closely as output C T pulse using possible to the number olDaSetClockFrequency specified Specify the clock source as OL_CLK_EXTERNAL using olDaSetClockSource l Specify the clock divider using Specify a clock divider of between 2 0 the default ce and 65536 to be applied to the externally supplied olDaSetExternalClockDivider input clock k Specify the gate type using Specify one of the following gate types Software olDaSetGateType internal OL_GATE_NONE High Level OL_GATE_HIGH_LEVEL Low Level OL_GATE_LOW_
28. buffers The conversion rate is determined by the frequency of the A D sample clock refer to page 23 for more information on the A D sample clock The sample rate which is the rate at which a single entry in the channel gain list is sampled is determined by the frequency of the A D sample clock divided by the number of entries in the channel gain list To select continuously paced scan mode use software to specify the dataflow as continuous and to specify a trigger source to start the operation Refer to page 25 for more information on the supported trigger sources Figure 3 illustrates continuously paced scan mode using a channel gain list with three entries channel 0 channel 1 and channel 2 In this example analog input data is acquired on each clock pulse of the A D sample clock When it reaches the end of the channel gain list the module wraps to the beginning of the channel gain list and repeats this process Data is acquired continuously 27 Chapter 2 28 A D Clock i PLU L Chan0 Chan2 ChanO Chan2 Chan 0 Chan 2 ChanO Chan2 Chan 1 Chan 1 Chani Chan 1 Data acquired continuously Trigger event occurs Figure 3 Continuously Paced Scan Mode Triggered Scan Mode DT9800 Series function modules support two triggered scan modes internally retriggered and externally retriggered These modes are described in the following subsections Internall
29. can specify a clock source scan mode trigger source buffer and buffer wrap mode for the digital input operation Refer to page 16 for more information on specifying digital input lines for a continuous digital input operation e Dynamic digital output is useful for synchronizing and controlling external equipment and allows you to output data to the dynamic digital output line each time an analog input value is acquired This mode is programmed through the A D subsystem refer to page 17 for more information 45 Chapter 2 Counter Timer Features The counter timer circuitry on the module provides the clocking circuitry used by the A D and D A subsystems as well as several user counter timer features This section describes the following user counter timer features e Units described on this page e C T clock sources described on page 47 e Gate types described on page 49 e Pulse types and duty cycles described on page 51 and e Counter timer operation modes described on page 53 Units Two 16 bit counter timers are supported by all DT9800 Series modules The counters are numbered 0 and 1 Each counter accepts a clock input signal and gate input signal and outputs a clock output signal also called a pulse output signal as shown in Figure 5 Clock Input Signal internal external or internally cascaded 46 Pulse Output Counter e Signal Gate Input Signal
30. channel and isolated analog ground This feature is particularly useful with floating signal sources Refer to the DT 9800 Series Getting Principles of Operation Started Manual for more information on wiring to inputs and configuring the driver to use bias return termination resistance Note For pseudo differential inputs specify single ended in software in this case how you wire these signals determines the configuration The DT9800 EC Series boards do not provide isolated analog ground The DT9800 Series function modules can acquire data from a single analog input channel or from a group of analog input channels Channels are numbered 0 to 15 for single ended and pseudo differential inputs and 0 to 7 for differential inputs The following subsections describe how to specify the channels Specifying a Single Channel The simplest way to acquire data from a single channel is to specify the channel for a single value analog input operation using software refer to page 26 for more information on single value operations You can also specify a single channel using the analog input channel list described in the next section Note If you want to perform a single value digital input operation while the A D subsystem is configured specify channel 16 which corresponds to the digital input port in the A D single value operation 15 Chapter 2 Specifying One or More Channels You can read data from one or
31. clock 47 internal C T clock 47 C T subsystem 47 specifications 128 cables AC1315 10 AC1393 10 EP035 10 EP310 9 EP316 9 calibration 74 analog input subsystem 104 analog output subsystem 107 109 running the utility 103 Calibration utility 7 cascading counter timers 48 72 channel parameters setting up 90 channel type differential channels 70 single ended 70 channel gain list 16 depth 69 random 69 sequential 69 setting up 90 zero start 69 channels analog input 14 analog output 40 counter timer 46 digital I O 44 number of 70 CJC Adj box 108 cleaning up operations 99 clocks base frequency 72 external 72 external A D sample clock 25 external C T clock 47 how to set 91 how to set for C T operations 97 internal 72 internal A D sample clock 23 internal C T clock 47 internal retrigger clock 29 internally cascaded C T clock 48 maximum external clock divider 72 maximum throughput 72 minimum external clock divider 72 minimum throughput 72 number of extra 72 connector J1 pin assignments 132 continuous operations 67 continuously paced scan mode 27 counter timer 56 externally retriggered scan mode 31 externally retriggered scan mode 31 how to perform analog input 81 how to perform event counting 83 how to perform pulse output 87 internally retriggered scan mode 28 post trigger 67 conversion modes 26 continuously paced scan mode 27 dynamic digital output 45 externally retriggered scan mode 31 internall
32. gain of 1 Programming Flowcharts Continuous A D Operations nitialize the device driver and get the devic handle with olDalnitialize Vv Get a handle to the subsystem with olDaGetDASS Vv Set the data flow to OL_DF_CONTINUOUS using olDaSetDataFlow AA Set the subsystem parameters see page 89 y Set up the channel list and channel parameters see page 90 y Set up the clocks and triggers see page 91 y Set up triggered scanning see page 92 v 7 Go to the next page D 81 Chapter 4 82 Continuous A D Operations cont C Continued from previous page D AA Set up buffering see page 93 y Configure the subsystem using olDaConfig y Start the operation with olDaStart AEE Deal with messages and buffers see page 95 Stop the operation see page 98 SE Clean up the operation see page 99 D Note To convert a voltage to temperature linearize the voltage for the specified thermocouple type then subtract the CJC temperature 10 mV per C from the linearized value Refer to the Omega Complete Temperature Measurement Handbook and Encyclopedia for more information on linearizing values 1 After configuration if using an internal clock you can use olDaGetClockFrequency to get the actual frequency that the
33. internal pacer clock could achieve if using internal retrigger mode you can use olDaGetRetriggerFrequency to get the actual frequency that the internal retrigger clock could achieve Programming Flowcharts Event Counting Operations Initialize the device driver and get the device handle with olDalnitialize v Get a handle to the C T subsystem with olDaGetDASS y Set the cascade mode using olDaSetCascadeMode y Set up the clocks and gates see page 97 A Specify the mode as OL_CTMODE_COUNT using olIDaSetCTMode Configure the subsystem using olDaConfig ie eee Start the operation using olDaStart i C Go to the next page aed 1 Specify the appropriate C T subsystem element The Windows device driver supports two elements 0 and 1 83 Chapter 4 Event Counting Operations cont C Continued from previous page J D Read the events counted using olDaReadEvents Get update ea of events total Stop the operation see page 98 l Release each subsystem with olDaReleaseDASS Release the device driver and terminate S session with olDaTerminate 84 Programming Flowcharts Frequency Measurement Operations Note that this flowchart assumes that you are using the system timer to generate the period over which the frequency is measure
34. 6 USB cable 9 V Visual Basic programs 8 Visual C programs 8 voltage ranges 19 number of 70 W Windows messages 67 World Wide Web 117 wrap mode 37 writing programs in C C 8 writing programs in Visual Basic 8 writing programs in Visual C 8 Z zero start sequential channel gain list 69 149 Index 150
35. ASS y Set the cascade mode using olDaSetCascadeMode Vv Set up the clocks and gates see page 97 y Specify the mode using olDaSetCTMode Specify the output pulse type using olDaSetPulseType i Specify the duty cycle of the output pulse using olDaSetPulseWidth Go to the next page 1 Specify OL_CTMODE_RATE for rate generation continuous pulse output OL_CTMODE_ONESHOT for single one shot or OL_CTMODE_ONESHOT_FPT for repetitive one shot 87 Chapter 4 Pulse Output Operations cont Continued from previous page Configure the subsystem using olDaConfig AA Start the operation using olDaStart y Stop the operation see page 98 Note that this step is not needed for single i one shot operations Release each subsystem with olDaReleaseDASS Release the device driver and terminate the session with olDaTerminate 88 Programming Flowcharts Set Subsystem Parameters Specify the channel type a For A D operations specify the channel type as single ended for single ended or olDaSetChannelType pseudo differential channels or differential For all other operations specify differential the default Specify the data encoding type as binary Specify the data encoding using 13 OL_ENC_BINARY This is the default value olDaSetEncod
36. ClockDivider 97 olDaSetGainListEntry 90 olDaSetGateType 97 olDaSetMultiscanCount 92 olDaSetPulseType 87 olDaSetPulseWidth 87 olDaSetRange 89 olDaSetRetrigger 92 olDaSetRetriggerFrequency 92 olDaSetRetriggerMode 92 olDaSetSynchronousDigitallOUsage 90 olDaSetTrigger 91 olDaSetTriggeredScanUsage 92 olDaSetWndHandle 93 olDaSetWrapMode 93 olDaStart in continuous analog input operations 82 in event counting operations 83 in pulse output operations 88 olDaStop 98 olDaTerminate in continuous A D operations 99 in event counting operations 84 in frequency measurement operations 86 in pulse output operations 88 in single value operations 80 olDaVoltsToCode 80 96 olDmAllocBuffer 93 94 olDmCallocBuffer 93 94 olDmCopyFromBuffer 96 olDmFreeBuffer 99 olDmGetBufferPtr 96 olDmGetValidSamples 95 olDmMallocBuffer 93 94 OLSC_SUP_CTMODE_COUNT 72 OLSSC_CGLDEPTH 69 OLSSC_MAX_DIGITALIOLIST_ VALUE 70 OLSSC_MAXDICHANS 70 OLSSC_MAXMULTISCAN 68 OLSSC_MAXSECHANS 70 OLSSC_NUMCHANNELS 70 OLSSC_NUMEXTRACLOCKS 72 OLSSC_NUMEXTRATRIGGERS 71 OLSSC_NUMFILTERS 70 OLSSC_NUMGAINS 69 OLSSC_NUMRANGES 70 OLSSC_NUMRESOLUTIONS 71 OLSSC_SINGLEVALUE_AUTORAN GE 69 OLSSC_SUP_BINARY 71 OLSSC_SUP_BUFFERING 68 OLSSC_SUP_CASCADING 72 OLSSC_SUP_CONTINUOUS 67 OLSSC_SUP_CTMODE_ONESHOT 72 OLSSC_SUP_CTMODE_ONESHOT_ RPT 72 OLSSC_SUP_CTMODE_RATE 72 OLSSC_SUP_DIFFERENTIAL 70 OLSSC_SUP_EXTCLOCK 72 OLSSC_SUP_EXTERNTRIG 71 OLSSC_SUP_GAPFREE_NODMA 68 OLSSC_SUP_GATE_HI
37. DATA TRANSLATION UM 17473 L DT9800 Series User s Manual Eleventh Edition February 2004 Data Translation Inc 100 Locke Drive Marlboro MA 01752 1192 508 481 3700 www datatranslation com Fax 508 481 8620 E mail info datx com Copyright 1999 to 2004 by Data Translation Inc All rights reserved No part of this publication may be reproduced stored in a retrieval system or transmitted in any form by any means electronic mechanical by photocopying recording or otherwise without the prior written permission of Data Translation Inc Information furnished by Data Translation Inc is believed to be accurate and reliable however no responsibility is assumed by Data Translation Inc for its use nor for any infringements of patents or other rights of third parties which may result from its use No license is granted by implication or otherwise under any patent rights of Data Translation Inc Use duplication or disclosure by the United States Government is subject to restrictions as set forth in subparagraph c 1 ii of the Rights in Technical Data and Computer software clause at 48 C F R 252 227 7013 or in subparagraph c 2 of the Commercial computer Software Registered Rights clause at 48 C F R 52 227 19 as applicable Data Translation Inc 100 Locke Drive Marlboro MA 01752 Data Translation is a registered trademark of Data Translation Inc DT Open Layers DataAcq SDK Dat
38. DT9804 EC plus full scale minus full scale 35 Chapter 2 Table 7 Overrange Signal Values cont Function Module Above Range Below Range Module Series Name Signals Signals DT9800 EC I Series DT9801 EC I FFFh 000h DT9802 EC plus full scale minus full scale DT9803 EC FFFFh 0000h DT9804 EC I plus full scale minus full scale Data Transfer The module packs two bytes into each transfer to the host computer Even samples corresponding to entries 0 2 4 and so on in the channel gain list are packed into the low bytes odd samples corresponding to entries 1 3 5 and so on in the channel gain list are packed into the high bytes DT9800 Series function modules contain a 2048 sample FIFO During a continuous analog input operation the hardware interrupts the firmware on the module when the FIFO is half full The module then transfers 2048 samples to a circular buffer which is dedicated to the hardware in the host computer The DT9800 Series Device Driver accesses the hardware circular buffer to fill user buffers that you allocate in software Keep the following recommendations in mind when allocating user buffers for continuous analog input operations on the DT9800 Series e Allocate a minimum of three user buffers e Specify a buffer size at least as large as the sampling rate for example if you are using a sampling rate of 100 kSamples s 100 kHz specify a
39. GH_EDGE 73 OLSSC_SUP_GATE_HIGH_LEVEL 73 145 Index 146 OLSSC_SUP_GATE_LOW_EDGE 73 OLSSC_SUP_GATE_LOW_LEVEL 73 OLSSC_SUP_GATE_NONE 73 OLSSC_SUP_INPROCESSFLUSH 68 OLSSC_SUP_INTCLOCK 72 OLSSC_SUP_PLS_HIGH2LOW 72 OLSSC_SUP_PLS_LOW2HIGH 73 OLSSC_SUP_POSTMESSAGE 67 OLSSC_SUP_PROGRAMGAIN 69 OLSSC_SUP_RANDOM_CGL 69 OLSSC_SUP_RETRIGGER_EXTRA 68 OLSSC_SUP_RETRIGGER __ INTERNAL 68 OLSSC_SUP_RETRIGGER_SCAN_ PER_TRIGGER 68 OLSSC_SUP_SEQUENTIAL_CGL 69 OLSSC_SUP_SINGLEENDED 70 OLSSC_SUP_SINGLEVALUE 67 OLSSC_SUP_SOFTTRIG 71 OLSSC_SUP_SWCAL 74 OLSSC_SUP_SWRESOLUTION 71 OLSSC_SUP_SYNCHRONOUS_ DIGITALIO 70 OLSSC_SUP_TRIGSCAN 68 OLSSC_SUP_WRPMULITIPLE 68 OLSSC_SUP_WRPSINGLE 68 OLSSC_SUP_ZEROSEQUENTIAL_ CGL 69 OLSSCE_BASECLOCK 72 OLSSCE_MAX_THROUGHPUT 72 OLSSCE_MAXCLOCKDIVIDER 72 OLSSCE_MAXRETRIGGER 69 OLSSCE_MIN_THROUGHPUT 72 OLSSCE_MINCLOCKDIVIDER 72 OLSSCE_MINRETRIGGER 69 one shot mode 59 72 operation modes continuous digital input 45 continuously paced scan mode 27 event counting 53 frequency measurement 54 internally retriggered scan mode 28 one shot pulse output 59 rate generation 56 repetitive one shot pulse output 61 single value analog input 26 single value analog output 42 single value digital I O 45 Opto 22 backplane PB16H 9 orderly stop 26 output pulse high to low 72 low to high 73 output ranges 41 outputting pulses continuously 56 one shot 59 repetitive one shot 61 P PB16H digital b
40. GULES oc i seeas 0 Gn dha riie teased E 2 Supported SoftWare sps resies sari deeded eeiaiees obese aves 7 9 Accessories Chapter 1 Features The DT9800 Series is a family of low cost multifunction data acquisition modules for the Universal Serial Bus USB USB is a new standard for connecting PCs to peripheral devices such as printers mice and modems and was developed to make more low cost ports available for the increasing number of these devices Most new computers have two USB ports that allow direct connection to USB devices You can expand the number of USB devices attached to a single USB port by using expansion hubs DT9800 Series function modules are part of the high power bus powered USB class therefore the modules do not require external power but the expansion hubs do require external power DT9800 Series function modules reside outside of the PC and install with a single cable to ease installation Modules can be hot swapped or plugged and unplugged while the PC is on making them useful for many data acquisition applications The DT9800 Series includes the following subseries DT9800 Standard Series DT9800 MAC Series DT9800 EC Series and DT9800 EC I Series The DT9800 EC Series modules are not isolated the DT9800 Standard Series DT9800 MAC Series and DT9800 EC I Series modules are isolated In addition the DT9800 EC and DT9800 EC I Series modules support the use of optional backplanes and screw t
41. LEVEL High Edge OL_GATE_HIGH_EDGE or Low Edge OL_GATE_LOW_EDGE 97 Chapter 4 Stop the Operation Stop in an olDaStop stops the operation on the way using olDaStop subsystem in the orderly way the current in process buffers are filled or emptied and put on the done queue The driver posts at least one buffer done and queue stopped message orderly Stop the operation in an orderly way Stop the operation immediately eer olDaAbort and and reinitialize the subsystem olDaReset stop the using olDaReset operation on the subsystem immediately the current buffers are not filled or emptied before they are put on the done queue olDaReset also reinitializes the subsystem to a J known state and flushes all buffers to the done queue y Reinitialize Stop the operation immediatel using olDaAbort 98 Programming Flowcharts Clean up the Operation Flush all buffers on the ready and or in process queues to the done queue using olDaFlushBuffers Determine the number of buffers on the done queue using oIDaGetQueueSize p Retrieve each buffer on the done queue using olDaGetBuffer Free each buffer retrieved from the done queue using olDmFreeBuffer More Yes buffers to free Release each subsystem using olDaReleaseDASS Release the device driver and terminate the session using
42. LSSC_NUMEXTRATRIGGERS Yes Yes Yes Yes Yes Yes Yes 71 Chapter 3 Table 13 DT9800 Series Supported Options cont DT9800 Series A D D A DIN DOUT SRL C T Total Subsystems on Module 1 1 1 1 0 2 Internal Clock Support OLSSC_SUP_INTCLOCK Yes Yes Yes External Clock Support OLSSC_SUP_EXTCLOCK Yes Yes Number of Extra Clocks OLSSC_NUMEXTRACLOCKS 0 0 0 0 0 Base Clock Frequency OLSSCE_BASECLOCK 12MHz 0 0 0 12 MHz Q 8 Maximum External Clock Divider OLSSCE_MAXCLOCKDIVIDER 1 0 1 0 1 0 1 0 65536 Minimum External Clock Divider OLSSCE_MINCLOCKDIVIDER 1 0 1 0 1 0 1 0 2 0 Maximum Throughput OLSSCE_MAX_THROUGHPUT 100 kHz 0 0 750 kHz Minimum Throughput OLSSCE_MIN_THROUGHPUT 0 75 Hz 1 0 0 0 0028 Hz Cascading Support OLSSC_SUP_CASCADING Yes Event Count Mode Support OLSC_SUP_CTMODE_COUNT Yes g Generate Rate Mode Support 2 OLSSC_SUP_CTMODE_RATE Yes 5 One Shot Mode Support S OLSSC_SUP_CTMODE_ONESHOT Yes e 2 Repetitive One Shot Mode Support OLSSC_SUP_CTMODE_ONESHOT_ RPT Yes High to Low Output Pulse Support OLSSC_SUP_PLS_HIGH2LOW Yes 72 Supported Device Driver Capabilities Table 13 DT9800 Series Supported Options cont Counter Timers DT9800 Series A D D A DIN DOUT SRL C T Total Subsystems on Module 1 1 1 1 0 2 Low to High Output Pulse Support OLSSC_SUP_PLS_LOW2HIGH Yes None internal Gate Type
43. Module Series Name Resolution DT9800 Standard DT9802 12 bit marie DT9804 16 bit DT9806 DT9800 MAC Series DT9802 MAC 12 bit DT9804 MAC 16 bit 39 Chapter 2 Table 8 Output Resolution cont Function Module Module Series Name Resolution DT9800 EC Series DT9802 EC 12 bit DT9804 EC 16 bit DT9800 EC I Series DT9802 EC 12 bit DT9804 EC I 16 bit Analog Output Channels The DT9802 DT9802 MAC DT9802 EC DT9802 EC I DT9804 DT9804 MAC DT9804 EC DT9804 EC I and DT9806 modules support two DC level analog output channels DACO and DAC1 Refer to the DT9800 Series Getting Started Manual for information on how to wire analog output signals to the module using the screw terminal panel You configure the channel type through software Within each DAC the digital data is double buffered to prevent spurious outputs then output as an analog signal Both DACs power up to a value of 0 V 10 mV Resetting the module does not clear the values in the DACs The DT9800 Series function modules can output data from a single analog output channel only Specify the channel for a single value analog output operation using software refer to Conversion Modes on page 42 for more information on single value operations 40 Principles of Operation Output Ranges and Gains Table 9 lists the output range for each DT9800 Series function module Table 9 Output Range
44. Support OLSSC_SUP_GATE_NONE Yes High Level Gate Type Support OLSSC_SUP_GATE_HIGH_LEVEL Yes Low Level Gate Type Support OLSSC_SUP_GATE_LOW_LEVEL Yes High Edge Gate Type Support OLSSC_SUP_GATE_HIGH_EDGE Yes Low Edge Gate Type Support OLSSC_SUP_GATE_LOW_EDGE Yes Level Change Gate Type Support OLSSC_SUP_GATE_LEVEL High Level Gate Type with Input Debounce Support OLSSC_SUP_GATE_HIGH_LEVEL DEBOUNCE Low Level Gate Type with Input Debounce Support OLSSC_SUP_GATE_LOW_LEVEL DEBOUNCE High Edge Gate Type with Input Debounce Support OLSSC_SUP_GATE_HIGH_EDGE DEBOUNCE 73 Chapter 3 74 Table 13 DT9800 Series Supported Options cont DT9800 Series A D D A DIN DOUT SRL C T Total Subsystems on Module 1 1 1 1 0 2 Low Edge Gate Type with Input Debounce Support OLSSC_SUP_GATE_LOW_EDGE DEBOUNCE Level Change Gate Type with Input Debounce Support OLSSC_SUP_GATE_LEVEL DEBOUNCE Counter Timers cont Interrupt Support OLSSC_SUP_INTERRUPT FIFO in Data Path Support OLSSC_SUP_FIFO Data Processing Capability OLSSC_SUP_PROCESSOR Software Calibration Processor FIFOs Interrupt Software Calibration Support OLSSC_SUP_SWCAL Yes Yes o ion D A subsystems are supported by the DT9802 DT9802 MAC DT9802 EC DT9802 EC I DT9804 DT9804 MAC DT9804 EC DT9804 EC I and DT9806 modules only While t
45. Triggers that occur while the pulse is being output are not detected by the module Ensure that the signals are wired appropriately Refer to the DT9800 Series Getting Started Manual for wiring examples Figure 13 shows an example of a repetitive one shot operation using an external gate rising edge a clock output frequency of 1 kHz one pulse every 1 ms a low to high pulse type and a duty cycle of 99 99 Figure 14 shows the same example using a duty cycle of 50 Principles of Operation Repetitive One Shot Operation Starts External Gate Signal Pulse Output 1 ms period 1 ms period gt 99 99 duty cycle Signal 99 99 duty cycle 99 99 duty cycle Figure 13 Example of Repetitive One Shot Mode Using a 99 99 Duty Cycle Repetitive One Shot Operation Starts External Gate Signal 1 ms period 1 ms period a p p O 50 duty 50 duty Pulse cycle cycle Output Signal Figure 14 Example of Repetitive One Shot Mode Using a 50 Duty Cycle 63 Chapter 2 64 2 z Supported Device Driver Capabilities Chapter 3 66 The DT9800 Series Device Driver provides support for A D D A DIN DOUT and C T subsystems For information on how to configure the device driver refer to the DT9800 Series Getting Started Manual Table 13 summarizes the features available for
46. V 1 25 V 2 5 V 5 V 10 V for DT9803 04 0 020 V 0 10 V 1 V 10 V for DT9805 06 Drift Zero Gain 30 uV 20 uV Gain C 30 ppm C 25 uV 10 uV Gain C for DT9803 04 25 uV 5 uV Gain C for DT9805 06 20 ppm C 121 Appendix A 122 Table 15 A D Subsystem Specifications cont Feature DT9801 MAC EC EC I DT9802 MAC EC EC I Specifications DT9803 MAC EC EC I DT9804 MAC EC EC I DT9805 DT9806 Specifications Input impedance Off On 100 MQ 10 pF 100 MQ 100 pF Channel gain list 32 Samples Internal reference 2 5 V 0 002 V Input bias current 20 nA 20 nA for DT9803 04 10 nA for DT9805 06 Common mode voltage 11 V maximum operational Maximum input voltage 40 V maximum protection A D converter noise 0 3 LSB rms 0 4 LSB rms Amplifier input noise 20 uV rms 10 uV rms gain 200 pA rms current 15 uV rms 10 uV rms gain 100 pA rms current Channel to channel 40 uV 40 uV offset Channel acquisition time 3 us 5 us for DT9803 04 6 us Gain 1 for DT9805 06 250 us Gain 500 for DT9805 06 A D conversion time 6 6 us 8 us Specifications Table 15 A D Subsystem Specifications cont DT9801 MAC EC EC I DT9802 MAC EC EC I DT9803 MAC EC EC I DT9804 MAC EC EC I DT9805 DT9806 F
47. aAcq OMNI CD DT LV Link DTx EZ and DT VPI are trademarks of Data Translation Inc All other brand and product names are trademarks or registered trademarks of their respective companies Radio and Television Interference This equipment has been tested and found to comply with CISPR EN55022 Class A and EN50082 1 CE requirements and also with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instruction manual may cause harmful interference to radio communications Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense Changes or modifications to this equipment not expressly approved by Data Translation could void your authority to operate the equipment under Part 15 of the FCC Rules Note This product was verified to meet FCC requirements under test conditions that included use of shielded cables and connectors between system components It is important that you use shielded cables and connectors to reduce the possibility of causing interference to radio television and other electronic devices
48. ackplane 9 PGL Zero box 107 physical specifications 129 130 pin assignments 132 ports 44 post trigger acquisition mode 67 power specifications 129 130 power supply HES14 21 10 PWR 977 9 power 5 V 44 programmable gain 69 Index programmable resolution 71 pulse output duty cycle 51 how to perform 87 one shot 59 rate generation 56 repetitive one shot 61 types 51 pulse train output 56 pulse width 52 PWR 977 power supply 9 Q Quick Data Acq application 7 R random channel gain list 69 ranges analog input 19 analog output 41 number of 70 rate generation mode 72 repetitive one shot mode 61 72 resetting an operation 98 resolution 71 analog input 13 analog output 39 digital I O 45 number of 71 retrigger 31 retrigger clock 29 retrigger frequency 29 69 retriggered scan mode externally 31 internally 28 returning boards to the factory 118 rising edge gate 50 RMA 118 S sample clock external A D 25 internal A D 23 sample rate 27 scan mode externally retriggered 31 internally retriggered 28 scan per trigger 68 Scope application 7 screw terminal panels AC1324 9 STP EZ 10 SDK 8 sequential channel gain list 69 service and support procedure 115 setting subsystem parameters 89 setting up buffers 93 setting up the channel gain list and channel parameters 90 setting up triggered scans 92 signal conditioning backplanes 5B01 9 5B08 9 7BP04 1 9 7BP08 1 9 7BP16 1 9 single buffer wrap mode 68
49. an external C T clock source with an input frequency of 4 kHz a clock divider of 4 a low to high pulse type and a duty cycle of 75 A 1 kHz square wave is the generated output Figure 10 shows the same example using a duty cycle of 25 57 Chapter 2 Rate Generation Operation Starts External C T Clock Input Signal 4 kHz Pulse 75 duty cycle Output Signal Figure 9 Example of Rate Generation Mode with a 75 Duty Cycle Continuous Pulse Output Operation Starts External C T Clock Input Signal 4 kHz Pulse Output Signal 25 duty cycle Figure 10 Example of Rate Generation Mode with a 25 Duty Cycle 58 Principles of Operation One Shot Use one shot mode to generate a single pulse output signal from the counter when the operation is triggered determined by the gate input signal You can use this pulse output signal as an external digital TTL trigger to start other operations such as analog input operations When the one shot operation is triggered a single pulse is output then the one shot operation stops All subsequent clock input signals and gate input signals are ignored The period of the output pulse is determined by the clock input signal In one shot mode the internal C T clock source is mor
50. analog input operations in continuous mode e The internal A D sample clock which uses the 24 bit A D Counter on the module or e An external A D sample clock which you can connect to the screw terminal panel You use an A D sample clock to pace the acquisition of each channel in the channel gain list this clock is also called the A D pacer clock Note If you enter digital input channel 16 in the channel gain list the A D sample clock internal or external also paces the acquisition of the eight digital input lines The following subsections describe the internal and external A D sample clocks in more detail Internal A D Sample Clock The internal A D sample clock uses a 12 MHz time base Conversions start on the rising edge of the counter output the output pulse is active low Using software specify the clock source as internal and the clock frequency at which to pace the operation The minimum frequency supported is 0 75 Hz 0 75 Samples s the maximum frequency supported depends on the module type Table 4 lists the maximum sampling rate of the DT9800 Series function modules 23 Chapter 2 Table 4 Maximum Sampling Rate Function Module Module Series Name Sampling Rate DT9800 Standard DT9801 100 kSamples s DT9802 DT9803 DT9804 DT9805 50 kSamples s DT98062 DT9800 MAC DT9801 MAC 100 kSamples s DT9802 MAC DT9803 MAC DT9804 MAC DT9800 EC DT9801 EC 100 kSamples s DT9802 EC
51. are specify the clock source as external and the clock divider used to determine the frequency at which to pace the operation The minimum clock divider that you can specify is 2 0 the maximum clock divider that you can specify is 65 536 For example if you supply an external C T clock with a frequency of 700 kHz and specify a clock divider of 2 the resulting frequency of the external C T clock output signal is 350 kHz The resulting frequency of the external C T clock output signal must not exceed 750 kHz Table 10 on page 48 lists the screw terminals of the DT9800 Series modules that correspond to the external C T clock signals of each counter timer Table 10 External C T Clock Signals 48 Screw Screw Counter Terminal J1 Pin Terminal on J5 Pin Module Timer on Module Number AC1324 Panel Number DT9800 Standard 0 TB54 54 Series i 1 TB50 50 DT9800 MAC Series DT9800 EC Series 0 TB20 20 DTI800ECI 1 E TB16 16 Series Internally Cascaded Clock You can also internally route the clock output signal from counter timer 0 to the clock input signal of counter timer 1 to internally cascade the counters In this way you can create a 32 bit counter without externally connecting two counters together Specify internal cascade mode in software The rising edge of the clock input signal is active Principles of Operation Through software specify the clock
52. ata Translation Inc 100 Locke Drive Marlboro MA 01752 1192 A Specifications 119 Appendix A Table 15 lists the specifications for the A D subsystem Table 15 A D Subsystem Specifications Feature DT9801 MAC EC EC I DT9802 MAC EC EC I Specifications DT9803 MAC EC EC I DT9804 MAC EC EC I DT9805 DT9806 Specifications Number of analog inputs Single ended pseudo differential 16 Differential 8 Number of gains 4 1 2 4 8 4 1 2 4 and 8 for DT9803 04 1 10 100 500 for DT9805 06 Resolution 12 bits 16 bits Data encoding Offset binary Coupling DC Over voltage protection Off 40 V On 25 V ESD protection 1 5 kV System Error 0 03 FSR 0 01 FSR 120 Specifications Table 15 A D Subsystem Specifications cont Feature DT9801 MAC EC EC I DT9802 MAC EC EC I Specifications DT9803 MAC EC EC I DT9804 MAC EC EC I DT9805 DT9806 Specifications System accuracy full scale Gain 1 0 03 0 01 Gain 2 0 04 0 02 Gain 4 0 05 0 03 Gain 8 0 05 0 03 DT9805 9806 only Gain 10 0 02 Gain 100 0 03 Gain 500 0 04 Nonlinearity integral 1 0 LSBs 4 0 LSBs Differential linearity 0 5 LSBs no missing codes 1 0 LSBs no missing codes for DT9803 04 1 2 LSBs no missing codes for DT9805 06 Range Oto 1 25V 2 5V 5V 10V 1 25 2 5 5 10
53. ated which in turn activates power to the module This signal can be used as an input to power the digital output latch so that the outputs retain their states during power down Table 26 Connector J4 Pin Assignments STP EZ STP EZ J4 Screw J4 Screw Pin Terminal Signal Name Pin Terminal Signal Name 1 TB1 Not Connected 2 TB2 Digital Ground 3 TB3 Not Connected 4 TB4 Digital Ground 5 TB5 Not Connected 6 TB6 Digital Ground 7 TB7 Not Connected 8 TB8 Digital Ground 9 TB9 Not Connected 10 TB10 Digital Ground 137 Appendix B 138 Table 26 Connector J4 Pin Assignments cont STP EZ STP EZ J4 Screw J4 Screw Pin Terminal Signal Name Pin Terminal Signal Name 11 TB11 Not Connected 12 TB12 Digital Ground 13 TB13 Not Connected 14 TB14 Digital Ground 15 TB15 Not Connected 16 TB16 Digital Ground 17 TB17 Digital Output 7 18 TB18 Digital Ground 19 TB19 Digital Output 6 20 TB20 Digital Ground 21 TB21 Digital Output 5 22 TB22 Digital Ground 23 TB23 Digital Output 4 24 TB24 Digital Ground 25 TB25 Digital Output 3 26 TB26 Digital Ground 27 TB27 Digital Output 2 28 TB28 Not Connected 29 TB29 Digital Output 1 30 TB30 Not Connected 31 TB31 Digital Output 0 32 TB32 Not Connected 33 TB33 Digital Input 7 34 TB34 Not Connected 35 TB35 Digital Input 6 36 TB36 Not Connected 37 TB37 Digital Input 5 38 TB38 Not C
54. ation you can load the factory default settings stored in the EEPROM by clicking Restore in the Thermocouple Calibration Factory Settings box Once you have finished this procedure the thermocouple circuitry is calibrated You can now calibrate the analog output circuitry if you wish following the instructions in the next section Calibrating the Analog Output Subsystem To calibrate the analog output circuitry of the DT9802 DT9802 EC DT9802 EC I DT9804 DT9804 EC DT9804 EC I or DT9806 modules use an external precision meter available from vendors such as Fluke To calibrate the analog output circuitry perform the following steps 5 1 Connect Analog Output 0 TB19 to the positive side of the precision voltage meter 2 Connect Analog Output 0 Return TB20 to the negative side of the precision voltage meter 3 Inthe DACO Voltage box click 0 000 V 4 Inthe DACO Adjustment box click the increment or decrement arrows until your external meter display reads 0 V within 0 005 V 5 Inthe DACO Voltage box click 9 375 V and verify that your external meter display reads 9 375 V within 12 mV 6 Connect Analog Output 1 TB21 to the positive side of the precision voltage meter 7 Connect Analog Output 1 Return TB22 to the negative side of the precision voltage meter 109 Chapter 5 8 Inthe DAC1 Voltage box click 0 000 V 9 Inthe DAC1 Adjustment box click the increment or decrement arrows unt
55. buffer size of 100 000 The minimum buffer size that you should specify is 256 samples 36 Principles of Operation Note If you are using a slow clock data rate such as 75 Hz and a 256 sample user buffer you will have to wait over 5 minutes for any data since data is transferred only when 256 samples have been read Specify one of the following buffer wrap modes Ifthe wrap mode is none data is written to the allocated buffers until no more empty buffers are available at that point the operation stops If wrap mode is multiple data is written to the allocated multiple buffers continuously when no more empty buffers are available the module overwrites the data in the filled buffers starting with the first location of the first buffer This process continues indefinitely until you stop it Ifwrap mode is single data is written to a single buffer continuously when the buffer is filled the module overwrites the data in the buffer starting with the first location of the buffer This process continues indefinitely until you stop it Error Conditions The DT9800 Series function modules can report an error if one of the following conditions occurs A D Over Sample error The A D sample clock rate is too fast This error is reported if a new A D sample clock pulse occurs while the ADC is busy performing a conversion from the previous A D sample clock pulse The host computer can clear this error To
56. ce the DT9800 Series Calibration Utility is running you can calibrate the analog I O circuitry as described in the following subsections 103 Chapter 5 Calibrating the Analog Input Subsystem The following sections describe how to configure your module for calibration and how to calibrate the analog input circuitry of your module Configuring for Calibration To calibrate the analog input circuitry use an external 9 3750 V precision voltage source available from vendors such as Electronic Development Corporation EDC Using an external 9 3750 V precision voltage source provides an accuracy of approximately 1 LSB for DT9801 DT9801 EC DT9801 EC I DT9802 DT9802 EC and DT9802 EC I function modules and 3 LSBs for the DT9803 DT9803 EC DT9803 EC I DT9804 DT9804 EC DT9804 EC I DT9805 and DT9806 function modules Perform the following steps to configure a DT9800 Series function module for calibration 1 Connect Analog Input 0 TB1 to the positive side of the precision voltage source 2 Connect Analog Input 0 Return TB2 to the negative side of the precision voltage source 3 Connect Analog Input 0 Return TB2 to Analog Ground TB17 4 Connect Analog In 1 TB3 to Analog In 1 Return TB4 and to Analog Ground TB17 When you are finished connecting the external reference calibrate the module as described in the next section 104 Calibration Calibrating the Analog Input Circuitry You can ch
57. channel scan when the gain is 500 The appropriate retrigger frequency depends on a number of factors determined by the following equations Min Retrigger of CGL entries 2 us Period A D sample clock frequency Principles of Operation Max Retrigger 1 Frequency Min Retrigger Period For example if you are using 16 channels in the channel gain list and using an A D sample clock with a frequency of 50 kHz set the maximum retrigger frequency to 3 106 kHz since 3 106 kHz 1 16 2 us 50 kHz To select internally retriggered scan mode use software to specify the following parameters e The dataflow as continuous e Triggered scan mode usage as enabled e The retrigger mode as internal e The number of times to scan per trigger or retrigger also called the multiscan count as 1 e The frequency of the retrigger clock and e The initial trigger source refer to page 25 for more information on the supported trigger sources Externally Retriggered Scan Mode Use externally retriggered scan mode if you want to accurately control the period between conversions of individual channels and retrigger the scan based on an external event When a DT9800 Series function module detects an initial trigger either a software trigger or an external trigger the module scans the channel gain list once then waits for an external retrigger to occur The external retrigger occurs when a rising edge is detected o
58. ct Support OLSSC_SUP_DTCONNECT_BURST 1 Yes Yes 1 Yes 1 1 0 2 Yes Yes Yes Oper Simultaneous Start List Support OLSSC_SUP_SIMULTANEOUS_ START Oper Pause Operation Support OLSSC_SUP_PAUSE Wind Pause Sim Mess Asynchronous Operation Support OLSSC_SUP_POSTMESSAGE Yes 67 Chapter 3 Table 13 DT9800 Series Supported Options cont Buffering DT9800 Series A D D A DIN DOUT SRL C T Total Subsystems on Module Buffer Support OLSSC_SUP_BUFFERING Single Buffer Wrap Mode Support OLSSC_SUP_WRPSINGLE Multiple Buffer Wrap Mode Support OLSSC_SUP_WRPMULTIPLE Inprocess Buffer Flush Support OLSSC_SUP_INPROCESSFLUSH 1 Yes Yes Yes Yes 1 1 1 0 DMA Number of DMA Channels OLSSC_NUMDMACHANS Supports Gap Free Data with No DMA OLSSC_SUP_GAPFREE_NODMA Supports Gap Free Data with Single DMA OLSSC_SUP_GAPFREE_SINGLEDMA Supports Gap Free Data with Dual DMA OLSSC_SUP_GAPFREE_DUALDMA Yes Triggered Scan Mode Triggered Scan Support OLSSC_SUP_TRIGSCAN Maximum Number of CGL Scans per Trigger OLSSC_MAXMULTISCAN Supports Scan per Trigger Event Triggered Scan OLSSC_SUP_RETRIGGER_SCAN_ PER_TRIGGER Supports Internal Retriggered Triggered Scan OLSSC_SUP_RETRIGGER_INTERNAL Extra Retrigger Support OLSSC_SUP_RETRIGGER_EXTRA Yes Yes Yes Yes
59. ctual OL_CLK_EXTERNAL using frequency as closely as possible to the olDaSetClockSource number specified lt This trigger source starts acquisition Specify OL_TRG_SOFT the default for the software Specify the trigger source trigger or OL_TRG_EXTERN for the using olDaSetTrigger rising edge External A D Trigger input 91 Chapter 4 Set Up Triggered Scan Specify TRUE to enable triggered oe Specify OL_RETRIGGER_INTERNAL for the olDaSetTriggeredScanUsage internal retrigger clock OL_RETRIGGER_SCAN_PER_TRIGGER if the t retrigger source is the same as initial trigger source or OL_RETRIGGER_EXTRA for the external retrigger source Specify the retrigger mode using olDaSetRetriggerMode Yes The minimum frequency Specify the frequency of the is 0 75 Hz The retrigger clock using maximum frequency is olDaSetRetriggerFrequency 100 kHz for all modules except the DT9805 and DT9806 The maximum frequency for the DT9805 and DT9806 is 50 kHz Using internal retrigger mode pe ene Specify the retrigger source using Specify olDaSetRetrigger OL_TRG_EXTERN for the rising edge External A D Trigger input retrigger mode Specify the multiscan count using Specify a value of 1 olDaSetMultiscanCount 92 Programming Flowcharts Set Up A D Buffering Specify the window in which to post the messages using olDaSetWn
60. d If you need more accuracy than the system timer provides refer to page 54 in this manual and to the DataAcq SDK User s Manual for more information a Initialize the device driver and get the X device handle with olDalnitialize y Get a handle to the C T subsystem with olDaGetDASS y Set the cascade mode using olDaSetCascadeMode AA Set up the clocks see page 97 y Specify the mode as OL_CTMODE_COUNT using olDaSetCTMode Configure the subsystem using olDaConfig C Go to the next page 1 Specify the appropriate C T subsystem element The Windows device driver supports two elements 0 and 1 85 Chapter 4 Frequency Measurement Operations cont C Continued from previous page l Start the frequency measurement operation using olDaMeasureFrequency Message is in the form OLDA_WM_MEASURE_DONE Get measure Yes Use the LongtoFreq IParam macro to get done 5 the measured frequency value message 8 float Freq Freq LongtoFreq IParam Release each subsystem with olDaReleaseDASS i Release the device driver and terminate the session with olDaTerminate 86 Programming Flowcharts Pulse Output Operations A Initialize the device driver and get the N device handle with olDalnitialize y Get a handle to the C T subsystem with olDaGetD
61. d on page 33 e Data transfer described on page 36 and e Error conditions described on page 37 Input Resolution Table 2 lists the input resolution of the DT9800 Series function modules Note that the resolution is fixed it cannot be programmed in software Table 2 Input Resolution Function Module Input Module Series Name Resolution DT9800 Standard DT9801 12 bit DT9802 DT9803 16 bit DT9804 DT9805 DT9806 13 Chapter 2 14 Table 2 Input Resolution cont Function Module Input Module Series Name Resolution DT9800 MAC DT9801 MAC 12 bit Series DT9802 MAC DT9803 MAC 16 bit DT9804 MAC DT9800 EC DT9801 EC 12 bit Series DT9802 EC DT9803 EC 16 bit DT9804 EC DT9800 EC I DT9801 EC I 12 bit Series DT9802 EC DT9803 EC I 16 bit DT9804 EC I Analog Input Channels All DT9800 Series function modules support 16 single ended or pseudo differential analog input channels or eight differential analog input channels In addition the DT9805 and DT9806 function modules provide a cold junction compensation CJC circuit on channel 0 at 10 mV C Using the CJC you can connect seven thermocouple inputs in differential mode to the DT9805 or DT9806 module You configure the channel type as single ended or differential through software Using software you can also select whether to use 10 kQ termination resistance between the low side of each differential
62. d power signals e PB16H a digital backplane that connects to the DT9800 EC or DT9800 EC I function module to allow access to the digital I O signals Chapter 1 10 STP EZ a screw terminal panel that connects to a DT9800 EC or DT9800 EC I Series function module to allow access to the digital I O signals A 50 pin ribbon cable is provided with the STP EZ to allow direct connection to a DT9800 EC or DT9800 EC I Series function module AC1315 a 2 foot 26 pin female to 26 pin female cable that connects a 5B Series backplane to a DT9800 EC or DT9800 EC I Series function module AC1393 a 6 inch 26 pin male to 25 pin female adapter cable that connects a 7B Series backplane to the AC1315 cable the AC1315 cable then connects to a DT9800 EC or DT9800 EC I Series function module HES14 21 power supply A linear ac dc power supply that provides 24 Vdc for powering 7B Series backplanes EP035 a 2 4 meter 50 pin ribbon cable that connects the PB16H Opto 22 backplane to a DT9800 EC or DT9800 EC I Series function module 2 Principles of Operation Analog Input Features 2 00 00 6 6c eee ee 13 Analog Output Features 0 0 000 39 Digital I O Features 000 000 44 Counter Timer Features 00 0 c eee eee eee ee 46 11 Chapter 2 Figure 1 shows a block diagram of the DT9800 Series function modules Note that bold entries indicate signals you can access 5V D D USB
63. dHandle y Specify the buffer wrapping mode Specify OL_WRP_NONE if buffers are not reused using olDaSetWrapMode OL_WRP_MULTIPLE if buffers are continuously reused when none are found on the ready queue or OL_WRP_SINGLE if one buffer is continuously reused A y Allocate a buffer using Specify a buffer size at least as large as the sampling olDmAllocBuffer rate for example if you are using a sampling rate of 100 kSamples s 100 kHz specify a buffer size of 100 000 The minimum buffer size that you should specify is 256 samples olDmCallocBuffer or olDmMallocBuffer Put the buffer on the ready queue using olDaPutBuffer Yes Allocate more buffers A minimum of three buffers is recommended 93 Chapter 4 94 Transfer Data from an In process Buffer Determine the number of N buffers on the in process queue using olIDaGetQueueSize Allocate a buffer of the specified number of samples with olDmAllocBuffer olDmCallocBuffer or olDmMallocBuffer Copy the data from the in process buffer to the allocated buffer for immediate processing using olDaFlushFromBufferlnprocess Deal with messages and buffers see page 95 At least one must exist The buffer into which in process data was copied was put onto the done queue by the driver resulting in an OLDA_WM_BUFFER_ DONE message When the in process buff
64. e 53 for more information on these modes 49 Chapter 2 e Falling edge external gate input Enables a counter timer operation on the transition from the high level to the low level falling edge In software this is called a low edge gate type Note that this gate type is used only for one shot and repetitive one shot mode refer to page 53 for more information on these modes e Rising edge external gate input Enables a counter timer operation on the transition from the low level to the high level rising edge In software this is called a high edge gate type Note that this gate type is used only for one shot and repetitive one shot mode refer to page 61 for more information on these modes Table 11 lists the screw terminals and pin numbers on the DT9800 Series function modules that correspond to the gate input signals of each counter timer Table 11 Gate Input Signals Screw Screw Counter Terminal J1 Pin Terminal on J5 Pin Module Timer on Module Number AC1324 Panel Number DT9800 Standard 0 TB52 52 aila 1 TB48 48 DT9800 MAC Series DT9800 EC Series 0 TB18 18 D TOG0VECA 1 E TB14 14 Series 50 Principles of Operation Pulse Output Types and Duty Cycles DT9800 Series function modules can output pulses from each counter timer Table 12 lists the screw terminals of the modules that correspond to the pulse output signals of each counter timer
65. e operation e Scan mode takes full advantage of the capabilities of the DT9800 Series function modules In a scan you can specify a channel gain list clock source trigger source scan mode buffer and buffer wrap mode using software Two scan modes are supported continuously paced scan mode and triggered scan mode often called burst mode These modes are described in the following subsections Using software you can stop a scan by performing either an orderly stop or an abrupt stop In an orderly stop the module finishes acquiring the data stops all subsequent acquisition and transfers the acquired data to host memory all subsequent triggers or retriggers are ignored In an abrupt stop the module stops acquiring samples immediately the acquired data is not transferred to host memory and all subsequent triggers or retriggers are ignored 26 Principles of Operation Continuously Paced Scan Mode Use continuously paced scan mode if you want to accurately control the period between conversions of individual channels in a scan When it detects an initial trigger the module cycles through the channel gain list acquiring and converting the value for each entry in the list this process is defined as the scan The module then wraps to the start of the channel gain list and repeats the process continuously until either the allocated buffers are filled or until you stop the operation Refer to page 36 for more information on
66. e useful than an external C T clock source refer to page 47 for more information on the internal C T clock source Using software specify the counter timer mode as one shot the clock source as internal the polarity of the output pulse high to low transition or low to high transition the duty cycle of the output pulse and the gate type to trigger the operation as rising edge or falling edge Refer to page 51 for more information on pulse output types and to page 49 for more information on gate types Note In the case of a one shot operation use a duty cycle as close to 100 as possible to output a pulse immediately Using a duty cycle closer to 0 acts as a pulse output delay Ensure that the signals are wired appropriately Refer to the DT9800 Series Getting Started Manual for wiring examples 59 Chapter 2 60 Figure 11 shows an example of a one shot operation using an external gate input rising edge a clock output frequency of 1 kHz pulse period of 1 ms a low to high pulse type and a duty cycle of 99 99 Figure 12 shows the same example using a duty cycle of 50 One Shot Operation Starts External Gate Signal Pulse Output Signal LL a 1 ms period p 99 99 duty cycle Figure 11 Example of One Shot Mode Using a 99 99 Duty Cycle Principles of Operation One Shot Operation Starts External
67. eature Specifications Specifications Effective number of bits 11 5 bits 13 5 bits for DT9803 04 ENOB at 1 kHz input 14 1 bits for DT9805 06 Total Harmonic 80 dB typical 90 dB typical Distortion Channel crosstalk 80 dB 1 kHz Minimum Data 0 75 S s Throughput Internal Clock Data throughput Single analog channel Multiple channels scan with gain of 1 to 10 Multiple channels scan with gain of 100 100 kSamples s 0 03 accuracy 100 kSamples s 0 03 accuracy 100 kSamples s for DT9803 04 0 01 accuracy 50 kSamples s for DT9805 06 0 01 accuracy 100 kSamples s for DT9803 04 0 01 accuracy 50 kSamples s for DT9805 06 0 01 accuracy 10 kSamples s 0 03 accuracy 123 Appendix A 124 Table 15 A D Subsystem Specifications cont Feature DT9801 MAC EC EC I DT9802 MAC EC EC I Specifications DT9803 MAC EC EC I DT9804 MAC EC EC I DT9805 DT9806 Specifications Data throughput cont Multiple channels scan with gain of 500 Single digital channel 100 kSamples s 2 kSamples s 0 04 accuracy 100 kSamples s for DT9803 04 50 kSamples s for DT9805 06 CJC Voltage 25 C 0 250 V Cold Junction Accuracy 1 from 5 to 45 C Break Detection Current 50 nA high side differential External A D sample clock Input type High level input voltage Low level input voltage
68. er operation modes e Event counting e Frequency measurement e Rate generation e One shot and Repetitive one shot The following subsections describe these modes in more detail Event Counting Use event counting mode to count events clock pulses from the counter s associated clock input source If you are using one counter you can count a maximum of 65 536 events before the counter rolls over to 0 and starts counting again If you are using a cascaded 32 bit counter you can count a maximum of 4 294 967 296 events before the counter rolls over to 0 and starts counting again In event counting mode use an external C T clock source refer to page 47 for more information on the external C T clock source Using software specify the counter timer mode as event counting count the C T clock source as external and the gate type that enables the operation as logic high Refer to page 51 for information on gates Ensure that the signals are wired appropriately Refer to the DT9800 Series Getting Started Manual for wiring examples 53 Chapter 2 Figure 7 shows an example of an event counting operation using a logic high gate type high level enables operation Gate Input low level Signal disables operation External C T Clock a Input Signal 3 events are counted while the operation is enabled event counting event countin 3 operation stops opera
69. er has been filled it too is placed on the done queue and an OLDA_WM_BUFFER_DONE message is posted However the number of valid samples is equal to the queue s maximum samples minus what was copied out Programming Flowcharts Deal with A D Messages and Buffers The most likely error messages include OLDA_WM_OVERRUN and A ED Report the error OLDA_WM_TRIGGERERROR occurred AAuffer reuse message Yes Increment a counter if The buffer reused message is occurred desired OLDA_WM_BUFFER_REUSED The queue done messages are OLDA_WM_QUEUE_DONE and Yes OLDA_WM_QUEUE_STOPPED After Report the condition reporting that the acquisition has stopped you may wish to clean up the operation see page 99 message occurred Retrieve the buffer from the done queue using gt olDaGetBuffer x Determine the number of Yes Yes Process message data occurred No samples in the buffer using olDmGetValidSamples C Go to the next page C Go to the next page D 95 Chapter 4 96 Deal with A D Messages and Buffers cont C Continued from previous page D C Continued from previous page D Copy all the samples in the buffer to a Visual Basic array using Yes sing Visual olDmCopyFromBuffer Basic Get a pointer to the buffer using olDmGetBufferPtr e Process the data
70. erature range Storage temperature range Relative humidity 0 C to 55 C 25 C to 85 C To 95 noncondensing Table 21 lists the screw terminal and cable specifications for the DT9800 Standard and DT9800 MAC Series function modules Table 21 DT9800 Standard and DT9800 MAC Series Cable and Terminal Block Specifications Feature Specifications Recommended cable 2 meter Type A B USB cable Data Translation part 17394 or AMP part 974327 1 Screw terminal block 9 position terminal block Data Translation part 17381 or PCD Inc part ELVP09100 129 Appendix A Table 22 lists the connector specifications for the DT9800 EC and DT9800 EC I Series function modules Table 22 DT9800 EC EC I Connector Specifications Feature Specifications 2 26 pin locking 3 M type part number 3429 connectors 50 pin connector 3M type part number 3425 7000 130 Connector Pin Assignments 131 Appendix B 132 Table 23 lists the pin assignments of connector J1 on the DT9800 Standard and DT9800 MAC Series function modules Table 23 Pin Assignments for Connector J1 on the DT9800 Standard and DT9800 MAC Series Function Modules Pin Pin Number Signal Description Number Signal Description 1 Analog Input 00 2 Analog Input 08 00 Return CJC on DT9805 DT9806 3 Analog Input 01 4 Anal
71. erminal panels that provide signal conditioning and other features Table 1 lists the function modules in each series and the key features of each Overview Table 1 Key Features Among the DT9800 Series Analog of of Input of Digital of Operating Function Analog Sample Analog 1 0 Counter Series System Modules Inputs Rate Outputs Lines Timers DT9800 Windows DT98012 16 SE 100 kS s 0 8 input 2 Standard 8 DI 8 output Series DT98022 16SE 100kS s 2 8input 2 8 DI 8 output DT9803 16SE 100kS s 0 8 input 2 8 DI 8 output DT9804 16SE 100kS s 2 8 input 2 8 DI 8 output DT9805 16 SE 50 kS s 0 8 input 2 8 DI 7 8 output thermo couples and 1 CJC DT9806 16 SE 50 kS s 2 8input 2 8 DI 7 8 output thermo couples and 1 CJC Chapter 1 Table 1 Key Features Among the DT9800 Series cont Analog of of Input of Digital of Operating Function Analog Sample Analog 1 0 Counter Series System Modules Inputs Rate Outputs Lines Timers DT9800 Macintosh DT9801 16 SE 100 kS s 0 8 input 2 MAC MAC 8 DI 8 output Deine DT9802 16SE 100kS s 2 8input 2 MAC 8 DI 8 output DT9803 16 SE 100 kS s 0 8 input 2 MAC 8 DI 8 output DT9804 16 SE 100 kS s 2 8 input 2 MAC 8 DI 8 output DT9800 Windows DT9801 16 SE 100 kS s 0 8 input
72. es and that you understand your application What You Should Learn from this Manual This manual provides detailed information about the features of the DT9800 Series function modules and the capabilities of the DT9800 Series Device Driver The manual is organized as follows e Chapter 1 Overview describes the major features of the modules as well as the supported software and accessories for the modules e Chapter 2 Principles of Operation describes all of the features of the modules and how to use them in your application e Chapter 3 Supported Device Driver Capabilities lists the data acquisition subsystems and the associated features accessible using the DT9800 Series Device Driver About this Manual Chapter 4 Programming Flowcharts describes the processes you must follow to program the subsystems on the DT9800 Series module using DT Open Layers compliant software Chapter 5 Calibration describes how to calibrate the analog I O circuitry of the modules Chapter 6 Troubleshooting provides information that you can use to resolve problems with the modules and the device driver should they occur Appendix A Specifications lists the specifications of the modules Appendix B Connector Pin Assignments shows the pin assignments for the connectors and the screw terminal assignments for the modules An index completes this manual Conventions Used in this Manual
73. es support autoranging for single value operations where the board determines the appropriate gain for your range rather than you having to specify it Refer to page 26 for more information on using autoranging Specifying the Gain for a Single Channel The simplest way to specify gain for a single channel is to specify the gain for a single value analog input operation using software refer to page 26 for more information on single value operations You can also specify the gain for a single channel using an analog input gain list described in the next section Specifying the Gain for One or More Channels For DT9800 Series function modules you can specify the gain for one or more analog input channels using an analog input gain list Using software set up the gain list by specifying the gain for each entry in the channel list The two lists together are often referred to as the channel gain list For example assume the analog input channel list contains three entries channels 5 6 and 7 the gain list might look like this 2 4 1 where a gain of 2 corresponds to channel 5 a gain of 4 corresponds to channel 6 and a gain of 1 corresponds to channel 7 Note For analog input channel 16 the eight digital input lines in the channel list specify a gain of 1 in the gain list Principles of Operation A D Sample Clock Sources The DT9800 Series function modules allow you to use one of two clock sources for pacing
74. fferential linearity 0 5 LSBs monotonic 1 0 LSB monotonic Output range Oto5V 10V 10 V 5V 10V Zero error Software adjustable to zero Gain error 2 LSBs 6 LSBs Current output 5 mA minimum 10 V 2 kQ Output impedance Capacitive drive capability 0 3 Q typical 0 001 uF minimum no oscillations Protection Short circuit to Analog Common Power on voltage 0 V 10 mV maximum Settling time to 0 01 of FSR 50 us 20 V step 10 us 100 mV step Throughput Full Scale Single value system dependent Slew rate 2 V us Specifications Table 17 lists the specifications for the digital input subsystem Table 17 DIN Subsystem Specifications Feature Specifications Number of lines 8 Port A Termination None Inputs Input type Level sensitive Input load 1 HCT High level input voltage 2 0 V minimum Low level input voltage 0 8 V maximum High level input current 3 uA Low level input current 3 pA Maximum internal pacer rate single digital channel Maximum A D throughput of the board Back EMF diodes No a This digital channel must be the only channel included as part of the channel gain list 127 Appendix A Table 18 lists the specifications for the digital output subsystem Table 18 DOUT Subsystem Specifications Output driver Output driver high voltage Output driver low v
75. g and conversion modes supported for analog input channels are supported for these digital input lines if you specify them this way Performing Dynamic Digital Output Operations Using software you can enable a synchronous dynamic digital output operation for the A D subsystem This feature is particularly useful for synchronizing and controlling external equipment One dynamic digital output line 0 is provided screw terminal 46 This line is set to a value of 0 on power up a reset does not affect the values of the dynamic digital output line Note that this line is provided in addition to the other eight digital output lines see page 44 for more information on the digital I O features You specify the value 0 or 1 to write from the dynamic digital output line using a digital channel list A value of 0 indicates a low level signal a value of 1 indicates a high level signal The digital channel list corresponds to the analog input channel list As each entry in the analog input channel list is read the corresponding value you specified in the digital channel list is output to the dynamic digital output line For example assume that the analog input channel list contains channels 0 1 2 and 3 that dynamic digital output operations are enabled and that the values in the digital channel list are 1 0 0 1 Figure 2 shows this configuration 17 Chapter 2 Analog Digital Dynamic Di
76. gain list has been scanned once then the board waits for the retrigger event When the retrigger event occurs the board scans the channel gain list once again acquiring data on each pulse of the A D sample clock The process repeats continuously with every specified retrigger event ChanO Chan2 Chano Chan2 Chan 1 l Chan 1 2 LIL Sample Clock Trigger event occurs Board waits for Retrigger event occurs data acquired for one retrigger event data acquired for one scan of the CGL scan of the CGL Figure 4 Triggered Scan Mode Specify the frequency of the internal retrigger clock using software The minimum retrigger frequency is 0 75 Hz 0 75 Samples s the maximum retrigger rate of each DT9800 Series function module is listed in Table 5 on page 30 29 Chapter 2 30 Table 5 Maximum Retrigger Frequency Function Module Maximum Module Series Name Retrigger Frequency DT9800 Standard DT9801 100 kHz DT9802 DT9803 DT9804 DT98053 50 kHz DT9806 DT9800 MAC DT9801 MAC 100 kHz DT9802 MAC DT9803 MAC DT9804 MAC DT9800 EC DT9801 EC 100 kHz DT9802 EC DT9803 EC DT9804 EC DT9800 EC DT9801 EC I 100 kHz DT9802 EC DT9803 EC DT9804 EC a The maximum retrigger frequency is 50 kHz for a single channel or a channel scan when the gain is 1 or 10 10 kHz for a channel scan when the gain is 100 and 2 kHz for a
77. gital Channel List Channel List Output Line 0 0 __ 1 p 1 1 a a 0 p 0 2 m gt 0 e o 3 1 _______ ys 1 Figure 2 An Example Using Dynamic Digital Outputs As analog input channel 0 is read a high level signal is output to the dynamic digital output line As analog input channels 1 and 2 are read a low level signal is output to the dynamic digital output line As analog input channel 3 is read a high level signal is output to the dynamic digital output line On power up a value of 0 is written to the dynamic digital output line 18 Principles of Operation Input Ranges and Gains Table 3 lists the supported gains and effective input range of each DT9800 Series function module Table 3 Effective Input Range Unipolar Bipolar Function Module Input Input Module Series Name Gain Range Range DT9800 DT9801 1 Oto 10V 10 V Standard DT9802 2 Oto5V 45V 4 0 to 2 5 V 2 5 V 8 0 to 1 25 V 1 25 V DT9803 1 N A 10 V D19804 2 N A 5 V 4 N A 2 5 V 8 N A 1 25 V DT9805 1 N A 10 V preere 10 N A 1V 100 N A 0 10 V 500 N A 0 020 V 19 Chapter 2 20 Table 3 Effective Input Range cont Unipolar Bipolar Function Module Input Input Module Series Name Gain Range Range DT9800 MAC DT9801 MAC 1 Oto 10V 10 V Series DT9802 MAC 2 Oto5V 45V 4 Oto 2 5 V 2 5 V
78. he DIN subsystem itself is incapable of continuous operation you can perform a con tinuous DIN operation by specifying channel 16 in the channel gain list of the A D subsystem and starting the A D subsystem All 8 bits of the digital input lines from Port A are assigned to A D input channel 16 The maximum retrigger frequency for all modules except the DT9805 and DT9806 is 100 kHz The DT9805 and DT9806 modules support a maximum retrigger frequency of 50 kHz The appropriate retrigger frequency to use depends on the number of samples in the channel gain list and the A D sample clock frequency as follows Min Retrigger of CGL entries 2 us Period A D sample clock frequency Max Retrigger 1 Frequency Min Retrigger Period The value of 0 75 Hz assumes the minimum number of samples is 1 Supported Device Driver Capabilities i DT9802 DT9802 MAC DT9802 EC and DT9802 EC I modules support an output range of 0 to The DT9805 and DT9806 function modules support gains of 1 10 100 and 500 all other DT9800 Series function modules support gains of 1 2 4 and 8 Autoranging is supported in single value mode only for the DT9805 and DT9806 Refer to page 26 for more information on autoranging Channels 0 to 15 are provided for single ended analog inputs channels 0 to 7 are provided for differential inputs Channel 16 reads all 8 bits from the DIN subsystem Port A DT9801 DT9801 MAC DT9801 EC DT9801 EC I
79. ic digital output line is in addition to the digital output lines in Port B Refer to page 17 for more information on dynamic digital output operations On power up or module reset no digital data is output from the modules All the outputs include diode protection to the isolated ground and the isolated 5 V Note DT9800 EC Series function modules do not provide isolated ground or isolated 5 V power Principles of Operation Resolution The resolution of the digital input port is fixed at 8 bits the resolution of the digital output port is also fixed at 8 bits You cannot program the digital I O resolution in software Operation Modes The DT9800 Series function modules support the following digital I O operation modes e Single value operations are the simplest to use but offer the least flexibility and efficiency You use software to specify the digital I O port and a gain of 1 the gain is ignored Data is then read from or written to the digital I O lines For a single value operation you cannot specify a clock or trigger source Single value operations stop automatically when finished you cannot stop a single value operation e Continuous digital input takes full advantage of the capabilities of the DT9800 Series function modules In this mode enter all eight digital input lines of Port A as channel 16 of the analog input channel gain list program this mode through the A D subsystem Using this mode you
80. il your external meter display reads 0 V within 0 005 V 10 In the DAC1 Voltage box click 9 375 V and verify that your external meter display reads 9 375 V within 12 mV Note If you are not satisfied with the analog output calibration you can load the factory default settings stored in the EEPROM by clicking Restore in the D A Calibration Factory Settings box Once you have finished this procedure the analog output circuitry is calibrated To close the Calibration Utility click Done 110 D Troubleshooting General Checklist ssiri aprii na aa Vad a iyi 112 Service and Suppott sperei repren d eresi nen eiaa 115 If Your Board Needs Factory Service 6 00 eee ee 118 111 Chapter 6 General Checklist Should you experience problems using the DT9800 Series function modules please follow these steps 1 Read all the documentation provided for your product Make sure that you have added any Read This First information to your manual and that you have used this information 2 Check the Data Acquisition OMNI CD for any README files and ensure that you have used the latest installation and configuration information available 3 Check that your system meets the requirements stated in the DT9800 Series Getting Started Manual 4 Check that you have installed your hardware properly using the instructions in the DT9800 Series Getting Started Manual 5 Check that you have installed and c
81. ing For the A D subsystems on the DT9801 DT9801 MAC DT9801 EC DT9801 EC I Specify the voltage range using DT9802 DT9802 MAC DT9802 EC and IDaSetRange DT9802 EC specify the voltage input range as 0 a ge to 10 V or 10 V the default For the A D subsystems on the DT9803 DT9803 MAC DT9803 EC DT9803 EC I DT9804 DT9804 MAC DT9804 EC DT9804 EC DT9805 and DT9806 specify the voltage input range as 10 V The input range and the gain determine the effective input range See page 19 for more information For D A subsystems on the DT9802 DT9802 MAC DT9802 EC and DT9802 EC l specify the voltage output range as 0 to 10 V 0 to 5 V 10 V the default or 5 V For D A subsystems on the DT9804 DT9804 MAC DT9804 EC DT9804 EC I and DT9806 specify the voltage output range as 10 V The step is unnecessary for DIN and DOUT subsystems 89 Chapter 4 Set Up Channel List and Channel Parameters Specify the size of the A D channel list The default is 1 The maximum size is 32 and gain list using olDaSetChannelListSize Set up the ch i eainilistusi For the single ended and pseudo differential ii op oars ia mane configuration channels 0 to 15 are available for olDaSetChannelListEntry the differential configuration channels 0 to 7 are available To achieve continuous digital input enter the digital input channel as channel 16 in the analog input channel list
82. l gate type 73 high to low pulse output 51 j inprocess buffers 68 94 input ranges 19 internal clock 72 A D sample 23 C T 47 cascaded C T 48 internal gate type 73 internal retrigger 68 internal retrigger clock 29 internally retriggered scan mode 28 J J1 connector pin assignments 132 L LabVIEW 8 level gate type high 49 low 49 logic high level gate type 49 logic low level gate type 49 LongtoFreq macro 86 low edge gate type 50 73 low level gate type 73 low to high pulse output 51 M macro 86 measuring frequency 54 messages 67 dealing with 95 dealing with for A D operations 96 OLDA_WM_BUFFER_ DONE 94 OLDA_WM_BUFFER_DONE 96 OLDA_WM_BUFFER_REUSED 95 OLDA_WM_OVERRUN 95 OLDA_WM_PRETRIGGER_ BUFFER_DONE 96 OLDA_WM_QUEUE_DONE 95 OLDA_WM_QUEUE_STOPPED 95 OLDA_WM_TRIGGERERROR 95 multiple buffer wrap mode 68 N number of differential channels 70 DMA channels 68 extra clocks 72 extra triggers 71 filters 70 gains 69 I O channels 70 resolutions 71 scans per trigger 68 single ended channels 70 voltage ranges 70 Nyquist Theorem 24 143 Index 144 O Offset box 106 OLDA_WM_BUFFER_ DONE 94 OLDA_WM_BUFFER_DONE 96 OLDA_WM_BUFFER_REUSED 95 OLDA_WM_OVERRUN 95 OLDA_WM_PRETRIGGER_BUFFER_ DONE 96 OLDA_WM_QUEUE_DONE 95 OLDA_WM_QUEUE_STOPPED 95 OLDA_WM_TRIGGERERROR 95 olDaAbort 98 olDaCodeToVolts 80 96 olDaConfig in continuous analog input operations 82 in event counting operations 83 in f
83. llowing flowcharts show the steps required to perform data acquisition operations using DT Open Layers For illustration purposes the DataAcq SDK functions are shown however the concepts apply to all DT Open Layers software Note that many steps represent several substeps if you are unfamiliar with the detailed operations involved with any one step refer to the indicated page for detailed information Optional steps appear in shaded boxes Programming Flowcharts Single Value Operations C Initialize the device driver and get the N device handle with olDalnitialize p Specify A D for an analog input subsystem or for Get a handle to the subsystem with digital channel 16 which corresponds to the olDaGetDASS digital input port D A for an analog output subsystem DIN for a digital input subsystem or DOUT for a digital output subsystem Set the data flow to OL_DF_SINGLEVALUE using olDaSetDataFlow Note that you cannot perform a single value analog output operation while the A D subsystem l is running Set the subsystem parameters see page 89 Configure the subsystem using olDaConfig C Go to the next page D 1 For the DIN subsystem element 0 corresponds to Port A lines 0 to 7 for the DOUT subsystem element 0 corresponds to Port B lines 0 to 7 79 Chapter 4 80 Single Value Operations cont Continued from previous page D
84. llowing formulas LSB _FSR 2N Code Vout offset LSB 42 Principles of Operation where LSB is the least significant bit FSR is the full scale range 10 N is the output resolution see Table 8 on page 39 for a list of output resolutions Code is the raw count used by the software to represent the voltage Vout is the analog voltage Offset is the minus full scale value or 40 V For example assume that you are using a DT9804 module If you want to output a voltage of 4 7 V determine the code value as follows LSB __10V_ 0 0001526 V 65536 Code 4 7 V 10 V 0 0001526 V Code 96330 1784Ah 43 Chapter 2 Digital I O Features This section describes the following features of the digital I O subsystem e Digital I O lines described on this page e Resolution described on this page and e Operation modes described on page 45 Digital I O Lines DT9800 Series function modules support eight digital input lines Port A lines 0 to 7 through the DIN subsystem and eight digital output lines Port B lines 0 to 7 through the DOUT subsystem For fast clocked digital input operations you can enter the digital input lines from Port A as channel 16 in the analog input channel list refer to page 16 for more information The DT9800 Series function modules also provide a dynamic digital output line that you can update when an analog input channel is read Note that the dynam
85. more analog input channels using an analog input channel list You can group the channels in the list sequentially starting either with 0 or with any other analog input channel or randomly You can also specify a single channel or the same channel more than once in the list Using software specify the channels in the order you want to sample them You can enter up to 32 entries in the channel list The channels are read in order using continuously paced scan mode or triggered scan mode from the first entry to the last entry in the channel list Refer to page 26 for more information on the supported conversion modes Specifying Digital Input Lines in the Analog Input Channel List In addition to the analog input channels the DT9800 Series function modules allow you to read eight digital input lines Port A lines 0 to 7 using the analog input channel list This feature is particularly useful when you want to correlate the timing of analog and digital events To read these eight digital input lines specify channel 16 in the analog input channel list You can enter channel 16 anywhere in the list and can enter it more than once if desired Note If channel 16 is the only channel in the channel gain list the module can read this channel at the maximum A D sampling rate 16 Principles of Operation The digital channel is treated like any other channel in the analog input channel list therefore all the clocking triggerin
86. n devices DTx EZ Getting Started Manual UM 15428 This manual describes how to use the ActiveX controls provided in DTx EZ to access the capabilities of Data Translation data acquisition devices in Microsoft Visual Basic or Visual C DT VPI User Manual UM 16150 This manual describes how to use DT VPI and the Agilent VEE visual programming language to access the capabilities of Data Translation data acquisition devices DT LV Link Getting Started Manual UM 15790 This manual describes how to use DT LV Link with the LabVIEW graphical programming language to access the capabilities of Data Translation data acquisition devices xi About this Manual e Microsoft Windows 98 Windows Me Windows 2000 Windows XP or Macintosh documentation e USB web site http www usb org e Omega Complete Temperature Measurement Handbook and Encyclopedia This document published by Omega Engineering provides information on how to linearize voltage values into temperature readings for various thermocouple types Where To Get Help Should you run into problems installing or using a DT9800 Series function module the Data Translation Technical Support Department is available to provide technical assistance Refer to Chapter 6 for more information If you are outside the United States or Canada call your local distributor whose number is listed in your Data Translation product handbook xii Overview POA
87. n the Ext A D Trigger input screw terminal TB24 on the module 31 Chapter 2 32 When the retrigger occurs the module scans the channel gain list once then waits for another external retrigger to occur The process repeats continuously until either the allocated buffers are filled if buffer wrap mode is none or until you stop the operation if buffer wrap mode is single or multiple refer to page 36 for more information on buffers The conversion rate of each channel is determined by the frequency of the A D sample clock refer to page 23 for more information on the A D sample clock The conversion rate of each scan is determined by the period between external retriggers therefore it cannot be accurately controlled The module ignores external triggers that occur while it is acquiring data Only external retrigger events that occur when the module is waiting for a retrigger are detected and acted on To select externally retriggered scan mode use software to specify the following parameters e The dataflow as continuous e The triggered scan mode usage as enabled e The retrigger mode as an external retrigger retrigger extra for DataAcq SDK users e The number of times to scan per trigger or retrigger also called the multiscan count to 1 and e The retrigger source as the external trigger external for DataAcq SDK users Note For DataAcq SDK users if you want to use the same trigger source as both the ini
88. nel Expansion Support OLSSC_SUP_EXP2896 DT727 Channel Expansion OLSSC_SUP_EXP727 9 or 179 Channel Type SE Support OLSSC_SUP_SINGLEENDED SE Channels OLSSC_MAXSECHANS DI Support OLSSC_SUP_DIFFERENTIAL DI Channels OLSSC_MAXDICHANS Yes 16 Yes Yes Yes Yes Yes Filters Filter Channel Support OLSSC_SUP_FILTERPERCHAN Number of Filters OLSSC_NUMFILTERS Ranges Number of Voltage Ranges OLSSC_NUMRANGES Range per Channel Support OLSSC_SUP_RANGEPERCHANNEL oh Supported Device Driver Capabilities Table 13 DT9800 Series Supported Options cont Resolution DT9800 Series A D D A DIN DOUT SRL C T Total Subsystems on Module Software Programmable Resolution OLSSC_SUP_SWRESOLUTION Number of Resolutions OLSSC_NUMRESOLUTIONS 1 1 1 1 0 Data Encoding Binary Encoding Support OLSSC_SUP_BINARY Twos Complement Support OLSSC_SUP_2SCOMP Yes Yes Yes Yes Yes Triggers Software Trigger Support OLSSC_SUP_SOFTTRIG External Trigger Support OLSSC_SUP_EXTERNTRIG Positive Threshold Trigger Support OLSSC_SUP_THRESHTRIGPOS Negative Threshold Trigger Support OLSSC_SUP_THRESHTRIGNEG Analog Event Trigger Support OLSSC_SUP_ANALOGEVENTTRIG Digital Event Trigger Support OLSSC_SUP_DIGITALEVENTTRIG Timer Event Trigger Support OLSSC_SUP_TIMEREVENTTRIG Number of Extra Triggers O
89. og In 1 Return TB4 and to Analog Ground TB17 3 Inthe PGL Zero box click the text A D Gain 500 CH 1 to refresh the value of analog input channel 1 The gain is set to 500 automatically 4 Click the increment or decrement arrows in the PGL Zero box until the A D value reads 0 V within 5 mV 5 Measure the room temperature at the temperature sensor of the board see Figure 15 by taping a thermometer to the underside of the module between screw terminals 9 and 10 then multiply this value by 10 mV This is the temperature that you want to adjust the CJC to 107 Chapter 5 54 1 53 2 52 3 51 4 50 5 49 6 48 7 DT9805 DT9806 47 i 8 Function Module 46 9 E lt a Temperature Sensor 45 10 located on the underside of AA 11 the board between the as 42 screw terminal blocks 42 13 41 14 40 15 39 16 38 17 37 18 U UUU Wwwowon Nd MYN NNNNN NYDN Oak wW N O O W N Ooh wWwhrhd OO Figure 15 Temperature Sensor Location 6 Click the text A D Gain 1 CH 0 in the CJC Adj box to refresh the value of analog input channel 0 The gain is set to 1 automatically 7 Click the increment or decrement arrows in the CJC Adj box until the A D value on the screen is equal to the room temperature multiplied by 10 mV within 5 mV For example if the room temperature is 25 C you want to adjust the CJC to 250 mV within 5 mV 108 Calibration Note If you are not satisfied with the thermocouple calibr
90. og Input 09 01 Return 5 Analog Input 02 6 Analog Input 10 02 Return 7 Analog Input 03 8 Analog Input 11 03 Return 9 Analog Input 04 10 Analog Input 12 04 Return 11 Analog Input 05 12 Analog Input 13 05 Return 13 Analog Input 06 14 Analog Input 14 06 Return 15 Analog Input 07 16 Analog Input 15 07 Return 17 Isolated Analog Ground 18 Amp Low 19 Analog Output 0 20 Analog Output 0 Return 21 Analog Output 1 22 Analog Output 1 Return 23 Isolated Digital Ground 24 External A D Trigger 25 External A D Sample Clock In 26 Isolated Digital Ground 27 Isolated 5 V Out 28 Digital Input 0 29 Digital Input 1 30 Digital Input 2 31 Digital Input 3 32 Digital Input 4 33 Digital Input 5 34 Digital Input 6 35 Digital Input 7 36 Isolated Digital Ground 37 Isolated Digital Ground 38 Digital Output 7 Connector Pin Assignments Table 23 Pin Assignments for Connector J1 on the DT9800 Standard and DT9800 MAC Series Function Modules cont nate Signal Description mae Signal Description 39 Digital Output 6 40 Digital Output 5 41 Digital Output 4 42 Digital Output 3 43 Digital Output 2 44 Digital Output 1 45 Digital Output 0 46 Dynamic Digital Output 47 Isolated Digital Ground 48 External Gate 1 49 User Counter Output 1 50 User Clock Input 1 51 Isolated Digital Ground 52 External Gate 0 53 User Counter Output 0 54 User Clock Input 0 a 5 V output is available only when one of the subsystems is activa
91. oltage Feature Specifications Number of lines 8 Port B Termination 22 kQ resistor Outputs 74HCT244 TTL 2 4 V minimum IOH 4 mA 0 5 V maximum IOL 12 mA Back EMF diodes Yes Table 19 lists the specifications for the C T subsystems Table 19 C T Subsystem Specifications Feature Specifications Number of counter timer channels Clock Inputs Input type High level input voltage Low level input voltage Minimum pulse width Maximum frequency HCT with 22 kQ pull up resistor 2 4 V minimum 0 8 V maximum 600 ns high 600 ns low 750 kHz Gate Inputs Input type High level input voltage Low level input voltage Minimum pulse width HCT with 22 kQ pull up resistor 2 4 V minimum 0 8 V maximum 600 ns high 600 ns low Counter Outputs Output driver high voltage Output driver low voltage 3 0 V minimum 1 mA Source 0 4 V maximum 2 mA Sink Specifications Table 20 lists the power physical and environmental specifications for the DT9800 Series function modules Table 20 Power Physical and Environmental Specifications Feature Specifications Power 5 V Standby 5 V Enumeration 5 V Power ON 5 V Isolated Power Out TB27 0 5 HA maximum 100 mA maximum 500 mA maximum 10 mA maximum Physical Dimensions Weight 6 5 inches x 4 5 inches x 1 4 inches 9 ounces 255 grams Environmental Operating temp
92. onfigured the device driver properly using the instructions in the DT9800 Series Getting Started Manual 6 Search the DT Knowledgebase in the Support section of the Data Translation web site at www datatranslation com for an answer to your problem If you still experience problems try using the information in Table 14 to isolate and solve the problem If you cannot identify the problem refer to page 113 112 Troubleshooting Table 14 Troubleshooting Problems Symptom Possible Cause Possible Solution Module does not The module Check the configuration of your device respond configuration is driver see the instructions in the DT9800 incorrect Series Getting Started Manual The module is Contact Data Translation for technical damaged support refer to page 115 Intermittent Loose connections or Check your wiring and tighten any loose operation vibrations exist connections or cushion vibration sources see the instructions in the DT9800 Series Getting Started Manual The module is Check environmental and ambient overheating temperature consult the module s specifications on page 129 of this manual and the documentation provided by your computer manufacturer for more information Electrical noise exists Check your wiring and either provide better shielding or reroute unshielded wiring see the instructions in the DT9800 Series Getting Started Manual 113 Chapter 6
93. onnected 39 TB39 Digital Input 4 40 TB40 Not Connected 41 TB41 Digital Input 3 42 TB42 Not Connected 43 TB43 Digital Input 2 44 TB44 Not Connected 45 TB45 Digital Input 1 46 TB46 Not Connected 47 TB47 Digital Input 0 48 TB48 Not Connected 49 TB49 Not Connected 50 TB50 Not Connected Symbols 5 V power 44 Numerics 5B01 backplane 9 5B08 backplane 9 7BP04 1 backplane 9 7BP08 1 backplane 9 7BP16 1 backplane 9 A A D FIFO Full Flag 38 A D Over Sample error 37 A D sample clock 23 external 25 internal 23 A D subsystem 13 specifications 120 A D trigger 25 aborting an operation 98 AC1315 cable 10 AC1324 screw terminal panel 9 AC1393 cable 10 accessories 9 Agilent VEE 8 aliasing 24 analog input features 13 A D sample clock 23 calibrating 104 channel list 16 channels 14 Index conversion modes 26 data format 33 data transfer 36 error conditions 37 gain 19 gain list 22 input ranges 19 resolution 13 specifications 120 triggers 25 analog output features 39 calibrating 107 109 channels 40 conversion mode 42 data format 42 gain 41 output ranges 41 resolution 39 specifications 126 autoranging 26 69 B banks digital I O 44 base clock frequency 72 binary data encoding 71 buffers 37 68 dealing with for A D operations 96 inprocess flush 68 multiple wrap mode 68 setting up 93 single wrap mode 68 139 Index 140 C C C programs 8 C T clock sources 47 cascaded C T clock 48 external C T
94. oose to calibrate the analog input circuitry automatically described on this page or manually described on page 106 auto calibration is the easiest to use and is the recommended calibration method Using the Auto Calibration Procedure To calibrate the analog input subsystem automatically perform the following step 1 Click Go in the Auto Calibration box The zero and full scale ranges are automatically calibrated Note If you are not satisfied with the analog input calibration you can load the factory default settings stored in the EEPROM by clicking Restore in the A D Configuration Factory Settings box Once you have finished this procedure the analog input circuitry is calibrated If you are using a DT9805 or DT9806 function module it is recommended that you calibrate the thermocouple circuitry using the instructions on page 107 Otherwise you can calibrate the analog output circuitry if you wish following the instructions on page 109 105 Chapter 5 Using the Manual Calibration Procedure To calibrate the analog input subsystem manually perform the following steps 1 Click A D Ch 1 2 Click the increment or decrement arrows in the Offset box until the A D value on the screen reads 0 V within 0 001 V for the DT9803 DT9803 EC DT9803 EC I DT9804 DT9804 EC DT9804 EC I DT9805 and DT9806 modules and within 0 010 V for the DT9801 DT9801 EC DT9801 EC DT9802 DT9802 EC and DT9802 EC I modules
95. ove information may delay the resolution of your issue e Fax Photocopy and complete the form on page 116 then fax Technical Support at the following number 508 481 8620 World Wide Web Support For the latest tips software fixes and other product information you can always access our World Wide Web site free of charge at the following address http www datatranslation com 117 Chapter 6 118 If Your Board Needs Factory Service If your board must be returned to Data Translation perform the following steps 1 Record the board s serial number then contact the Customer Service Department at 508 481 3700 if you are in the USA and obtain a Return Material Authorization RMA If you are located outside the USA call your local distributor for authorization and shipping instructions The name and telephone number of your nearest distributor are listed in your Data Translation catalog All return shipments to Data Translation must be marked with the correct RMA number to ensure proper processing Using the original packing materials if available package the board as follows Wrap the board in an electrically conductive plastic material Handle with ground protection A static discharge can destroy components on the board Place ina secure shipping container Return the board to the following address making sure the RMA number is visible on the outside of the box Customer Service Dept D
96. ported software packages or utilities Refer to the DT9800 Series Getting Started Manual UM 17471 for more information on loading and configuring the device driver e Quick Data Acq application This software is provided on the Data Acquisition OMNI CD for Windows 98 Windows Me Windows 2000 and Windows XP or the DT9800 Series CD ROM for the Macintosh and is shipped with the module The Quick Data Acq application provides a quick way to get up and running using a DT9800 Series function module Using this application you can verify key features of the modules display data on the screen and save data to disk Refer to the DT9800 Series Getting Started Manual UM 17471 for more information on using the Quick Data Acq application e Scope application This software is shipped with the board on the Data Acquisition OMNI CD This application emulates three basic instruments a simple oscilloscope chart recorder a data logger and a multi channel oscilloscope Using the Scope application you can monitor data online and capture it to disk Refer to the online documentation provided on the CD ROM for more information e Calibration Utility This software is provided on the Data Acquisition OMNI CD ROM for Windows 98 Windows Me Windows 2000 and Windows XP Currently this utility is not provided for the Macintosh The Calibration Utility allows you to calibrate the analog I O circuitry of the function modules Refer to Chapter 5 for mo
97. pports sampling analog input channels at the same or different gains in sequential or random order e Internal and external clock sources for the analog input subsystem e Digital TTL triggering for the analog input subsystem e One 8 bit digital input port and one 8 bit digital output port the digital input lines can be included as part of the analog input channel gain list to correlate the timing of analog and digital events digital outputs can drive external solid state relays and e One dynamic digital output line e Two 16 bit user counter timers programmable for event counting frequency measurement rate generation continuous pulse output one shot and repetitive one shot pulse output operations e Programmable gate types and pulse output types Chapter 1 In addition the DT9805 and DT9806 function modules provide thermocouples and low level analog input capability The DT9800 Standard DT9800 EC and DT9800 EC I Series modules also provide software calibration for the analog I O subsystems Overview Supported Software The following software is available for use with the DT9800 Series modules e DT9800 Series Device Driver This software is provided on the Data Acquisition OMNI CD for Windows 98 Windows Me Windows 2000 and Windows XP or the DT9800 Series CD ROM for the Macintosh and is shipped with the module The device driver allows you to use a DT9800 Series function module with any of the sup
98. quisition applications Refer to the Data Translation data acquisition catalog for information about selecting the right software package for your needs Overview Accessories One EP310 cable is shipped with each DT9800 Series function module The EP310 is a 2 meter USB cable that connects the USB connector of the DT9800 Series function module to the USB connector on the host computer If you want to buy additional USB cables EP310 is available as an accessory product for the DT9800 Series In addition you can purchase the following optional items from Data Translation for use with the DT9800 Series e EP316 a 5 meter USB cable that connects the USB connector of the DT9800 Series function module to the USB connector on the host computer e 5B01 a 16 channel backplane that accepts 5B Series signal conditioning modules e 5B08 an 8 channel backplane that accepts 5B Series signal conditioning modules e PWR 977 power supply A 5 V 3 A power supply for powering the 5B Series backplanes e 7BP16 1 a 16 channel backplane that accepts 7B Series signal conditioning modules e 7BP08 1 an 8 channel backplane that accepts 7B Series signal conditioning modules e 7BP04 1 a 4 channel backplane that accepts 7B Series signal conditioning modules e AC1324 a screw terminal panel that connects to a DT9800 EC or DT9800 EC I Series function module to allow access to the analog I O dynamic digital output counter timer an
99. re information on this utility Chapter 1 DT Measure Foundry An evaluation version of this software is included on the Data Acquisition OMNI CD DT Measure Foundry is drag and drop test and measurement application builder designed to give you top performance with ease of use development Order the full development version of this software package to develop your own application using real hardware DataAcq SDK This software is shipped on the Data Acquisition OMNI CD Use the Data Acq SDK if you want to use Windows 98 Windows Me Windows NT 4 0 Windows 2000 or Windows XP to develop your own application software for the DT9800 Series boards using the Microsoft C compiler the DataAcgq SDK complies with the DT Open Layers standard DTx EZ Order this optional software package if you want to use ActiveX controls to access the capabilities of the DT9800 Series boards using Microsoft Visual Basic or Visual C DTx EZ complies with the DT Open Layers standard DT VPI Order this optional software package if you want to use the Aglient VEE visual programming language to access the capabilities of the DT9800 Series boards DT LV Link Order this optional software package if you want to use the LabVIEW graphical programming language to access the capabilities of the DT9800 Series boards Testpoint Order this optional software package if you want use a drag and drop software environment for designing test measurement and data ac
100. requency measurement operations 85 in pulse output operations 88 in single value operations 79 olDaFlushBuffers 99 olDaFlushFromBufferInprocess 94 olDaGetBuffer 95 99 olDaGetDASS in continuous analog input operations 81 in event counting operations 83 in frequency measurement operations 85 in pulse output operations 87 in single value operations 79 olDaGetQueueSize 94 99 olDaGetSingleValue 80 olDaGetSSCaps 66 olDaGetSSCapsEx 66 olDalnitialize in continuous analog input operations 81 in event counting operations 83 in frequency measurement operations 85 in pulse output operations 87 in single value operations 79 olDaMeasureFrequency 86 olDaPutBuffer 93 96 olDaPutSingleValue 80 olDaReadEvents 84 olDaReleaseDASS in continuous A D operations 99 in event counting operations 84 in frequency measurement operations 86 in pulse output operations 88 in single value operations 80 olDaReset 98 olDaSetCascadeMode in event counting operations 83 in frequency measurement operations 85 in pulse output operations 87 olDaSetChannelListEntry 90 olDaSetChannelListSize 90 olDaSetChannelType 89 olDaSetClockFrequency 91 97 olDaSetClockSource 89 90 91 97 olDaSetCTMode in event counting operations 83 in frequency measurement operations 85 in pulse output operations 87 Index olDaSetDataFlow in continuous analog input operations 81 in single value operations 79 olDaSetDigitallOLIstEntry 90 olDaSetEncoding 89 olDaSetExternal
101. single ended channels 70 number of 70 147 Index 148 single value operations 67 analog input 26 digital 1 O 45 how to perform 79 size function module 129 software calibration 74 software packages 8 software supported 7 software trigger 25 71 specifications 119 analog input 120 analog output 126 counter timer 128 digital I O 127 128 environmental 129 130 physical 129 130 power 129 130 specifying a single channel analog input 15 digital I O 44 specifying one or more channels analog input 16 digital I O 16 stopping an operation 26 98 STP EZ screw terminal panel 10 subsystem descriptions A D 13 C T 46 D A 39 DIN and DOUT 44 subsystem parameters setting 89 support e mail 117 fax 117 telephone 115 World Wide Web 117 synchronous digital I O 70 90 T technical support 115 e mail 117 fax 117 telephone 115 World Wide Web 117 telephone support 115 temperature sensor 107 Testpoint 8 throughput maximum 72 minimum 72 transferring data 36 transferring data from inprocess buffers 94 triggered scan 68 extra retrigger 68 internal retrigger 68 number of scans per trigger 68 retrigger frequency 69 scan per trigger 68 setting up 92 Triggered Scan Counter 29 triggered scan mode 28 triggers 25 external 25 71 how to set 91 number of extra 71 software 25 71 troubleshooting procedure 112 service and support procedure 115 troubleshooting table 113 TTL trigger 25 Index U units counter timer 4
102. source as internal and the frequency at which to pace the counter timer operation this is the frequency of the clock output signal The maximum frequency that you can specify for the clock output signal is 750 kHz For a 32 bit cascaded counter the minimum frequency that you can specify for the clock output signal is 0 0028 Hz Gate Types The active edge or level of the gate input to the counter enables counter timer operations The operation starts when the clock input signal is received Specify the gate type in software DT9800 Series modules provide the following gate input types e None A software command enables any specified counter timer operation immediately after execution This gate type is useful for all counter timer modes refer to page 53 for more information on these modes e Logic low level external gate input Enables a counter timer operation when the external gate signal is low and disables the counter timer operation when the external gate signal is high Note that this gate type is used only for event counting frequency measurement and rate generation refer to page 53 for more information on these modes e Logic high level external gate input Enables a counter timer operation when the external gate signal is high and disables a counter timer operation when the external gate signal is low Note that this gate type is used only for event counting frequency measurement and rate generation refer to pag
103. ted which in turn activates power to the module Figure 16 shows the screw terminal assignments of the DT9800 Standard and DT9800 MAC Series function modules 133 Appendix B 134 User Clk Input 0 User Cntr Out 0 External Gate 0 Isolated Dig Gnd User Clk Input 1 User Cntr Out 1 External Gate 1 Isolated Dig Gnd Dynamic Dig Out Digital Output 0 Digital Output 1 Digital Output 2 Digital Output 3 Digital Output 4 Digital Output 5 Digital Output 6 Digital Output 7 Isolated Dig Gnd CJC on DT9805 06 54 1 Channel 00 53 2 Channel 08 00 Ret 52 3 Channel 01 51 4 Channel 09 01 Ret 50 5 Channel 02 49 6 Channel 10 02 Ret 48 7 Channel 03 47 8 Channel 11 03 Ret 46 9 Channel 04 DT9800 Standard and DT9800 MAC Series 45 Function Modules 10 Channel 12 04 Ret 44 11 Channel 05 43 12 Channel 13 05 Ret 42 13 Channel 06 41 14 Channel 14 06 Ret 40 15 Channel 07 39 16 Channel 15 07 Ret 38 17 Isolated An Gnd 37 18 Amp Low OwWWWWWWN ND N NNNNDND NYDN oauhewa NH Oo O amp N OO oh WD CO CO ozooonoooo0oo0O0 paom mM PDD D CO6GGGGGGG FFXX S 3 BRB Dee EBaBaE SESE DD a92e2eo2n SEaSBRSSSSRS FRFLEBTITOG A ate ae ee ee ee BOO gg 2 2 Gsspsseas UPFTILE LE QES S Sg Engi exzsaeaetran oloanonao oao re 5 O35305 5 D D Q c a a o o Ga Q a x Figure 16 Screw Terminal Assignments for the DT9800 Standard and DT9800 MAC Series Function Modules Connector Pin Assignments Table 24 lis
104. tem 44 binary 71 specifications 127 128 DT Measure Foundry 8 141 Index 142 DT VPI 8 DT9800 Series Device Driver 7 DT LV Link 8 DTxEZ 8 duty cycle 51 dynamic digital output 17 45 E edge gate type high 50 low 50 e mail support 117 encoding data analog input 33 analog output 42 environmental specifications 129 130 EP035 10 EP310 9 EP316 9 errors analog input 37 event counting 53 72 how to perform 83 external clock 72 A D sample 25 C T 47 external clock divider maximum 72 minimum 72 external digital trigger 25 71 externally retriggered scan mode 31 extra retrigger 68 F factory service 118 falling edge gate 50 fax support 117 features 2 formatting data analog input 33 analog output 42 frequency base clock 72 external A D sample clock 25 external C T clock 48 internal A D sample clock 23 72 internal C T clock 47 72 internal retrigger clock 29 69 frequency measurement 54 how to perform 85 function module specifications 129 130 G gain analog input 19 analog output 41 number of 69 Gain box 106 gain list analog input 22 gap free data 68 gate type 49 falling edge 50 high edge 73 high level 73 internal 73 logic high level 49 logic low level 49 low edge 73 low level 73 none software 49 rising edge 50 Index gates how to set for C T operations 97 GCL depth 69 generating continuous pulses 56 H HES14 21 power supply 10 high edge gate type 50 73 high leve
105. tial trigger and the retrigger source specify the external trigger as the initial trigger source and specify the retrigger mode as scan per trigger In this case you need not specify the retrigger source the module uses the initial trigger source as the retrigger source Principles of Operation Data Format Table 6 lists the data encoding used by each DT9800 Series function module Table 6 Data Encoding Function Module Module Series Name Data Encoding DT9800 Standard DT9801 Straight Binary Series DT9802 DT9803 Offset Binary DT9804 DT9805 DT9806 DT9800 MAC DT9801 MAC Straight Binary DT9802 MAC DT9803 MAC Offset Binary DT9804 MAC DT9800 EC DT9801 EC Straight Binary DT9802 EC DT9803 EC Offset Binary DT9804 EC DT9800 EC I DT9801 EC I Straight Binary DT9802 EC DT9803 EC I Offset Binary DT9804 EC 33 Chapter 2 34 In software the analog input value is returned as a code To convert the code to voltage use the following formulas LSB _FSR 2N Vin Code LSB Offset where LSB is the least significant bit FSR is the full scale range For the DT9800 Series the full scale range is 10 for the unipolar range or 20 for the bipolar range N is the input resolution Refer to Table 2 on page 13 for the list of input resolutions supported Vin is the analog voltage Code is the raw count used by the software to represent the voltage
106. tion starts Figure 7 Example of Event Counting Frequency Measurement Use frequency measurement mode to measure the frequency of the signal from counter s associated clock input source over a specified duration In this mode use an external C T clock source refer to page 47 for more information on the external C T clock source One way to perform a frequency measurement is to use the same wiring as an event counting application that does not use an external gate signal Refer to the DT 9800 Series Getting Started Manual for wiring examples 54 Principles of Operation In this configuration use software to specify the counter timer mode as frequency measurement or event counting count and the duration of the system timer over which to measure the frequency The system timer uses a resolution of 1 ms In this configuration frequency is determined using the following equation Frequency Measurement Number of Events Duration of the System Timer If you need more accuracy than the system timer provides you can connect a pulse of a known duration such as a one shot output of another user counter to the external gate input Refer to the DT9800 Series Getting Started Manual for wiring examples In this configuration use software to set up the counter timers as follows 1 Set up one of the counter timers for one shot mode specifying the clock source clock frequency gate type type of output pulse high or lo
107. train output You can use this pulse output signal as an external clock to pace other operations such as analog input or other counter timer operations While the pulse output operation is enabled the counter outputs a pulse of the specified type and frequency continuously As soon as the operation is disabled rate generation stops Principles of Operation The period of the output pulse is determined by the clock input signal and the external clock divider If you are using one counter not cascaded you can output pulses using a maximum frequency of 1 MHz this is the frequency of the clock output signal In rate generation mode either the internal or external C T clock input source is appropriate depending on your application refer to page 47 for more information on the C T clock source Using software specify the counter timer mode as rate generation rate the C T clock source as either internal or external the polarity of the output pulses high to low transitions or low to high transitions the duty cycle of the output pulses and the gate type that enables the operation as logic high Refer to page 51 for more information on pulse output signals and to page 49 for more information on gate types Ensure that the signals are wired appropriately Refer to the DT9800 Series Getting Started Manual for wiring examples Figure 9 shows an example of an enabled rate generation operation using a logic high gate input signal
108. ts the pin assignments for connector J6 Table 25 lists the pin assignments for connector J5 and Table 26 lists the pin assignments for connector J4 on the DT9800 EC and DT9800 EC I Series function modules Table 24 Connector J6 Pin Assignments AC1324 AC1324 Screw J6 Screw J6 Terminal Pin 7 Terminal Signal Name Pin 7 a Signal Name 1 TB1 Analog Input 0 2 TB2 Analog Input 0 Return Analog Input 8 3 TB3 Isolated Analog 4 TB4 Analog Input 1 Return Ground Analog Input 9 5 TB5 Analog Input 1 6 TB6 Isolated Analog Ground 7 TB7 Analog Input 2 8 TB8 Analog Input 2 Return Analog Input 10 9 TB9 Isolated Analog 10 TB10 Analog Input 3 Return Ground Analog Input 11 11 TB11 Analog Input 3 12 TB12 Isolated Analog Ground 13 TB13 Analog Input 4 14 TB14 Analog Input 4 Return Analog Input 12 15 TB15 Isolated Analog 16 TB16 Analog Input 5 Return Ground Analog Input 13 17 TB17 Analog Input 5 18 TB18 Isolated Analog Ground 19 TB19 Analog Input 6 20 TB20 Analog Input 6 Return Analog Input 14 135 Appendix B Table 24 Connector J6 Pin Assignments cont AC1324 AC1324 Screw J6 Screw J6 Terminal Pin Terminal Signal Name Pin 4 Signal Name 21 TB21 Not Connected 22 TB22 Analog Input 7 Return Analog Input 15 23 TB23 Analog Input 7 24 TB24 Isolated Analog Ground 25 TB25 Amp Low 26 TB26 External A D Trigger
109. use with the DataAcq SDK and the DT9800 Series function modules The DataAcq SDK provides functions that return support information for specified subsystem capabilities at run time The first row in the table lists the subsystem types The first column in the table lists all possible subsystem capabilities A description of each capability is followed by the parameter used to describe that capability in the DataAcq SDK Note Blank fields represent unsupported options The DataAcq SDK uses the functions 0olDaGetSSCaps for those queries starting with OLSSC and olDaGetSSCapsEx for those queries starting with OLSSCE to return the supported subsystem capabilities for a device For more information refer to the description of these functions in the DataAcg SDK online help See the DataAcq User s Manual for information on launching this help file Supported Device Driver Capabilities Table 13 DT9800 Series Supported Options Data Flow Mode DT9800 Series A D D A DIN DOUT SRL C T Total Subsystems on Module Single Value Operation Support OLSSC_SUP_SINGLEVALUE Continuous Operation Support OLSSC_SUP_CONTINUOUS Continuous Operation until Trigger Event Support OLSSC_SUP_CONTINUOUS_ PRETRIG Continuous Operation before and after Trigger Event OLSSC_SUP_CONTINUOUS_ ABOUTTRIG DT Connect Support OLSSC_SUP_DTCONNECT Continuous DT Connect Support OLSSC_SUP_DTCONNECT_ CONTINUOUS Burst DT Conne
110. vent that occurs based on a specified set of conditions The DT9800 Series function module supports the following trigger sources e Software trigger A software trigger event occurs when you start the analog input operation the computer issues a write to the module to begin conversions Using software specify the trigger source as a software trigger e External trigger An external digital trigger event occurs when the DT9800 Series module detects a rising edge on the Ext A D Trigger input signal connected to screw terminal TB24 on the DT9800 Series module pin 24 of connector J1 The trigger signal is TTL compatible Using software specify the trigger source as a external digital trigger external for DataAcg SDK users 25 Chapter 2 Analog Input Conversion Modes DT9800 Series function modules support the following conversion modes e Single value operations are the simplest to use Using software you can either specify the range gain and analog input channel or you can specify the range and analog input channel and have the software determine the best gain for the range called autoranging The board acquires the data from the specified channel and returns the data immediately Data can be returned as both counts and voltage For a single value operation you cannot specify a clock source trigger source scan mode or buffer Single value operations stop automatically when finished you cannot stop a single valu
111. w and duty cycle 2 Set up the counter timer that will measure the frequency for event counting mode specifying the clock source to count and the gate type this should match the pulse output type of the counter timer set up for one shot mode 3 Start both counters events are not counted until the active period of the one shot pulse is generated 4 Read the number of events counted Allow enough time to ensure that the active period of the one shot occurred and that events have been counted 5 Determine the measurement period using the following equation Measurement period 1 Active Pulse Width Clock Frequency 55 Chapter 2 56 External C T Clock Input Signal 6 Determine the frequency of the clock input signal using the following equation Frequency Measurement _Number of Events Measurement Period Figure 8 shows an example of a frequency measurement operation In this example three events are counted during a duration of 300 ms The frequency then is 10 Hz since 10 Hz 3 3 s 3 Events Counted lt p Duration over which the frequency is measured 300 ms frequency measurement frequency starts measurement stops Figure 8 Example of Frequency Measurement Rate Generation Use rate generation mode to generate a continuous pulse output signal from the counter this mode is sometimes referred to as continuous pulse output or pulse
112. y Retriggered Scan Mode Use internally retriggered scan mode if you want to accurately control both the period between conversions of individual channels in a scan and the period between each scan This mode is useful when synchronizing or controlling external equipment or when acquiring a buffer of data on each trigger or retrigger When it detects an initial trigger either a software trigger or an external trigger the DT9800 Series function module scans the channel gain list once then waits for an internal retrigger to occur When it detects an internal retrigger the board scans the channel gain list once again then waits for another internal retrigger to occur The process repeats continuously until either the allocated buffers are filled or until you stop the operation refer to page 36 for more information on buffers Principles of Operation The sample rate is determined by the frequency of the A D sample clock divided by the number of entries in the channel gain list refer to page 23 for more information on the A D sample clock The conversion rate of each scan is determined by the frequency of the internal retrigger clock The internal retrigger clock is the Triggered Scan Counter on the board the Triggered Scan Counter is a 24 bit counter with a 12 MHz clock Figure 4 illustrates triggered scan mode In this example post trigger analog input data is acquired on each clock pulse of the A D sample clock until the channel
113. y retriggered scan mode 28 single value analog input 26 single value analog output 42 single value digital I O 45 Index conversion rate 27 29 32 counter timer features 46 C T clock sources 47 72 cascading 72 cascading internally 48 channels 70 duty cycle 51 event counting mode 72 gate types 49 high edge gate type 73 high level gate type 73 high to low output pulse 72 internal gate type 73 low edge gate type 73 low level gate type 73 low to high output pulse 73 one shot mode 72 operation modes 53 pulse output types 51 rate generation mode 72 repetitive one shot mode 72 specifications 128 units 46 data flow modes continuous C T operations 67 continuous digital input operations 45 67 continuous post trigger operations 67 single value operations 67 data format analog input 33 analog output 42 data transfer 36 DataAcq SDK 8 dealing with messages 95 description of the functional subsystems A D 13 C T 46 D A 39 DIN and DOUT 44 device driver 7 differential channels 70 number of 70 digital I O features 44 counting events 53 lines 44 customer service 118 operation modes 45 resolution 45 specifications 127 128 D synchronous 90 D A subsystem 39 digital lines 44 specifications 126 specifying in analog input channel DACO Adjustment box 109 list 16 DACO Voltage box 109 digital trigger 25 DAC1 Adjustment box 110 DIN subsystem 44 DAC1 Voltage box 110 specifications 127 128 data encoding 33 42 DOUT subsys

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