Home
Texas Instruments ADS8402 EVM User's Manual
Contents
1. 9 v 1 usus 326 600 120 ALYA gosureidepog ANd v 866069 IOWLNOO INIWNDOA 1880003 30018 WAAZIPSSAV ZOPssaVv SLL SEXO sejeq L 00921 SINAIWNYLSN jo ee SVX4L 6 0c ZL 81 91 9 el vb VW cL 6 OL 1 8 S 9 Vv So 2 105009 ISANOO qu 5 ef sng ed Le LU JUI 42 42565 Ale SIS 1 gt a mim 9 o 9 L z eL 8 agnar 7 2 a 8 i 9 VA 641 td 8 8 o gt mjo 20 o a tae MOG Mar ndug Sojeuy dau lt 6L 8b 2 3 z lt Alz Slee 9L SL r eb 9 0L 6 lt 9 27 9 4 vt lt 201 181 0 penoiddy JequnN NO3 9 v L 9 5 usus
2. 2 7 5 2 5 3 a Software Test Platform eec oci oat dee acted d esp rd 5 2 ADS8402 ADS8412EVM BOM Layout and Schematic 6 1 6 1 ADS8402 ADS8412EVM Bill of Materials 6 2 6 2 ADS8402 ADS8412bVMLayout 6 4 6 3 ADS8402 ADS8412EVM Schematic 6 8 Figures Input Buffer 2 1 3 Top Rayer Layer Seite oe eas 5 4 Ground Plane Layer 2 5 5 Power Plane Layer 3224 22 giana PoE Geeks 5 6 Bottom 4 22 ee enhn 5 7 Tables 1 Analog Input Connector 1 2 Solder Short Jumper Setting 21 44 1 4 Pinout for Parallel Control Connector 2 2 1 Jumper Settings for Decoder Outputs 2 2 Data Bus Connector duse dt aids c stance abet anon dte US e du a dta 2 2 Pinout for Converter Control Connector J3
3. lt UM dSPZOHVELNS Jnro z Ly 8v 5 a 48 2 98 9v 9 sg sv 5 naa 8 ra v 88d 001 Asna gt 8v FAET 150 29 IN 98 9v 13938 sg Sv 19538 8 dans 3148 va SLAG 8 ISANOD gt TSANG 8 ev mi ISANOO 8 gt di zg ev gt 52 Ig Iv sL 598 gt 55 9L MAMISECOHVELNS cd d 31 0 8 sri sa oar 18 IN 98 9v sada sg Sv va 4 ev sco 4 za ev 8 9 ig Iv anro 862 30 0 p 1 1 99 IINSIO9fVION TH sur an niii S YN JnI0 0 ango 610 o TINSIO9VIZWTE qui 1100 any quor WAN lt L VI o 970 AF Gane c 4 Q Sd qui 91100 any anor qui es anor 870 6 4100 amro 012 62 NS INIT Ve IINSIO9t VIZ TH T 4 WAALS lt C Sat NOS 9 9 v 2
4. INSTRUMENTS ADS8402 ADS8412EVM User s Guide December 2003 Data Acquistion SLAU126 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries Tl reserve the right to make corrections modifications enhancements improvements and other changes to its products and services at any time and to discontinue any product or service without notice Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete All products are sold subject to terms and conditions of sale supplied at the time of order acknowledgment TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with Tl s standard warranty Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty Except where mandated by government requirements testing of all parameters of each product is not necessarily performed TI assumes no liability for applications assistance or customer product design Customers are responsible for their products and applications using components To minimize the risks associated with customer products and applications customers should provide adequate design and operating safeguards TI does not warrant or represent that any license either express or implied is granted under any TI patent right copyright mask work right
5. 3100 89m i T Emo ELS anro gni IN n 5 pex us anro anoo 2 5 JS 5 5 09 99 290 OONS anoo anro anor 125 001 0 bd 1x3 2 STA IN asna SdfS vars 13535 8 lt 1154878 Zr LAG 8 4 1848058 a qu SS B A IN anoo anro 810 2 0 0 4 i en ino QNS NI penoiddy JequinN 2975 9 9 5 v 2 ums 3218 00520 55 ILYA yng euq 9 Es v 866069 SOT T TOULNOO osodid KORT 2 Ajddng dul vZG sejeq L 00921 SVX4L 7 5 gt 52 od 9 5 8 6 rou 9 m 2 97 a lt ev 3 I w w IV 5 E ASGFODIOHVELNS 8 Y
6. 2 2 Power Supply Test 3 1 Power Connector PITIOUL rem rtm cp ac C Ot pa wed a aes 3 1 ADS8402 ADS8412EVM Bill Of Materials 5 2 Chapter 1 EVM Overview This chapter contains the features of the ADS8402 ADS8412 Topic Page 1 2 2 9 e eere ee 1 2 Features 1 1 1 2 Features Introduction Full featured evaluation board for the high speed ADS8402 1 25 MSPS and the ADS8412 2 MSPS high speed 16 bit single channel parallel interface SAR type analog to digital converters Onboard signal conditioning Onboard reference Input and output digital buffer 0C O Onboard decoding for stacking multiple EVMs The ADS8402EVM and ADS8412EVM is a modular or stand alone EVM It has the bare minimum circuitry to showcase the device under test and plug into prototype systems The onboard decoding circuitry enables the user flexibility to map the A D to different addresses in processor memory The power analog and digital control lines are on standard 0 1 in header socket connectors at the edges of the PWB making it easy to wire into prototype systems for evaluation The EVM has been designed for direct evaluation of the analog to digital converter performance and operating characteristics This EVM is compatible with the 5 6K interface board SLAU10
7. and reset RESET signals to the converter can be assigned to two different addresses in memory via jumper settings This allows for the stacking of up to two ADS8402EVMs and or ADS8412EVMs into processor memory See Table 3 2 for jumper settings Note the evaluation module does not allow the chip select CS line of the converter to be assigned to different memory locations It is therefore suggested the CS line be grounded or wired to an appropriate signal of the processor 3 1 Table 3 2 Jumper Settings for Decoder Outputs Jumper Settings Reference Designator Description Set A 2 0 0 1 to generate RD pulse Installedt Not installed Set A 2 0 0x2 to generate pulse Not installed Installed Set A 2 0 0x4 to generate CONVST pulse Not installed Installed Set A 2 0 0x5 to generate RESET pulse Installedt Not installed Set A 2 0 0x6 to generate RESET pulse Not installed Installed Set A 2 0 0x3 to generate CONVST pulse Installedt Not installed 5 1 Factory set condition The data bus is available at connector P3 see Table 3 3 for pin out information Table 3 3 Data Bus Connector P3 connec Suma Description oo 06 0 oo Note All even numbered pins of are tied to DGND This evaluation module provides direct access to all the analog to digital converter control signals via con
8. 326 600 320 ALYA 2 Id v 3669779 Kofrg a TOULNOD 181 01 Sexe sejeq pye einog 1 0052 1489 IN SINAJWOHISN 1 em IN IN SVX H aro Lo IN 859 dfS AOT IZ od a EOSPSHL 110089 c any I ix 919 69 tdl 257 sc cra IN lgg 016 001 su anro 3100 N lele amp sso uod gie anoo anro 2299995 Pee Soo anov 9 ia anov LT 7 257 3 8 d 5 469 anov 0 85 0785 NI 8 saa 0 2 9 144 8 IN gt ag 8 1n033H a asna gt 2
9. WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES EXPRESSED IMPLIED OR STATUTORY INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE The user assumes all responsibility and liability for proper and safe handling of the goods Further the user indemnifies TI from all claims arising from the handling or use of the goods Please be aware that the products received may not be regulatory compliant or agency certified FCC UL CE etc Due to the open construction of the product it is the user s responsibility to take any and all appropriate precautions with regard to electrostatic discharge EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES TI currently deals with a variety of customers for products and therefore our arrangement with the user is not exclusive TI assumes no liability for applications assistance customer product design software performance or infringement of patents or services described herein Please read the EVM User s Guide and specifically the EVM Warnings and Restrictions notice in the EVM User s Guide prior to handling the product This notice contains important safety information about temperatures and voltages For further safety concerns please contact the TI application engineer Persons handling the product must have electronics training and obser
10. 258 SN74AHC245 SCLS230 SN74AHC1 G04 SCLS318 THS4503 SLOS352 Contents FCC Warning This equipment is intended for use in a laboratory test environment only It gen erates uses and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules which are designed to provide reasonable protection against radio frequency interference Operation of this equipment in other en vironments may cause interference with radio communications in which case the user at his own expense will be required to take whatever measures may be required to correct this interference Contents EVM Overview 1 1 11 Features 1 2 1 2 Introd ction RR xe Y AR UR ea Rh 1 2 Analog Interface 2 1 21 Signal 0 2 2 2 2 Reference chee oie ee 2 3 3 1 Power Supply Requirements 4 1 Using the EVM es eae eR ee de eee es 5 1 5 1 As a Reference Board 5 2 5 2 AsaPrototype Board
11. 4 from Texas Instruments and additional third party boards Chapter 2 Analog Interface The ADS8402 ADS8412EVM analog to digital converter has a unipolar differential input A unipolar differential input is a differential signal inverting and noninverting input is 180 degrees out of phase that is level shifted such that the signals levels are always equal to or above zero volts The peak to peak amplitude on each input pin can be as large as the reference voltage See the respective product data sheet for more information Topic Page 21 SignaliGonditioning 2 2 2 2 Reference 2 3 2 1 Signal Conditioning 2 1 Signal Conditioning The ADS8402 ADS8412EVM comes installed with the unity gain buffer U2 wired for single ended in to differential out configuration The common mode voltage is derived from a REF3040 reference IC and is adjustable using a potentiometer R9 The common mode voltage pin of the THS4503 is set to 2 V on the evaluation module A single ended input signal can be applied at pin connector P1 or via SMA connectors J2 noninverting input The buffer circuit can be reconfigured for a unipolar differential input by installing resistor R6 and R8 and removing R1 The inverting leg of the differential signal should be applied to either connector P1 1 or SMA connector J4 inverting input See Table 2 1 for the pinout of the analog connector P1 See Chapter 6 for the EVM sche
12. 8 TSM 116 01 T D V P 0 025 SMT plug top side of PWB 42 1 522 SJP2 Not installed Not installed Pad 2 position jumper SJP3 SJP2 SJP4 SJP3 Not installed Not installed Pad 3 postion jumper SJP5 45 5 JU W1 W5 Samtec TSW 103 07 L S 3 position jumper 0 1 MPER spacing 46 14 TP_ 025 1 TP14 test_point2 Keystone 5000K ND Test point single 0 025 Electronics pin Note On ADS8412EVM the ADS8412IPFBT is installed instead of ADS8402IPFBT ES ADS8402 ADS8412EVM BOM Layout and Schematic 6 3 ADS8402 ADS8412EVM Layout 6 2 ADS8402 ADS8412EVM Layout Figure 6 1 Top Layer Layer 1 ADS8402EUM ce 2003 ADS8412EUM Rey A E UCE 9 6 4 ADS8402 ADS8412EVM Layout Figure 6 2 Ground Plane Layer 2 HHHHHHHH e 6 5 ADS8402 ADS8412EVM BOM Layout Schematic ADS8402 ADS8412EVM Layout Figure 6 3 Power Plane Layer 3 _ 050 m e ITTEPELI e 1 028 Sse 6 6 ADS8402 ADS8412EVM Layout Figure 6 4 Bottom Layer Layer 4 7 s e Stor 19151 15 ADS8402 ADS8412EVM BOM Layout and Schematic 6 7 ADS8402 ADS8412EVM Schematic 6 3 ADS8402 ADS8412EVM Schematic The following pages contain the schematic for the ADS8402 ADS8412EVM 6 8
13. DS9393EVM Bill of Materials Table 6 1 contains complete bill of materials for the ADS8402 ADS8412EVM The schematic diagram is also provided for reference Contact the Product Information Center e mail dataconvapps list ti com for questions regarding this EVM Table 6 1 ADS8402 ADS8412EVM Bill Of Materials pesignaor See wae 1 2 02 15 21 805 Panasonic ECG ERJ 6GEYOROOV RES 0 1 8 W 5 0805 or Alternate SMD 2 2 2499 R12 R13 805 Panasonic ECG ERJ 6ENF24R9V RES 24 9 Q 1 10 W 1 or Alternate 0805 SMD 3 3 100 Q 5 R14 R25 805 Panasonic ECG ERJ 6ENF1000V RES 100 1 10 W 1 or Alternate 0805 SMD 910 Q R4 805 Panasonic ECG ERJ 6GEYJ911V RES 910 1 8 W 5 or Alternate 0805 SMD 1kQ R1 R7 R10 805 Panasonic ECG ERJ 6ENF1001V RES 1 1 10 W 1 or Alternate 0805 SMD 10 kQ R16 R20 603 Panasonic ECG ERJ 3EKF1002V RES 10 kQ 1 16 W 1 or Alternate 0603 SMD 10 kQ 805 Panasonic ECG ERJ 6ENF1002V RES 10 kQ 1 10 W 1 or Alternate 0805 SMD NI R6 R8 R11 805 Not Installed Not Installed R2 R3 R22 49 9Q R23 805 Panasonic ECG ERJ 6ENF49R9V RES 49 9 1 10 W1 or Alternate 0805 SMD 1 nF C3 C5 C11 1206 Kemet or C1206C102J5GACTU Capacitor 1000 pF 50 V C23 Alternate ceramic NPO 1206 68 pF C34 C35 TH WIMA FKP2 68 100 1 68 pF polypropylene capacitor 6800 pF WIMA FKP2 6800 100 1 6800 pF polypropylene capacitor 0 01 uF C13 C21 C41 Kemet or C0603C103J5RACTU Capac
14. DSP dsp ti com Broadband www ti com broadband Interface interface ti com Digital Control www ti com digitalcontrol Logic logic ti com Military www ti com military Power Mgmt power ti com Optical Networking www ti com opticalnetwork Microcontrollers microcontroller ti com Secruity www ti com security Telephony www ti com telephony Video amp Imaging www ti com video Wireless www ti com wireless Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2003 Texas Instruments Incorporated EVM IMPORTANT NOTICE Texas Instruments provides the enclosed product s under the following conditions This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use As such the goods being provided may not be complete in terms of required design marketing and or manufacturing related protective considerations including product safety measures typically found in the end product incorporating the goods As a prototype this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may not meet the technical requirements of the directive Should this evaluation kit not meet the specifications indicated in the EVM User s Guide the kit may be returned within 30 days from the date of delivery for a full refund THE FOREGOING WARRANTY IS THE EXCLUSIVE
15. W 1 103E TRIMPOT 10 4 2X4W top ADJ SMD 28 L1 L2 L3 1206 MURATA ERIE BLM31PG601SN1L Chip ferrite beads 600 Q at 100 MHz 29 U1 U3 3 SOT 23 Texas REF3040AIDBZT REF3040 50 ppm C Instruments 50 uA in SOT23 3 CMOS voltage reference 8 SOP D Texas THSA4503ID High speed Instruments fully differential amplifiers 311 1 04 socket_48Q Texas ADS8402IPFBTT ADS8402 16 bit FP Instruments 1 25 MSPS OPA627AU 8 SOP D Not installed Not installed Amplifier 33 1 NI 09 8 SOP D Footprint for 8 pin SOIC reference that operates from 5V 34 1 U10 5 SOT Texas SN74AHC1G04DBVR Single inverter gate DBV Instruments 35 1 Ut1 16 TSSOP Texas SN74AHC138PWR 3 line to 8 line decoder PW Instruments demultiplexer 36 3 U5 U6 U7 20 TSSOP Texas SN74AHC245PWR Octal bus transceiver tri PW Instruments state 37 1 5X2X 1 J1 5X2X 1 SM Samtec TSM 105 01 T D V P 0 025 SMT plug top T_socket side of PWB 1 6X2X 1 J3 6X2X 1 SM Samtec SSW 106 22 S D VS 0 025 SMT socket p ug bottom side of PWB TSM 106 01 T D V P 0 025 SMT plug top side of PWB SMA PCB J2 J4 SMA_JACK AMPHENOL 901 144 4 5002 5003 10 _MT Amphenol 901 144 10X2X 1 P1 P2 10X2X 1 S Samtec SSW 110 22 S D VS 0 025 SMT socket MT plug amp bottom side of PWB socket P TSM 110 01 T D V P 0 025 SMT plug top side of PWB 16X2X 1_S P3 16X2X 1 S Samtec SSW 116 22 S D VS 0 025 SMT socket MT_plug_ amp MT_plug_ amp _ bottom side of PWB 5590
16. essor starter kit DSK The ADS8402 ADS8412EVM is then mapped into the processor s memory space This card also provides an area for signal conditioning This area can be used to install application circuit s for digitization by the ADS8402 ADS8412 analog to digital converter See the 5 6K interface card user s guide SLAU104 for more information The ADS8402 ADS8442EVM provides a simple platform for interfacing to the converter The EVM provides standard 0 1 in headers and sockets to wire into prototype boards The user only needs to provide three address lines A2 A1 AO and address valid line CS to connector P2 To choose which address combinations generates RD CONVST and RESET set jumpers as shown in Table 4 2 The recall chip select CS signal is not memory mapped or tied to P2 therefore it must be controlled via a general purpose pin or shorted to ground at J3 pin 1 If address decoding is not required the EVM provides direct access to converter data bus via P3 and control via J3 Chapter 6 ADS8402 ADS8412EVM BOM Layout and Schematic This chapter contains the ADS8402 ADS8412EVM bill of materials the layouts and the schematics Topic Page 6 1 ADS8402 ADS8412EVM Bill of 6 2 6 2 ADS8402 ADS8412EVM 6 4 6 3 ADS8402 ADS8412EVM Schematic 6 6 6 1 ADS9393EVM Bill of Materials 6 1 A
17. ia connecter P1 pin 20 The user reference voltage and onboard reference voltages can be filtered by installing amplifier U1 Both the ADS8402 and ADS8412 analog to digital converters have integrated onboard reference buffers therefore it is not necessary to buffer the voltage externally The reference buffer circuit on the EVM is not populated with an amplifier The EVM comes installed with an on chip internal reference tied directly to the reference pin of the converter See Chapter 6 for the schematic Table 2 2 Solder Short Jumper Setting Reference il ETT 02 23 reference applied reference 5 3 SPS t Factory set condition Analog Interface 2 3 2 4 Chapter 3 Digital Interface The ADS8402 ADS8412 EVM is designed for easy interfacing to multiple platforms Samtec part numbers SSW 110 22 F D VS K TSM 110 01 T DV P provide convenient dual row header socket combination at P2 and P3 Consult Samtec at www samtec com or 1 800 SAMTEC 9 for a variety of mating connector options Table 3 1 Pinout for Parallel Control Connector P2 Signal Description ma 1 7 mas O P2 19 INTc Set jumper W3 to select BUSY or inverted signal to be applied to this pin Note All even numbered pins of P2 are tied to The read RD conversion start CONVST
18. itor 10000 pF 50 V C44 C46 C48 Alternate ceramic X7R 0603 C53 C56 C65 C50 0 01 uF C10 C18 C20 Kemet or C0805C103K5RACTU Capacitor 10000 pF 50 V C66 Alternate ceramic X7R 0805 15 0 01 uF C4 C26 1206 Kemet or C1206C103J5RACTU Capacitor 10000 pF 50 V Alternate ceramic X7R 1206 16 0 1 uF C8 C25 C40 Kemet or C0603C104K3RACTU Capacitor 0 1 uF 25 V C42 C43 C47 Alternate ceramic X7R 0603 C51 C52 C54 C55 C57 C58 C62 C63 C64 0 1 uF C7 C9 C15 Kemet or C0805C104J5RACTU Capacitor 0 10 uF 50 V C22 C32 C36 Alternate ceramic X7R 0805 C45 18 1uF C16 C31 C33 805 Kemet or C0805C105K4RACTU Capacitor 1 uF 16 V C37 C59 C60 Alternate ceramic X7R 0805 19 2 1 uF C2 C28 1206 Kemet or C1206C105K3RACTU Capacitor 1 uF 25 V Alternate ceramic X7R 1206 20 4 10 uF C1 C6 C12 1206 Panasonic ECG ECJ 3YB1C106M Capacitor 10 uF 16 V 19 or Alternate ceramic X5R 1206 21 1 10 uF 49 3528 Kemet T491B106K016AS Capacitor TANT 10 uF Alternate 16 V 10 SMT 6 2 ADS9393EVM Bill of Materials ed 22 10 uF C14 C24 C27 6032 Panasonic ECS T1EC106R Capacitor 10 uF 25 V C29 ECG or Alternate tantalum TE SMD 22 uF TDK Corporation C2012X5R0J226M Capacitor CER 22 uF V 20 0805 ape p 19 RP1 RP3 CTS 742 CTS Corporation NENNEN array 1 16TERM 8RES SMD 26 100 Q CTS_742 CTS Corporation 742C163101JTR RES array 100 16TRM 8RES SMD 27 1 10 kQ BOURNS_3 Bourns 3214
19. matic Table 2 1 Analog Input Connector Signal Name ConnectorPinf_ Signal Name Pre Reserved Pi4 Reseved N A N A N A N A Reserved NA Pi7 NA Reserved Pintiedtogrond AGND P19 Pio NA Reserved It is recommended the analog input to any SAR type converter be buffered The amplifier circuit Figure 2 1 is the buffer circuit used on the ADS8402 ADS8412EVM This circuit consists of the THS4503 a high speed fully differential amplifier configured as a single ended in to differential out unity gain buffer The circuit shown in Figure 2 1 was optimized to achieve the SNR THD SFDR etc specifications listed in the ADS8402 and ADS8442 data sheets The 60 and 6800 pF capacitors in the signal path are polypropylene type manufactured by the WIMA Corporation Polypropylene capacitors cause the least distortion of the input signal 2 2 Reference Figure 2 1 Inout Buffer Circuit Voc 0 1 uF THS4503 1 250 e IN 2 048 V 6800 e O IN 1 5 0 1 uF 1 e WN 60 2 2 Reference The EVM allows users to select from three reference sources The ADS8402 ADS8412EVM provides an onboard 4 096 V reference U3 The EVM also has the provision for users to supply a reference voltage v
20. nector J3 see Table 3 4 Table 3 4 Pinout for Converter Control Connector J3 Signal Description Chip select pin Active RD ReadpimAcivelow Note All even numbered pins of J3 are tied to DGND 3 2 Chapter 4 Power Supply Requirements The EVM accepts four power supplies A dual Vs dc supply for the dual supply op amps Recommend 7 supply L A single 5 supply for the analog section of the board A D Reference Li A single 5 V or 3 3 supply for the digital section of the board A D address decoder buffers There are two ways to provide these voltages 1 Wire in the voltages at test points on the EVM See Table 4 1 Table 4 1 Power Supply Test Points Apply 7 Vdc Negative supply for amplifier 2 Use the power connector J1 and derive the voltages elsewhere The pinout for this connector is shown in Table 4 2 If using this connector set the W1 jumper to connect 3 3VD or 5VD from connector to BVDD Short between pins 1 2 to select 5VD or short between pins 2 3 to select 3 3VD as the source for the digital buffer voltage supply BVDD Table 4 2 Power Connector J1 Pinout WAGE EYES 330 9 4 1 4 2 Chapter 5 Using the EVM The ADS8402 ADS8412EVM serves three functions 1 As a reference design 2 As a prototype board 3 Asa software test platform Topic Page Asa Reference B
21. oard 5 2 5 2 Board EET RITIENI 5 2 5 3 Asa Software Test 5 2 5 1 As a Reference Board 5 1 Reference Board As a reference design the ADS8402 ADS8412EVM contains the essential circuitry to showcase the analog to digital converter This essential circuitry includes the input amplifier reference circuit and buffers The EVM analog input circuit is optimized for 100 2 sine wave Therefore users may need to adjust the resistor and capacitor values of the A D input circuit In ac type applications where signal distortion is a concern polypropylene capacitors should be used in the signal path 5 2 Asa Prototype Board As a prototype board the buffer circuit consists of resistor pads for configuring the input as either single ended or differential input The input circuit can be modified to accommodate user prototype needs whether it be evaluating another differential amplifier or limiting noise for best performance The analog power and digital connectors can be made to plug into a standard 0 1 in breadboard or cables made up to interface directly to an FPGA or processor 5 3 Asa Software Test Platform 5 2 As a software test platform connectors P1 P2 and P3 plug into the parallel interface connectors of the 5 6K interface card The 5 6K interface card sits on the C5000 and C6000 digital signal proc
22. or other TI intellectual property right relating to any combination machine or process in which TI products or services are used Information published by TI regarding third party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual property of the third party or a license from TI under the patents or other intellectual property of TI Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties conditions limitations and notices Reproduction of this information with alteration is an unfair and deceptive business practice TI is not responsible or liable for such altered documentation Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice TI is not responsible or liable for any such statements Following are URLs where you can obtain information on other Texas Instruments products amp application solutions Products Applications Amplifiers amplifier ti com Audio www ti com audio Data Converters dataconverter ti com Automotive www ti com automotive
23. s can be identified using the EVM schematic located in the EVM User s Guide When placing measurement probes near these devices during operation please be aware that these devices may be very warm to the touch Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2003 Texas Instruments Incorporated Preface Read This First About This Manual This users guide describes the characteristics operation and use of the ADS8402 ADS8412 16 bit high speed parallel interface analog to digital converter evaluation board A complete circuit description as well as a schematic diagram and bill of materials are included How to Use This Manual This document contains the following chapters Chapter 1 EVM Overview Chapter 2 Analog Interface Chapter 3 Digital Interface Chapter 4 Power Supply Requirements Chapter 5 Using the EVM Chapter 6 ADS8402 ADS8412 BOM Layout and Schematic Related Documentation From Texas Instruments To obtain a copy of any of the following documents call the Texas Instruments Literature Response Center at 800 477 8924 or the Product Information Center PIC at 972 644 5580 When ordering identify this booklet by its title and literature number Updated documents can also be obtained through our website at www ti com Data Sheets Literature Number ADS8402 SLAS154 ADS8412 SLAS384 REF3040 SBVS032 SN74AHC138 SCLS
24. ve good laboratory practice standards No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine process or combination in which such TI products or services might be or are used Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2003 Texas Instruments Incorporated EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the input voltage range of 6 V and the output voltage range of 0 V and 5 5 V Exceeding the specified input range may cause unexpected operation and or irreversible damage to the EVM If there are questions concerning the input range please contact a TI field representative prior to connecting the input power Applying loads outside of the specified output range may result in unintended operation and or possible permanent damage to the EVM Please consult the EVM User s Guide prior to connecting any load to the EVM output If there is uncertainty as to the load specification please contact a TI field representative During normal operation some circuit components may have case temperatures greater than 60 C The EVM is designed to operate properly with certain components above 60 C as long as the input and output ranges are maintained These components include but are not limited to linear regulators switching transistors pass transistors and current sense resistors These types of device
Download Pdf Manuals
Related Search
Related Contents
INSTRUCTION MANUAL Hama MOOD Testboy® 114 ほぼ全自動 作曲支太郎 - 株式会社デネット パソコンソフト製品サイト Bungie Bugs Owners Manual.1518 Q-See QT518 User's Manual 植込み型補助人工心臓 EVAHEART Bravetti KC281HB User's Manual 57LFC/AN Copyright © All rights reserved.
Failed to retrieve file