Texas Instruments ADS5411 EVM User's Manual
Contents
1. 1 3 4 5 6 J10 VCC SMA PCB MT MOD 1 RIT RIA R6 i n SMA PCB MT MOD l 499 499 24 9 ADT 4 1WT U3 1 3 4 CLK gt RIO a s CLK gt Sh2 tole jols 49 9 y THS4503 uF R4 5 2 NC VCC sou ojos 49 9 c2 8 u 5 C26 Y 1 6 CLK CLK Sh2 VCM Jl VOUT M ae uF 2 T 20pF mE VOUT R23 luF 1 4 4 499 VCC vec vec o U4 2 6 R24 R16 RIS R27 3 VREF 1 VREF gt Sh 2 499 499 24 9 THS4601 9 VCC n RIS 49 9 o 2 1 RIL SIP3 2 B AINT AIN gt Sh2 ni 2 1 SMA PCB_MT MOD V T2 4 y ADTLIWT zs RB 49 9 ae Note 1 Note 1 Q3 SIP4 2 RO AIN P x AIN gt Sh2 x 12500 TI Boulevard Dallas Texas 75243 Title ADS5424 Engineer J SETON DOCUMENTCONTROL REV A NOTE 1 DO NOT INSTALL Drawn BY y DEWONCK FILE DATE 8 Dec 2004 SIZE SHEET 1 OF 4 1 3 4 5 6 NOTE 1 DO NOT INSTALL mu ou 3m ae s 22 2 2222 8 5 5 6 88 z 2 F zg la F e Q o aoa a 556 6 6 0 40 8 8 oo 0 8 lala2. 3 TEXAS NSTRUMENTS ADS5423 24 33 and ADS5411 EVM User Guide User s Guide February 2006 SLWU020B SLWUO20B February 2005 Revised February 2006 Submit Documentation Feedback Contents 1 ll c AI pis 5 1 1 PuID0S6 Mer a 5 1 2 EVM Basic FUNCHONS wisi iius ictor neu ire name ierunt io rain uiae d aha toa d rai d n as deena ARN UN RT LT B 1 3 Power Requirements uu u coe ipea ir saper trux M ERE rA Da ura VR tonne on aras UID ws bee pa RR RERUM EUN 5 1 944 Voltage limi s2iesssic u u nien uis nean A aia 5 1 4 EVM Operational PtOCedUle J nonam etenim teimtsnnd mente a stra ireiernim umma sime ips Drm simia DR 5 2 eigene as 7 2 1 SCHE Matic Di 7 2 2 GircUt FUNGUO ii 7 2 2 1 AnalogilnpulSu a E nne enn nnn 7 222 POW pm 7 2 2 9 OUIS aea a at ateltam faye aaa aussi aus asas aus kus aa au usan 7 Parts LIST c9 9 Physical Description 2 uu uu a eet 11 4 1 POB OU ao 11 4 2 Neri saa A A A 17 SLWU020B February 2005 Revised February 2006 Contents 3 Submit Documentation Feedback 4 List of Figures 4 1 IE MI 11 4 2 Payer 2 Ground Plane uuu uuu ays causas upas ka m 12 4 3 Layers Power Plane D T3 4 4 Layer Power Plane go uoo yau a ete A e eda ac pae s aere apad c sra Rei aaa DER 14 4 5 Layer 5 Ground Plane uuu eise iter in ii 15 4 6 Layer 6 Bottom Layer eT
3. 1 16 W 1 1 ERJ 6ENFOROOV Panasonic R24 200 Q resistor 1 16 W 1 0 ERJ 3RKF2000X Panasonic R13 FERRITE BEAD JUMPER TRANSFORMER JACKS CONN etc Ferrite Bead 5 EXC ML32A680U Minicircuits L1 L5 ADT1 1WT 1 ADT1 1WT Minicircuits T2 ADT4 1WT 1 ADT4 1WT NEWARK TS SMA End Small 3 16F3627 Keystone J5 J10 J11 Red Test Point 1 5001K ND Keystone J14 Black Test Point 1 5000K ND Allied J17 Red Banana Jack 5 ST 351A Allied J1 J3 J4 J8 J12 Black Banana Jack 3 ST 351B Samtec J2 J6 J7 40 Pin IDC Connector 1 TSW 120 07 L D J9 3 Circuit Jumper 2 SJP3 SJP4 SLWUO20B February 2005 Revised February 2006 Parts List 9 Submit Documentation Feedback 3 TEXAS INSTRUMENTS www ti com Table 3 1 Bill of Materials for EVM continued VALUE QTY PART NUMBER VENDOR REF DES NOT INSTALLED ICs ADS5423 24 33 or ADS5411 1 ADS5423 24 33 or Texas Instruments U1 ADS5411 SN74AVC16244 1 SN74AVC16244DGG Texas Instruments U2 THS4503 1 THS4503 Texas Instruments U3 THS4601 1 THS4601 Texas Instruments U4 Surface Mount Jumper Location SJP3 2 1 SJP4 2 3 10 Parts List SLWU020B February 2005 Revised February 2006 Submit Documentation Feedback 43 TEXAS Chapter 4 INSTRUMENTS SLWUO20B February 2005 Revised February 2006 Physical Description This chapter describes the physical characteristics and PCB layout of the EVM and lists the components used on the module 41 PCB Layout The EVM is constructe
4. 4Y4 4Y3 GND 4Y2 4Y1 vcc 3Y4 3Y3 GND 3Y2 3Y1 2Y4 2Y3 GND 2Y2 2Y1 vcc 1Y4 1Y3 30E 4A4 4A3 GND 4A2 4M vcc 3A4 3A3 GND 3A2 3A1 2A4 2A3 GND 2A2 2A1 vcc 1A4 1A3 GND 1A2 1M 20E DRVDD 40PIN_IDC 31 TEXAS INSTRUMENTS 12500 TI Boulevard Dallas Texas 75243 Title ADS5424 Engineer J SETON DOCUMENTCONTROL REV A NOTE 1 DO NOT INSTALL Drawn BY y DEWONCK FILE DATE 8 Dec 2004 SIZE SHEET 3 OF 4 1 3 i 1 2 3 4 5 6 DRVDD 4 ET o 4 DRVDD c14 de uF e 4 GND SY L6 2 Note 1 3 3V_DVDD n LI 4 DVDD CS C6 C27 C28 C29 C47 C48 C49 P 33uF uF Olur OluF OluF 200pF 200pF 200pF M MM M 14 1 14 1 GND C8 C30 Ca 32 c33 C34 C35 cal ca C43 C44 C45 C46 c7 sde luF OluF OluF OluF 0luF OluF OluF 200pF 200pF 200pF 200pF 200pF 200pF 33uF 5V_AVDD B L2 e AVDD J8 13 vcc 2 Vcc Lc cu C36 C37 3uF E FE E 5 33uF luF OluF OluF tes GND aa c12 C38 C39 C10 E P luF OP OF veg n l4 gt 2 4 4 4 i VEE 12500 TI Boulevard Dallas Texa
5. V buffer supply could be used by installing L6 In this case connect the 3 3 V to J1 and the return to J2 2 2 3 Outputs The data outputs from the ADC are buffered using a Texas Instruments SN74AVC16244 Output data header J9 is a standard 40 pin header on a 100 mil grid and allows easy connection to a logic analyzer The connector pinout is listed in Table 2 1 Furthermore two test points are provided and can be monitored using a multimeter Description of the test points is listed in Table 2 2 SLWUO20B February 2005 Revised February 2006 Circuit Description 7 Submit Documentation Feedback 3 TEXAS INSTRUMENTS www ti com Circuit Function Table 2 1 Output Connector J9 J9 PIN DESCRIPTION J9 PIN DESCRIPTION 1 CLK 21 DATA BIT 6 2 GND 22 GND 3 NC 23 DATA BIT 7 4 GND 24 GND 5 NC 25 DATA BIT 8 6 GND 26 GND 7 NC 27 DATA BIT 9 8 GND 28 GND 9 DATA BIT 0 LSB 29 DATA BIT 10 10 GND 30 GND 11 DATA BIT 1 31 DATA BIT 11 12 GND 32 GND 13 DATA BIT 2 33 DATA BIT 12 14 GND 34 GND 15 DATA BIT 3 35 DATA BIT 13 MSB 16 GND 36 GND 17 DATA BIT 4 37 OVERFLOW 18 GND 38 GND 19 DATA BIT 5 39 DRVpp 20 GND 40 GND Table 2 2 Test Point Description TEST POINT FUNCTION J14 Monitor Vref AVDD 2 J17 Monitor DMID DVDD 2 8 Circuit Description SLWUO20B February 2005 Revised February 2006 Submit Documentation Feedback 35 TEXAS Chapter 3
6. 16 List of Tables 1 1 Three Pin Jumper List Table a aa 6 2 1 Output Connector g9usu UE 8 2 2 Test Point Description E E EM 8 3 1 Billof Materials for EVM ust ashaka kusasqa ua Y xax a oaa aa pu 9 List of Figures SLWUO20B February 2005 Revised February 2006 Submit Documentation Feedback 35 TEXAS Chapter 1 INSTRUMENTS SLWUO20B February 2005 Revised February 2006 1 1 1 2 1 3 1 3 1 1 4 Overview This User s Guide document gives a general overview of the ADS5423 24 33 and ADS5411 evaluation module EVM and provides a general description of the features and functions to be considered while using this module Purpose The EVM provides a platform for evaluating the ADS5423 24 33 14 bit analog to digital converter ADC under various signals references and supply conditions This evaluation module also allows the evaluation of the ADS5411 an 11 bit analog to digital converter This document should be used in combination with the EVM schematic diagram supplied EVM Basic Functions Analog input to the ADC is provided via external SMA connectors The single ended input the user provides is converted into a differential signal at the input of the device One input path uses a differential amplifier while the other input is transformer coupled The EVM provides an external SMA connector for input of the ADC clock The single ended input the user p
7. INSTRUMENTS SLWUO20B February 2005 Revised February 2006 Parts List Table 3 1 lists the parts used in constructing the EVM Table 3 1 Bill of Materials for EVM VALUE QTY PART NUMBER VENDOR REF DES NOT INSTALLED CAPACITORS 0 1 uF 25 V 80 20 4 ECJ 0EF1E104Z Panasonic C1 C2 C3 C4 Capacitor 0 01 uF 25 V 80 20 6 ECJ 0EF1E103Z Panasonic C30 C31 C32 C33 Capacitor C34 C35 220 pF 50 V 595 Capacitor 6 ECJ OEC1H221J Panasonic C41 C46 22 pF 50 V 5 Capacitor 1 ECJ 1VC1H220J Panasonic C26 220 pF 50 V 595 Capacitor 3 ECJ 1VC1H221J Panasonic C47 C48 C49 0 01 uF 16 V 1096 Capacitor 7 ECJ 1VB1C103K Panasonic C27 C28 C29 C36 C37 C38 C39 0 1 uF 16 V 1096 Capacitor 12 ECJ 1VB1C104K Panasonic C6 C8 C11 C12 C14 C16 C17 C18 C19 C24 C25 C40 470 pF 50 V 5 Capacitor 4 ECJ 1VC1H471J Panasonic C20 C21 C22 C23 10 uF 10 V 10 Capacitor 1 ECS T1AX106R Panasonic C15 33 uF 10 V 10 Capacitor 5 ECS T1AX336R Panasonic C5 E C10 13 RESISTORS 51 10 2 CTS 742 CTS R5 R25 00 2 CTS 742 CTS R7 R8 24 9 Q resistor 1 16 W 1 4 ERJ 3EKF24R9V Panasonic R6 R11 R12 R27 49 9 Q resistor 1 16 W 1 96 5 ERJ 6EKF49R9V Panasonic R1 xn R18 R9 36 5 Q resistor 1 16 W 1 2 ERJ 6EKF36R5V Panasonic R2 R3 499 Q resistor 1 16 W 196 4 ERJ 6EKF4990V Panasonic R14 R15 R16 R17 0 Q resistor
8. OING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES EXPRESSED IMPLIED OR STATUTORY INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE The user assumes all responsibility and liability for proper and safe handling of the goods Further the user indemnifies TI from all claims arising from the handling or use of the goods Due to the open construction of the product it is the user s responsibility to take any and all appropriate precautions with regard to electrostatic discharge EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES TI currently deals with a variety of customers for products and therefore our arrangement with the user is not exclusive TI assumes no liability for applications assistance customer product design software performance or infringement of patents or services described herein Please read the User s Guide and specifically the Warnings and Restrictions notice in the User s Guide prior to handling the product This notice contains important safety information about temperatures and voltages For additional information on Tl s environmental and or safety programs please contact the TI application engineer or visit www ti com esh No license is granted under any patent right or other intellectual property right of TI covering
9. ative prior to connecting the input power Applying loads outside of the specified output range may result in unintended operation and or possible permanent damage to the EVM Please consult the EVM User s Guide prior to connecting any load to the EVM output If there is uncertainty as to the load specification please contact a TI field representative During normal operation some circuit components may have case temperatures greater than 25 C The EVM is designed to operate properly with certain components above 50 C as long as the input and output ranges are maintained These components include but are not limited to linear regulators switching transistors pass transistors and current sense resistors These types of devices can be identified using the EVM schematic located in the EVM User s Guide When placing measurement probes near these devices during operation please be aware that these devices may be very warm to the touch Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2006 Texas Instruments Incorporated SLWUO20B February 2005 Revised February 2006 Physical Description 23 Submit Documentation Feedback IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections modifications enhancements improvements and other changes to its products and services at any time and to discontinue any product or service without notice Customers sho
10. d on a 6 layer 4 77 inch x 3 4 inch 0 062 inch thick PCB using FR 4 material The individual layers are shown in Figure 4 1 through Figure 4 6 sa Y Y E Y y gt y y e s F Figure 4 1 Top Layer SLWUO20B February 2005 Revised February 2006 Physical Description 11 Submit Documentation Feedback Wy TEXAS INSTRUMENTS www ti com PCB Layout Figure 4 2 Layer 2 Ground Plane 12 Physical Description SLWUO20B February 2005 Revised February 2006 Submit Documentation Feedback 435 TEXAS INSTRUMENTS www ti com PCB Layout Figure 4 3 Layer 3 Power Plane 1 SLWUO20B February 2005 Revised February 2006 Physical Description 13 Submit Documentation Feedback Wy TEXAS INSTRUMENTS www ti com PCB Layout Figure 4 4 Layer 4 Power Plane 2 14 Physical Description SLWUO20B February 2005 Revised February 2006 Submit Documentation Feedback 435 TEXAS INSTRUMENTS www ti com PCB Layout Figure 4 5 Layer 5 Ground Plane SLWUO20B February 2005 Revised February 2006 Physical Description 15 Submit Documentation Feedback INSTRUMENTS www ti com PCB Layout Figure 4 6 Layer 6 Bottom Layer 16 Physical Description SLWUO20B February 2005 Revised February 2006 Submit Documentation Feedback Ww TEXAS INSTRUMENTS www ti com Schematics 42 Schematics SLWUO20B February 2005 Revised February 2006 Physical Description 17 Submit Documentation Feedback
11. digitalcontrol Logic logic ti com Military www ti com military Power Mgmt power ti com Optical Networking www ti com opticalnetwork Microcontrollers microcontroller ti com Security www ti com security RFID www ti rfid com Telephony www ti com telephony Low Power www ti com lpw Video amp Imaging www ti com video Wireless Wireless www ti com wireless Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2007 Texas Instruments Incorporated
12. iption 2 4 Schematic Diagram The schematic diagram for the EVM is attached at the end of this document 2 2 Circuit Function The following paragraphs describe the function of EVM circuits See the relevant data sheet for the device operating characteristics 2 2 1 Analog Inputs The EVM can be configured to provide the ADC with either transformer coupled or differential amplifier inputs from a single ended source The default configuration uses the transformer configuration for which the layout has been optimized to give the best performance The inputs are provided via SMA connectors J11 for transformer coupled input and J10 for differential amplifier input To setup for one of these options the EVM must be configured as follows 1 For a 1 1 transformer coupled input to the ADC a single ended source is connected to J11 SJP3 has pins 1 and 2 shorted and SJP4 has pins 2 and 3 shorted This is the default configuration for the EVM 2 For a differential input into the amplifier the input source is connected to J10 SUP3 has pins 2 and 3 shorted and SJP4 has pins 1 and 2 shorted 5VDC must be connected to the board to provide power to U3 and U4 for this configuration 2 2 2 Power Power is supplied to the EVM via banana jack sockets A separate connection is provided for a 3 3V digital buffer supply J1 and J2 5 V analog supply J3 and J2 5 V amplifier supply J7 J8 and J12 and 3 3 V external buffer supply J4 and J6 A single 3 3
13. la x 2 Z Zl lt x el e P a al sz al al A aj aj aaa a Al A aq al A al o 3 3V_DVDD J14 RED s S 2 AS Se y 9 s x 9 E RO LO RO s 8 B OW Ws luF 1 pvbp ao D3 2 AVSS pe 198 3 37 n VBG Di ERA vss no UIA Shi CLK Cue ENC pip s Sh 1 CLK CLK Enc ADSM24 pvss 4 14 HL iss pvpp Y 8 li vpp ovr 2 2 cvop Dnc 3 9 ovss avpp 22 Sh1 AIN AIN Mt sain apvss 214 Sh 1 AIN Ay 12 am Apvpp 284 13 a e 27 t ASSQo Bv a y Eg a g g ge 1 SaaS S S 6 lt lt lt x x lt O lt lt lt O lt lt 5V_AVDD a e e s e e a a al al al al s 4 4 i 1 i 1 1 i c c4 dur luF q br UIB ADS5424 PPAD PPAD PPAD PPAD PPAD PPAD PPAD PPAD PPAD PPAD PPAD PPAD PPAD PPAD PPAD PPAD PPAD PPAD PPAD PPAD PPAD PPAD PPAD PPAD PPAD PPAD 3 TEXAS INSTRUMENTS 12500 TI Boulevard Dallas Texas 75243 Title ADS5424 Engineer J SETON DOCUMENTCONTROL SEVA Drawn BY y DEWONCK FILE DATE 8 Dec 2004 SIZE SHEET 2 OF 4 SH 1 DRY D13 D12 D11 D10 D9 gt D8 gt D6 SH1 4 D5 gt D4 D3 gt D1 DO OVR DRVDD C16 Cl7 C18 C19 C20 C21 C22 C23 luF luF luF ee T 470pF 470pF U2 SN74AVC16244DGG TOE
14. llectual property of the third party or a license from TI under the patents or other intellectual property of TI Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties conditions limitations and notices Reproduction of this information with alteration is an unfair and deceptive business practice TI is not responsible or liable for such altered documentation Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice TI is not responsible or liable for any such statements TI products are not authorized for use in safety critical applications such as life support where a failure of the TI product would reasonably be expected to cause severe personal injury or death unless officers of the parties have executed an agreement specifically governing such use Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications and acknowledge and agree that they are solely responsible for all legal regulatory and safety related requirements concerning their products and any use of TI products in such safety critical applications notwithstanding any applications related information or sup
15. or relating to any machine process or combination in which such TI products or services might be or are used 22 Physical Description SLWUO20B February 2005 Revised February 2006 Submit Documentation Feedback 3 TEXAS INSTRUMENTS www ti com Schematics FCC Warning This evaluation board kit is intended for use for ENGINEERING DEVELOPMENT DEMONSTRATION OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end product fit for general consumer use It generates uses and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC rules which are designed to provide reasonable protection against radio frequency interference Operation of this equipment in other environments may cause interference with radio communications in which case the user at his own expense will be required to take whatever measures may be required to correct this interference Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2006 Texas Instruments Incorporated EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the AVDD voltage range of 0 3 V to 3 8 V and the DVDD voltage range of 0 3 V to 3 8 V Exceeding the specified input range may cause unexpected operation and or irreversible damage to the EVM If there are questions concerning the input range please contact a TI field represent
16. port that may be provided by TI Further Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety critical applications TI products are neither designed nor intended for use in military aerospace applications or environments unless the TI products are specifically designated by TI as military grade or enhanced plastic Only products designated by TI as military grade meet military specifications Buyers acknowledge and agree that any such use of TI products which TI has not designated as military grade is Solely at the Buyer s risk and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO TS 16949 requirements Buyers acknowledge and agree that if they use any non designated products in automotive applications TI will not be responsible for any failure to meet such requirements Following are URLs where you can obtain information on other Texas Instruments products and application solutions Products Applications Amplifiers amplifier ti com Audio www ti com audio Data Converters dataconverter ti com Automotive www ti com automotive DSP dsp ti com Broadband www ti com broadband Interface interface ti com Digital Control www ti com
17. rovides is converted into a differential signal at the input of the device Digital output from the EVM is via a 40 pin connector The digital outputs from the ADC are buffered before going to the connector Power connections to the EVM are via banana jack sockets Separate sockets are provided for the ADC analog and digital supplies the external buffer supply and the differential amplifier supply Power Requirements The EVM can be powered directly with only two supplies a 3 3 V supply for the ADC digital driver supply and external buffer supply and 5 V for the ADC analog supply if using the EVM with transformer coupled analog inputs If using the differential amplifier analog inputs 5 V is required Provision has also been made to allow the EVM to be powered with independent 3 3 V supplies to provide higher performance Voltage Limits Exceeding the maximum input voltages can damage EVM components Under voltage may cause improper operation of some or all of the EVM components EVM Operational Procedure The EVM provides a flexible means of evaluating the ADS5423 24 33 or ADS5411 in a number of modes of operation A basic setup procedure that can be used as a board confidence check is as follows 1 Verify all jumper settings against the schematic jumper list in Table 1 1 SLWUO20B February 2005 Revised February 2006 Overview 5 Submit Documentation Feedback TEXAS INSTRUMENTS www ti com EVM Operational Proced
18. s 75243 Title ADS5424 Engineer J SETON NOTE 1 DO NOT INSTALL Drawn By Y DEWONCK SIZE DATE 8 Dec 2004 REV A FILE SHEET 4 OF 4 1 2 3 4 5 6 Wy TEXAS INSTRUMENTS www ti com Schematics EVALUATION BOARDIKIT IMPORTANT NOTICE Texas Instruments TI provides the enclosed product s under the following conditions This evaluation board kit is intended for use for ENGINEERING DEVELOPMENT DEMONSTRATION OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end product fit for general consumer use Persons handling the product s must have electronics training and observe good engineering practice standards As such the goods being provided are not intended to be complete in terms of required design marketing and or manufacturing related protective considerations including product safety and environmental measures typically found in end products that incorporate such semiconductor components or circuit boards This evaluation board kit does not fall within the scope of the European Union directives regarding electromagnetic compatibility restricted substances RoHS recycling WEEE FCC CE or UL and therefore may not meet the technical requirements of these directives or other related directives Should this evaluation board kit not meet the specifications indicated in the User s Guide the board kit may be returned within 30 days from the date of delivery for a full retund THE FOREG
19. uld obtain the latest relevant information before placing orders and should verify that such information is current and complete All products are sold subject to Tl s terms and conditions of sale supplied at the time of order acknowledgment TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI s standard warranty Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty Except where mandated by government requirements testing of all parameters of each product is not necessarily performed TI assumes no liability for applications assistance or customer product design Customers are responsible for their products and applications using Tl components To minimize the risks associated with customer products and applications customers should provide adequate design and operating safeguards TI does not warrant or represent that any license either express or implied is granted under any TI patent right copyright mask work right or other TI intellectual property right relating to any combination machine or process in which TI products or services are used Information published by TI regarding third party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other inte
20. ure Table 1 1 Three Pin Jumper List Table JUMPER FUNCTION LOCATION PINS 1 2 LOCATION PINS 2 3 DEFAULT SJP3 Provides AIN source to ADC Source provided from T2 Source provided from Diff Amp 1 2 device SJP4 Provides AIN source to ADC Source provided from Diff Amp Source provided from T2 2 3 device 2 Connect supplies to the EVM as follows 5 V 4 75 V 5 25 V ADC analog supply to J3 and return to J2 3 3 V 3 V 3 6 V digital buffer supply to J4 and J1 and return to J6 3 Switch power supplies on 4 Use a function generator with 50 O output to input a 105 MHz 0 V offset 1 Vrms sine wave signal into J5 The frequency of the clock must be within the specification for the device speed grade 5 Supply an input signal by using a frequency generator with a 50 O output to provide a 15 5 MHz 0 V offset 1 dBFS amplitude sine wave signal into J11 A full scale input tone into the ADC device is a differential 2 2 Vpp and dBFS can be calculated by using the following formula dBFS 20log captured max code captured min code 2N where N is the number of bits 6 The digital pattern on the output connector J9 should now represent a 2 s compliment sine wave and can be monitored using a logic analyzer 6 Overview SLWUO20B February 2005 Revised February 2006 Submit Docum entation Feedback 35 TEXAS Chapter 2 INSTRUMENTS SLWUO20B February 2005 Revised February 2006 Circuit Descr
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