Renesas REG10J0052-0200 User's Manual
Contents
1. ENESAS Renesas Technology Europe Ltd Duke s Meadow Millboard Road Bourne End Buckinghamshire SL8 5FH United Kingdom2. the Host RSK 5ns A 17 1 x X 5ns 40ns gt gt CSn RDn 35ns Ons lt gt Data X valid K Figure 4 3 USB controller read timing 5ns o A 17 1 P4 X Sns 20ns gt gt CSn WRn 8ns 5ns lt x Data P4 Valid Pt Figure 4 4 USB controller write timing The ISP1761 controller can drive two interrupts IRQ1 is the HC IRQ from the ISP1761 controller IRQ3 is the DC IRQ output from the ISP1761 controller DC IRQ interrupts can be enabled on the HC IRQ pin so this can be disabled for host RSKs with fewer interrupt lines if the DC IRQ interrupt is required Both interrupts are pulled high to 3 3V by 1K resistors 4 4 5SRAM The board is provided with 512 kilobytes of static RAM arranged as 256k x 16 bit words This RAM is byte addressable provided the host RSK supports this The chip select used for the RAM is CS3 which is on JAS pin 45 Please note the timing This will require programming the bus controller for the Host RSK 5ns gt A 18 1 X ps 5ns 20ns gt gt CSn RDn 15ns Ons lt gt Data be Valid P Figure 4 5 SRAM read timing 5ns A 18 1 X X Sns 20ns 3x gt CSn WRn 8ns 5ns lt x gt Data Valid x Figure 4 6 SRAM write timing 11 4 5 Option Links Table 4 1 below describes the function of the option links contained on t
3. the shows the functions of the components on the board Application Board Interface 45V DC JA5 JA1 USB d USB Std A J3 JAS RJ45 J2 JA6 JA2 Application Board Interface Memory Extension Interface Figure 3 2 Board Layout 3 3 Board Dimensions The following diagram gives the board dimensions and connector positions All through hole connectors are on a common 0 1 grid for easy interfacing 170 00mm Corners x4 3mm radius Merrer espere conem des Figure 3 3 Board Dimensions Chapter 4 User Circuitry 4 1 Fitting the Target RSK to the RSK application board The board is supplied with 2x 24 way sockets 2x 26 way sockets and 1 x 50 way socket These should be soldered on the underside of the host RSK in JA1 JA2 JA5 JA6 and JA3 positions The RSK should be plugged into the equivalent connectors on the RSK LCD application board A separate application note is available to explain how to configure the host RSK to enable it to connect to this application board The board is designed to be 5V I O tolerant Therefore this board can be connected to an RSK with 5V I O 4 2 Network Controller The network functionality is provided by the SMCS LAN9118 MT non PCI Ethernet controller Refer to the manufacturer s datasheet for more information on this peripheral The Ethernet controller is configured to use a 16 bit data bus It uses single 16 bit read and write strobes Byte or long word accesses
4. 424 NE SAS REG10J0052 0200 Everywhere you imagine Renesas Starter Kit Ethernet amp USB Application Board User s Manual RENESAS STARTER KIT Rev 2 00 Renesas Technology Europe Ltd Revision date 17 Jan 2008 www renesas com D007133 11 Table of Contents Chapter Ta Preface tinto ret eto cette et ctia due ath ea ipie 3 Chapter 2 Purpose re e efi tad stave iat eds eat Hd eR Y eR a e Roc URNA Tn Pe SER A ER MNA S 4 Chapter 3 Board LEayolt su ais iio did 5 3 1 Component References ated acie A ud neice dde eeu dut ae aata tap dee daa 5 3 2 Board Component fUnctlons e c ett ar f ati au t e b b or ead va et o Ra Beets 6 3 3 Board DIimerisiOris ri i PD eei eie petente ppt OI MA 7 Ghapter 4 User Circula d oa tet te gea eate titii ta s tat of tdt ad et 8 4 1 Fitting the Target RSK to the RSK application board ooooocncccinncccincconocccnnonnnonaccnoncnnnnnn anno nana cnn ennt 8 4 2 Network Controller hit ee e midi rotate dedans 8 4 3 USB Controller kc A RE dem a tai bete a a eee eae 9 AA SAM tcn Mot se utut te ne ote roD eir e S eL EIAS Der 11 4 5 Option LEinks oiii He td t tH mt tdi da d eni a eg o o i da 12 Chapter 5 Header ciii ree er oer iere E cholera n ta ad kan ce eura e cer ER ttes 13 Ds ApplicationsHeaders iR ree eta n ie en a Lov e RD 13 Chapter 6 Code Development ssssssssssssssssesesee entere enne nns tene inns nr isis trt sentes nensis nnns sn nennen nns 17 Chapter 7 Ad
5. 8 30 D 9 D 9 31 D 10 D 10 32 D 11 D 11 33 D 12 D 12 34 D 13 D 13 35 D 14 D 14 36 D 15 D 15 37 A 16 A 16 38 A 17 A 17 39 A 18 A 18 40 A 19 A 19 41 A 20 A 20 42 A 21 A 21 43 A 22 A 22 44 SDCLK SDCLK 45 CS3n CS3n 46 ALE ALE 47 WRin WRin 48 WROn WROn 49 CASn CASn 50 RASn RASn Table 5 5 J A3 Memory Expansion connector Chapter 6 Code Development RSKs with appropriate connections will include suitable sample software to drive the interfaces on this board Chapter 7 Additional Information For details on how to use High performance Embedded Workshop HEW refer to the HEW manual available on the CD or from the web site Online technical support and information is available at http Www renesas com renesas starter kits Technical Contact Details America techsupport rta renesas com Europe tools support eu renesas com Japan cscQ renesas com General information on Renesas Microcontrollers can be found on the Renesas website at http www renesas com Renesas Starter Kit Ethernet amp USB Application Board User s Manual Publication Date Rev 2 00 17 Jan 2008 Published by Renesas Technology Europe Ltd Duke s Meadow Millboard Road Bourne End Buckinghamshire SL8 5FH United Kingdom 2007 Renesas Technology Europe and Renesas Solutions Corp All Rights Reserved Renesas Starter Ethernet amp USB Application Board User s Manual
6. AEC IRQ3 24 lC Bus 3rd pin IC EX 25 12C Bus IC SDA 26 PC Bus IIC_SCL Table 5 1 J Al Standard Generic Header JA2 Pin Generic Header Name CPU board Pin Header Name CPU board Signal Name Signal Name 1 Open drain RESn 2 External Clock Input EXTAL 3 Open drain NMIn 4 Regulated Supply 1 Vss1 5 Open drain output WDT OVF 6 Serial Port SClaTX 71 Open drain WUP IRQO 8 Serial Port SClaRX 9 Open drain IRQ1 10 Serial Port SClaCK 11 Up down MO UD 12 Serial Port Handshake CTS RTS 13 Motor control MO Up 14 Motor control MO Un 15 Motor control MO Vp 16 Motor control MO Vn 17 Motor control MO Wp 18 Motor control MO Wn 19 Output TMRO 20 Output TMR1 21 Input TRIGa 22 Input TRIGb 23 Open drain IRQ2 24 Tristate Control TRSTn 25 SPARE 26 SPARE Table 5 2 J A2 Standard Generic Header Table 5 3 and Table 5 4 below show the optional generic header connections JA5 Pin Generic Header Name CPU board Pin Header Name CPU board Signal Name Signal Name 1 ADC4 14 AD4 2 ADC5 I5 AD5 3 ADC6 16 AD6 4 ADC7 17 AD7 5 CAN CANITX 6 CAN CANIRX 7 CAN CAN2TX 8 CAN CAN2RX 9 Reserved 10 Reserved 11 Reserved 12 Reserved 13 Reserved 14 Reserved 15 Reserved 16 Reserved 17 Reserved 18 Reserved 19 Reserved 20 Reserved 21 Reserved 22 Reserved 23 Reserved 24 R
7. are not available for this device The chip select used for the network controller is CS1 which is on JA3 pin 27 Please note the timing This will require programming the bus controller for the Host RSK 5ns o Ons 40ns gt gt CSn RDn 35ns Ons Data ba Valid P4 Figure 4 1 Ethernet controller read timing Sns 35ns gt gt CSn WRn 10ns 5ns lt x Data 2 Valid x Figure 4 2 Ethernet controller write timing The Ethernet controller can drive two interrupts IRQO is the IRQ from the Ethernet controller IRQ2 is the PME output from the Ethernet controller PME interrupts can be enabled on the IRQ pin so this can be disabled for host RSKs with fewer interrupt lines if the PME interrupt is required Both interrupts are pulled high to 3 3V by 1K resistors 4 3 USB Controller The Universal Serial Bus functionality is provided by the Philips ISP1761 controller Refer to the manufacturer s datasheet for more information on this peripheral This peripheral provides 2 Host type A and one On the Go Host Peripheral mini AB type USB controller The ISP1761 controller is configured to use a 16 bit data bus It uses single 16 bit read and write strobes Byte or long word accesses are not available for this device The chip select used for the USB controller is CS2 which is on JA3 pin 28 Please note the timing This will require programming the bus controller for
8. ditional Information ssesssssssssssssssesseeeee nennen nennen iners nnns sitne innen reris n in nrnn ens 18 Chapter 1 Preface Cautions This document may be wholly or partially subject to change without notice All rights reserved Duplication of this document either in whole or part is prohibited without the written permission of Renesas Technology Europe Limited Trademarks All brand or product names used in this manual are trademarks or registered trademarks of their respective companies or organisations Copyright Renesas Technology Europe Ltd 2007 All rights reserved Website http www eu renesas com Glossary CPU Central Processing Unit RTE HEW High performance Embedded Workshop RSO USB Universal Serial Bus RSK PC Program Counter NIC E10A E10A for Starter Kits Emulator Renesas Technology Europe Ltd Renesas Solutions Organisation Renesas Starter Kit Network Interface Controller Chapter 2 Purpose This RSK Application Board is an evaluation tool for using Renesas microcontrollers with Ethernet and USB interfaces It is used in conjunction with the RSK for the microcontroller to be evaluated Features include Mounting connections to allow RSK to be added to top of board Interface to standard RSK Application Interface connectors Interface to Memory Expansion connectors Power connector for 5V reverse polarity protected with on board regulated 3 3V conversion and le
9. eserved Table 5 3 J A5 Optional Generic Header J A6 Pin Generic Header Name CPU board Pin Header Name CPU board Signal Signal Name Name 1 DMA DREQ 2 DMA DACK 3 DMA TEND 4 Standby Open drain STBYn 5 HostSerial SCIdTX RS232TX 6 Host Serial SCIdRX RS232RX 7 Serial Port SCIbRX 8 Serial Port SCIbTX 9 Serial Port Synchronous SCIcTX 10 Serial Port SCIbCK 11 Serial Port Synchronous SCIcCK 12 SerialPort Synchronous SCICRX 13 Reserved 14 Reserved 15 Reserved 16 Reserved 17 Reserved 18 Reserved 19 Reserved 20 Reserved 21 Reserved 22 Reserved 23 Reserved 24 Reserved Table 5 4 J A6 Optional Generic Header Table 5 5 below shows the Memory Expansion connections These connections support 5 to 3 3V level translation J A3 Pin Generic Header Name Signal Name Pin Header Name Signal Name 1 A 0 A 0 2 A 1 A 1 3 A 2 A 2 4 A 3 A 3 5 A 4 A 4 6 A 5 A 5 7 A 6 A 6 8 A 7 A 7 9 A 8 A 8 10 A 9 A 9 11 A 10 A 10 12 A 11 A 11 13 A 12 A 12 14 A 13 A 13 15 A 14 A 14 16 A 15 A 15 17 D 0 D 0 18 D 1 D 1 19 D 2 D 2 20 D 3 D 3 21 D 4 D 4 22 D 5 D 5 23 D 6 D 6 24 D 7 D 7 25 RDn RDn 26 WRn WRn 2 CS1n CS1n 28 CS2n CS2n 29 D 8 D
10. his CPU board The default configuration is indicated by BOLD text Option Link Settings Reference Function Fitted Alternative Removed Related To R2 3V power select Regulator drives Board 3V3 Board 3V from RSK R7 Write Strobe Select High Byte writes from WR1n WR1n not connected R8 R9 R10 R8 Write Strobe Select High Byte writes from WR1n WR1n not connected R7 R9 R10 R9 Write Strobe Select Low Byte writes from WROn WROn not connected R7 R8 R10 R10 Write Strobe Select Low Byte writes from WROn WROn not connected R7 R8 R9 Table 4 1 J A1 Option Link Settings Chapter 5 Headers 5 1 Application Headers This information is supplied for reference Only pins marked are connected on this board These connections are not level translated Table 5 1 and Table 5 2 below show the standard application header connections JA1 Pin Generic Header Name CPU board Pin Header Name CPU board Signal Name Signal Name 1 Regulated Supply 1 5V 2 Regulated Supply 1 GROUND 3 Regulated Supply 2 3V3 4 Regulated Supply 2 GROUND 5 Analogue Supply AVcc 6 Analogue Supply AVss 7 Analogue Reference AV ref 8 ADTRG ADTRG 9 ADCO 10 ADO 10 ADC1 11 AD1 11 ADC2 12 AD2 12 ADC3 13 AD3 13 DACO DACO 14 DAC1 DACI 15 lOPort I0 0 16 lOPort 10 1 17 lOPort 10_2 18 lOPort 10_3 19 lOPort lo 4 20 lOPort I0 5 21 lOPort 106 22 lOPort Io 7 23 Opendrain IRQ
11. vel translation to allow operation with RSK boards working at either 45V or 3 3V LAN9118 MT NIC and RJ 45 Ethernet connector with integral status LEDs ISP 1761BE USB Hi Speed 2 0 Host Controller with o 1 Host Slave USB Mini AB connector and o 2HostUSB Standard A connectors 512 kByte Static Ram arranged as 256k x 16 bit words Chapter 3 Board Layout 3 1 Component References The following diagram shows the component references for the board r FRONT 93 S 2 c dl On RIS Q E R16 GE C35 IGVCHL VC aj o ARBUS 3 J 4 BL J E CN S a RSJ R 7 V ROR US S RTT u Q j R2 C38 RI Q R25 L X R26 5 R27 3 a R co C59 R30 C58 ES R36 5 Raq o Ee e EE 86 V Y 193 M 99 yey 299 ey AN as 3 guile OQVW lLcwvf Figure 3 1 Component References 5 3 2 Board Component functions The following diagram
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