Intel LXD972M User's Manual
Contents
1. 19 Tables 1 Related IDOCUIMGSMIS eer 5 2 Quick Start Checklist for Jumper 9 3 Quick Start Checklist for Switch Settings nennen 9 4 Power Supply Voltage Source Connector 12 5 Magnetic Center Tap Voltage Source Configuration 12 6 Analog Power Supply VCCA Configuration Options sse 12 7 Configuration Options essre nnne entere 13 8 MDIO Configuration EEn YR 13 9 Jumper Configuration Settings for LED CFG nenne 14 10 JTAG Test Signal 5 livin eden 14 11 20 Preliminary User s Guide 3 Document Number 303125 Revision Number 002 Revision Date October 22 2004 Contents Revision History Revision Number 002 Revision Date October 2004 Page Description Section 1 1 About this Demo Board Kit Text added Section 1 3 Features of Intel LXD972M Demo Board Text changed Section 2 1 Equi2. Connects crystal across XI and XO to enable 1 JP19 Reset Pins 1 2 Jumper Connects reset button Quick Start Checklist for Switch Settings Switch Label Setting Configuration SW1 1 ID EN Off Not applicable for LXT972M Transceiver SW1 2 ADDRO Off Sets ADDRO 0 position SW1 3 ADDR1 Off Sets ADDR1 0 Off position SW1 4 LINKHOLD RBIAS Off Not applicable for LXT972M Transceiver Preliminary User s Guide Document Number 303125 Revision Number 002 Revision Date October 22 2004 Intel LXD972M Transceiver Demo Board Board Rev A1 ntel R Figure 2 Intel LXD972M Transceiver Demo Board m GND o nnn POWER f Y us ee RESET petet 410 e IC RE fl E m m wm w vis Sm nL TN RC RO 82 T3 1935 m bs GND 72 Y ely FFE m a v nnd tee LED vec m e a VR P arg ary uz so folo _ ay p n E caps seat e E E z ve he i wepi 9 o TCK Pi m me toole in vecio m INTEL CORPORATION unii GND 9750 GOETHE ROAD BN2 AL TO
3. en 12896 VO peo 841809 05 6 TIVLSNI LON 17 iver Intel LXD972M Transceiver Demo Board Board Rev A1 Intel LXD972M Transce Figure 5 Schematic uogeiodiog ano ano P et anyo s 2 90 Hn mp A eve EAZ ts we wi val SAL 5 45 SE 5 a Par a e BRE TN on 1 OS ano Deh sOT NZL VWWZONTWINS ec suo Lr 1 lt ONOAdL 109 or Pd mia i zz SH I E dodal lt pr 0d0sdL zaxi Hoy 1 1 EL L 1 1 m Her 4 4 at M3 XH 0 Lid E C 939 231 AT XY LEE oxi 74 lt 1 2940 01 EE i z 94901 lt gz 92907 LE z 9 n azn x oe INA 9i LT 2117 ee voan 1335993534 Ba ao B 8 8 5 s 3i 3 T 99 3 I a 5 1 Y User s Guide iminary Document Number 303125 Revision Date October 22 2004 Revision Number 002 Prel
4. 4 Remove jumper from pins 3 and 4 and remove jumper from pins 5 Pins 5 6 and 6 which disables a crystal connection across and to Y1 1 Pin 1 is located on the lower right corner of JP18 MDIO Configuration Options The default configuration of the MDIO and MDC signals is to route the MDIO through the MII connector to the SmartBits Test Box by installing jumpers JP16 and JP17 The RJ 11 feature is not supported As a result do not jumper the MDIO and MDC signals to the RJ 11 connector Table 8 lists the desired MDIO configuration settings MDIO Configuration Options Desired Configuration Jumper Setting Description Route MDIO and MDC JP16 Jumper Pins 2 3 Routes MDIO through 40 pin Connector 1 through JP17 Jumper Pins 2 3 Routes MDC through 40 pin Connector P1 Route MDIO and MDC JP16 Jumper Pins 1 2 Routes through RJ 11 Connector J2 through RJ 11 JP17 Jumper Pins 1 2 Routes MDC through RJ 11 Connector J2 LED Configuration Options The LXD972M Demo Board provides three programmable LEDs Each LED can display one of several available status conditions as selected by the LED Configuration Register Address 20 Programmable LEDs LED CFG1 LED CFG2 LED CFG3 are set in default mode and are programmable with the MDIO pin Register address 20 also provides optional LED pulse stretching up to 100 ms Register bits 20 3
5. 7 e m 077 655 rae BOARD ID SERIAL B3798 001 10 Note In Figure 2 the format of the Board ID on the LXD972M Transceiver Demo Board can be either one of the following For leaded LXD972M Rev A1 For lead free LXD972MLF Rev A1 In Figure 2 the format of the Serial Number on the LXD972M Transceiver Demo Board can be either one of the following For leaded 972M xxxx Al For lead free 972MLF xxxx Al Preliminary User s Guide Document Number 303125 Revision Number 002 Revision Date October 22 2004 a ntel 8 Intel LXD972M Transceiver Demo Board Board Rev A1 2 4 Configurations 2 4 1 Optional Test Setup Using Two Intel LXD972M Demo Boards Figure 3 shows an optional test setup using two LXD972M Demo Boards Each Demo Board plugs into a SmartBits Advanced Performance Test Box through standard 40 pin MII cables The two LXD972M Demo Boards are linked through a Twisted Pair crossover cable connected to the RJ 45 jack on each board Operation can be set for evaluation of 10 Mbps 100 Mbps and auto negotiation capabilities Figure 3 Optional Test Setup SmartBits Advanced Multi port 4 RS232 Performance Tester lt Cards lt MilCable gt MII MII lt lt Connector Connector P intel intel LXD972M LXD972M LXT972M LXT972M B 0 0 4 RJ 45 4 RJ 45 Twisted Pair Cro
6. Intel LXD972M Transceiver Demo Board Board Rev A1 Figure 6 Schematic Intel LXD972M Transceiver Demo Board Twisted Pair Port S p v 12945 002 Oz Jequeides Aepuony ee 1304 41 JenjeosuelL WZ46QX1 i a Jequinnuewnoog a WZZ60X1 en 42896 V2 5 peoH 1 09 05 6 jeyur AAZ 4 100 0 T AAZ 4 100 0 652 14 AAZ 4 100 0 3jnio o 185 EOWLTOA 12 XL 9 lt von Los b OS 000 000 var ele eM 879 1270 584 SNOSOS OLL9 L LOSS OSS 6L 0S S OS 5 6 9H r3 OF sore 9 137 39022 jl 5 NO T T 0S LJ at dO 5 1 lt 3r 0S E lool 6 0 Laod di dl ssid 31 3218 j gt 60 55 Preliminary User s Guide 18 Document Number 303125 Revision Number 002 Revision Date October 22 2004 Intel LXD972M Transceiver Demo Board Board Rev A1 Figure 7 Schematic Intel LXD972M Transceiver Demo B
7. on page 19 Note Page 1 of 5 of the schematics is not included the title page of the schematics Preliminary User s Guide 15 Document Number 303125 Revision Number 002 Revision Date October 22 2004 Intel LXD972M Transceiver Demo Board Board Rev A1 Demo Board Power Control iver Intel LXD972M Transcei Figure 4 Schematic e p z 7002 Oz jequejdes aed Ww Pleog TIVLSNI LON OG X ano 28rddO 1 WZZ60X1 anu 12896 vo owewenes ano ano ano Wa peo euo 0926 noot anor uogesodiog uso sso anoo anro amoo anro awo amoy anro 19 99 eso 135 eo vo 9 w AE E WZL6LXT 3noor oA sso 022 8 gt EISNER eN AE E AS Z WEZL6LX I R vad 3000 3nor OIDA gt an so OIDA za ude WZL6LXT 99 99 1 DOA ano a
8. test setup for standard operation of the LXD972M Demo Board The LXD972M Demo Board plugs into a SmartBits Advanced Performance Test Box through a standard 40 pin MII cable not included with the LXD972M Demo Board The LXD972M Demo Board RJ 45 jack connects to the RJ 45 card in the SmartBits test box through a Twisted Pair cable Operation can be set for evaluation of 10 Mbps 100 Mbps and auto negotiation capabilities Figure 1 Typical Test Setup i SmartBits EE D DEO Advanced Multi port RS 232 Performance Tester SAMI External NIC Cards MII Cables MII pesi lt Connectors oOo intel Twisted Pair 0 LXD972M Crossover gt 0 LXT972M Cable 0 0 B3570 03 8 Preliminary User s Guide Document Number 303125 Revision Number 002 Revision Date October 22 2004 Intel LXD972M Transceiver Demo Board Board Rev A1 Quick Start Checklists Use the quick start checklists in this section to set up the LXD972M Demo Board shown in Figure 2 Intel LXD972M Transceiver Demo Board on page 10 The following quick start setup procedure sets all ports to the default condition which includes Auto Negotiation enabled advertising dual speed and full duplex half duplex capabilities 1 Set the jumpers as listed in Table 2 The following jumpers are defined as follows LED 1 has the functionality of LED CFGI LED2 has the functionali
9. 2 select one of three possible stretch times For details see the LXT972M Transceiver datasheet The active LED state is determined by the CFG pin function When the LED CFG pin is pulled High the LED becomes active Low When the LED CFG pin is pulled Low the LED becomes active High Preliminary User s Guide 13 Document Number 303125 Revision Number 002 Revision Date October 22 2004 Intel LXD972M Transceiver Demo Board Board Rev A1 2 4 5 CFG Pin Configuration Options Intel Three control jumpers pull the associated port configuration pins High or Low to select the desired mode auto negotiation speed and duplex When auto negotiation is enabled with LED CFGI JP1 1 then LED CFG2 JP2 and LED CFG3 JP3 are used to configure default advertising characteristics of the LXD972M Demo Board The desired modes and jumper configuration settings are listed in Table 9 For specific register definitions and functions see the LXT972M Transceiver datasheet Table 9 Jumper Configuration Settings for LED CFG Pins Mode Jumper Settings Ra JP1 JP2 JP3 Negotiation Speed Duplex LED CFG1 LED CFG2 LED CFG3 9 Setting Setting Setting 16 Half Pins 2 amp 3 Pins 2 amp 3 Pins 2 amp 3 Full Pins 2 amp 3 Pins 2 amp 3 Pins 182 Disabled Half Pins 2 amp 3 Pins 1 amp 2 Pins 2 amp 3 Full Pins 2 am
10. ITCH RESET SM 5 SWITCH DIP 4 POS THRU 5 1 HOLE SEALED BLACK AMP 4 435 166 9 1 SWITCH 8 IC XFMR TG110 S050N2 T1 OEA HALO TG110 S050N2 1 TP2 5 15 22 TP24 30 ae HEADER 1X1 BERG 68000 240 1 29 21 Preliminary User s Guide Document Number 303125 Revision Number 002 Revision Date October 22 2004 Intel LXD972M Transceiver Demo Board Board Rev A1 22 Table 11 Bill of Materials Sheet 3 of 3 In Board Reference i Designator Description Manufacturer Part Number Quantity TP1 TP6 14 TP23 TP31 33 LABELS NOT USED IN SCHEMATIC IC LOGIC 74LVC244 LOW TEXAS U1 U3 VOLTAGE BUFFER 20 PIN INSTR SN74LVC244ADW 2 SOIC UMENTS IC PHY LXT977 LXT972M U2 DUAL PORT LQFP48C INTEL LXT977 LXT972M 1 U4 LABELS NOT USED IN SCHEMATIC IC LOGIC 74LVX14 HEX U5 SCHMITT TRIG INV 14 TOSHIBA TC74LVX14FN 1 SOIC CRYSTAL 25 000MHZ Yi HC49 CTS MP250 1 CTS MX045 25 0000 1 Preliminary User s Guide Document Number 303125 Revision Number 002 Revision Date October 22 2004
11. October 22 2004 Intel LXD972M Transceiver Demo Board Board Rev A1 Table 11 Bill of Materials Sheet 2 of 3 Board Reference Designator Description Manufacturer Part Number Quantity JP5 JP11 JP13 JP15 LABELS NOT USED IN SCHEMATIC JP1 3 JP16 17 HEADER 3X1 SIP 3P BERG 68000 240 3 5 HEADER 4x2 JP14 HEADERS BERG C9192 280 4 1 JP18 HEADER 3X2 BERG C9192 280 3 1 CONN MII 40 PIN FEMALE CON40F RT4ROW 1 RES 182 OHM 1 8W 1 1 3 PANASONIC ERJ 8ENF1820V 3 R4 9 R12 13 R23 25 R27 R29 R31 R33 R35 RES 49 9 1 8W 1 1206 PANASONIC ERJ 8ENF49R9V 27 R76 R82 R83 R26 R28 R30 R32 R34 RES 22 OHM 1 8W 1 9C08052A22ROFK R36 38 R45 R48 0805 YAGEO AMERICA HET 10 R58 R60 62 R66 RES 4 7K 1 8W 5 1206 PANASONIC ERJ 8GEYJ472V 5 R65 100K 1 8W 1 1206 PANASONIC ERJ 8ENF1003V 1 RES 10K 1 8W 1 1206 NOTE R3is shown as 180 R67 li PANASONIC ERJ 8ENF1002V 1 schematic R68 Prid OHM 1 8W 1 PANASONIC ERJ 8ENF1000V 1 R69 RES 22 1K 1 8W 1 1206 PANASONIC ERJ 8ENF2212V 1 R72 ens OHM 1 8W 5 PANASONIC ERJ 8GEYJ221V 1 R73 R75 R77 R82 NOT INSTAL ED NOT INSTALLED 8 R10 R11 R14 22 R39 RAS Red A71 LABELS NOT USED IN SCHEMATIC RES 0 OHM 1 8W 5 R74 ieee SMD PANASONIC ERJ 8GEYOROOV 1 SWITCH KEY J S2 LEAD SMD KT11P2JM 1 SW
12. e LXD972M Demo Board is a platform for evaluation of the Intel LXT972M Single Port 10 100 Mbps PHY Transceiver called hereafter the LXT972M Transceiver The LXD972M Demo Board allows system designers to test the following 10 Mbps and 100 Mbps link performance Auto negotiation Register functionality The LXD972M Demo Board requires only a single 3 3V power supply About this Demo Board Kit This Demo Board kit includes the following LXD972M Demo Board Intel LXD972M Transceiver Demo Board Board Rev 1 User s Guide Related Documents Table 1 lists related documentation Related Documents Document Document Number Intel LXT972M Single Port 10 100 Mbps PHY Transceiver Datasheet 302875 Intel LXT971A LXT972A LXT972M Single Port 10 100 Mbps PHY Transceivers 249354 Specification Update Preliminary User s Guide 5 Document Number 303125 Revision Number 002 Revision Date October 22 2004 Intel LXD972M Transceiver Demo Board Board Rev A1 ntel 1 3 Features of Intel LXD972M Demo Board e 33V operation with option for 2 5V I O voltage Low power consumption 300 mW typical Quick setup and clear visibility of application settings for complete system demonstration Auto negotiation protocol compliant Compatible with systems not supporting auto negotiation LED indicators for major functions JTAG boundary scan port Configurable through MDIO por
13. e power supply to pin 2 of JP4 Table 6 lists the LXT972M Demo Board analog power supply Analog Power Supply VCCA Configuration Options VCCA configuration options Desired Configuration Setting Description 3 3V Power Jumper Use Jumper JP12 to route power from the VCCD Power Connector Supply to VCCA JP12 through JP12 to the VCCA input of the LXT972M Transceiver Analog 1 Remove jumper from JP Supply to VCCA JP 12 pin 2 of JP12 For power Transceiver datasheet 12 to disable for VCCA input External Power Open 2 Apply external power from an alternate power supply through supply requirements see the LXT972M Preliminary User s Guide Document Number 303125 Revision Number 002 Revision Date October 22 2004 intel Intel LXD972M Transceiver Demo Board Board Rev A1 Table 7 lists clock configuration options Table 7 Clock Configuration Options 2 4 3 Note Table 8 2 4 4 Note Desired i ae Configuration JP18 Settings Description Pins 11 2 Open Remove jumper from pins 1 and 2 to disable the clock oscillator Y2 p output Enable Crystal Oscillator Y1 Pins 3 4 Jumper Place a jumper on pins 3 and 4 and pins 5 and 6 which connects a Pins 5 6 P crystal across XI and XO to enable Y1 Place a jumper on pins 1 and 2 which enables the output of clock Enable Clock nehmpsr oscillator Y2 Oscillator Y2 Pins 3
14. intel Intel LXD972M Transceiver Demo Board Board Rev A1 Preliminary User s Guide October 2004 Documen t Number 303125 Revision Number 002 Revision Date October 22 2004 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS NO LICENSE EXPRESS OR IMPLIED BY ESTOPPEL OR OTHERWISE TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT EXCEPT AS PROVIDED IN INTEL S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS INTEL ASSUMES NO LIABILITY WHATSOEVER AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO SALE AND OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE MERCHANTABILITY OR INFRINGEMENT OF ANY PATENT COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT Intel products are not intended for use in medical life saving life sustaining critical control or safety systems or in nuclear facility applications Intel may make changes to specifications and product descriptions at any time without notice Designers must not rely on the absence or characteristics of any features or instructions marked reserved or undefined Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them The Intel LXD972M Transceiver Demo Board Board Rev A1 may contain design defects or errors known as errata which may cause the product to deviate fr
15. iption Manufacturer Part Number Quantity CONN BANANA NUT BN1 4 SILVER BANANA NUT EF JOHNSON 108 0740 001 4 C1 C2 C5 C8 C9 C11 C13 C35 C42 CAE LABELS NOT USED IN SCHEMATIC cus C10 615 18 HEADER 3X1 SIP 3P BERG 08055 104 8 4 2 C4 7 C12 C52 BERG ECU V1H102JCX 4 C17 C49 PARO OTUR ARIO AVX 08055C103KATMA 2 0805 C53 NOT INSTALLED NOT INSTALLED 1 C18 47 48 58 59 20 2KV X7R Ayx 1812GC102KAT1A 5 CAP 10uF 6 3V TANT C31 C34 C54 C56 ees PANASONIC ECS TOJY106R 4 632 33 CAP 18pF 50V 5 0805 PANASONIC ECU V1H180JCN 2 C36 C55 C57 CAP 100uF 6 3V CASED PANASONIC ECE VOJA101P 3 C37 20PF 50V 5 1206 PANASONIC ECU V1H200JCM 1 43 44 270pF NPO 1206 AVX 12061A271JATTA 2 DIODE RECTIFIER DL4001 D1 DIODES INC DL4001 13 1 DIODE LED GREEN SS D2 D8 TYPE LOW CUR SMD PANASONIC LNJ308G8LRA 7 LED SMD SS DTP1 4 JP4 JP12 JP19 HEADER 2X1 SIP 2P BERG 68000 240 2 7 FB1 FB2 LABELS NOT USED IN SCHEMATIC FBEAD 60 OHM 100MHZ FB3 5 0 100HM DC 1 5A 1210 STEWARD MI1210K600R 00 3 BEAD3225 FB6 NOT INSTALLED NOT INSTALLED x 1 CONN MOD JACK 8 8 J 555164 1 1 CONN MOD JACK 6 6 J2 RJ11 UNSHIELDED CORCOM RJ11 6L B 1 BLOCK RJ11 6L B CONN SMB VERTICAL JOHNSON us MOUNT SMB SM COMPONENTS 131 3711 201 Preliminary User s Guide Document Number 303125 Revision Number 002 Revision Date
16. no ano oan 3 m i di E x E OS z0 P o ASZ 398 ASZ 3881 13538 To ano ats Abe 26 25 eH v lv vi 17 1 4 NI Gqarnv ndod LON 2 2 22 2 00 HINGE SNV ESD ANY 9 8 558 Foran O ELA NZLGLXTI x is EI pP vA svisu Nan Ola d 0153130 ano o arar 9 s 198 ia t z 13534 7 x 99 E reat _ O8rdJOT WZZ6LX1 90 X yaava Sed n 92 vedl oH sw LE 5 9p 0199A ES 1 XOL SAL p on isi t zo Ms I 1501 rez ISL amp 5 55 Meat 7 Y T 8 8 89 6tdL gt 5 oo sou LNOd T L ven Lar T IMS 99 Xv QALY 2 T 298 19H 094 858 OIDA lt H User s Guide iminary Prel 16 303125 Document Number 002 Revision Number Revision Date October 22 2004 Demo Board Port 3 I 19945 7002 Oz 9941995 ete 1808 IIW peog JensosuELL 8 OWAQ AG W2Z60xX1
17. oard Configuration 3 I 19905 1002702 Jequisides epuow Sie OSIW SIJNOO G31 Sdv9 Jeweosuei Wz 6qx1 a ez INZZ61X1 12896 841905 05 6 uopeuodioo ano Nid 39 08 0 dat oz 4 t 254 Edf o 0199A 542 a A 08 0 dat Oz zem o sa OI99 ano va 08 50 qs Oz t i ze y 0199A ano pdl SV TAYT SLOHINLSIG 940 091 2930 0387 939 037 TIVLSNI LON 19 ano Y T ans ef QNO OSO WISAHOZHWSZ 08 I 9N9 AON 99 4 983 83 99 41 Preliminary User s Guide Document Number 303125 Revision Number 002 Revision Date October 22 2004 Intel LXD972M Transceiver Demo Board Board Rev A1 4 0 Bill of Materials Table 11 lists the bill of materials for the LXD972M Demo Board Rev Table 11 Bill of Materials Sheet 1 of 3 20 Board Reference 5 Designator Descr
18. om published specifications Current characterized errata are available on request Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order Copies of documents which have an ordering number and are referenced in this document or other Intel literature may be obtained by calling 1 800 548 4725 or by visiting Intel s website at http www intel com Intel and the Intel logo are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries Other names and brands may be claimed as the property of others Copyright 2004 Intel Corporation 2 Preliminary User s Guide Document Number 303125 Revision Number 002 Revision Date October 22 2004 ntel 8 Contents Contents 1 0 INTFOGUCHONM 5 1 1 About this Demo Board nnne en nnn rennes 5 1 2 Related Documents secet riter 5 1 8 Features of Intel LXD972M Demo Board sssssseeeteneenen tenen 6 2 0 Using the Intel LXD972M Demo pL epi Rak buen tardus 7 2 1 Equipment Requirements X E Enn o AYER RE 7 2 2 Typical Test Sel s c enge vader ce Rp RR RR ROBAR 8 29 Quick Start Checklists e
19. p 3 Pins 1 amp 2 Pins 1 amp 2 Half Jumper Pins 1 amp 2 Jumper Pins 2 amp 3 Jumper Pins 2 amp 3 100 Pins 1 amp 2 Pins 2 amp 3 Pins 1 amp 2 Enabled Half Pins 1 amp 2 Pins 1 amp 2 Pins 2 amp 3 10 100 fae Pins 1 amp 2 Pins 1 amp 2 Pins 1 amp 2 2 5 JTAG Test Signals The boundary scan test port is accessed through JP14 for board level testing Table 10 lists the JTAG test signal descriptions Table 10 JTAG Test Signal Descriptions pai Symbol Description 1 TRST_L Test Reset Test reset input sourced by testing device 3 TCK Test Clock Test clock input sourced by testing device 5 TMS Test Mode Select 7 TDO Test Data Output Test data driven with respect to the falling edge of TCK 8 TDI Test Data Input Test data sampled with respect to the rising edge of TCK 14 Preliminary User s Guide Document Number 303125 Revision Number 002 Revision Date October 22 2004 ntel Inte LXD972M Transceiver Demo Board Board Rev A1 3 0 Intel LXD972M Demo Board Schematics This section includes schematics for the LXD972M Demo Board Figure 4 Schematic Intel LXD972M Transceiver Demo Board Power Control on page 16 Figure 5 Schematic Intel LXD972M Transceiver Demo Board MII Port on page 17 Figure 6 Schematic Intel LXD972M Transceiver Demo Board Twisted Pair Port on page 18 Figure 7 Schematic Intel LXD972M Transceiver Demo Board Configuration
20. pment Requirements Text changed Section 2 3 Quick Start Checklists Text changed Text changed in Table 2 Quick Start Checklist for Jumper Settings Text changed in Table 3 Quick Start Checklist for Switch Settings Figure 2 Intel LXD972M Transceiver Demo Board changed 12 Section 2 4 2 Power Supply Voltage Source and Clock Options Text changed in Table 4 Power Supply Voltage Source Connector Options changed 13 Section 2 4 3 MDIO Configuration Options Text changed Text changed in Table 4 Power Supply Voltage Source Connector Options changed 13 Section 2 4 4 LED Configuration Options Text changed 14 Section 2 4 5 CFG Pin Configuration Options Text changed and new table added 15 Section 3 0 Intel LXD972M Demo Board Schematics Schematics changed 20 Section 4 0 Bill of Materials Text in Table 11 Bill of Materials changed Revision Number 001 Revision Date July 2004 Page Description Initial release Preliminary User s Guide Document Number 303125 Revision Number 002 Revision Date October 22 2004 Intel LXD972M Transceiver Demo Board Board Rev A1 Introduction 1 1 1 2 Table 1 This document describes the typical hardware set up procedures for the Intel LXD972M Transceiver Demo Board called hereafter the LXD972M Demo Board Th
21. sete kde cv oe etd 9 2 4 CONPQURATIONS 11 241 Optional Test Setup Using Two Intel LXD972M Demo Boards 11 2 4 2 Power Supply Voltage Source and Clock 12 2 4 3 Configuration enne 13 2 4 4 LED Configuration 13 2 45 CFG Pin Configuration eene enne 14 2 5 JTAG Test Signals 14 3 0 Intel LXD972M Demo Board 15 4 0 Bilhot Material ES 20 Figures 1 Typical Test Setup a 8 2 Intel LXD972M Transceiver Demo Board 10 3 Optional Test Setup 11 4 Schematic Intel LXD972M Transceiver Demo Board Power 16 5 Schematic Intel LXD972M Transceiver Demo Board 17 6 Schematic Intel LXD972M Transceiver Demo Board Twisted Pair 18 7 Schematic Intel LXD972M Transceiver Demo Board
22. ssover Cable B3572 05 Preliminary User s Guide 11 Document Number 303125 Revision Number 002 Revision Date October 22 2004 Intel LXD972M Transceiver Demo Board Board Rev A1 2 4 2 Table 4 Table 5 Table 6 12 Intel Power Supply Voltage Source and Clock Options Table 4 lists banana lead power connectors BNn for the LXD972M Demo Board For details on the power supplies see the schematic in Chapter 3 0 Intel LXD972M Demo Board Schematics Power Supply Voltage Source Connector Options LXT972M Transceiver Reference Designators Signal Supply Description BN1 voc 33 For components on the LXD972M Demo Board other than LXT972M Transceiver BN2 GND Ground 3 3V or 2 5V BN3 VCCIO I O voltage for the LXT972M Transceiver 3 3V BN4 VCCD LXT972M digital power If JP12 jumper is on analog power is provided for the Table 5 lists internal and external jumper settings to configure transmit magnetic center tap voltage the power supply source for the Magnetic Center Tap Voltage Source Configuration Options Desired Power Supply Source meng Description 3 3V Power Supply from Jumper Use Jumper JP4 to apply 3 3V power from VCCA for center tap VCCA JP4 operation Alternate Power Supply JP4 Open Use Jumper JP4 to supply either 2 5V or 3 3V power supply for center tap operation Connect th
23. t or hardware jumpers Standard half duplex or full duplex operation at 10 Mbps or 100 Mbps 6 Preliminary User s Guide Document Number 303125 Revision Number 002 Revision Date October 22 2004 Intel LXD972M Transceiver Demo Board Board Rev A1 2 0 Using the Intel LXD972M Demo Board This document includes information on the following items concerning using the LXD972M Demo Board Section 2 1 Equipment Requirements on page 7 Section 2 2 Typical Test Setup on page 8 Section 2 3 Quick Start Checklists on page 9 Section 2 4 Configurations on page 11 Section 2 5 Test Signals on page 14 Chapter 3 0 Intel LXD972M Demo Board Schematics Chapter 4 0 Bill of Materials 2 1 Equipment Requirements The LXD972M Demo Board is populated with all components needed for twisted pair evaluation However the following additional equipment is also required SmartBits Advanced Multi port Performance Test Box configured with firmware version 4 39 or newer PC with Smart Windows version 6 0 or newer installed One MII Cable male to male One external NIC card One Category 5 Unshielded Twisted Pair UTP crossover cable External power supply Preliminary User s Guide 7 Document Number 303125 Revision Number 002 Revision Date October 22 2004 Intel LXD972M Transceiver Demo Board Board Rev A1 ntel 8 2 2 Typical Test Setup Figure 1 shows a typical
24. ty of LED CFG2 and CFG has the functionality of LED CFG3 as defined by the LXT972M Transceiver datasheet 2 Set SW1 switches as listed in Table 3 3 Connect the MII port of the LXD972M Demo Board to the Smartbits test box through the MIT connector cable A male to male cable is required to interface the Smartbits test box to the LXD972M Demo Board and is available from Newark 5m cable Newark 91 9746 4 Connect the twisted pair port through a Twisted Pair crossover cable to the RJ 45 card in the SmartBits test box 5 Power up the Smartbits test box 6 When the LXD972M Demo Board is configured according to desired test settings apply the desired power connections per Table 4 options in Section 2 4 2 Power Supply Voltage Source and Clock Options on page 12 and press Reset switch S2 7 Proceed with testing Table 2 Quick Start Checklist for Jumper Settings Table 3 Jumper Label Setting Configuration JP1 LED1 Sets Port Configuration to 111 for Auto Negotiation JP2 LED2 Pins 1 2 Jumper 10 100 Mbps Full Duplex For details see Section JP3 CFG 2 4 5 CFG Pin Configuration Options on page 14 JP12 VCCA Jumpered SUE US connector BN4 through JP16 MDIO Pins 2 3 Jumper Routes MDIO through MII 40 pin Connector P1 JP17 MDC Pins 2 3 Jumper Routes MDC through MII 40 pin Connector P1 Pins 1 2 Open Disables output of clock oscillator Y2 E E
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