Intel T1/E1 User's Manual
Contents
1. 20 10 Evaluation Board Schematic Line Interface 21 11 Evaluation Board Schematic 22 12 Evaluation Board Schematic LOS 23 13 Evaluation Board Schematic Analog 24 14 Evaluation Board Schematic Digital 25 1 LOOP DLOOP SWIIGN 9 2 5 568 11 LXD386 Evaluation Board for Quad T1 E1 Applications Developer Manual Evaluation Board for Quad T1 E1 Applications LXD386 General Description 1 1 The LXD386 evaluation board is a versatile tool for engineers designing T1 E1 short haul applications using the LXT386 The evaluation board operates in one of two modes Software Host mode or Hardware mode In Software mode the device is controlled with the PC based configuration and monitoring software through an 18051 microcontroller interface In Hardware mode the device and channel controls are set using shorting blocks and DIP switches located on the LXD386 evaluation board The evaluation board provides banana jacks for each channel s line interface to allow connection of a T1 E1 pattern generator analyzer A connector is2. 16 4 9 1 Communications MOQES sss 16 4 9 2 ROGITO 16 4 9 3 Setting Individual Transceiver Operating 16 4 9 4 Apply to all Channel S sss 17 4 9 5 17 4 10 Registers SCG 18 4 10 1 Setting REQisters 18 4 10 2 Stat s ak 18 4 10 3 Control BUTRORS 18 4 10 4 a 18 4 10 5 PROS Ob sls RAE Rb a SEE 18 LXD386 Evaluation Board for Quad T1 E1 Applications Developer Manual iii 5 0 Figures Tables Evaluation Board 5 20 1 LXD386 Evaluation a 6 2 Default Switch Settings 11 3 Jumper Block IPO eau daa tenet 12 4 Jumper BlOCK UP 2 us mae 12 5 Jumper Block A 13 6 Hardware Set Up 16 7 Configuration Screen 22 2 17 8 e 19 9 Evaluation Board Schematic
3. 10 3 6 Code SCIOCTION 10 3 7 Monitoring Address 1 10 3 8 Jitter Attenuator Selection 10 3 9 Line Buildout 11 3 10 Master 5 11 3 11 JTAG Boundary Scan ee 12 3 12 Framer ASIC Connection aaa assesses asada 12 3 137 LED AT 19 314 Eine MS MACS 19 3 15 Board Prove Cun Sela 19 Software Mode Set Up and Operation 14 4 1 8051 Microcontroller Board a 14 42 Evaluation Board Set Up eisai nisi eae 14 4 3 Test Equipment Connections 14 4 4 Power Connections 14 4 5 Evaluation Board 15 4 6 Software Installation and 15 4 7 Hardware Set Up 15 4 8 Quitting the Program n A 15 4 9 Configuration
4. Lea a of 9 WEE T 9 h 0 4 3 x 3 6 Developer Manual intel 2 0 Evaluation Board for Quad T1 E1 Applications LXD386 Overview Caution 2 1 2 2 2 3 CMOS devices are static ESD sensitive Take all industry standard precautions when handling the evaluation board LXT386 chip and other sensitive electronic components Before proceeding with any evaluation board operations review the specifications for the LXT386 transceiver LXD386 Packing List The evaluation board kit contains the following components LXD386 evaluation board with the LXT386 installed 2 048 MHz oscillator installed additional 1 544 MHz oscillator supplied 18051 microcontroller interface board and PC serial port cable PC compatible diskettes containing software for using the evaluation board in Software mode Shorting block kit for selecting Hardware mode LXD386 user guide LXT386 data sheet Equipment Requirements The evaluation board kit includes all the circuit components needed for a successful evaluation However the following lab equipment is required e Power Supply 3 3V DC 45VDC for TVCC optional Telecom cable or cable simulator optional e pattern generator analyzer 1 544 2 048 MHz clock source optional e For Software mod
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9. Board for Quad T1 E1 Applications ntel 4 10 4 10 1 4 10 2 4 10 3 4 10 4 4 10 5 Registers Screen Setting Registers The Registers screen see in Figure 8 allows direct control of all the LXT386 registers Each register is labeled by its functional name and hex address Right click on a register name for on line help Status Indicators Display boxes within the Registers screen show the state settings for individual bit positions of each register Each of the 4 least significant bits of these registers control the corresponding transceiver channel except where otherwise noted in the LXT386 specifications The check boxes beside the Mode column denote enabling of read write step modes Control Buttons Clicking on the Read All button will initiate a global read of all LXT386 registers Clicking on the Read Step and Write Step buttons performs the indicated action only on registers that have the enable box checked The Back button is used to return to the configuration screen and the Exit control button can be used at any time to close the software Interrupts The Interrupt indicator is located in the lower right corner This indicator will turn red whenever there are pending interrupts in the LXT386 Interrupts are cleared by reading the corresponding Status Monitor register When all interrupts are cleared the Interrupt indicator will turn Green See Figure 8 Reset While op
10. Current characterized errata are available on request Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order Copies of documents which have an ordering number and are referenced in this document or other Intel literature may be obtained by calling 1 800 548 4725 or by visiting Intel s website at http www intel com Copyright Intel Corporation 2001 Third party brands and names are the property of their respective owners LXD386 Evaluation Board for Quad T1 E1 Applications Developer Manual intel Contents 1 0 2 0 3 0 4 0 General Description 5 1 1 2 2 5 7 2 1 LADS Packing Lial oranssia 7 2 2 Equipment 7 2 3 Control MOUS 7 2 4 Factory 8 Hardware Mode Set Up and 9 3 1 Power 9 3 2 Hardware Mode 9 3 3 Loopback Mode 9 3 4 Clock Edge 9 3 5 Output Enable
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12. 000 E1 mode Refer to LXT386 data sheet for pulse shape details Master Clock Setup The on board 2 048 MHz oscillator can be used for MCLK source An additional 1 544 MHz oscillator is included for use in 1 operation mode A BNC connector J1 is provided to allow use of an external MCLK source 11 is internally terminated into 500 Jumper block 1 5 is used to configure MCLK Table 2 describes the options available with JP5 The factory setup for JP5 sets internal oscillator timing as illustrated in Figure 3 Table 2 JP5 Jumper Settings JP5 Setting Operation HIGH Data recovery mode EXT External MCLK source at BNC J1 INT Internal oscillator LOW Receiver power down Developer Manual 11 LXD386 Evaluation Board for Quad T1 E1 Applications Figure 3 Jumper Block JP5 1 2 er 3 4 Low 7 3 11 JTAG Boundary Scan Port The eight pin connector JP2 shown in Figure 4 provides access to the IEEE 1149 1 compliant JTAG boundary scan port for board testing purposes Figure 4 Jumper Block JP2 TRST TMS 89 5 2 AT2 1 3 12 Framer ASIC Connection Ten pin connectors provide access to the digital signals necessary for interfacing with the back end Framer Mapper or ASIC Figure 5 represents one of the four connectors with the factory jumper conne
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14. also provided for each channel s framer or back end ASIC interface Features Software and Hardware controllable ZIF LQFP socket for easy swapping of LXT386 Banana jacks for power and line interfaces 10 pin connectors for framer ASIC interface e 8 connector for IEEE 1149 1 compliant JTAG boundary scan port LED indicators for LOS alarm On board 2 048 1 544 MHz reference clock oscillator Switches and shorting blocks for Hardware mode operation Compatible with Intel external 18051 microcontroller board e PC based software for ease of use Socketed transformer and termination components for easy experimentation Built in overvoltage protection for line interface and power supply Developer Manual 5 LXD386 Evaluation Board for Quad T1 E1 Applications ntel Figure 1 LXD386 Evaluation Board H e 8 miala TEES la a FE ear ja a 4 9 buman a REV 4 4 o wate aH E THE EF z try a E og ina IRSN S 51 am ga en 1 nm EEE 3 ma a SE 383 a ts I B
15. cting RCLK to TCLK Developer Manual intel Evaluation Board for Quad T1 E1 Applications LXD386 Figure 5 Jumper Block JP 31 3 13 3 14 3 15 JP31 TCLKO 2 onp TCLKO RCLKO 5 5 TNEGO 7 8 RNEGO ws 2 10 onp LED Indicators Loss of Signal LOS status for each channel is indicated by four LEDs labeled D3 through D6 If the board is being used in the Software mode the state of these LEDs will also be displayed on the registers display screen Line Interface Access to the line interface is provided through the green and white banana jacks The TIP signal is routed to the white jacks for both transmit and receive directions The RING signal is routed to the green jacks for both directions An octal transformer is used for channels 1 to 3 one transformer port is unused Transformers in channel 0 and line resistors capacitors for channels 0 to 3 are socketed for easy swapping Jumpers JP7 to JP14 can be used to bypass the transmit series resistors for 1 applications with TVCC 3 3V See the LXT386 Data Sheet for details on transmit interface options Board Protection The LXD386 evaluation board is equipped with both power supply and line surge protection Two Transient Voltage Suppressors TVS are included for power supply protection 5V 3 3V For the 1 line interface the transmitters are protected with Schottky diodes and
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17. e an IBM compatible PC with minimum 386 40 MHz processor available serial port mouse VGA monitor DOS 5 0 and Microsoft Windows 3 1 or later version Windows 9x is recommended Control Modes The LXT386 has two basic operating modes Hardware mode or Software Host mode In Hardware mode operation of the LXT386 is established by hard wiring the pins In Software mode operation of the LXT386 is controlled by an external microprocessor that communicates with the LXT386 s internal registers via either a serial or parallel interface The LXD386 evaluation board supports both hardware and software modes Developer Manual 7 5 LXD386 Evaluation Board for Quad T1 E1 Applications ntel o 2 4 Factory Settings When shipped from the factory the LXD386 evaluation board s switches and jumpers are set for software mode and parallel microprocessor interface 8 Developer Manual Evaluation Board for Quad T1 E1 Applications LXD386 Hardware Mode Set Up and Operation 3 1 3 2 3 3 Table 1 3 4 Power Connections The evaluation board has two power planes VCC and TVCC each of which is tied to a separate red colored banana jack 1 Connect the 3 3 VDC power supply to the VCC jack 2 Connect either a 3 3 VDC or 5 0 VDC power supply to the TVCC jack 3 Connect the power supply ground lead s to the black GND banana jack Jumper 1 1 is provided to allow LXT386 current consumption measurements and must b
18. e installed for normal board operation Jumper JP3 allows measurement of the current in the TVCC power supply only It must also be installed for normal operation Hardware Mode Selection To enable the Hardware mode of operation 1 Set the MODE switch in switch block S1 to the LOW position 2 Insert the two shorting blocks provided with the evaluation board kit into 20 pin sockets JP4 and JP6 Loopback Mode Selection The LXT386 LOOP DLOOP signals are set by switches in switch block 51 Depending on the LOOPn DLOOPn combination selected for a particular channel a different operation or loopback mode is selected Please refer to Table 1 LOOP DLOOP Switch Settings LOOPn DLOOPn Channel n Operation Open x Normal Mode LOW x Remote Loopback HIGH LOW Analog Local Loopback HIGH HIGH Digital Local Loopback 1 x means don t care Clock Edge Selection The phase relation between RCLK and RPOS RNEG is set by the CLKE switch in switch block S4 Please refer to the CLKE signal pin in the LXT386 data sheet for details Developer Manual 9 5 LXD386 Evaluation Board for Quad T1 E1 Applications ntel 3 5 3 6 3 7 3 8 Output Enable Selection The OE switch in switch block S4 controls the operation of the LXT386 output drivers For normal operation driver outputs enabled set the OE switch to the ON position Setting the OE switch to OFF forces the output drivers to
19. erating the evaluation board in Software mode reset is accomplished by using the write step function to write to the software reset register address Developer Manual Figure 8 Registers Screen Evaluation Board for Quad T1 E1 Applications LXD386 Eh Demon 3 BEB a E BeBe E 0 a 7 Back Developer Manual 19 Evaluation Board Schematics Figure 9 Evaluation Board Schematic Data Control LXD386 Evaluation Board for Quad T1 E1 Applications 5 0 9 Jo L 19943
20. lation procedure by running the Setup exe file on the installation diskette 1 Follow the on screen prompts to complete the software installation Hardware Set up Screen Whenever the LXT386 software is run the Hardware Set up screen will appear first on the monitor see Figure 6 This screen is used to select the PC serial port to be used Select an available serial port and click the OK button Quitting the Program The program can be terminated at any time by clicking the Exit control button located at the right side of the screen Developer Manual 15 LXD386 Evaluation Board for Quad T1 E1 Applications ntel Figure 6 Hardware Set up Screen 4 9 4 9 1 4 9 2 4 9 3 Note 386 Demo Soltware Hardware Setup Pleare select one serial port Serial Ports 2 Offine 6 COM4 Please make sure that you have salactad tha night serial port before choking Otherwise k may cause program lock up Configuration Screen The configuration screen shown in Figure 7 is the next screen to appear on the monitor It is the primary control interface with the evaluation board A graphical representation of each channel is shown in a tabbed display box along with the control buttons described in the following paragraphs Communications Modes The option buttons located in the communications modes box are used to set the microprocessor interface m
21. ode to parallel interface or serial interface The selected communication mode must match the evaluation board MODE switch setting see Evaluation Board Set up on page 14 The factory default setting is parallel mode Registers Clicking the Registers control button will select the Registers screen enabling read write access to all the LXT386 registers See Registers on page 16 Setting Individual Transceiver Operating Modes Select the transceiver channel you wish to configure by clicking on the corresponding tab symbol Once a channel has been selected set the operating mode by clicking on one of the three loopback modes Developer Manual Evaluation Board for Quad T1 E1 Applications LXD386 4 9 4 Apply to all Channels Clicking the Apply to All Channels control button will configure the other three channels to the settings displayed for the currently selected channel 4 9 5 Exit The exit control button can be used at any time to close the software Figure 7 Configuration Screen LXT386 Demo Software Configuration About Communication Modes gt Parallel Mode Serial Mode Channel 0 Channel 1 Channel 2 Channel 3 HARDWARE SOFTWARE CONTROL INTERFACE G 775 Los DATA CLOCK RECOVERY PULSE SHAPER Fr RPA a o 21 voor monn Apply to All Channels Developer Manual 17 5 LXD386 Evaluation
22. t MO INT CO switch in switch block 53 to HIGH Intel microprocessor 5 Set MUX switch in switch block 53 to HIGH Multiplexed microprocessor address data bus 6 Set CLKE switch in switch block S3 Refer to CLKE signal pin in LXT386 data sheet for details 7 Set OE switch in switch block S3 as described in Output Enable Selection on page 10 8 Set the jumper on JP5 as described in Master Clock Setup on page 11 Test Equipment Connections The evaluation board contains connectors to interface an external pattern generator and other test equipment See page 9 for details Power Connections Connect power supply as described in Power Connections on page 9 Developer Manual 4 6 4 7 4 8 Evaluation Board for Quad 1 1 Applications LXD386 Evaluation Board Software When operating the evaluation board in the software mode the software provided with the kit will be used to configure the LXT386 and to monitor its operation This software provides a point and click user friendly interface with on line help screens Refer to the data sheet for detailed information about the LXT386 transceiver Software Installation and Start Up The minimum PC system requirements are IBM compatible PC 386 40 MHz CPU Pentium class recommended Available serial port Mouse e VGA monitor DOS version 5 0 or higher and Microsoft Windows 3 1 Windows 9x recommended Begin the instal
23. tel LXD386 Evaluation Board for Quad T1 E1 Applications Developer Manual January 2001 As of January 15 2001 this document replaces the Level One document Order Number 249215 001 LXD386 Evaluation Board for Quad T1 E1 Applications User Guide Information in this document is provided in connection with Intel products No license express or implied by estoppel or otherwise to any intellectual property rights is granted by this document Except as provided in Intel s Terms and Conditions of Sale for such products Intel assumes no liability whatsoever and Intel disclaims any express or implied warranty relating to sale and or use of Intel products including liability or warranties relating to fitness for a particular purpose merchantability or infringement of any patent copyright or other intellectual property right Intel products are not intended for use in medical life saving or life sustaining applications Intel may make changes to specifications and product descriptions at any time without notice Designers must not rely on the absence or characteristics of any features or instructions marked reserved or undefined Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them The LXD386 may contain design defects or errors known as errata which may cause the product to deviate from published specifications
24. the high impedance state Code Selection In Hardware mode the MO INT CO switch in switch block S4 selects the line encode decode To select AMI encode decode set to the ON position To select B8ZS HDB3 encode decode set to the OFF position Monitoring Address Selection Switch block S3 sets the Protected Monitoring Addresses AO through A3 The factory default setting is 0000 no monitoring See the LXT386 data sheet for details Jitter Attenuator Selection In Hardware mode the JASEL switch in switch block 51 selects the position of the Jitter Attenuator in the data path e Transmit path LOW Receive path HIGH JA disabled center Developer Manual intel Figure 2 3 9 3 10 Evaluation Board for Quad T1 E1 Applications LXD386 Default Switch Settings 53 MO INT CO gt MUX 54 gt A1 A2 52 LEN2 LEN1 51 e LENO LOW a LOOPO LOOP1 LOOP2 OFF position Low 0 gt LOOP4 LOOPS LOOP6 LOOP7 5 MODE JASEL a Line Buildout Selection Switch block S2 is used to select the transmit pulse shaping for mode operation as well as T1 mode selection The factory default is
25. the receivers are protected by series 1KQ input resistors This protection is sufficient for G 703 Annex compliance Developer Manual 13 5 LXD386 Evaluation Board for Quad T1 E1 Applications ntel 4 0 Software Mode Set Up and Operation 4 1 4 2 4 3 4 4 i8051 Microcontroller Board An 18051 microcontroller interface board is provided with the evaluation board kit Connect the 18051 microcontroller board to the evaluation board at the 96 pin header labeled CON1 Connect the microcontroller board to an available serial COM port on your PC using the cable provided in the evaluation board kit Instead of the 18051 a user supplied microcontroller board may also be used to control the LXT386 Evaluation board connector CON provides access to all the relevant LXT386 microprocessor interface signals Evaluation Board Set up The evaluation board contains switches and jumpers to select various operating parameters All other parameters are controlled through the evaluation board software When using the i8051 microcontroller provided with the kit set the evaluation board switches and jumpers as follows 1 Select software mode by removing the shorting blocks from sockets JP4 and JP6 2 Set the MODE switch in switch block S1 to select serial or parallel mode HIGH for parallel mode factory default Center position for serial mode 3 Set the JASEL switch in switch block S1 to the center position 4 Se
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