Fujitsu CS90A User's Manual
Contents
1. CO THE POSSIBILITIES ARE INFINITE FUJITSU 130nm node CMOS Process CS90A Technology Code CS90A Transistor UHS HS ST LL Physical Gate Length nm 110 110 110 110 Gate Oxide Thickness nm 2 9 2 9 2 9 2 9 Supply Voltage V lez 2 lez 1 2 NMOS Ids A um 780 678 570 390 PMOS Ids yA um 321 2 6 218 150 NMOS loff nA um 36 4 0 18 0 005 pe atm PMOS loff nA um Te S m2 0 015 m Mie plant Gate Leak Current nA um 0 01 0 01 0 01 0 01 Basic Gate Delay ps 14 17 28 45 Number of Available Poly Layer 1 Number of Available Metal Layer 8Cu 1Al Via Filling Cu Dual Damascene ILD Structure Hybrid Low k SRAM Cell Size um2 1 98 Dual Gate Oxide Options Available Mixed Signal Options Available RF Elements MIM cap Poly Resistor Inductor Fuse RAM Redundancy Technology Roadmap RER Sie e LL sa mrmescor For com amp COT Physical Gate Length nm i 10 1998 2000 2002 2004 2006 2008 2010 2012 Year Production Start 130nm node CMOS Process CS90A Transistor Cell Size 1 98um2 1 2um x 1 65um 2nd Generation SRAM Interconnect Ma aii a e Global Metal 777 AL Fuse amp Pad A Semi Global Metal Thick Cu SiO2 Pitch 0 6um Intermediate Metal Thin Cu SiLK Pitch 0 4um FUJITSU MICROELECTRONICS AMERICA INC corporate ii i 2003 Fujitsu Microelectronics America Inc 1230 E Arques Ave Sunnyvale CA 94088 3470 All company and product names are tradema2. rks or Tel 800 866 8608 Fax 408 737 5999 registered trademarks of their respective owners E mail inquiry fma fujitsu com Web Site http www fma fujitsu com Printed in the U S A WFS FS 20983 7 2003
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