Analog Devices SSM2166 User's Manual
Contents
1. 70 60 50 40 30 2 10 0 INPUT dBu Figure 1 SSM2166 Compression and Gating Characteris tics with 10 dB of Fixed Gain The Gain Adjust Pin Can Be Used to Vary This Fixed Gain Amount 10kF V 13 E rd Vour A2 ADJ 500kQ NOISE GATE SET 17KQ ROTATION POINT SET One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A Tel 781 329 4700 World Wide Web Site http www analog com Fax 781 326 8703 Analog Devices Inc 1999 SSM2166 SPECIFICATIONS 17 5 asco e nue c oe iy Parameter Symbol Conditions Min Typ Max Units AUDIO SIGNAL PATH Voltage Noise Density en 15 1 Compression 17 nV VHz Noise 20 kHz Bandwidth Vy GND 109 dBu Total Harmonic Distortion THD N 2nd and 3rd Harmonics Vy 20 dBu 0 25 0 5 22 kHz Low Pass Filter Input Impedance Zin 180 KQ Output Impedance ZouT 75 Q Load Drive Resistive 5 KQ Capacitive 2 nF Buffer Input Voltage Range 1 THD 1 V rms Output Voltage Range 1 THD 1 V rms VCA Input Voltage Range 1 THD 1 V rms Output Voltage Range 1 THD 1 4 V rms Gain Bandwidth Product 1 1 Compression VCA G 60 dB 30 MHz CONTROL SECTION VCA Dynamic Gain Range 60 dB VCA Fixed Gain Range 60 to 19 dB Compression Ratio Min 1 1 Compression Ratio Max See Figure 5 for Rcomp Rrotr 15 1 Control Feedthrough 15 1 Compression Rotation Point 10 dBu t5 mV POWER SUPPLY Supply Voltage Range Vs 4 5 5 5 V Supply Current Isv 7 5 10 mA2. N 14 SO 14 0 795 20 19 a 0 3444 8 75 0 725 18 42 93967 058 j 9 280 11 pigra ta o0 1 0 2440 6 20 0 240 6 10 AL B inae beri A Ld EET 1 PP 0 1497 320 7 02284 6 80 PIN 1 0 060 1 52 0 115 2 93 V UBEELH 0 210 5 33 0 015 0 38 t PIN 1 0 0688 1 75 400196 0 50 MAX s H IA IA UA UA 9 cw 0 130 0 0098 0 25 0 0532 1 35 0 0099 0 25 0 160 4 06 3 30 a 0 0040 0 10 0 115 2 93 eie gt He R EN 0 015 0 381 Sere 0 022 0 558 0 100 0 070 1 77 0 008 0 204 M DR t 8 WL 0 014 0 356 2 54 0 045 1 15 PLANE 0 0500 0 0192 0 49 0 mE 1 15 SEATING a 2n 0 0138 0 35 0 0099 0 25 0 0500 1 27 0 0075 0 19 0 0160 0 41 REV A 15 C2143 0 6 99 PRINTED IN U S A
3. ping with the highest expected input peaks Always take the minimum gain in the buffer consistent with the average source level and crest factor ratio of peak to rms The wide program range of the SSM2166 makes it useful in many applications other than microphone signal conditioning Other Versions The SSM2165 is an 8 lead version of this microphone preamp with unity buffer gain and preset noise gate threshold Custom ized parts are available for large volume users For further in formation contact your sales representative 13 SSM2166 SSM2166 Demo Board Parts List 1 J1 J2 10k 10k 50k Pot 1k 0 100k Pot 1M Pot 1k 1k 20k Pot 330 100k 0 1 1 0 1 uF 2 2 22 0 01 10 10 SSM2166P OP113FP SPST 1 8 Mini Phone Plug RCA Female Feedback Input Rotation Point Adj Rotation Point Fixed Comp Ratio Fixed Comp Ratio Adj Noise Gate Adj Noise Gate Fixed Gain Adj Fixed Gain Adj Mute Power Down Pull Up Input DC Block Buffer Low f g 1 V Bypass Avg Cap Mute Click Suppress Coupling VCA Noise DC Balance Mic Preamp Op Amp Output Buffer Mute MIC Input Output Jack Note R values in kQ C values in pF Figure 28 Evaluation Board Parts List 14 REV A OUTLINE DIMENSIONS Dimensions shown in inches and mm 14 Lead Plastic DIP 14 Lead Narrow Body SOIC
4. Quiescent Output Voltage Level 2 2 V Power Supply Rejection Ratio PSRR 50 dB POWER DOWN Supply Current Pin 12 V 10 100 uA NOTES 10 dBu 0 775 V rms Normal operation Pin 12 0 V Specifications subject to change without notice ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE Supply Voltage 20 eiea aar a AE ET 10 V Audio Input Voltage 0 0000 Supply Voltage Temperature Package Package Operating Temperature Range 40 C to 85 C Model Range Description Option Storage Temperature Range 65 C to 150 C SSM2166P 40 C to 85 C Plastic DIP N 14 Junction Temperature Ty UCET aig 150 C SSM2166S 40 C to 85 C Narrow SOIC SO 14 Lead Temperature Soldering 60sec 300 C ESD RATINGS 883 Human Body Model sss 2 0 kV THERMAL CHARACTERISTICS Thermal Resistance 14 Lead Plastic DIP Bie cie uda Road det AN lote EATS 83 C W ducis m QU RE ME 39 C W 14 Lead SOIC AME MET EET m 120 C W E tt Red te EN 36 C W CAUTION accumulate on the human body and test equipment and can discharge without detection Although the SSM2166 features proprietary ESD protection circuitry permanent damage may Sept Athe occur on devices subjected to high energy electrostatic discharges Therefore proper ESD ESD SENSITIVE DEVICE precautions are recommended to avoid performance degradation or loss of functionality ESD electrostatic discharge sensitive
5. shown in Figure 13 Compression Ratio Changing the scaling of the control sig nal fed to the VCA causes a change in the circuit s compression ratio r This effect is shown in Figure 16 The compression ratio can be set by connecting a resistor between the COMP RATIO pin Pin 10 and GND Lowering Rcomp gives smaller compression ratios as indicated in Figure 5 with values of about 17 kQ or less resulting in a compression ratio of 1 1 AGC per formance is achieved with compression ratios between 2 1 and 15 1 and is dependent on the application A 100 kQ potentiom eter may be used to allow this parameter to be adjusted On the evaluation board Figure 22 an optional resistor can be used to set the compression equal to 1 1 when the wiper of the potenti ometer is at its full CCW position OUTPUT dB INPUT dB Figure 16 Effect of Varying the Compression Ratio Rotation Point An internal dc reference voltage in the control circuitry used to set the rotation point is user specified as il lustrated in Figure 9 The effect on rotation point is shown in Figure 17 By varying a resistor Rgor pr connected between the positive supply and the ROTATION POINT SET pin Pin 11 the rotation point may be varied from approximately 20 mV rms to 1 V rms From the figure the rotation point is inversely propor tional to Raor pr For example a 1 KQ resistor would typically set the rotation point at 1 V rms whereas a 55 k
6. STEP 8 Listening At this time you may want to connect an electret microphone to the SSM2166 and listen to the results Be sure to include the proper power for the microphone s internal FET usually 2 V to 5 V dc through a 2 2 kQ resistor Experiment with the settings to hear how the results change Varying the averaging capacitor C4 changes the attack and decay times which are best determined empirically Compression ratio will keep the output steady over a range of microphone to speaker distance and the noise gate will keep the background sounds subdued REV A STEP 9 Record Values With the power removed from the test fixture measure and record the values of all potentiometers including any fixed resis tance in series with them If you have changed the averaging capacitor C4 note its value too SUMMARY We have implemented the transfer condition of Figure 2 For inputs below the 100 uV noise gate threshold circuit and back ground noise will be minimized Above it the output will in crease at a rate of 1 dB for each 2 dB input increase until the 500 mV rotation point is reached at an input of approximately 15 mV For higher inputs that would drive the output beyond 500 mV limiting will occur and there will be little further in crease The SSM2166 processes the output of the buffer which in our example is 20 dB or ten times the input level Use the os cilloscope to ensure that you are not driving the buffer into clip
7. Vin 77 5mV rms 1kHz COMPRESSION RATIO 1 1 NOISE GATE SETTING 5504V rms ROTATION POINT 1V rms GAIN ADJUST PIN 2 1 2kQ MEASUREMENT FILTER BW 22Hz TO 30kHz 20 100 1k FREQUENCY Hz Figure 8 THD N 96 vs Frequency Hz REV A 1 0 a E O E S S S 10 TA 25 C Rcomp 0 V 5V _20 L Raan 1 24kQ Ry 100kQ Reate 500kQ M COMPRESSION RATIO 1 1 Sag Rror 1 740 E NOISE GATE SETTING 5504V rms gt GAIN ADJUST PIN 2 1 25k0 I am V 541V p p Tr o 40 z 1 y Oo 0 1 cc z 50 X E V 5 0 5V p p 5 60 rs 70 0 01 80 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 20 100 1k 10k 30k Rnor pt RESISTOR kQ FREQUENCY Hz Figure 9 Rotation Point vs Rgorpr Pin 11 to V Figure 10c PSRR vs Frequency 19 Ta 25 C SYSTEM GAIN 0dB 0 COMPRESSION RATIO RL 10kO NOISE BW 20kHz COMP RATIO 1 1 Figure 10a Wideband Output Noise Figure 11 Small Signal Transient Response 70 G 60dB 60 50 G 40dB 40 S 30 z G 20dB z 20 o 10 EN Caya 2 2uF ROTATION POINT 1 13V rms SYSTEM GAIN 0dB 0 NOISE
8. a transistor may be used as shown in Figure 19 To avoid audible clicks when using this MUTE feature a capaci tor C5 in figure can be connected from pin 2 to GND The value of the capacitor is arbitrary and should be determined em pirically but a 0 01 F capacitor is a good starting value SSM2166 GAIN ADJUST 3300 C5 l NOTE ADDITIONAL CIRCUIT DETAILS OMITTED FOR CLARITY MUTE CLOSED SWITCH Figure 19 Details of SSM2166 Mute Option Downward Expansion Threshold The downward expan sion or noise gate threshold is determined via a second refer ence voltage internal to the control circuitry This second reference can be varied in the SSM2166 using a resistor Rats connected between the positive supply and the NOISE GATE SET pin Pin 9 of the SSM2166 The effect of varying this threshold is shown in Figure 20 The downward expansion threshold may be set between 300 uV rms and 20 mV rms by varying the resistance value between Pin 9 and the supply volt age Like the ROTATION PT ADJUST the downward expan sion threshold is inversely proportional to the value of this resistance setting this resistance to 1 MO sets the threshold at approximately 250 uV rms whereas a 10 kQ resistance sets the threshold at approximately 20 mV rms This relationship is illustrated in Figure 4 A potentiometer network is provided on the evaluation board for this adjustment In general the down ward expansion threshold should be set
9. at the lower extreme of the desired range of the input signals so that signals below this level will be attenuated OUTPUT dB Vpe2 VpEi 7 VDE3 Vi INPUT dB Figure 20 Effect of Varying the Downward Expansion Noise Gate Threshold REV A 9 Power Down Feature The supply current of the SSM2166 can reduced to under 100 uA by applying an active HIGH 5 V CMOS compatible input to the SSM2166 s POWER DOWN pin Pin 12 In this state the input and output circuitry of the SSM2166 will assume a high impedance state as such the potentials at the input pin and the output pin will be determined by the external circuitry connected to the SSM2166 The SSM2166 takes approximately 200 ms to settle from a POWER DOWN to POWER ON com mand For POWER ON to POWER DOWN the SSM2166 requires more time typically less than 1 s Cycling the power supply to the SSM2166 can result in quicker settling times the off to on settling time of the SSM2166 is less than 200 ms while the on to off settling time is less than 1 ms In either implementation transients may appear at the output of the de vice In order to avoid these output transients MUTE control of the VCA s gain as previously mentioned should be used PC Board Layout Considerations Since the SSM2166 is capable of wide bandwidth operation and can be configured for as much as 80 dB of gain special care must be exercised in the layout of the PC board which
10. pin can be used for differential inputs or for the elimination of grounding problems by connecting a capacitor whose value equals that used in series with the VCAp pin to ground See Figure 22 SSM2166 Evaluation Board for more details The output impedance of the SSM2166 is typically less that 75 Q and the external load on Pin 13 should be gt 5 kQ The nominal output dc voltage of the device is approximately 2 2 V Use a blocking capacitor for grounded loads The bandwidth of the SSM2166 is quite wide at all gain set tings The upper 3 dB point is approximately 30 kHz at gains as high as 60 dB using the input buffer for additional gain circuit REV A BUFFER ru LEVEL ru AVG aoe Cava V 2 2uF GND i SSM2166 COMPRESSION anne SET Rcomp OPTIONAL Figure 14 Functional Block Diagram and Typical Application bandwidth is unaffected The GBW plots are shown in Figure 10b The lower 3 dB cutoff frequency of the SSM2166 is set by the input impedance of the VCA 1 kQ and C6 While the noise of the input buffer is fixed the input referred noise of the VCA is a function of gain The VCA input noise is designed to be a minimum when the gain is at a maximum thereby optimiz ing the usable dynamic range of the part A photograph of the SSM2166 s wideband peak to peak output noise is illustrated in Figure 10b The Level Detector The SSM2166 incorporates a full wave rectifier and a patent pending tru
11. simulate the microphone levels The input volt meter could be connected before the pad and need only go down to 10 mV The output voltmeter should go up to 2 volts The oscilloscope is used to verify that the output is sinusoidal that no clipping is occurring in the buffer and to set the limiting and noise gating knees OSCILLOSCOPE AC AC VOLTMETER VOLTMETER SSM2166 EVALUATION BOARD SIGNAL GENERATOR Figure 26 Test Equipment Setup STEP 1 Configure the Buffer The SSM2166 has an input buffer that may be used when the overall gain required exceeds 20 dB the maximum user selectable gain of the VCA In our example the desired output is 500 mV for an input around 15 mV requiring a total gain of 30 dB We will set the buffer gain at 20 dB and adjust VCA for 10 dB In the socket pins provided on the evaluation board Insert R1 100 kQ and R2 11 kQ You have set the buffer gain to 20 dB x10 STEP 2 Initialize Potentiometers With power off preset the potentiometers per the table of Fig ure 27 below INITIAL INITIAL FUNCTION RANGE POSITION RESISTANCE EFFECT OF CHANGE GAIN ADJUST 0 dB CW TO INCREASE VCA VCA GAIN ROTATION 1 V CW TO REDUCE POINT ROTATION POINT COMPRESSION 1 1 CW TO INCREASE RATIO COMPRESSION NOISE GATE 300 uV CCW TO INCREASE THRESHOLD Figure 27 Initial Potentiometer Settings STEP 3 Test Setup With power on adjust the generator for an input l
12. ANALOG DEVICES Microphone Preamplifier with Variable Compression and Noise Gating SSM2166 FEATURES Complete Microphone Conditioner in a 14 Lead Package Single 5 V Operation Adjustable Noise Gate Threshold Compression Ratio Set by External Resistor Automatic Limiting Feature Prevents ADC Overload Adjustable Release Time Low Noise and Distortion Power Down Feature 20 kHz Bandwidth 1 dB Low Cost APPLICATIONS Microphone Preamplifier Processor Computer Sound Cards Public Address Paging Systems Communication Headsets Telephone Conferencing Guitar Sustain Effects Generator Computerized Voice Recognition Surveillance Systems Karaoke and DJ Mixers GENERAL DESCRIPTION The SSM2166 integrates a complete and flexible solution for conditioning microphone inputs in computer audio systems It is also excellent for improving vocal clarity in communications and public address systems A low noise voltage controlled amplifier VCA provides a gain that is dynamically adjusted by a control loop to maintain a set compression characteristic The compression ratio is set by a single resistor and can be varied from 1 1 to over 15 1 relative to a user defined rotation point signals above the rotation point are limited to prevent overload and eliminate popping In the 1 1 compression set ting the SSM2166 can be programmed with a fixed gain of up to R1 10kO pic AVG Patents pending REV A In
13. GATE SETTING 336p V rms R 10kQ Rcomp 40kQ COMP RATIO 1 1 10 F Vin 4004V rms 20 1k 10k 100k 1M FREQUENCY Hz Figure 10b GBW Curves vs VCA Gain Figure 12 Large Signal Transient Response REV A 5 SSM2166 APPLICATIONS INFORMATION The SSM2166 is a complete microphone signal conditioning system on a single integrated circuit Designed primarily for voiceband applications this integrated circuit provides amplifi cation rms detection limiting variable compression and down ward expansion An integral voltage controlled amplifier VCA provides up to 60 dB of gain in the signal path with approxi mately 30 kHz bandwidth Additional gain is provided by an input buffer op amp circuit that can be set anywhere from 0 dB to 20 dB for a total signal path gain of up to 80 dB The device operates on a single 5 V supply accepts input signals up to 1 V rms and produces output signal levels gt 1 V rms 3 V p p into loads gt 5 kO The internal rms detector has a time con stant set by an external capacitor The SSM2166 contains an input buffer and automatic gain con trol AGC circuit for audio and voiceband signals Circuit operation is optimized by providing a user adjustable time con stant and compression ratio A downward expansion noise gat ing feature eliminates circuit noise in the absence of an input signal The SSM2166 allows the user to set the downward ex pansion threshold the limiting threshold rot
14. OP113 can be used To use the OP113 buffer insert Jumper J4 into board socket pins labeled 4 and 5 and insert Jumper J5 into board socket pins labeled 6 and 7 If the output buffer is not required re move Jumper J5 and insert Jumper J4 into board socket pins 5 and 7 There are no blocking capacitors either on the input nor at the output of the buffer As a result the output dc level of the buffer will match the output dc level of the SSM2166 which is approximately 2 3 V A dc blocking capacitor may be inserted on Pins 6 and 7 An evaluation board and setup proce dure is available from your Analog Devices representative Setup Procedure with Evaluation Board To illustrate how easy it is to program the SSM2166 we will take a practical example The SSM2166 will be used interface an electret type microphone to a post amplifier You can use the evaluation board or the circuit configuration shown in Figure 22 The signal from the microphone was measured under actual conditions to vary from 1 mV to 15 mV The post amplifier requires no more than 500 mV at its input The required gain from the SSM2166 is therefore Gror 20 x log 500 15 30 dB We will set the input buffer gain to 20 dB and adjust the VCA gain to 10 dB The limiting or rotation point will be set at 500 mV output From prior experience we will start with a 2 1 compression ratio and a noise gate threshold that operates be low 100 u
15. Q resistor would typically set the rotation point at approximately 30 mV rms Since limiting occurs for signals larger than the rotation point Vin gt Vrp the rotation point effectively sets the maximum output signal level It is recommended that the rotation point be set at the upper extreme of the range of typical input signals so that the compression region will cover the entire desired in put signal range Occasional larger signal transients will then be attenuated by the action of the limiter VCA GAIN OUTPUT dB Vapi VRP2 VnPs INPUT dB Figure 17 Effect of Varying the Rotation Point VCA Gain Setting and Muting The maximum gain of the SSM2166 is set by the GAIN ADJUST pin Pin 2 via Ream This resistor with a range between 1 kQ and 20 kQ will cause the nominal VCA gain to vary from 0 dB to approximately 20 dB respectively To set the VCA gain to its maximum can also be achieved by leaving the GAIN ADJUST pin in an OPEN condition no connect Figure 18 illustrates the effect on the transfer characteristic by varying this parameter For low level signal sources the VCA should be set to maximum gain using a 20 kQ resistor OUTPUT dB INPUT dB Figure 18 Effect of Varying the VCA Gain Setting REV A The gain of the VCA can be reduced below 0 dB by making Rea smaller than 1 kQ Switching Pin 2 through 330 Q or less to ground will mute the output Either a switch connected to ground or
16. V These objectives are summarized in Figure 24 and we will fine tune them later on The transfer characteristic we will implement is illustrated in Figure 25 INPUT RANGE 1 15 mV OUTPUT RANGE LIMITING LEVEL COMPRESSION BUFFER GAIN VCA GAIN Figure 24 Objective Specifications Note the SSM2166 processes the output of the buffer which in our example is 20 dB or ten times the input level Use the oscil loscope to verify that you are not driving the buffer into clipping with excessive input signals In your application you should take the minimum gain in the buffer consistent with the average source level as well as the crest factor ratio of peak to rms ROTATION POINT i LIMITING REGION 500 COMPRESSION REGION 1 OUTPUT mV 40 X GATE THRESHOLD 0 1 1 0 10 15 INPUT mV Figure 25 Transfer Characteristic 12 Evaluation Board If you build your own breadboard keep the leads to Pins 3 4 and 5 short A convenient evaluation board is available from your sales representative The R and C designations refer to the demonstration board schematic of Figure 22 and parts list Figure 28 Test Equipment Setup The recommended equipment and configuration is shown in Figure 26 A low noise audio generator with a smooth output adjustment range of 50 uV to 50 mV is a suitable signal source A 40 dB pad would be useful to reduce the level of most genera tors by 100x to
17. atio and is the nomi nal gain of the system The nominal gain of the system may be increased by the user via the onboard VCA by up to 20 dB Ad ditionally the input buffer of the SSM2166 can be configured to provide fixed gains of 0 dB to 20 dB with R1 and R2 Input signals below Vpg are downward expanded that is a 1 dB change in the input signal level causes approximately a 3 dB change in the output level As a result the gain of the system is small for very small input signal levels even though it may be quite large for small input signals above of Vpg The downward expansion threshold Vpg is set externally by the user via Rgatr at Pin 9 NOISE GATE Finally the SSM2166 provides an active HIGH CMOS compatible digital input whereby a power down feature will reduce device supply current to less than 100 pA LIMITING LIMITING REGION THRESHOLD ROTATION POINT DOWNWARD COMPRESSION EXPANSION REGION THRESHOLD NOISE GATE pon VCA GAIN 4 4 OUTPUT dB DOWNWARD EXPANSION REGION INPUT dB Figure 13 General Input Output Characteristics of the SSM2166 The SSM2166 Signal Path Figure 14 illustrates the block diagram of the SSM2166 The audio input signal is processed by the input buffer and then by the VCA The input buffer presents an input impedance of approximately 180 kQ to the source A dc voltage of approxi mately 1 5 V is present at AUDIO IN Pin 7 of the SSM2166
18. ation point input buffer fixed gain and the internal VCA s nominal gain at the ro tation point The SSM2166 also features a power down mode and muting capability Theory of Operation Figure 13 illustrates a typical transfer characteristic for the SSM2166 where the output level in dB is plotted as a func tion of the input level in dB The dotted line indicates the transfer characteristic for a unity gain amplifier For input signals in the range of Vpg Downward Expansion to Vgp Rotation Point an r dB change in the input level causes a 1 dB change in the output level Here r is defined as the compression ratio The compression ratio may be varied from 1 1 no compression to over 15 1 via a single resistor Rcowr Input signals above Vgp are compressed with a fixed compression ratio of approximately 15 1 This region of opera tion is the limiting region Varying the compression ratio has no effect on the limiting region The breakpoint between the compression region and the limiting region is referred to as the limiting threshold or the rotation point and is user specified in the SSM2166 The term rotation point derives from the observation that the straight line in the compression region rotates about this point on the input output characteristic as the compression ratio is changed The gain of the system with an input signal level of Vg is fixed by Ream regardless of the compression r
19. contains the IC and its associated components The following applica tions hints should be considered and or followed 1 In some high system gain applications the shielding of in put wires to minimize possible feedback from the output of the SSM2166 back to the input circuit may be necessary 2 A single point star ground implementation is recom mended in addition to maintaining short lead lengths and PC board runs The evaluation board layout shown in Figure 23 for the SSM2166 demonstrates the single point grounding scheme In applications where an analog ground and a digital ground are available the SSM2166 and its surrounding circuitry should be connected to the system s analog ground As a result of these recommendations wire wrap board connections and grounding implementations are to be explicitly avoided 3 The internal buffer of the SSM2166 was designed to drive only the input of the internal VCA and its own feedback net work Stray capacitive loading to ground from the BUFoyr pin in excess of 5 pF to 10 pF can cause excessive phase shift and can lead to circuit instability 4 When using high impedance sources 2 5 kQ system gains in excess of 60 dB are not recommended This configuration is rarely appropriate as virtually all high impedance inputs provide larger amplitude signals that do not require as much amplifica tion When using high impedance sources however it can be advantageous to shunt the source w
20. device Electrostatic charges as high as 4000 V readily WARNING 2 REV A PIN DESCRIPTION Pin Mnemonic Function 10 11 12 13 14 GND GAIN ADJUST VCAm VCAR BUF OUT IN AUDIO IN AVG CAP NOISE GATE SET COMP RATIO SET ROTATION SET POWER DOWN OUTPUT V Ground VCA Gain Adjust Pin A resistor from this pin to ground sets the fixed gain of the VCA To check the setting of this pin the compression pin Pin 10 should be grounded for no com pression The gain can be varied from 0 dB to 20 dB For 20 dB leave the pin open For 0 dB of fixed gain a typical resistor value is approximately 1 KQ For 10 dB of fixed gain the resistor value is approximately 2 kKQ 3 kQ For resistor values lt 1 KQ the VCA can attenu ate or mute Refer to Figure 6 VCA Input Pin A typical connection is a 10 uF capacitor from the buffer output pin Pin 5 to this pin Inverting Input to the VCA This input can be used as a nonground reference for the audio input signal see application notes Input Buffer Amplifier Output Pin Must not be loaded by capacitance to ground Inverting Input to the Buffer A 10 kQ feedback resistor R1 from the buffer output Pin 5 to this input pin and a resistor R2 from this pin through a 1 uF to ground gives gains of 6 dB to 20 dB for R2 10 kQ to 1 1 kQ Input Audio Signal The input signal should be ac coupled 0 1 uF typical into this pin Detector Averag
21. e rms level detector circuit whose averaging time constant is set by an external capacitor connected to the AVG CAP pin Pin 8 For optimal low frequency operation of the level detector down to 10 Hz the value of the capacitor should be 2 2 uF Some experimentation with larger values for the AVG CAP may be necessary to reduce the effects of excessive low frequency ambient background noise The value of the aver aging capacitor affects sound quality too small a value for this capacitor may cause a pumping effect for some signals while too large a value can result in slow response times to signal dy namics Electrolytic capacitors are recommended here for low est cost and should be in the range of 2 uF to 47 uF Capacitor values from 18 uF to 22 UF have been found to be more appro priate in voiceband applications where capacitors on the low end of the range seem more appropriate for music program material The rms detector filter time constant is approximately given by 10 CaAyga milliseconds where Cayg is in uF This time constant controls both the steady state averaging in the rms detector as well as the release time for compression that is the time it takes for the system gain to react when a large input is followed by a REV A 7 small signal The attack time the time it takes for the gain to be reduced when a small signal is followed by a large signal is con trolled partly by the AVG CAP value but is mainly controlled by
22. evel of 15 mV 1 kHz The output meter should indicate approximately 100 mV If not check your setup STEP 4 Adjusting the VCA Gain Set the input level to 15 mV Adjust R10 GAIN ADJ CW for an output level of 500 mV You have now set the VCA gain to 10 dB REV A STEP 5 Adjusting the Rotation Point Set the input level to 15 mV and observe the output on the os cilloscope Adjust R3 ROTATION PT ADJ CW until the output level just begins to drop then reverse so that the output is 500 mV You have now set the limiting to 500 mV STEP 6 Adjusting the Compression Ratio Set the input signal for an output of 500 mV but not in limiting Note the value around 15 mV Next reduce the input to 1 10 the value noted around 1 5 mV for a change of 20 dB Next adjust RR COMP RATIO CW until the output is 160 mV for an output change of 10 dB You have now set the compression which is the ratio of output change to input change in dB to 2 1 STEP 7 Setting the Noise Gate With the input set at 100 uV observe the output on the oscillo scope and adjust R7I ROT PT SET CCW until the output drops rapidly Rock the control back and forth to find the knee You have set the noise gate to 100 uV The range of the noise gate is from 0 3 mV to over 0 5 mV relative to the out put of the buffer To fit this range to your application you may have to attenuate the input or apportion the buffer gain and VCA gain differently
23. formation furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights of third parties which may result from its use No license is granted by implication or otherwise under any patent or patent rights of Analog Devices CAP 22uF Figure 2 Functional Block Diagram and Typical Speech Application 20 dB this gain is in addition to the variable gain in other com pression settings The input buffer can also be configured for front end gains of 0 dB to 20 dB A downward expander noise gate prevents amplification of noise or hum This results in opti mized signal levels prior to digitization thereby eliminating the need for additional gain or attenuation in the digital domain that could add noise or impair accuracy of speech recognition algorithms The compression ratio and time constants are set externally A high degree of flexibility is provided by the VCA Gain Rotation Point and Noise Gate adjustment pins The SSM2166 is an ideal companion product for audio codecs used in computer systems such as the AD1845 and AD1847 The device is available in 14 lead SOIC and P DIP packages and guaranteed for operation over the extended industrial tempera ture range of 40 C to 85 C For similar features performance in an 8 lead package please refer to the SSM2165 OUTPUT dBu
24. ignal Sources 22 As a design aid the layouts for the topside silkscreen topside and backside metallization layers are shown in Figures 23a b and c Although not shown to scale the finished dimen sion of the evaluation board is 3 5 inches by 3 5 inches and comes complete with pin sockets and a sample of the SSM2166 ROTATION ce PT ADJ R1 10pF R4 R3 1kQ 50kQ BUF out VCAw ROTPT NOISE POWER ADJ GATE DN ADJ SSM2166 R2 GAIN 10kQ INPUT VCAR ADJUST OUTPUT C5 C7 c4 R9 0 01 p F Ge 10pF 224F ko COMP RATIO R10 20kO MUTE 2 GAIN cw SWITCH ADJ Figure 22 Evaluation Board 10 REV A ROTATION PT ADJ COMP RATIO NOISE GATE Figure 23a Evaluation Board Topside Silkscreen Not to Scale Figure 23b Evaluation Board Topside Metallization Not to Scale REV A Figure 23c Evaluation Board Backside Metallization Not to Scale Signal sources are connected to the SSM2166 through a 1 8 phone jack where a 0 1 UF capacitor couples the input signal to the SSM2166 s IN pin Pin 7 As shown in Figure 22 and in microphone applications the phone jack shield can be optionally connected to the board s ground plane Jumper J1 inserted into board socket pins labeled 1 and 2 or to the SSM2166 s VCAg input at Pin 4 Jumper J1 inserted into board socket pins labeled 1 and 3 If the signal source is a waveform or function generato
25. ing Capacitor A capacitor 2 2 uF 22 uF to ground from this pin is the averaging capacitor for the detector circuit Noise Gate Threshold Set Point A resistor to V sets the level below which input signals are downward expanded For a 0 7 mV threshold the resistor value is approximately 380 kQ Increasing the resistor value reduces the threshold See Figure 4 Compression Ratio Set Pin A resistor to ground from this pin sets the compression ratio as shown in Figure 1 Figure 5 gives resistor values for various rotation points Rotation Point Set Pin This is set by a resistor to the positive supply This resistor together with the gain adjust pin determines the onset of limiting A typical value for this resistor is 17K for a 100 mV rotation point Increasing the resistor value reduces the level at which limiting occurs Refer to Figure 9 Power Down Pin Connect to ground for normal operation Connect to positive supply for power down mode Output Signal Positive Supply 5 V Nominal REV A PIN CONFIGURATION GND 1 e 14 v GAIN ADJUST 2 13 OUTPUT vean ere 12 POWER DOWN VCAn 4 rop view 11 ROTATION SET BUF OUT 5 Not to Scale 10 COMP RATIO SET Nfe 9 NOISE GATE SET AUDIO IN 8 AVG CAP SSM2166 10 1 COMP RATIO 15 1 COMP RATIO 10 1 COMP RATIO 5 1 Ap COMP RATIO 2 1 OUTPUT dBu b eo 50 Ta 25 C V 5V Vin 300mvV rms 1
26. internal circuitry that speeds up the attack for large level changes This limits overload time to under 1 ms in most cases The performance of the rms level detector is illustrated in Fig ure 15 for a Cava of 2 2 uF Figure 15a and 22 uF Figure 15b In each of these photographs the input signal to the SSM2166 not shown is a series of tone bursts in 6 successive 10 dB steps The tone bursts range from 66 dBV 0 5 mV rms to 6 dBV 0 5 V rms As illustrated in the photographs the attack time of the rms level detector is dependent only on Cavo but the release times are linear ramps whose decay times are dependent on both Cayo and the input signal step size The rate of release is approximately 240 dB s for a Cay of 2 2 UF and 12 dB s for a Cayg of 22 UF Figure 15a RMS Level Detector Performance with Cave 2 2 uF SSM2166 Figure 15b RMS Level Detector Performance with Cave 22 uF Control Circuitry The output of the rms level detector is a signal proportional to the log of the true rms value of the buffer output with an added dc offset The control circuitry subtracts a dc voltage from this signal scales it and sends the result to the VCA to control the gain The VCA s gain control is logarithmic a linear change in control signal causes a dB change in gain It is this control law that allows linear processing of the log rms signal to provide the flat compression characteristic on the input output characteristic
27. ith a capacitor to ground at the input pin of the IC Pin 7 to lower the source impedance at high frequencies as shown in Figure 21 A capacitor with a value of 1000 pF is a good starting value and sets a low pass corner at 31 kHz for 5 kQ sources In those applications where the source ground is not as clean as would be desirable a capacitor illus trated as C7 on the evaluation board from the VCAg input to the source ground might prove beneficial This capacitor is used in addition to the grounded capacitor illustrated as C2 on the evaluation board used in the feedback around the buffer assuming that the buffer is configured for gain SSM2166 The value of the C7 should be the same as C6 the capacitor value used between BUFour and VCAyy This connection makes the source ground noise appear as a common mode signal to the C1 0 1 pF RSS ON SIN VCA allowing the common mode noise to be rejected by the Cx SSM2166 VCA s differential input circuitry C7 can also be useful in 1000pF j T reducing ground loop problems and in reducing noise coupling T from the power supply by balancing the impedances connected to the inputs of the internal VCA NOTE ADDITIONAL CIRCUIT DETAILS OMITTED FOR CLARITY SSM2166 Evaluation Board 2 I f A schematic diagram of the SSM2166 evaluation board avail Figure 21 Circuit Configuration for Use with High able upon request from Analog Devices is illustrated in Figure Impedance S
28. kHz 60 R 100kQ NOISE GATE SETTING 550uV rms ROTATION POINT 300mV rms 70 COMP RATIO 1 1 GAIN ADJUST PIN 2 1 25k0 80 80 70 60 50 40 30 20 10 0 INPUT dBu Figure 3 Output 100 o NOISE GATE mV rms vs Input Characteristics Ta 25 C V 5V Ry 100kQ COMPRESSION RATIO 2 1 ROTATION POINT 1V rms GAIN ADJUST PIN 2 1 25kO 0 1 0 50 100 150 200 250 300 350 400 450 500 550 600 650 Reate KO Figure 4 Noise Gate vs Rare Pin 9 to V COMPRESSION RATIO ROTATION POINT 100mV rms 300mV rms 1V rms Rcomp Figure 5 Compression kQ TYPICAL Ratio vs Rcomp Pin 10 to GND GAIN dB THD N THD N TA 25 C V 5V RL 100k2 Vin 100mV rms 1kHz NOISE GATE SETTING 550pV rms ROTATION POINT PIN 11 1V rms COMPRESSION RATIO 1 1 0 2 4 6 8 GAIN ADJUST RESISTOR kQ 10 12 14 16 18 20 22 24 26 28 30 Figure 6 VCA Gain vs Regain Pin 2 to GND 0 1 0 05 Ta 25 C V 5V COMPRESSION RATIO 1 1 NOISE GATE SETTING 550x V rms ROTATION POINT 1V rms GAIN ADJUST PIN 2 1 25kQ Vin FREQUENCY 1kHz RL 10k RL 100k2 0 01 0 1 INPUT VOLTAGE V rms Figure 7 THD N 96 vs Input V rms Ty 25 C V 5V
29. r the phone jack shield is to be connected to ground For ease in making adjustments for all of the SSM2166 s con figuration parameters single turn potentiometers are used throughout Optional Jumper J2 connects the COMP RATIO pin to ground and sets the SSM2166 for no compression that is compression ratio 1 1 Optional Jumper J3 connects the SSM2166 s POWER DOWN input to ground for normal opera tion Jumper J3 can be replaced by an open drain logic buffer for a digitally controlled shutdown function An output signal MUTE function can be implemented on the SSM2166 by con necting the GAIN ADJUST pin Pin 2 through a 330 Q resis tance to ground This is provided on the evaluation board via R11 and S1 A capacitor C5 connected between Pin 2 and ground and provided on the evaluation board can be used to avoid audible clicks when using the MUTE function To configure the SSM2166 s input buffer for gain provisions for R1 R2 and C2 have been included To configure the input buffer for unity gain operation R1 and R2 are removed and a direct connection is made between the IN pin Pin 6 and the BUFour pin Pin 5 of the SSM2166 The output stage of the SSM2166 is capable of driving gt 1 V rms 3 V p p into gt 5 kQ loads and is externally available through an RCA phono jack provided on the board If the out put of the SSM2166 is required to drive a lower load resistance SSM2166 or an audio cable then the onboard
30. requiring the use of a blocking capacitor C1 for ground referenced sources A 0 1 uF capacitor is a good choice for most audio applications The input buffer is a unity gain stable ampli fier that can drive the low impedance input of the VCA The VCA is a low distortion variable gain amplifier whose gain is set by the side chain control circuitry The input to the VCA is a virtual ground in series with approximately 1 kO An exter nal blocking capacitor C6 must be used between the buffer s output and the VCA input The 1 kO impedance between am plifiers determines the value of this capacitor which is typically between 4 7 uF and 10 uF An aluminum electrolytic capacitor is an economical choice The VCA amplifies the input signal current flowing through C6 and converts this current to a volt age at the SSM2166 s output pin Pin 13 The net gain from input to output can be as high as 60 dB without additional buffer gain depending on the gain set by the control circuitry The gain of the VCA at the rotation point is set by the value of a resistor connected between Pin 2 and GND Ream The rela tionship between the VCA gain and Rgarm is shown in Figure 6 The AGC range of the SSM2166 can be as high as 60 dB The VCAy pin Pin 3 on the SSM2166 is the noninverting input terminal to the VCA The inverting input of the VCA is also available on the SSM2166 s Pin 4 VCAg and exhibits an input impedance of 1 kO as well As a result this
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