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Analog Devices ADSP-21364 User's Manual

1. A B C D All USB interface circuitry is considered proprietary and has EXPANSION INTERFACE TYPE A been omitted from this schematic 1 2V_DSP 1 2V When designing vour JTAG interface please refer to the Le Les R 1 Engineer to Engineer Note EE 68 which can be found at 3 3V O http www analog com L ADJO b 3V 2 23 R17 4 EE 4 e JTAG LI j Dow s 9 HEADER 8 AD 1 O Ee EMULATOR_SELECT 10 ap4 I ano TMS FO ITMS la pue i l E DA EMULATOR SELECT miri 14 s 7 3 4 EMULATOR EM SA EMULATOR ENU TCK L gt ITCK M10 T a TRST TRST I 16 WD 5 6 as DA_EMULATOR_TMS aoa Ra TDI TDI 18 DI e 7 B E DA EMULATOR TCK dei 20 ADIZ T l 9 10 EMULATOR TRST PA EMULATOR TRST TDg HDO EMU IEMU 22 eH 12 EMULATOR TDI i EMULATOR TOi EMU 24 e 3 jik mi el DA EMULATOR TDO DA GPOl E Ss Se DA GPil 28 PEI e i R
2. A B e D d o VALID DSP ADDRESS BANK END A23 A22 A21 BANK DEVICE START END ADDRESS OK u25 1A0 0000 X IFFFFFF 1 NONE T in 180 0000 X 19F FFFF 1 0 O Y4 EXPANSION INTERFACE CS 2 C cc vol gt IFTASEES 777 160 0000 X 17FFFFF o 1 1 Y3 EXPANSION INTERFACE CS 1 vit gt ISRAM CS 1400000 1400000 15FFFFF O 1 0 Y2 LEDs A 21 23 val gt EG 1200000 127 FFFF 18FFFFF 0 0 1 Y1 SRAM Ed val gt MEXPOST 1000000 10FFFFF 11FFFFF 0 o O YO FLASH SPI Flash vt gt EXP C82 1 OK TK 2Mb 10 0805 0805 Y5 U12 1 d HOLD vcc Jecn 5525 GND WE Bech so Be r MOS a Soe AD i SPI FLASH CS e cs No A i RESETI SWP GND M25P20 SOIC8 33v SRAM Flash 4Mb 512K x 8 bit 8Mb 1M x 8 bit U21 U15 U19 1 AD O T5 E Np e po A 8 23 DO LL AD B 5 I 45 ace A9 y D1 Zap 308 ATO D2 A ATI el D sq IAT i D4 as BET D y 16 IAM D6 D sal ATS p7 A 8 19 A 8 20 J TALE E vc 6 ncil E eu vw wll wl vw TSSOP20 WA noses wel wl KC EEN U18 we l l ie ATE Ge RESET 1 RESET LI b 20 A17 e AUT 7 308 AT8
3. A B D RI 301 0 1206 L VREF MIC OR MM JA FER7 TOME R136 R16 R21 CONO31 600 CABOS 11 0K 5 49K 5 49K fe i CENA 1206 1206 1206 1206 O 2 CET Cb e E E A C80 C89 3 C2 680PF 680PF 100PF 0805 0805 1206 e e l R18 6 US 237 0 AGND 1206 7 rem n Sd e e D gt TADCLN 1 CT i AUDIO VREF ADC gt gt U10 68UF ia AD8606ARZ e CAP003 SOIC8 1000PF 1 0805 jq R22 R19 l E 5 76K 5 76K La AQUTA RIGHT HPj FAMA 1206 1206 C12 EDS 100PF 1206 ces cos ADC LEFT Je 120PF 1000PF DAC A 2 1206 0805 E 207 DNP z HEADPHONE OUT er Ss e U10 68UF 4 CAP003 A 750 0K E i 1206 R20 7 5 KAAJA A 237 0 a 1 1206 E p AQUTA LEFT HEI i e e e E as ADSSG2ARZ r 4 3 AUDIO VREF ADCUI E KDBGOGARZ ae ak SOIC8 1206 1206 x ASV O AGND C84 10UF 0805 R2 301 0 1206 LL VREF MIC RUE JA FER6 UE R113 R7 R15 X CONO31 600 11 0K 5 49K 5 49K n MM TR 1206 CAP002 1206 1206 1206 AD8606 3 RRE gha g DI o Um MI WA MA C76 C81 3 C64 680PF 680PF 100PF 0805 0805 1206 A e M R14 2 U2 237 0 UA R5 ELECTRET MICROPHONE ENABLE SWITCH AGND z 1206 E SE EEN Default All OFF AGND ka e e E M E AUDIO VREF ADCI 3 ES a EEE o o D8606ARZ T AUDIO VREF ADCINM SOIC8 1000PF 0805 s W6 R10 R6 1 m 8 M
4. mm Binet S 499K pL AUDIO VREF DACH AAA 1208 L Sopr S 499K T 1206 1206 L 1206 1206 e e e e A5V A5V EA O AG D ANALOG 20 Coton Road L GARUF G22UF rr 0805 TJ 0805 Nashua NH 03063 DEVICES eu 1 800 anatoco Title ADSP 21364 EZ KIT Lite AD8606 AD8606 Size Board No A01 90 2004 Rev Date 5 18 2007 15 33 Sheet 5 11 A B C D A B C D e e R34 R28 5 49K C7 5 49K C5 1206 100PF 1206 100PF R52 R33 T 1206 R49 R27 T 1206 11 0K 3 32K 11 0K 3 32K 1206 0805 1206 0805 L oun ANNA NAM a L oun 9 AN AV AJA 9 N AV AV 9 C116 C118 830PF 830PF T 0805 6 T 0805 6 DAC3 LEFT DAC4 LEFT e 5 5 C107 C109 680PF 680PF R51 T 0805 R32 R48 T 0805 R26 R133 5 49K 1 65K 604 0 5 49K 1 65K 604 0 ee 1206 1206 1200 ors TN 1206 1206 1206 en o oupa ANA NAAA NN 10UF CONGR Lo oura ANNA MANNY 10UF CONGU ONES CAP002 EE CAP002 IAOUT3 LEFT 8 1 7 dads IAOUTA LEFT 11 1 gt ds e SSA mk d iAOUT4 LEFT HP 9 Mmmm mmm kd E I R144 SO R146 SO 2 74K C94 2 74K C96 1206 220PF g 1206 220PF 12 L T 1206 C72 R122 IT EECH T 1206 C74 R124 Lo AUDIO VREF DAC x 3200PF 49 9K a AUDIO_VREF_DAC E V VV 3200PF
5. 5 76K 5 76K C3 Wie MAN RIGHT 1206 1206 100PF 2 Mm 7 IAN LEFT 1206 P me eerta C83 1 AUDIO VREF AD Ijiii e 0 gy amp MIVREF MIC E i 0805 ADC RIGHT W 1 TICE DP AG D SWTO18 R13 WHEN USING AN ELECTRET MICROPHONE 237 0 PLACE ALL SWITCHES IN ON POSITION 1206 e gt IADORP i p 0805 ASV ASV ASV rh A TA Ne Ne ANA Ch l 20 Cotton Road C87 C77 C111 j 0 22UF 0 22UF 0 22UF E P I S Nashua NH 03063 JE V E PH 1 800 ANALOGD lt 7 Title ADSP 21364 EZ KIT Lite AGND NZ EES AUDIO OUT 3 AGND AGND AGND AD8532 AD8606 AD8606 E Board No A0190 2004 wiv Date 5 18 2007 15 33 Sheet 7 of 11 A B D R8 R9 J8 C1 SPDIF CONO12 0 01UF 100 0 Sa eS DE 1206 0805 COAX A i NPPSEEN 70073 INPUT d 74LVCU04AD 74LVCU04AD 1 SOIC14 SOIC14 R4 R125 100K 1206 1206 U3 5 6 74LVCU04AD SOIC14 U3 q gt 2 74LVCU04AD SOIC14 C21 R63 A J9 0 1UF 249 0 N012 U3 U3 0805 0805 Emm m eim siis EN S P D F AE DAIR SPDIF OUT ll 9 1 ye COAX e Se IA ALE Re ga 74LVCU04AD 74LVCU04AD OUT SOIC14 SOIC14 Sol HEADER FOR LOOPBACK TEST ONLV SG ANALOG coton os s s EE ne ARA Nashua NH 03063 Kaes SPDIF_COAX_IN Il P ISPDIF COAX OUT ___ DEVICES H 1 800 anatoap gt Title ADSP 21364 EZ KIT Lite 7ALVCUDA SPDIF CONNECTORS Size Board No Rev C A019
6. The CLKIN pin of the processor connects to a 24 576 MHz oscillator The core frequencv of the processor is derived bv multiplving the frequencv at the CLKIN pin bv a value determined bv the state of the processor pins CLKCFG1 and CLKCFGO The value at these pins is determined by the state of the SW10 switch see Boot Mode and Clock Ratio Select Switch SW10 on page 2 12 By default the EZ KIT Lite provides a core frequency of 147 456 MHz It is possible to increase the speed of the processor by changing the value of the PMCTL register The SW10 switch also configures the boot mode of the processor The EZ KIT Lite is capable of parallel port boot and SPI master boot By default the EZ KIT Lite boots from the parallel port For information about configuring the boot modes see Boot Mode and Clock Ratio Select Switch SW10 on page 2 12 Parallel Port The parallel port PP of the ADSP 21364 processor consists of a 16 bit multiplex address data memory bus AD15 0 and an address latch enable pin ALE The interface does not have anv memorv select pins these sig nals must be generated bv decoding the address The PP connections to the EZ KIT Lite are shown in Figure 2 2 The PP connects to an 8 bit parallel flash memorv an 8 bit SRAM memorv and eight general purpose LEDs The upper three address bits connect to a 3 to 8 decoder providing eight memory select pins See External Mem ory on page 1 7 for more information
7. S sample rates 1 8 schematic of this EZ KIT Lite B 1 serial peripheral interface See SPI setup of this EZ KIT Lite 1 3 signal routing units SRUs 1 9 2 5 S PDIF connectors J8 9 2 18 receivers 1 9 INDEX SPI connections 2 6 disable switch SW8 2 11 flash memory 1 7 2 6 2 7 header P2 2 19 master boot mode 2 3 2 12 port 1 8 1 9 slave boot mode 2 12 SRAM configuration 1 7 via parallel port 2 3 startup of this EZ KIT Lite 1 5 SW10 boot mode clock ratio switch 2 3 2 12 SW11 loop back test switch 2 13 SW1 2 FLAGI 2 push buttons 1 10 2 7 2 11 2 15 SW3 4 DAI19 20 push buttons 1 10 2 11 2 15 SW5 reset push button 2 15 SW6 microphone switch 1 9 2 9 SW7 AD1835A switch 2 10 SW8 SPI disable switch 2 6 2 11 SW9 push button enable DIP switch l 3 1 10 2 11 2 15 switches See also switches by name SWx diagram of locations 2 9 synchronous random access memory See SRAM SYSCTL register 1 8 1 11 system architecture of this EZ KIT Lite 2 2 T time division multiplexed TDM mode 1 8 two wire interface TWI mode 1 8 U U24 LED latch 2 11 ADSP 21364 EZ KIT Lite Evaluation System Manual l 3 INDEX USB cable l 3 2 14 connector ZJ1 2 19 interface 2 8 2 20 monitor LED ZLED3 2 14 V VisualDSP documentation xix environment 1 5 online Help xix voltage planes 2 2 W WE signals 2 11 l 4 ADSP 21364 EZ KIT Lite Evaluation S
8. a a SETTA 5 4 o GE VDD2 VCC1 P 12 T vcc290 i oe D 5Q miner im E 12 ADT E sat AZ L SRAM_CS CE GND1 ADTA N MT BEI L RD ee opd a L FLASH CS il SC r DTS d M BE LWE ug L RO Zoe vssiP cd reu Seel Du ver A IS6TL T ALE E il LE w TSOP44 AMZ9LVOBT B TSSOP20 KSE 3 3V 3 3V 33V KN 33V 33V Q Q ANALOG 9e fox Nashua NH 03063 As le e eS L ili fa e e le DEVICES ru 1 800 anaLoGD 7T 0805 0805 0805 0805 0805 0805 0805 0805 Title ADSP 21364 EZ KIT Lite 74LVC138 AT25F512 74LVC373 74LVC373 IS61LV5128 AM29LV081 E Board No A01 90 200 4 EA Date 5 18 2007 15 33 Sheet 3 of 12 A B C D A B C D T DN CO st O OOOO Q XI st st st lt lt NAAA O A CN na Gane NN LEFT WHITE NA pe Wed e AN CYC CY TS RIGHT RED kid NH Ni ag NES NA IN J4 OUT J5 OUT J6 Se T CUN een ES is AUDIO OSC AD1835 AUDIO R79 CODEC 0805 33 U14 0805 SW7 our D ek MM IDAIPS AD1835 MCLK _______1 Em en wa BOO m W SST HEEL i AG ERGLKI lt gt Sarrcik Apc lt ari ADC ERAN des e
9. stricted evaluation license for the first 90 days Once the initial unrestricted 90 day evaluation license expires 1 VisualDSP allows a connection to the ADSP 21364 EZ KIT Lite via the USB Debug Agent interface only Connections to sim ulators and emulation products are no longer allowed 2 The linker restricts a users program to 10922 words of internal memory for code space with no restrictions for data space Refer to the VisualDSP Installation Quick Reference Card for details External Memory The EZ KIT Lite contains three types of memory parallel flash 1 MB SPI flash 2 MB and SRAM 512 Kbit The flash memories can store user specific boot code allowing the board to run as a stand alone unit For more information about setting the boot device for the processor see Boot Mode and Clock Ratio Select Switch SW10 on page 2 12 Table 1 1 provides a map of the board s external memory Table 1 1 EZ KIT Lite Evaluation Board External Memory Start Address End Address Content 0x0100 0000 OxO10F FFFF Flash memory 0x0120 0000 0x0127 FFFF SRAM memory 0x0140 0000 0x0140 FFFF LEDs see LEDs and Push Buttons on page 2 13 0x0160 0000 OxO17F FFFF Unused chip select 1 0x0180 0000 0x019F FFFF Unused chip select 2 ADSP 21364 EZ KIT Lite Evaluation System Manual 1 7 Analog Audio The parallel flash memorv and the SRAM connect to the paral
10. www analog com processors ADSP 21364 EZ KIT Lite Evaluation System Manual xiii What s New in This Manual What s New in This Manual This edition of the ADSP 21364 EZ KIT Lite Evaluation System Manual documents ADSP 21364 EZ KIT Lite compliance with the RoHS and WEEE directives Technical or Customer Support You can reach Analog Devices Inc Customer Support in the following ways Visit the Embedded Processing and DSP products Web site at http www analog com processors technical Support E mail tools questions to processor tools support analog co E mail processor questions to processor support analog com World wide support processor europe analog com Europe support processor china analog com China support Phone questions to 1 800 ANALOGD Contact your Analog Devices Inc local sales office or authorized distributor Send questions by mail to Analog Devices Inc One Technology Way P O Box 9106 Norwood MA 02062 9106 USA xiv ADSP 21364 EZ KIT Lite Evaluation System Manual Preface Supported Processors The ADSP 21364 EZ KIT Lite evaluation svstem supports the Analog Devices ADSP 21364 SHARC processors Product Information You can obtain product information from the Analog Devices Web site from the product CD ROM or from the printed publications manuals Analog Devices is online at http www analog com Our Web site pro vides information about a broad range of products
11. V ES 0 0 IDAPISSWS 1 o 7a N gt ipwPz SWa II D sq 5 B gt S7 ji LED Cp sw d o AD7 AD6 AD5 AD4 AD3 AD2 AD1 ADO M LEDS LED7 LEDS LED5 LED4 LED3 LED2 LED De 1 10 VELLOW VELLOW VELLOW VELLOW VELLOW VELLOW VELLOW VELLOW SWTO17 PE GND y LEDOO1 y LEDOO1 y LEDOO1 y LEDOO1 y LEDOO1 y LEDOO1 y LEDOO1 LEDOO1 U26 EI EI EI EI je 4 1 is La LS 4 SS s TWE 2 TSSOP20 WELL ENTAAHE1GO2 SOT23 5 R177 R178 R179 R180 R181 R182 R183 R184 NL Y 270 270 270 270 270 270 270 270 1206 1206 1206 1206 1206 1206 1206 1206 SW9 PUSH BUTTON ENABLE SWITCH 3 3V Default All ON except position 5 3 Used to stop the pushbuttons from e e e e e 1 4 driving the corrisponding DSP signal Useful if using these DSP signals for another purpose 5 Not Used R171 10K r 3 3V 3 3V 3 3V 3 3V 0805 6 OFF LEDs function as flags O O O O DAIP20 R185 ON LEDs are accessed at a memory address es us ANALOG oo Road 9 8 E O e j Nashua NH 03063 sw DEVICES ou 1 00 SWT013 aa C162 C164 C161 C182 PH 1 800 ANALOGD MOMENTARY E 001UF Gout 0 01UF 0 01UF CT15 7 0805 0800 amp 0805 0805 m Title ADSP 21364 EZ KIT Lite Size Board No Rev KI SN74AHC1G02 74LVC373 ADM708 74LVC14A C AQ1 90 2004 2 0 A Date 5 18 2007 15 33 Sheet 9 of 11 A B
12. ku 1234 SW6 ON m 1 W i us SW7 pe o eereborakosesg A a emp D CI LI SW SWIO Far S fer fzrzrc ADSP 21364 EZ KIT LITE 2006 DESIGNED BY ANALOG DEVICES INC CC PART NUMBER ADZS 21364 EZLITE Figure 2 4 DIP Switch Locations and Default Settings Electret Microphone Select Switch SW6 To connect an electret microphone to the audio input place all positions of the SW6 switch ON The default position of this switch is all OFF When all of the positions are ON a DC offset of 2 5V is added to the signal and gain of the input amplifiers is changed from 1x to 10x ADSP 21364 EZ KIT Lite Evaluation System Manual 2 9 Switch Settings Codec Setup Switch SW7 The codec setup switch SW7 can re route signals going to the AD1835A codec and can setup the communication protocol of the codec Positions 1 and 2 determine the clock routing for the audio oscillator to the codec and to the processor Figure 2 5 illustrates how the switch positions 1 and 2 connect on the board In the default position route the DAI_P17 pin to DAIP6 in software to clock the AD1835A ADSP 21364 Processor AD1835 Codec DAI P6 MCLK DAL P17 12 288MHz OSC SW7 2 Figure 2 5 Audio Clock Routing Position 3 of the SW7 switch determines if the AD1835A device is a master or is a slave If the AD1835A is a master the device s serial interface gen erates the frame sync and clock signals necessary to transfer data When the device i
13. 2 Figure 1 1 shows the default DIP switch connector locations and LEDs used in installation Confirm that your board is set up in the default configuration before continuing ADSP 21364 EZ KIT Lite Evaluation System Manual 1 3 Default Configuration CH4 cH3 Ion lem E ON JB Pi v9 P 5 iy A 1234 SPDIF IN SPDIF OUT CH4 HP SEEN E AUDIO OUT SW6 AUDIO IN POWER T LED10 P2 RESET SP Lo sws POWER J7 ON ON m P3 Diddl 1234 1234 SW8 SW7 DAI JON JON SW9 SWIO ter pm er aa et ANALOG USB ater DEVICES ADSP 21364 EZ KIT LITE 2006 Zu DESIGNED BY ANALOG DEVICES INC CE PART NUMBER ADZS 21364 EZLITE jii SW SW SW3 SW4 ZLED3 zz Im o e o ol IIIC MONITOR FLAG FLAG2 D bag oa bon LEDIT 8 Figure l 1 EZ KIT Lite Hardware Setup 3 Plug the provided power supply into J7 on the EZ KIT Lite board Visuallv verifv that the green power LED LED10 is on Also verifv that the red reset LED LED9 goes on for a moment and then goes off and finally LED1 through LED8 are blinking sequentially 4 Connect one end of the USB cable to an available full speed USB port on your PC and the other end to 7J1 on the ADSP 21364 EZ KIT Lite board 1 4 ADSP 21364 EZ KIT Lite Evaluation System Manual Using ADSP 21364 EZ KIT Lite Installation and S
14. 49 9K T 1206 1206 T 1206 1206 e e e e AGND AGND e e R31 R25 5 49K C6 5 49K C4 1206 100PF 1206 100PF R50 R30 T 1206 R47 R24 T 1206 11 0K 3 32K 11 0K 3 32K 1206 0805 1206 0805 L QUTANSI AAA N L og NANNY NNI C108 C110 330PF 330PF T 0805 2 T 0805 2 DAC3 RIGHT DAC4 RIGHT e 3 3 C117 C119 680PF 680PF R60 0805 R29 R59 0805 R23 5 49K 1 65K 604 0 5 49K 1 65K 604 0 1206 1206 1200 cr AA 1206 1206 1200 oro 17 7 OUTRPSI ON A AA A 10UF Soror NC ON E 10UF SONG SSeS CAP002 A CAP002 ju AOUT3_RIGHT 7 me i eae IAOUTA RIGHT 10 4 X i KO AOUT RAGAT HP CO 7 x d R145 SH RaZ IM L EEGEN ia 2 74K C95 2 74K C97 1206 220PF g 1206 220PF 12 L AUDIO VREF DACIJII 1 ki L Binet S 499K p AUDIO VREF DACH AAA 1208 Sopr S 49 3K T 1206 1206 T 1206 1206 e e e e ASV ASV AGND AGND EA AA ANALOG 2 Coton Road C102 C101 0 22UF 0 22UF Nashua NH 03063 0805 0805 DE V ICES PH 1 800 ANALOGD Title ADSP 21364 EZ KIT Lite K A Size Board No Rev AD8606 AD8606 C A01 90 2004 2 OA Date 5 18 2007 15 33 Sheet 6 11 A B C D
15. Designator Manufacturer Part Number 25 3 05 45X2 Jl 3 SAMTEC SFC 145 T2 F D A CONO019 26 1 DIP8SWT016 SW11 C amp K TDAO8HOSB1 27 1 DIP6SWT017 SW9 CTS 218 6LPST 28 4 DIP4SWT018 SW6 8 SW10 ITT TDAO4HOSBI 29 1 RCA RCA_1X2 J SWITCH PJRAS1X2S02X CONO031 CRAFT 30 1 IDC2XIIDC2X1 Pl FCI 90726 402HLF 31 1 IDC7X2IDC7X2 ZP4 FCI 68737 414HLF 32 1 2 5A RESETABLE Fl RAYCHEM SMD250F 2 FUS001 33 1 3 5MM J6 A D ELEC ST 323 5 STEREO_JACK TRONICS CONO01 34 1 IDC 13x2 P3 BERG 54102 T08 13LF IDC13x2 35 1 IDC3X2IDC3X2 P2 SULLINS GECO3DAAN 36 1 01 4W5 1206 R82 KOA 0 0ECTRk7372BTTED 37 8 YELLOW LED1 8 PANASONIC LN1461C LED001 38 8 330PF 50V 590 C104 C106 C108 AVX 08055A331JAT 0805 C110 C112 C114 C116 C118 39 13 0 01UF 100V C1 C22 C127 C153 AVX 08051C103KAT2A 10 0805 C155 C157 158 C160 164 C182 40 8 0 22UF 25V 10 C77 C87 C99 102 AVX 08053C224FAT 0805 C111 C131 ADSP 21364 EZ KIT Lite Evaluation System Manual A 3 Ref Qty Description Reference Designator Manufacturer Part Number 41 11 0 1UF 50V 10 C21 C45 C47 AVX 08055C104KAT 0805 C120 121 C132 133 C141 C148 C152 C156 42 4 1000PF 50V 5 C82 83 C88 C98 AVX 08055A102JAT2A 0805 43 21 10K 1 10W 5 R17 R64 R66 R70 VISHAY CRCW0805 10KOJNEA 0805 R74 R76 R78 R92 R96 R98 R152 R159 164 R171 174 44 2 33 1 10W 5 R68 R81 VISHAY CRCW080533ROJNEA 0805 45 2 4 7K 1 10W 596
16. KIT Lite Evaluation System Manual 1 5 Installation and Session Startup 5 The Select Connection Tvpe page of the wizard appears on the screen Select ADSP 21364 and click Next 6 The Select Platform page of the wizard appears on the screen In the Select vour platform list select ADSP 21364 EZ KIT Lite via Debug Agent In Session name highlight or specifv the session name The session name can be a string of anv length although the box displavs approximatelv 32 characters The session name can include space characters If vou do not specifv a session name VisualDSP creates a session name by combining the name of the selected platform with the selected processor The only way to change a session name later is to delete the session and to open a new session Click Next 7 The Finish page of the wizard appears on the screen The page dis plays your selections If you are satisfied click Finish If not click Back to make changes i To disconnect from a session click the disconnect button El or select Session gt Disconnect from Target To delete a session select Session gt Session List Select the ses sion name from the list and click Delete Click OK 1 6 ADSP 21364 EZ KIT Lite Evaluation System Manual Using ADSP 21364 EZ KIT Lite Evaluation License Restrictions The ADSP 21364 EZ KIT Lite installation is part of the VisualDSP installation The EZ KIT Lite is a licensed product that offers an unre
17. L 1206 R55 R39 L 1206 11 0K 3 32K 11 0K 3 32K 1206 0805 1206 0805 L oa ANNA N A A L QUTENZI NN WMA NN C112 C114 830PF 330PF T 0805 6 T 0805 6 DAC1 LEFT DAC2 LEFT e 5 5 C103 C105 680PF 680PF R57 T 0805 R44 R54 L 0805 R38 5 49K 1 65K 604 0 5 49K 1 65K 604 0 P 1206 1206 1208 cg TEE 1206 1206 1208 ogy L SUTLPI 2 A N N 10UF SONON L__OUTLP2 OA AAAA AAA 10UF No SE CAP002 SSS CAP002 al A TAOUT LEFT 2 1 gt f IAOUT2 LEFT 5 1 7 R140 CS wn R142 CS p 2 74K C90 2 74K C92 1206 220PF 3 1206 220PF 6 r Y nn T 1206 C68 R118 o T 1206 C70 R120 jet SEN AUDIO VREF DAC EN 2200PF 49 9K L AUDIO VREF DAC VVV 2200PF 49 9K T 1206 1206 T 1206 1206 e e e e AGND D e e R43 R37 5 49K C10 5 49K C8 1206 100PF 1206 100PF R56 R42 L 1206 R53 R36 L 1206 11 0K 3 32K 11 0K 3 32K 1206 0805 1206 0805 L ong AAA N L QUTANZI N A NNI C104 C106 330PF 930PF T 0805 2 T 0805 2 DAC1 RIGHT DAC2 RIGHT e 3 3 C113 C115 680PF 680PF R62 0805 R41 R128 R61 0805 R35 R130 5 49K 1 65K 604 0 5 49K 1 65K 604 0 TA 1206 1206 1208 ce ARENA 1206 1206 1208 ce Gurren Che 10UF Nii L YuRA ON NN Y ANNAN A 10UF ON EN cd LE CAP002 mn CAP002 Tr A AOUTI_RIGHT Ir be AOUTZ HIGHT 37 AN R141 E ud R143 CN ri 2 74K C91 2 74K C93 1206 ES 220PF 3 1206 EN 220PF 6 L AUDIO VREF DACIMI A
18. LED to the logical OR of the WE and LED_CS signals When position 6 is OFF the latch enable pin of the LED latch U24 is pulled high making the latch transparent In this position the value of the LEDs is directly con nected to AD7 0 ADSP 21364 EZ KIT Lite Evaluation System Manual 2 11 Switch Settings When position 6 is ON the values of the LEDs are set bv writing to a mem orv location The lower 8 bits of the data written to the address 0x1400 0000 set the values of the LEDs Bv default position 6 is ON For more information refer to LEDs and Push Buttons on page l 10 Boot Mode and Clock Ratio Select Switch SW10 The SW10 switch sets the boot mode and clock multiplier ratio Table 2 4 shows how to set up the boot mode using SW10 positions 1 and 2 By default the EZ KIT Lite boots in parallel port mode from the flash MEMOTV Table 2 4 Boot Mode Configuration SW10 BOOTCEGI Pin Position 2 BOOTCFGO Pin Position 1 Boot Mode OFF OFF SPI slave boot OFF ON SPI master boot ON OFF Parallel flash boot default ON ON Internal boot Table 2 5 shows how to set up the clock multiply ratio using SW10 positions 3 and 4 By default the processor increases the clock multiply ratio by six setting the core clock to 147 456 MHz Table 2 5 Core Clock Rate Configuration SW10 CLKCEGI Position 4 CLKCFGO Position 3 Core to CLKIN Ratio OFF OFF 6 1 d
19. SN74LVC138AD SOICI6 6 3 74LVC373APW U18 U21 U24 TI SN74LVC373APWRE4 TSSOP20 7 1 IS61LV5128AL U15 ISSI IS61LV5128AL 10TLI TSOP44 8 1 LTC1877MSOPS8 VR5 LINEAR LTC1877EMS8 PBF TECH 9 1 74LVCU04AD U3 DIGI KEY 296 9861 1 ND SOIC14 ADSP 21364 EZ KIT Lite Evaluation System Manual Ref Qty Description Reference Designator Manufacturer Part Number 10 1 FDC658P U13 FAIRCHILD FDC658P SOT23 6 11 1 21364 U12 ST MICRO M25P20 VMNGTP M25P20 U12 12 1 21364 U19 AMD AM29LV081 120ED AM29LV081B U19 13 1 ADM708SARZ U22 ANALOG ADM708SARZ SOIC8 DEVICES 14 1 AD8532ARZ U10 ANALOG AD8532ARZ SOIC8 DEVICES 15 2 ADP333GARMZ VRI VR ANALOG ADP3336ARMZ REEL MSOP8 DEVICES 16 8 AD8606ARZ U2 U4 9 U11 ANALOG AD8606ARZ SOIC8 DEVICES 17 1 AD1835AASZ U14 ANALOG AD1835AASZ MQFP52 DEVICES 18 1 ADSP 21364 UI ANALOG ADSP 21364KBCZ 1AA BGA136 DEVICES 19 1 ADP1864 VR2 ANALOG ADP1864AUJZ R7 SOT23 6 DEVICES 20 5 RUBBERFOOT Ml 5 MOUSER 517 SJ 5018BK 21 1 PWR J7 SWITCH RAPC712X 2 5MM JACK CRAFT CONO005 22 1 RCA 4X2 J5 SWITCH PJRAS4X2U01X CONOII CRAFT 23 2 RCA 1X1 J8 9 SWITCH PJRAN1X1U01X CONO012 CRAFT 24 5 MOMENTARY SW1 5 PANASONIC EVQ PAD04M SWT013 A 2 ADSP 21364 EZ KIT Lite Evaluation System Manual ADSP 21364 EZ KIT Lite Bill Of Materials Ref Qty Description Reference
20. The master input clock MCLK for the AD1835A can be generated by the on board 12 288 MHz oscillator or can be supplied by one of the DAI pins of the processor Using one of the pins to generate the MCLK as 1 8 ADSP 21364 EZ KIT Lite Evaluation System Manual Using ADSP 21364 EZ KIT Lite opposed to the on board oscillator allows synchronization of multiple devices in the system This is done on the EZ KIT Lite when data is com ing from the S PDIF receiver and being output through the audio codec The S PDIF MCLK is routed to the AD1835A MCLK in the processor s signal routing unit SRU It is also necessary to disable the on board audio oscillator from driving the audio codec and the processor s input pin For instructions on how to configure the clock refer to Codec Setup Switch SW7 on page 2 10 The AD1835A codec can be configured as a master or as a slave depend ing on the DIP switch settings In master mode the AD18354 drives the serial port clock and frame sync signals to the processor In slave mode the processor must generate and drive all of the serial port clock and frame sync signals For information on how to set the mode refer to Codec Setup Switch SW7 on page 2 10 The AD1835A audio codec s internal configuration registers are config ured using the SPI port of the processor The FLAG3 register is used as the select for the device For information on how to configure the multichan nel codec refer to the co
21. WMIMASTER_SLAVE L AD DATA C ASDATA ADCRN JADON 73 DES ADC DATA C LOF MIADC DATA L por ADORE 71 SWTO18 777777 BAITS BAG BOKI 5 ec OUTAPAP gt OUTRPT 1 KA L SDAIBIA DAC TROUG lt gt bi rk OUTANIP gt OUTANI__1 DACH CLL DAPI DAC DI Genera OUTLPAL O Jonn LI SW7 CODEC SETUP SWITCH EIB Bat gt psparaa am ODA Default 1 OFF 2 ON 3 ON 4 ON GENEE DAIPTO DAC D3 _ gt pspatas Connects or disconnects the audio oscillator i DAIPO DAC D4 O psoas OUTRP2 gt OUTRP2 1 1 2 depending on how the system is setup e ame C SC DACH See users manual for more information our Pal r gt OUTLP2 71 i rin dece OFF AD1835 is SLAVE ourn JOUTLN2 1 3 Jaane e We Nee es ON AD1835 is MASTER DAIP6 AD1835 MCLK Mous ji i oumps gt IoUTHPS 1 Disconnects ADC DATA signal from dis wen Zon oumf gt JOUTANS 1 DAC3 4 driving the corresponding DAI signal L Miso C eour opd r OUTLPS 7 7 1 Useful if using this DAI pin for another purpose Esad eok ourn gt 50n LJ AD1835 SPI CS CLATCH R148 OUTRP gt OUTHPA 1 0805 83 ropa 1 OUTRN4P OUTRN4 S Ecco DACA DISCONNECTS SIGNALS FROM SPI FLASH AND AD1835 ouTLP gt IGUTLPA i mess us onn GONE GENEE R65 ES aN RESET 2 PDRST FILTDIL e aoe C ADO VREE ADG a alia rr O uoce FILTRI i Sha ghee ee deco RENE Ee AD1835_SPI C
22. about accessing the flash and SDRAM memories Because the PP is a multiplexed address data memory bus two 8 bit latches are used to latch the upper address bits Additional latch is used to drive the LEDs The latter allows the LED values to be written to as if they were at a memory location For more information about using the LEDs refer to the LEDs and Push Buttons on page 1 10 ADSP 21364 EZ KIT Lite Evaluation System Manual 2 3 Svstem Architecture FLASH_CS ED CS AD15 0 D Q 373 8 bit Latch 2 DSP ALE Expansion D0 7 emm pi Interface Opening the switch puts latch alwavs in Transparent Mode RAM l WR C Figure 2 2 Parallel Port Connections Block Diagram All of the PP signals are available externally via the expansion interface connectors J1 3 The pinout of the connectors can be found in ADSP 21364 EZ KIT Lite Schematic on page B 1 2 4 ADSP 21364 EZ KIT Lite Evaluation System Manual ADSP 21364 EZ KIT Lite Hardware Reference DAI Interface The pins of the digital application interface DAI connect to the signal routing unit SRU The SRU is a flexible routing system providing a large system of signal flows within the processor In general the SRU allows to route the DAI pins to different internal peripherals in various combinations The DAI pins connect to the AD1835A audio codec a 26 pin header 2 RCA connectors the audio oscillator outpu
23. control signals ADSP 21364 EZ KIT Lite Evaluation System Manual 2 7 Svstem Architecture Limits to the current and to the interface speed must be taken into consid eration when using the expansion interface The maximum current limit is dependent on the capabilities of the used regulator Additional circuitrv can also add extra loading to signals decreasing their maximum effective speed Analog Devices does not support and is not responsible for the effects of additional circuitrv JTAG Emulation Port The JTAG emulation port allows an emulator to access the internal and external memorv of the processor through a 6 pin interface The JTAG emulation port of the processor also connects to the USB debugging inter face When an emulator connects to the board at 2P4 the USB debugging interface is disabled This is not the standard connection of the JTAG interface For information about the standard connection of the interface see EE 68 published on the Analog Devices Web site For more information about the JTAG connector see TTAG Header ZP4 on page 2 20 To learn more about available emulators contact Analog Devices see Product Information 2 8 ADSP 21364 EZ KIT Lite Evaluation System Manual ADSP 21364 EZ KIT Lite Hardware Reference Switch Settings Figure 2 4 shows the location and default settings of the EZ KIT Lite switches ON
24. page 1 5 Instructs how to start a new or open an existing ADSP 21364 EZ KIT Lite session using VisualDSP Evaluation License Restrictions on page 1 7 Describes the restrictions of the VisualDSP license shipped with the EZ KIT Lite External Memory on page 1 7 Describes how to access external memory defines the memory map of the EZ KIT Lite e Analog Audio on page 1 8 Describes how to set up and communicate with the on board audio codec LEDs and Push Buttons on page 1 10 Describes the board s general purpose IO pins and buttons ADSP 21364 EZ KIT Lite Evaluation System Manual 1 1 Package Contents Example Programs on page 1 12 Provides information about example programs included in the ADSP 21364 EZ KIT Lite evaluation system Background Telemetry Channel on page 1 12 Highlights the advantages of the background telemetry channel feature of VisualDSP For information on the graphical user interface including the boot load ing target options and other facilities of the EZ KIT Lite system refer to the online Help For detailed information on how to program the ADSP 21364 SHARC processor refer to the documents referenced in Related Documents Package Contents Your ADSP 21364 EZ KIT Lite evaluation system package contains the following items e ADSP 21364 EZ KIT Lite board e VisualDSP Installation Quick Reference Card CD containing v VisualDSP software v ADSP 21364
25. telemetry channel BTC 1 12 bill of materials A 1 board schematic B 1 boot configuration pins BOOTCEG l 0 2 12 modes 2 3 2 12 C CLKCFG1 0 pins 2 3 2 12 CLKIN pins 2 3 clock multiplier ratios 2 12 routing 2 10 codecs See AD1835A configuration of this EZ KIT Lite 1 3 connectors diagram of locations 1 3 2 16 J1 3 expansion interface 2 4 2 6 2 7 2 16 J audio in RCA 1 9 2 17 J5 audio out RCA 1 9 2 17 J6 headphone out 1 9 2 17 J7 power 1 4 2 18 J8 9 S PDIF in coax 2 18 P2 SPI header 2 6 2 19 P3 DAI header 2 6 2 19 ZJ1 USB 1 4 2 19 ZP4 JTAG 2 8 2 20 conventions manual xx core clock rates 2 12 frequency 2 3 to CLKIN ratios 2 12 voltage 2 2 customer support xiv ADSP 21364 EZ KIT Lite Evaluation System Manual l 1 INDEX D DAI block diagram 2 5 connections 2 10 2 11 header P3 2 19 port DAI_P17 pins 2 10 DAI P19 20 SW3 4 pins 1 10 2 11 2 15 DAIP6 pins 2 10 default configuration of this EZ KIT Lite 1 3 digital audio interface See DAI digital to analog converters DACs See AD1835A DIP switch SW9 1 3 1 10 2 11 E electret microphone 1 9 2 9 example programs 1 12 expansion interface 2 4 2 6 2 7 2 16 external memory 1 7 F features of this EZ KIT Lite x FLAGO SPI flash pins 1 8 2 6 2 7 FLAGI SW1 SPD pins 1 10 2 7 2 11 2 19 FLAG2 SW2 pins 1 10 2 7 2 11 FLAG3 AD1835A select pins 1 9 2 6 2 7
26. the processor Part Description Manufacturer Part Number Type B USB receptacle MILL MAX 897 30 004 90 000 DIGI KEY ED90064 ND ADSP 21364 EZ KIT Lite Evaluation System Manual 2 19 Connectors JTAG Header ZP4 The JTAG header ZP4 is the connecting point for a JTAG in circuit emulator pod When an emulator connects to the JTAG header the USB debug interface is disabled Pin 3 is missing to provide keving Pin 3 in the mating connector should have a plug When using an emulator with the EZ KIT Lite board follow the connection instructions provided with the emulator Part Description Manufacturer Part Number 14 pin IDC header ZP4 FCI 68737 414HLF 2 20 ADSP 21364 EZ KIT Lite Evaluation System Manual A ADSP 21364 EZ KIT LITE BILL OF MATERIALS The bill of materials corresponds to ADSP 21364 EZ KIT Lite Sche matic on page B 1 Please check the latest schematic on the Analog Devices Web site http www analog com processors sharc technicalLibrary manuals index html Evaluation 20Kit 20Manuals Ref Qty Description Reference Designator Manufacturer Part Number 1 1 74LVC14A U33 TI 74LVC14AD SOIC14 2 1 24 576MHZ U16 EPSON SG 8002DC OSC001 24 5760M PCCL3 3 1 SN74AHCIGO2 U26 TI SN74AHC1G02DBV SOT23 5 RE4 4 1 12 288MHZ U17 DIGI KEV SG 8002CA PCC ND OSC003 12 288M 5 1 74LVC138AD U25 TI
27. 0 2004 2 0A Date 5 18 2007 15 33 Sheet 8 of 11 B D 3 3V A 3 3V O 3 3V CN R174 10K RESET 3 3V 3 3V 0805 POWER O O 3 3V LED FLAG1 R188 O RED LED10 100 U33 y LED001 GREEN ER 0805 EI X LEDOO O O e 1 2 4 SWI SWTO13 FT i MOMENTARY R138 Ten 270 R139 R96 1UF 1206 270 10K TA R92 1206 0805 10K R98 RESET 0805 10K U22 0805 1 B O O e R X RESET PP uid L pr RESETL LO IRESET 1 MOMENTARY eae i taa 11 410 13 12 3 3V SOIC8 SA 74LVC14A O 74LVC14A SOIC14 SOIC14 L _____DA SOFT RESET l 5 R173 10K 0805 FLAG2 R187 100 U33 EE 0805 O O e 3 A SW2 SWT013 See MOMENTARY Ten 1UF TINA 3 3V 78 3 3V LEDs can be accessed as a memory address TA A 2 or directly as flags depending on the DSP settings R172 See SW9 Settings and the EZ KIT 10K U24 0805 Lite User Manual for more information aii is D LL C ABD o Ge GH 0805 e D 20 O O e Y D a eae 74LVC14A b MOMENTARY SOIC14 SW9 iB ON ene 1 12 reza 12 Ur m gt IFLAGI SWI e sa TN a aE TOE gt Fae S2 7 D ea
28. 1 0603 0603 0 5 Aine FS 2 e RUN SW NY NN e R91 GND ADPTEGA 0603 3 b e 80 6K SOT23 6 4 B 0603 B onp PLL LPFF ee ct20 ct21 C13 C55 M SOT23 6 DOS TAA 47UF 2 2UF 1UF 2 8 30PF MB TB 0805 C49 C48 ITH VFB 1206 SSES DNP jouF qur PEND 1210 T 0805 R93 LTCT877 255 0K MSOP8 0603 e C183 v 220PF 1206 cr9 C50 47UF 10UF T D TT 0805 PGND R73 0 0805 e AAAA PGND FER2 600 MH5 MH2 MH3 MH4 ien a RA oo ANAI Ol 20 Cotton Road mp TP2 TP6 TP4 TP7 M5 M1 M3 M4 Q Q Q Q Q FERS 2 e a RW n Nashua NH 03063 1206 RUBBER FOOT RUBBERFOOT RUBBERFOOT RUBBERFOOT RUBBER FOOT DE V ICES PH 1 800 ANALOGD eg MSC009 MSCO09 MSCO09 MSCO09 MSCO09 1 800 OG Title ADSP 21364 EZ KIT Lite gg d Size Board No A01 90 2004 Rev Date 5 18 2007 15 33 Sheet 11 of 11 A B C D I INDEX A AD15 8 pins 2 3 2 7 AD1835 CAD and DAC master clock MCLK l 8 2 6 AD1835A CAD and DAC configuration registers l 9 2 6 DAI interface 1 8 2 5 master slave modes 1 9 2 10 setup switch SW7 2 10 SPI interface 2 6 2 7 AD7 0 LED8 1 pins 1 11 2 7 2 11 2 14 ADC_DATA pins 2 10 ALE pins 2 3 2 11 analog audio See audio AD1835A analog to digital converters ADCs See AD1835A architecture of this EZ KIT Lite 2 2 audio in RCA connector J4 1 9 2 17 interface xi 1 8 oscillators 2 5 2 10 out RCA connector J5 2 17 B background
29. 2Z SDOB S 4 IDAIPZ i B3 D13 Pg a e WDDEXT2 GNDI e DAIP3 SCLKg IDAIP3 1 Gia B Es mision VDDEXT3 ND18 e DAIP4 SFSON 7 IDAIPA 1 12V DSP H2 ODESA cub io uiii MERC HE GC e C DAIPS SD1AFS 4 IDAIP5 ADC DATA l S N5 E5 P10 i gigi igi Sg is VDDEXT5 GND20 e DAIP6 SD1B gt IDAIP6 AD1835 MCLK l N9 f E6 A A ES VDDEXT6 ND21 e DAIP7 SCLK1P 1 0 TDAIP7 ADO BOLK l E9 P12 min minima ii a MR GND22 DAIPB SFS1 IDAIP8 ADC LRCLK 1 A12 e E10 iri ii i rdiet i e ki e VDDINT1 ND23 e o DAIP9 SD2A le IDAIP9 DAC DN i e mt When designing vour JTAG interface please refer to the Nid AA eee i 9 VDDINT2 GND24 e l DAIP10 SD2B lt _ gt IDAIP10 DAC D3 i C14 d E13 Enaineer Enaineer N EE which n n ee ee ee ee ee _NVDDINT3 ND25 e gineer to Engineer Note 68 which can be found at GE gt iDAIPIi DAC D2 e E http www analog com EE VDDINT4 ND26 tip SECHS DAIP12sp3BM13 o CO iDAIP12 DAC Di D14 e F5 ee VDDINT5 ND27 DAPP13 SCLKo3M 1 iDAIPT3 DAG SCH E1 F6 ee amp VDDINT6 ND28 e DAIPi4 SFS23E 4 O DAIP14_DAC_LRCLK Ge F9 ka ow ERES VDDINT7 GND29 e DAIP15 SDA4A DAIP15 J13 F10
30. 5A681FAT2A 0805 C103 C105 C107 C109 C113 C115 C117 C119 67 2 10UF 25V C46 C49 PANASONIC ECJ4YF1E106Z 80 20 1210 68 8 2 74K 1 8W 1 R140 147 VISHAY CRCW12062K74FKEA 1206 69 20 5 49K 1 8W 190 R7 R15 16 R21 R25 VISHAY CRCW12065K49FKEA 1206 R28 R31 R34 R37 R40 R43 R46 R48 R51 R54 R57 R59 62 ADSP 21364 EZ KIT Lite Evaluation System Manual A 5 Ref Qty Description Reference Designator Manufacturer Part Number 70 8 1 65K 1 8W 1 R23 R26 R29 R32 VISHAY CRCWI12061K65FKEA 1206 R35 R38 R41 R44 71 10 10UF 16V 20 CT1 9 CT12 PANASONIC EEEICAI00SR CAP002 72 2 68UF 25V 20 CT10 11 PANASONIC EEE FC1E680P CAP003 73 1 2A SL22 DI DIGI KEV SL22 E3 1GI ND DO 214AA 74 1 10UH 2090 L1 TDK 445 2014 1 ND IND001 75 10 01 10W 5960805 R9 R12 R73 R79 80 VISHAY CRCW08050000Z0EA R90 R126 R151 R191 192 76 1 190 100MHZ 5A FER3 MURATA DLW5BSN191SQ2 FER002 77 1 470K 1 10W 5 R86 VISHAY CRCW0805470KJNEA 0805 78 8 3 32K 1 10W 1 R24 R27 R30 R33 PANASONIC ERJ GENF3321V 0805 R36 R39 R42 R45 79 4 1 2K 1 10W 5 R155 158 VISHAY CRCW08051K20JNEA 0805 80 6 10UF 6 3V 10 C26 C40 C50 C52 AVX 080560106KAT2A 0805 C84 C145 81 3 6 04K 1 10W 1 R65 R148 149 DIGI KEY 311 6 04KCRCT ND 0805 82 7 0 1UF 10V 10 C41 C128 129 C136 AVX 0402ZD104KAT2A 0402 C140 C142 C144 83 5 0 01UF 16V 10 C134 C138 C147 AVX 0402YC103KAT2A 0402 C149 C151 84 1 47UF16V10 D
31. 8 139 R177 184 VISHAY CRCW1206270RJNEA 1206 104 8 604 0 1 8W 1 R127 134 PANASONIC ERJ 8ENF6040V 1206 105 4 1UF20V 20 A CT15 18 AVX TAJA105K020R 106 1 255 0K 1 10W R93 VISHAY CRCW06032553FK 1 0603 107 1 80 6K 1 10W 1 R91 DIGI KEY 311 80 6KHRCT ND 0603 108 1 6 8UH 25 L2 DIGI KEY 308 1328 1 ND IND009 A 8 ADSP 21364 EZ KIT Lite Evaluation Svstem Manual ADSP 21364 EZ KIT Lite Schematic ANALOG 20 Cotton Road Nashua NH 03063 DEVICES PH 1 800 ANALOGD Title ADSP 21364 EZ KIT Lite TITLE Size Board No Rev A0190 2004 2 0A Date 5 18 2007 15 33 Sheet 1 of 11 A B C D 3 3V KA Na 3 3V 3 3V_DSP 1 2V_DSP 1 2V KA O O tA R152 10K DSP OSC Da 0805 R79 K12 R80 0 1A 0 R68 0805 DO 214AA 0805 U16 33 0805 e e e e E IU ANN Y iN A 3 P7 P8 OSCO01 LI 1 Qe T T T T DNP DNP 3 3V_DSP rh Nc U1 U1 1 AD O 15 DAIP1 SDOA IDAIP SPDIF OUT 1 B3 D11 ez EE VDDEXT1 ND1 DAIP
32. ADSP 21364 EZ KIT Lite Evaluation System Manual Revision 3 2 Julv 2007 Part Number 82 000840 01 Analog Devices Inc One Technology Way ANALOG Norwood Mass 02062 9106 I4 DEVICES Copyright Information 2007 Analog Devices Inc ALL RIGHTS RESERVED This document may not be reproduced in any form without prior express written consent from Analog Devices Inc Printed in the USA Limited Warranty The EZ KIT Lite evaluation system is warranted against defects in materi als and workmanship for a period of one year from the date of purchase from Analog Devices or from an authorized dealer Disclaimer Analog Devices Inc reserves the right to change this product without prior notice Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringement of patents or other rights of third parties which may result from its use No license is granted by impli cation or otherwise under the patent rights of Analog Devices Inc Trademark and Service Mark Notice The Analog Devices logo VisualDSP the VisualDSP logo SHARC SHARC logo CROSSCORE the CROSSCORE logo EZ KIT Lite and EZ Extender are registered trademarks of Analog Devices Inc All other brand and product names are trademarks or service marks of their respective owners Regulatorv Compliance The ADSP 21364 EZ KIT Lite evaluation svstem has bee
33. CT19 DIGI KEY 478 1788 2 ND A 6 ADSP 21364 EZ KIT Lite Evaluation System Manual ADSP 21364 EZ KIT Lite Bill Of Materials Ref Qty Description Reference Designator Manufacturer Part Number 85 8 1000PF 50V 5 C130 C135 C137 AVX 04025C102JAT2A 0402 C139 C143 C146 C150 C154 86 2 64 9K 1 10W 1 R67 R87 VISHAY CRCW080564K9FKEA 0805 87 2 210 0K 1 4W 1 R69 R88 VISHAY CRCW0805210KFKEA 0805 88 1 1A SK12 D3 DIODESINC B120B 13 F DO 214AA 89 1 107 0 1 10W 1 R112 DIGI KEY 311 107CRTR ND 0805 90 1 249 0 1 10W 1 R63 DIGI KEY 311 249CRTR ND 0805 91 1 68PF 50V 5 C16 AVX 06035A680JAT2A 0603 92 1 470PE 50V 5 C15 AVX 06033A471JAT2A 0603 93 1 01 10W5 0603 R85 PHYCOMP 232270296001L 94 1 24 9K 1 10W 1 R84 DIGI KEY 311 24 9KHTR ND 0603 95 1 47UF6 3V10 B CT20 PANASONIC EEE0JA470WR 96 1 0 05 1 2W 1 R89 SUSUMA RL16326 R051 F N 1206 97 1 10UF 16V 10 C17 AVX 1210YD106KAT2A 1210 98 1 GREENLEDO001 LED10 PANASONIC LN1361CTR 99 1 RED LEDO001 LED9 PANASONIC LN1261CTR 100 2 1000PF 50V 5 C37 38 AVX 12065A102JAT2A 1206 101 8 2200PF 50V 5 C67 74 AVX 12065A222JAT050 1206 ADSP 21364 EZ KIT Lite Evaluation System Manual A 7 Ref Qty Description Reference Designator Manufacturer Part Number 102 1 100K 1 8W 5 R125 VISHAY CRCW1206100KFKEA 1206 103 10 270 1 8W 5 R13
34. Date 5 18 2007 15 33 11 A B C A B C D SENSN 5V E 5V B EE 1 NREG IN I O 1 UNRE IN l O POWER IN IUNAE IN i C MEME LZ LZLZbL Beer ki e A LI gl B2A F1 FER3 R82 2A 2 5A 190 0 DO 214AA FUSO01 FER002 VR4 1206 VRI gt S 8 11 e e ni ourili e ni ourili e 1 GA 2 e Nw OUT2 ine OUT2 ours ours C38 C46 C47 8 5 8 5 1000PF 10UF 01UF e SU GND FB 9 SD GND FB 2 1206 77 1210 0805 4 ADP3336ARMZ R88 C56 C52 4 ADP3336ARMZ R69 C39 C40 MSOP8 210 0K 1UF 10UF MSOP8 210 0K 1UF 10UF 8 0805 T 0805 0805 0805 0805 0805 C61 C44 M 4 1UF 1UF T 0805 T 0805 R87 R67 C37 64 9K 64 9K 1000PF 0805 0805 T 1206 e e e e gt TE NGC IN I O e e C17 C14 10UF 10UF 77 1210 T 0805 DNP a cd x L UNREG IN LI R89 R84 VR2 0 05 24 9K 1206 FDC658P TP3 0603 5 TP5 3 3V O 1 N U13 O O 5 COMP VAS cst 4 L2 R90 6 7 L1 C15 C16 b 6 8UH 0 A MN SYNE MODE AQUH 470PF 68PF 3 6 R85 INDO09 0805 FB PGATE gt INDOO
35. Devices processors can use this manual but should supplement it with other texts xii ADSP 21364 EZ KIT Lite Evaluation System Manual Preface such as the ADSP 2136x SHARC Processor Programming Reference and ADSP 2136x SHARC Processor Hardware Reference that describe your tar get architecture Programmers who are unfamiliar with VisualDSP should refer to the VisualDSP online Help and the VisualDSP user s or getting started guides For the locations of these documents see Related Documents Manual Contents The manual consists of Chapter 1 Using ADSP 21364 EZ KIT Lite on page 1 1 Provides information on the EZ KIT Lite from a programmer s perspective and provides an easy to access memory map Chapter 2 ADSP 21364 EZ KIT Lite Hardware Reference on page 2 1 Provides information on the hardware aspects of the evaluation system Appendix A ADSP 21364 EZ KIT Lite Bill Of Materials on page A 1 Provides a list of components used to manufacture the EZ KIT Lite board Appendix B ADSP 21364 EZ KIT Lite Schematic on page B 1 Provides the resources to allow modifications to the EZ KIT Lite or to use as a reference design Appendix B now is part of the online Help The PDF version of the ADSP 21364 EZ KIT Lite Evaluation System Manual is located in the Docs EZ KIT Lite Manuals folder on the installation CD Alternatively the schematic can be found on the Analog Devices Web site http
36. ESET gt RESET L RESE gt ARA EE po DA GPal Dac DEE LZ ble9eL LAO rr AE ES A DA SOFT RESET CJ DA SOFT RESET L RESET DSP CLKOUT_ FC EERE RSE A DA GP3 32 X z 34 r l amzno 84 83 IzAAAYZ 232372 4 z T 2 4 FLAGi SWii FLAGO SPI FLASH CS DEBUG AGENT o 3 y IN EE IFLAG2 SW2 38 40 42 l SHGN 44 _ 46 4B EXP GSII 50 52 54 _ 56 58 60 62 64 _ 66 98 DAI 70 HEADER 72 fi FLAG2_SWai iRD 3 We WB I zaa L A HA Il STE P3 E L Ers e 78 iwe TREE ee eT eee Reset Mica ea DAIPi SPDIF OUTI 3 E iDAIP2 7 SPDS L D Il ee SE 5 b Kee 82 ECKER Cie L __DAIP3 DAIP4 L SPICLKI MOSTA A 7 B A 1 84 A aM e fg A DAIP5 ADC DATA IDAIP6_AD1835 MCLK ________ 1 86 722 DAIP7 ADC BCLKI 3 me iDAIPB ADC LRCIK ______ 88 L DAIP9 DAC D B E Dap DAC D 13 14 90 e e ERA DAIP11 DAC D2 19 16 IDAIP12 DAC Di CONO NA NA DAC DAC DA gt _ gt DAIPI2 DAC D1 1 sons DAIP13 DAC BOLK u 5 Dap DAC LHOLK 7777773 L DAIPISI x E Dap 71 L DAP17 AUDIO OSCI a E IDAIP18 SPDIE IN 1 BH SR Se Gran A 28 26 A IDC13X2 e P ANALO 20 Cotton Road E bel ES sad Nashua NH 03063 a 3 4 j 4 L MIBQ JET joo wied DEVICES PH 1 800 ANALOGD IFLAG1_SW1____1 IDC3X2 a Title ADSP 21364 EZ KIT Lite NOTE Must disable SW1 when using this pin as SPI select EX PANSION INTERFAC E JTAG SPI DAI KA See page 9 S ize Board No A01 90 20 0 4 Rev
37. EZ KIT Lite debug software v USB driver files v Example programs v ADSP 21364 EZ KIT Lite Evaluation System Manual this document Universal 7V DC power supply 1 2 ADSP 21364 EZ KIT Lite Evaluation System Manual Using ADSP 21364 EZ KIT Lite USB 2 0 cable Registration card please fill out and return If any item is missing contact the vendor where you purchased your EZ KIT Lite or contact Analog Devices Inc Default Configuration The EZ KIT Lite evaluation system contains ESD electrostatic discharge sensitive devices Electrostatic charges readily accumulate on the human body and equipment and can discharge without detection Per manent damage may occur on devices subjected to high energy discharges Proper ESD precautions are Fab SERAIKE DEVICE recommended to avoid performance degradation or loss of functionality Store unused EZ KIT Lite boards in the protective shipping package The ADSP 21364 EZ KIT Lite board is designed to run outside your per sonal computer as a stand alone unit You do not have to open your computer case When removing the EZ KIT Lite board from the package handle the board carefully to avoid the discharge of static electricity which may dam age some components To connect the EZ KIT Lite board 1 Remove the EZ KIT Lite board from the package Be careful when handling the board to avoid the discharge of static electricity which may damage some components
38. FLAG registers 1 10 2 14 flash memory boot mode default 2 12 start end addresses 1 7 via parallel port 1 7 2 3 frame sync clock signals 1 9 2 10 frequency 2 3 G general purpose IO pins 1 10 1 11 2 3 2 6 2 14 3515 H headphone jack J6 xi 2 17 I installation of this EZ KIT Lite 1 5 internal boot mode 2 12 IO sample rates 1 8 voltage 2 2 J JTAG connector ZP4 2 20 emulation port 2 8 L latch enable pin ALE 1 11 2 3 2 11 LED_CS signals 2 11 LEDs diagram of locations 1 3 2 13 LED 10 power 1 4 2 14 LED 1 8 general purpose IO 1 11 2 14 LED9 processor reset 1 4 2 14 ZLED3 USB monitor 1 5 2 14 license restrictions 1 7 loop back test switch SW11 2 13 M master input clock MCLK 1 8 2 6 memory bus AD 15 0 2 3 N notation conventions xx O oscillators 1 8 2 3 l 2 ADSP 21364 EZ KIT Lite Evaluation Svstem Manual P package contents l 2 parallel flash memorv See flash memorv parallel port PP boot mode 2 3 2 12 connections l 8 l 11 2 3 control signals 2 7 PMCTL register 2 3 power connector J7 2 18 LED LED10 2 14 supply 1 2 2 18 PPFLG bits 1 8 1 11 push buttons See also switches by name SWx diagram of locations 1 10 2 13 R R79 80 resistors 2 2 RCA connectors xi 1 9 2 5 registration of this product 1 3 reset processor LED9 2 14 push button SW5 2 15 restrictions of the licence 1 7
39. J14 RAE Place as close as possible to pin BO7 and B06 of DSP VDDINT8 GND30 e DAIP16 5DAB DAIP16 Ko F11 War a a e VDDINT9 GND31 DAIP17 SDBA gt D R78 N4 La N3 Hi ja a ju 10K VDDINT10 GND32 e RDI lt RD DAIP18 SD5B gt DAIP18 SPDIF IN 0805 N7 i 5 EE pe Ee WDDINT11 ND33 e WEE C Vun DAIP 19 SCLK48 lt gt IDAIP19_SW3 ____1 io N11 U6 ara N2 F14 EE 0805 VDDINT12 GND34 LAE KI ALE DAIP20 SFS45 lt gt IDalP20_SWa N12 Ree ut EMU ABE JA GND36 10 L EMU lt EMU MIS IMISO 3 3V B7 44 ns ER A e AVDD GND37 e TMS ASTMS Mosi mos l Be KA A4 B9 pos AVSS GND38 TCK TCK SPICLK SPICLK 1 K5 E E mci TE C147 C144 ENDS L TAST TRST SPIDS s SPIDS ad 0 01UF 0 1UF A13 K6 Pa DEN 0402 0402 amp ONDI GND40 7 e resin m EN E E DUE E e aNp2 GND41 9 1 TDO lt TDO FLAG IFLAGO SPI FLASH CS im cl iA AN jar ch RE l B2 K10 F1 iini iral uin dad e e GND3 GND42 FLAG1 jFLAG1_SW1 B12 k11 Cep CLKOUTI C kout Las 3 Ae SW2 7 iod a L DSP CLKOUTI LGS SW2 1 R158 R157 R156 R155 B13 K13 E14 IEAAIAALGE SmRD i 1 2K 1 2K 1 2K 1 2K 9 QGND5 GNDA47 9 R72 FLAGS LAG AD1835 SPLOS 700000 l 0805 0805 0805 0805 B14 LA 47K amp GND6 GND45 e 0805
40. MTEC Mating Connectors SFC 145 T2 F D A low cost 90 position 0 05 spacing SAMTEC TFM 145 x1 series through hole 90 position 0 05 spacing SAMTEC TFM 145 x2 series surface mount 90 position 0 05 spacing SAMTEC TFC 145 series Audio In RCA Connector J4 Part Description Manufacturer Part Number Two channel right angle RCA jack SWITCHCRAFT PJRAS1X2S02X Mating Cable Two channel RCA interconnect cable MONSTER CABLE BI100 1M Audio Out RCA Connector J5 Part Description Manufacturer Part Number Six channel right angle RCA jack SWITCHCRAFT PJRAS4X2U01X Mating Cable Two channel RCA interconnect cable MONSTER CABLE BI100 1M Headphone Out Jack J6 Part Description Manufacturer Part Number 3 5 mm stereo jack A D ELECTRONICS ST 323 5 ADSP 21364 EZ KIT Lite Evaluation System Manual 2 1 N Connectors Power Jack J7 The power connector J7 provides all of the power necessarv to operate the EZ KIT Lite board 7V power supplv Part Description Manufacturer Part Number 2 5 mm power jack SWITCHCRAFT RAPC712X DIGI KEV RAPC712X ND Mating Power Supply shipped with EZ KIT Lite CUI STACK DMS070214 P6P SZ The power connector supplies DC power to the EZ KIT Lite board Table 2 7 shows the power supply specifications Table 2 7 Power Supply Spe
41. R72 R176 VISHAY CRCWO8054K70 NEA 0805 46 2 2 0K 1 8W 196 R3 R5 VISHAY CRCWI12062K00FKEA 1206 47 10 49 9K 1 8W 196 R114 115 R117 124 VISHAY CRCWI120649K9FKEA 1206 48 12 100PF 100V 596 C2 12 C64 AVX 12061A101JAT2A 1206 49 1 2 2UF35V10 B CT21 AVX TAJB225K035R 50 2 10UF16V10 B CT13 14 AVX TAJB106K016R 51 4 100 1 10W 5 R185 188 VISHAY CRCW0805100RJNEA 0805 52 2 301 0 1 4W 1 R1 2 VISHAY CRCW1206301RFKEA 1206 53 9 220PF 50V 10 C90 97 C183 AVX 12061A221JAT2A 1206 54 1 2A S2A D2 MICRO S2A TP DO 214AA COMM 55 gt 600 100MHZ FER2 FER5 8 STEWARD HZ1206B601R 10 500MA 1206 A 4 ADSP 21364 EZ KIT Lite Evaluation Svstem Manual ADSP 21364 EZ KIT Lite Bill Of Materials Ref Qty Description Reference Designator Manufacturer Part Number 56 1 100 1 8W 5 R8 PANASONIC ERJ 8GEYJ101V 1206 57 4 237 0 1 8W 1 R13 14 R18 R20 VISHAY CRCW1206237RFKEA 1206 58 2 750 0K 1 8W 1 RILRIIG VISHAY CRCW1206750KFKEA 1206 59 4 5 76K 1 8W 1 R6 R10 R19 R22 VISHAY CRCW12065K76FKEA 1206 60 10 11 0K 1 8W 1 R47 R49 50 R52 53 VISHAY CRCWI120611K0FKEA 1206 R55 56 R58 R113 R136 61 5 1UF 16V 10 C39 C44 C48 C56 PANASONIC ECJ2FB1E105K 0805 C61 62 1 751 8W5 1206 R4 VISHAY CRCW120675ROJNEA 63 1 30PF 100V 5 C55 AVX 12061A300JAT2A 1206 64 1 10 1 10W 5 R150 VISHAY CRCW080510ROFKEA 0805 65 1 249 0K 1 10W R83 VISHAY CRCW0805249KFKEA 1 0805 66 12 680PF 50V 1 C76 C80 81 C89 AVX 0805
42. S i ES Ee RAM H e EE eg Wee S ii jd 7777777 Hen SPLFLASH CS 3 M DO ISPLFLASH CS 7777 1 ODVDD AVDD1 e p E NE dx A S 5 Ta ee MR 19 CT14 C120 CT13 C121 R49 a o LDAIPZ ADC BCLK CO RFLLM ADO BCL LL AVDDJ7 TG 10UF 01UF 10UF 0 1UF 6 04K 3 DP e Seck inna B 0805 B 0805 0805 SWTO18 395vpp2 e e AGND1 Loopback Test Switch SE AGND2 a Default All OFF 52 16 pGND2 Pro E E E o ASPAS MEN ji IAUDIO VREF DAC i For Test Purposes Only ANDA e AND ARM EEE SW11 COB nn nn posae e me 2 d D8606ARZ ES EM LEFT l ACHDS e SOIC8 L AN RIGHT lil 0 m e gt N A MQFP52 e H e gt N NU e 6 NA 8 ed SS DPs SWTO16 5V B A5V Q Q sav sy ra ei KR y FERS 600 1206 WEE E Y C41 C155 C148 C152 C132 C133 C131 0 1UF 0 01UF 0 1UF 0 1UF 0 1UF 0 1UF 0 22UF 20 Cotton Road T 0402 T 0805 0805 0805 0805 0805 T 0805 ANALOG Nashua NH 03063 SCH DEVICES PH 1 800 ANALOGD 0805 WV i i xe Title ADSP 21364 EZ KIT Lite ace AD1835 AD1835 NY ini AGND ANALOG AUDIO KA AGKD AD1835 AD8606 Size Board No A0190 2004 Rev Date 5 18 2007_ 15 33 Sheet 4 of 11 A B C D A B C D e e R46 R40 5 49K C11 5 49K C9 1206 100PF 1206 100PF R58 R45
43. SW3 FLAG2 SW2 DAI P20 SW4 Board Reset Push Button SW5 The RESET push button SW5 resets all of the ICs on the board ADSP 21364 EZ KIT Lite Evaluation System Manual 2 15 Connectors Connectors This section describes the connector functionalitv and provides informa tion about mating connectors Figure 2 7 shows the connector locations CH4 CH3 CH2 CH1 JB P 39 J6 J5 4 SPDIF IN SPDIF OUT BARD AUDIO OUT AUDIO IN P2 Lo SPI POWER J7 P3 DAI Pa ar mori DR OFF OFF OFF ti atela ANALOG USB a E ADSP 21364 EZ KIT LITE O 2006 ZJ DESIGNED BY ANALOG DEVICES INC CE PART NUMBER ADZS 21364 EZLITE JTAG 7P4 Figure 2 7 Connector Locations Expansion Interface J1 J3 Three board to board connectors J1 3 provide signals for most of the processor s peripheral interfaces The connectors are located at the bottom of the board For more information about the interface see Expansion Interface on page 2 7 For the Il 3 availability and pricing contact Samtec 2 16 ADSP 21364 EZ KIT Lite Evaluation System Manual ADSP 21364 EZ KIT Lite Hardware Reference Part Description Manufacturer Part Number 90 position 0 05 spacing SMT SA
44. analog integrated circuits amplifiers converters and digital signal processors MyAnalog com MyAnalog com is a free feature of the Analog Devices Web site that allows customization of a Web page to display only the latest information on products you are interested in You can also choose to receive weekly e mail notifications containing updates to the Web pages that meet your interests MyAnalog com provides access to books application notes data sheets code examples and more Registration Visit http www myanalog com to sign up Click Register to use MyAna log com Registration takes about five minutes and serves as means for you to select the information you want to receive If you are already a registered user just log on Your user name is your e mail address ADSP 21364 EZ KIT Lite Evaluation System Manual xv Product Information Processor Product Information For information on embedded processors and DSPs visit our Web site at http www analog com processors which provides access to technical publications data sheets application notes product overviews and prod uct announcements You may also obtain additional information about Analog Devices and its products in any of the following ways E mail questions or requests for information to processor support analog com World wide support processor europe analog com Europe support processor china analog com China support e Fax questions
45. cifications Terminal Connection Center pin 7 VDC 2 14A Outer ring GND S PDIF Coax Connectors J8 and J9 cable Part Description Manufacturer Part Number Coaxial SWITCHCRAFT PJRANIXIUOIX Mating Cable Two channel RCA interconnect MONSTER CABLE BI100 1M 2 18 ADSP 21364 EZ KIT Lite Evaluation System Manual ADSP 21364 EZ KIT Lite Hardware Reference SPI Header P2 The SPI connector P2 provides access to all of the SPI signals in the from of a 1 spacing header In addition the FLAG1 signal can be used as a chip select If you are using FLAG1 as a chip select disable the push button asso ciated with the flag For more information see Push Button Enable Switch SW9 on page 2 11 Part Description Manufacturer Part Number 6 pin IDC header SULLINS GECO3DAAN DAI Header P3 The DAI connector P3 provides access to all of the DAI signals in the from of a 1 spacing header When using the header to access the DAI pins of the processor ensure that signals which normally drive the DAI pins are disabled Refer to Codec Setup Switch SW7 on page 2 10 for more information on how to disable signals already being driven from elsewhere on the EZ KIT Lite Part Description Manufacturer Part Number 26 PIN IDC HEADER BERG 54102 T08 13LF USB Connector ZJ1 The USB connector ZJ1 allows to configure and program
46. dec datasheet which can be found at http www analog com en prod 0 2877 AD1835A 00 html The RCA connector J4 is used to input analog audio When using an electret microphone on this connector configure the SW6 switch according to the instructions in Electret Microphone Select Switch SW6 on page 2 9 The four output channels connect to the RCA connector J5 Channel 4 of the codec connects to the headphone jack J6 For more information see Connectors on page 2 16 Example programs are included in the EZ KIT Lite installation directory to demonstrate how to configure and use the board s analog audio interface ADSP 21364 EZ KIT Lite Evaluation System Manual 1 9 LEDs and Push Buttons LEDs and Push Buttons The EZ KIT Lite has eight general purpose user LEDs and four gen eral purpose push buttons Two of the general purpose push buttons are attached to the FLAG pins of the processor while the other two are attached to the DAI pins All of the push buttons connect to the processor through a DIP switch The DIP switch can disconnect processor pins attached to the push buttons See Push Button Enable Switch SW9 on page 2 11 for instructions on how to disable the push buttons from driving the corresponding processor pins The value of the push buttons connected to the FLAG pins can be deter mined by reading the FLAG register The push buttons connected to the DAI pins must be configured as interrupts It is n
47. deed B4 c2 e H iownz GNDAG l DSP_CLKINI LKIN BOOTCFG SW10 C12 L6 A A A2 C1 Gnb8 GND47 XTAL BOOTCFG1 e 2 SL MN ME 2 7 a L D2 L10 re 3 b GND10 GND49F EL ado 1 7 e Dien ous EE o e ES amp GND12 ND51 e Dip A Son Penns GNDs2 S e BGA136 SW10 BOOT CLOCK RATIO SELECT D9 M12 R159 R160 R161 R162 Default 1 OFF 2 ON 3 0FF 4 OFF GnD14 GND53 e 10K 10K 10K 10K D10 N13 0805 0805 0805 0805 1 2 QND15 GND5477 4 vite BOOTCFGO BOOTCFG1 BOOTMODE 0805 ADSP 21364 DNP 4 OFF OFF SPI SLAVE BOOT BGA136 ON OFF SPI MASTER BOOT OFF ON PARALLEL PORT BOOT DEFAULT N NA Xy ON ON RESERVED 3 4 CLOCK RATIO Ee Erud CLKCFGO CLKCFG1 CORE CLKIN 3 3V OFF OFF 6 1 DEFAULT Lee ON OFF 32 1 OFF ON 16 1 e o ON ON RESERVED ANAI Ch l 20 Cotton Road C140 C146 C139 C137 C150 C138 C149 C129 C136 C145 C135 C143 C154 C130 C151 C134 C128 C142 C26 Nashua NH 03063 0 1UF 1000PF 1000PF 1000PF 1000PF 0 01UF 0 01UF 0 1UF 0 1UF 10UF 1000PF 1000PF 1000PF 1000PF 0 01UF 0 01UF 0 1UF 0 1UF 10UF l 0402 0402 0402 0402 0402 0402 0402 0402 0402 0805 0402 0402 0402 0402 0402 0402 0402 0402 0805 DE V ICES PH 1 800 ANALOGD e e l Title ADSP 21364 EZ KIT Lite V y Size Board No Rev Osc ADSP 21364 ADSP 21364 G A01 90 2004 2 OA Date 5 18 2007 15 33 Sheet 2 of 11 A B C D
48. ecessary to set up an interrupt routine to determine each pin s state Table 1 2 shows how each push button connects to the processor Refer to the related example program shipped with the EZ KIT Lite for more information Table 1 2 Push Button Connections Push Button Reference Designator Processor Pin SWI FLAGI SW2 FLAG2 SW3 DAI P19 SW4 DAI_P20 1 10 ADSP 21364 EZ KIT Lite Evaluation System Manual Using ADSP 21364 EZ KIT Lite The LEDs connect to the parallel port pins 407 0 via a latch The parallel port of the processor can be set up as a memory bus or as general purpose FLAG pins The latch allows the LEDs to be written to in both cases Infor mation about setting up the latch can be found in Push Button Enable Switch SW9 on page 2 11 When the LEDs are accessed as FLAG pins the latch must be set up to pass the data through to pins AD7 0 of the processor In this mode it is also necessary to set up the parallel port to be FLAG pins To set up the parallel port as FLAG pins set the PPFLGS bit in the SVSCTL register Table 1 3 summarizes the LED and FLAG connections Table 1 3 LED Connections LED Reference Designator Processor Pin Mapped as FLAG LED ADO FLAG8 LED2 AD1 FLAG9 LED3 AD2 FLAG1O LED4 AD3 FLAG11 LED5 AD4 FLAG12 LED6 AD5 FLAG13 LED7 AD6 FLAG14 LED8 AD7 FLAG15 An example program is includ
49. ed in the EZ KIT Lite installation directory to demonstrate the functionality of the LEDs and push buttons ADSP 21364 EZ KIT Lite Evaluation System Manual 1 11 Example Programs Example Programs Example programs are provided with the ADSP 21364 EZ KIT Lite to demonstrate various capabilities of the evaluation board These programs are installed with the EZ KIT Lite software and can be found in the 213xx Examples ADSP 21364 EZ KIT Lite subdirectory of the Visu alDSP installation directory Please refer to the readme file provided with each example for more information Background Telemetry Channel The ADSP 21364 USB debug agent supports the background telemetry channel BTC which facilitates data exchange between VisualDSP and the processor without interrupting processor execution The BTC allows the user to view a variable as it is updated or changed all while the processor continues to execute For increased performance of the BTC including faster reading and writing please check out our latest line of SHARC processor emulators at http www analog com proces sors sharc evaluationDevelopment crosscore index html For more information about the background telemetry channel see the Visu alDSP User s Guide or online Help 1 12 ADSP 21364 EZ KIT Lite Evaluation System Manual 2 ADSP 21364 EZ KIT LITE HARDWARE REFERENCE This chapter describes the hardware design of the ADSP 21364 EZ KIT Lite board The follow
50. efault OFF ON 32 1 ON OFF 16 1 Bh ON NA 2 12 ADSP 21364 EZ KIT Lite Evaluation System Manual ADSP 21364 EZ KIT Lite Hardware Reference Loop Back Test Switch SW11 The loop back test switch SW11 is located at the bottom of the board This switch is used for testing all switch positions should remain OFF LEDs and Push Buttons This section describes the functionalitv of the LEDs and push buttons Figure 2 6 shows the LED and push button locations Kale CH vie ANALOG ms DEVICES ADSP 21364 EZ KIT LITE 2006 DESIGNED BY ANALOG DEVICES INC CE PART NUMBER ADZS 21364 EZLITE sw SW o SW ZLED3 lol le lol fo gogo MONITOR FLAG FLAG2 DAL ang rn ED 8 Figure 2 6 LED and Push Button Locations ADSP 21364 EZ KIT Lite Evaluation System Manual 2 13 LEDs and Push Buttons General Purpose LEDs LED8 1 Eight general purpose LEDs connect to the processor through a latch on signals AD7 0 The LEDs can be accessed by writing to the FLAG registers or by writing to a memory address Refer to LEDs and Push Buttons on page 1 10 for more information Reset LED LED9 When LED9 is lit red the master reset of all the major ICs is active Power LED LED10 When LED10 is lit green it indicates that power is being supplied to the board properly USB Monitor LED ZLED3 The USB monitor LED ZLED3 indicate
51. ession Startup i For correct operation install the software and hardware in the order presented in the VisualDSP Installation Quick Reference Card 1 Verify that the yellow USB monitor LED ZLED3 located near the USB connector is lit This signifies that the board is communicat ing properly with the host PC and is ready to run VisualDSP 2 If you are running VisualDSP for the first time navigate to the VisualDSP environment via the Start Programs menu The main window appears Note that VisualDSP does not connect to any session Skip the rest of this step to step 3 If you have run VisualDSP previously the last opened session appears on the screen You can override the default behavior and force VisualDSP to start a new session by pressing and holding down the Ctrl key while starting VisualDSP Do not release the Ctrl key until the Session Wizard appears on the screen Go to step 4 3 To connect to a new EZ KIT Lite session start Session Wizard by selecting one of the following e From the Session menu New Session e From the Session menu Session List Then click New Ses sion from the Session List dialog box From the Session menu Connect to Target Then click New Session from the Session List dialog box 4 The Select Processor page of the wizard appears on the screen Ensure SHARC is selected in Processor family In Choose a target processor select ADSP 21364 Click Next ADSP 21364 EZ
52. evword placeholders appear in text with italic stvle format Note For correct operation A Note provides supplementary information on a related topic In the online version of this book the word Note appears instead of this symbol Caution Incorrect device operation may result if Caution Device damage may result if A Caution identifies conditions or inappropriate usage of the product that could lead to undesirable results or product damage In the online version of this book the word Caution appears instead of this symbol Warning Injury to device users may result if A Warning identifies conditions or inappropriate usage of the product that could lead to conditions that are potentially hazardous for the devices users In the online version of this book the word Warning appears instead of this symbol ADSP 21364 EZ KIT Lite Evaluation System Manual xxi Notation Conventions xxii ADSP 21364 EZ KIT Lite Evaluation Svstem Manual 1 USING ADSP 21364 EZ KIT LITE This chapter provides specific information to assist vou with development of programs for the ADSP 21364 EZ KIT Lite evaluation svstem The information appears in the following sections Package Contents on page 1 2 Lists the items contained in your ADSP 21364 EZ KIT Lite package Default Configuration on page 1 3 Shows the default configuration of the ADSP 21364 EZ KIT Lite Installation and Session Startup on
53. ey also can be downloaded from the Web site To have a data sheet faxed to you call the Analog Devices Faxback System at 1 800 446 6212 Follow the prompts and a list of data sheet code numbers will be faxed to you If the data sheet you want is not listed check for it on the Web site Notation Conventions Text conventions used in this manual are identified and described as follows Additional conventions which apply only to specific chapters may appear throughout this document xx ADSP 21364 EZ KIT Lite Evaluation Svstem Manual Preface Example Description Close command File menu Titles in reference sections indicate the location of an item within the VisualDSP environment s menu system for example the Close command appears on the File menu this that Alternative required items in syntax descriptions appear within curly brackets and separated by vertical bars read the example as this or that One or the other is required this that Optional items in syntax descriptions appear within brackets and sepa rated by vertical bars read the example as an optional this or that this Optional item lists in syntax descriptions appear within brackets delimited by commas and terminated with an ellipse read the example as an optional comma separated list of this SECTION Commande directives kevwords and feature names are in text with letter gothic font filename Non k
54. ing topics are covered e System Architecture on page 2 2 Describes the configuration of the ADSP 21364 board and explains how the board components interface with the processor e Switch Settings on page 2 9 Shows the location and describes the function of the board switches LEDs and Push Buttons on page 2 13 Shows the location and describes the function of the board LEDs and push buttons Connectors on page 2 16 Shows the location and gives the part number for all of the connec tors on the board Also the manufacturer and part number information is given for the mating parts ADSP 21364 EZ KIT Lite Evaluation System Manual 2 1 Svstem Architecture Svstem Architecture This section describes the processor s configuration on the EZ KIT Lite board shown in Figure 2 1 JTAG Port ue T PBs 4 Figure 2 1 System Architecture Block Diagram This EZ KIT Lite has been designed to demonstrate the capabilities of the ADSP 21364 processor The processor core is powered at 1 2V and the IO is powered at 3 3V Two 0 ohm resistors give access to the processor s power planes and allow to measure the power consumption of the proces sor The R79 resistor provides access to the IO voltage of the processor and the R80 resistor provides access to the core voltage plane of the processor 2 2 ADSP 21364 EZ KIT Lite Evaluation System Manual ADSP 21364 EZ KIT Lite Hardware Reference
55. it from the VisualDSP CD at any time by run ning the Tools installation Access the online documentation from the VisualDSP environment Windows Explorer or the Analog Devices Web site Accessing Documentation From VisualDSP To view VisualDSP Help click on the Help menu item or go to the Windows task bar and navigate to the VisualDSP documentation via the Start menu To view ADSP 21364 EZ KIT Lite Help which is part of the Visu alDSP Help system use the Contents or Search tab of the Help window Accessing Documentation From Windows In addition to any shortcuts you may have constructed there are many ways to open VisualDSP online Help or the supplementary documenta tion from Windows xviii ADSP 21364 EZ KIT Lite Evaluation System Manual Preface Help system files chm are located in the Help folder and pdf files are located in the Docs folder of your VisualDSP installation CD ROM The Docs folder also contains the Dinkum Abridged C library and the FlexLM network license manager software documentation Your software installation kit includes online Help as part of the Windows interface These help files provide information about VisualDSP and the ADSP 21364 EZ KIT Lite evaluation system Accessing Documentation From Web Download manuals at the following Web site http www analog com processors technicalSupport technicalLi brary index html Select a processor family and book title Dow
56. itch SW10 on page 2 12 The board also has 512 KB of SRAM which can be used at runtime The DAI of the processor connects to the AD1835A audio codec and two connectors which allow Sony Philips Digital Interface S PDIF input and output The interface facilitates development of digital and analog audio signal processing applications See Analog Audio on page 1 8 and S PDIF Coax Connectors J8 and J9 on page 2 18 for more information Additionally the EZ KIT Lite board provides access to all of the proces sor s peripheral ports Access is provided in the form of a three connector expansion interface See Expansion Interface on page 2 7 for details Purpose of This Manual The ADSP 21364 EZ KIT Lite Evaluation System Manual provides instructions for installing the product hardware board and describes the operation and configuration of the board components The product soft ware component is detailed in the VisualDSP Installation Quick Reference Card The manual provides guidelines for running your own code on the ADSP 21364 EZ KIT Lite Finally a schematic and a bill of materials are provided as a reference for future designs Intended Audience The primary audience for this manual is a programmer who is familiar with Analog Devices processors This manual assumes that the audience has a working knowledge of the appropriate processor architecture and instruction set Programmers who are unfamiliar with Analog
57. ith the VisualDSP development environment to test the capabilities of the ADSP 21364 SHARC processors The VisualDSP development envi ronment gives you the ability to perform advanced application code development and debug such as Create compile assemble and link application programs written in C C and ADSP 21364 assembly Load run step halt and set breakpoints in application program Read and write data and program memory Read and write core and peripheral registers Plot memory ADSP 21364 EZ KIT Lite Evaluation System Manual ix Access to the ADSP 21364 processor from a personal computer PC is achieved through a USB port or an optional JTAG emulator The USB interface gives unrestricted access to the ADSP 21364 processor and the evaluation board peripherals Analog Devices JTAG emulators offer faster communication between the host PC and target hardware Analog Devices carries a wide range of in circuit emulation products To learn more about Analog Devices emulators and processor development tools go to http www analog com processors index html The ADSP 21364 EZ KIT Lite installation is part of the Visu alDSP installation The EZ KIT Lite is a licensed product that offers an unrestricted evaluation license for the first 90 davs For details about evaluation license restrictions after the 90 davs refer to Evaluation License Restrictions on page l 7 ADSP 21364 EZ KIT Lite provides example program
58. lel port of the processor The parallel port is a multiplexed address and data port The port can connect to 8 bit and 16 bit memorv devices When config uring the parallel port keep in mind that the memorv devices on the board are 8 bits wide To access the SRAM and flash memories set up a parallel port DMA For more information on how to connect the SRAM and flash memories see Parallel Port on page 2 3 The SPI flash memorv connects to the SPI port of the processor and uses FLAGO as a chip select In order for FLAGO to behave as a chip select clear the PPFLG bit in the SYSCTL register An example program is included in the EZ KIT Lite installation directory to demonstrate how the parallel port and SPI port can be configured to access the memories Analog Audio The AD1835A is a high performance single chip codec featuring four ste reo digital to analog converters DAC for audio output and one stereo analog to digital converters ADC for audio input The codec can input and output data with a sample rate of up to 96 kHz on all channels A 192 kHz sample rate can be used with the one of the DAC channels The processor interfaces with the AD1835A codec via the DAI port The DAI interface pins can be configured to transfer serial data from the AD1835A codec in either time division multiplexed TDM or two wire interface TWI mode For more information on how the AD1835A con nects to the DAI see DAI Interface on page 2 5
59. n certified to complv with the essential requirements of the European EMC directive 89 336 EEC inclusive 93 68 EEC and therefore carries the CE mark The ADSP 21364 EZ KIT Lite evaluation system had been appended to Analog Devices Development Tools Technical Construction File refer enced DSPTOOLS1 dated December 21 1997 and was awarded CE Certification by an appointed European Competent Body and is on file The EZ KIT Lite evaluation system contains ESD electrostatic discharge sensitive devices Electro static charges readily accumulate on the human body and equipment and can discharge without detection Permanent damage may occur on devices subjected to high energy discharges Proper ESD Fil AERSITKE DEVICE precautions are recommended to avoid performance degradation or loss of functionalitv Store unused EZ KIT Lite boards in the protective shipping package CONTENTS PREFACE Purpose ot This Manual ip lid xii urere OO a xii Ecos T EBD TN xiii Whats New m This Manual cari xiv Technical or Customer SUpport as cceacs ceca ecesee tens inp ed iei p mE edd xiv Sapported EE xv Product Inlet di ose bile ad bl M Pb I bi Rb IDE I quib ci bi ipd Xv l A TE xv Processor Product Infotinati n EEN xvi Related Documents EE xvi Online Technical Documentation iia xvii Accessing Documentation From VisualDSP xviii Accessing Documentation From Windows xviii Acce
60. nload archive zip files one for each manual Use any archive management software such as Win Zip to decompress downloaded files Printed Manuals For general questions regarding literature ordering call the Literature Center at 1 800 ANALOGD 1 800 262 5643 and follow the prompts VisualDSP Documentation Set To purchase VisualDSP manuals call 1 603 883 2430 The manuals may be purchased only as a kit If you do not have an account with Analog Devices you are referred to Analog Devices distributors For information on our distributors log onto http www analog com salesdir continent asp ADSP 21364 EZ KIT Lite Evaluation Svstem Manual xix Notation Conventions Hardware Tools Manuals To purchase EZ KIT Lite and In Circuit Emulator ICE manuals call 1 603 883 2430 The manuals may be ordered by title or by product number located on the back cover of each manual Processor Manuals Hardware reference and instruction set reference manuals may be ordered through the Literature Center at 1 800 ANALOGD 1 800 262 5643 or downloaded from the Analog Devices Web site Manuals may be ordered by title or by product number located on the back cover of each manual Data Sheets All data sheets preliminary and production may be downloaded from the Analog Devices Web site Only production final data sheets Rev 0 A B C and so on can be obtained from the Literature Center at 1 800 ANALOGD 1 800 262 5643 th
61. o 2 15 A 2 16 Expansion banda t De 3E A 2 16 Audio In RCA Connector IA eier ett per A 2 17 Audio Out RCA Connector J5 iii ttt sn eati ue aga 2 17 Te Jack JO sa 2 17 Power Deb 07 EE 2 18 SPDIF Coax Connectors US and JI sirsinekzzjontisenikensenzztti vu 2 18 SPI Header a A 2 19 DAL Fedor P EN 2 19 USB Connector IZI 1 AM A 2 19 TAG Header ZPA ki ra 2 20 ADSP 21364 EZ KIT Lite Evaluation System Manual vii CONTENTS ADSP 21364 EZ KIT LITE BILL OF MATERIALS ADSP 21364 EZ KIT LITE SCHEMATIC Tide Pige a ei nasba ede A B 1 PE PEO i eee enna B 2 a E B 3 PUES D ee B 4 A A A A ER B 5 FI NGS qnem B 6 DO D ER d Dm B 7 S Jail C ii vous eT RR m B 8 A feme C ern B 9 Expansion Interface LACA PEDAL ii it B 10 Din eege B 11 INDEX vili ADSP 21364 EZ KIT Lite Evaluation Svstem Manual PREFACE Thank vou for purchasing the ADSP 21364 EZ KIT Lite Analog Devices Inc evaluation system for SHARC processors The SHARC processors are based on a 32 bit super Harvard architecture that includes a unique memory architecture comprised of two large on chip dual ported SRAM blocks coupled with a sophisticated IO pro cessor which gives a SHARC processor the bandwidth for sustained high speed computations SHARC processors represents today s de facto standard for floating point processor targeted for premium audio applications The evaluation system is designed to be used in conjunction w
62. online Most documentation is available in printed form Visit the Technical Library Web site to access all processor and tools man uals and data sheets http www analog com processors technicalSupport technicalLi brary index html Online Technical Documentation Online documentation comprises the VisualDSP Help system software tools manuals hardware tools manuals processor manuals the Dinkum Abridged C library and Flexible License Manager FlexLM network license manager software documentation You can easily search across the entire VisualDSP documentation set for any topic of interest For easy printing supplementary pdf files of most manuals are provided in the Docs folder on the VisualDSP installation CD ADSP 21364 EZ KIT Lite Evaluation System Manual xvii Product Information Each documentation file tvpe is described as follows File Description chm Help system files and manuals in Help format htmor Dinkum Abridged C library and FlexLM network license manager software doc html umentation Viewing and printing the html files requires a browser such as Internet Explorer 5 01 or higher pdf VisualDSP and processor manuals in Portable Documentation Format PDF Viewing and printing the pdf files requires a PDF reader such as Adobe Acrobat Reader 4 0 or higher If documentation is not installed on your system as part of the software installation you can add
63. or requests for information to 1 781 461 3010 North America 49 89 76903 157 Europe Related Documents For information on product related development software and hardware see these publications Table 1 Related Processor Publications Title Description ADSP 21364 SHARC Microprocessor Datasheet General functional description pinout and timing ADSP 2136x SHARC Processor Hardware Refer ence Description of internal processor architecture registers and all peripheral functions ADSP 2136x SHARC Processor Programming Reference Description of all allowed processor assembly instructions ADSP 21364 EZ KIT Lite Evaluation System Manual Preface Table 2 Related VisualDSP Publications VisualDSP Users Guide Detailed description of VisualDSP features and usage VisualDSP Assembler and Preprocessor Man Description of the assembler function and ual commands VisualDSP C C Complier and Library Description of the complier function and com Manual for SHARC Processors mands for SHARC processors VisualDSP Linker and Utilities Manual Description of the linker function and com mands VisualDSP Loader and Utilities Manual Description of the loader function and com mands If you plan to use the EZ KIT Lite board in conjunction with a JTAG emulator also refer to the documentation that accompanies the emulator All documentation is available
64. s a slave the processor must generate the frame sync and clock signals By default position 3 is ON and the AD1835A generates the con trol signals Position 4 of SW7 disconnects the AD1835A s ADC DATA pin from the DAI interface This is useful when the DAI interface connects to another device 2 10 ADSP 21364 EZ KIT Lite Evaluation System Manual ADSP 21364 EZ KIT Lite Hardware Reference SPI Disable Switch SW8 The SPI interface switch VS disables the SPI chip select lines connected to the SPI flash memory and the AD1835A audio codec The switch also disables the ADC_LRCLK and ADC_BCLK signals on the AD1835A device The switch allows a customer to re use the same pins on the SPI interface and on the expansion interface The SW8 default is all positions ON unless any of the switch signals or the SPI interface signals are used on the expansion connector or via an EZ Extender Push Button Enable Switch SW The push button enable switch SW9 disconnects the push buttons from the corresponding processor pins This allows the signals to be used else where on the board Table 2 3 shows the SW9 connections By default all of the switch positions are ON Table 2 3 Push Button Enable Switch SW9 Connections Switch Position Push Button Reference Designator Processor Pin 1 SWI FLAG 2 SW2 FLAG2 3 SW3 DAI P19 4 SW4 DAI_P20 Position 6 of SW9 connects or disconnects the latch enable pin of the
65. s that USB communication has been initialized successfully and you can connect to the processor using a VisualDSP EZ KIT Lite session Once the USB cable is plugged into the board it takes approximately 15 seconds for the USB monitor LED to light If the LED does not light try cycling power on the board and or reinstalling the USB driver see the VisualDSP Installation Quick Refer ence Card When VisualDSP is actively communicating with the EZ KIT Lite target board the LED can flicker indicating communications handshake 2 14 ADSP 21364 EZ KIT Lite Evaluation System Manual ADSP 21364 EZ KIT Lite Hardware Reference Push Buttons SW1 4 Four push buttons SW1 4 are provided for general purpose user input Two push buttons connect to the FLAG pins of the processor The other two connect to the DAI of the processor The push buttons are active high and when pressed send a high 1 to the processor Refer to LEDs and Push Buttons on page 1 10 for more information The push button enable switch SW9 is capable of disconnecting the push buttons from the corresponding processor pins refer to Push Button Enable Switch SW9 on page 2 11 for more information The processor signals and corresponding push buttons are summarized in Table 2 6 Table 2 6 Push Button Connections Processor Push Button Reference Processor Push Button Reference Signal Designator Signal Designator FLAGI SW1 DAI_P19
66. s to demonstrate the capabilities of the evaluation board The board features Analog Devices ADSP 21364 processor v 136 pin BGA package v 300 MHz core clock speed e Synchronous random access memory SRAM v 512 Kbit x 8 bit e Flash memory v IM x 8 bit Serial peripheral interface SPI flash memory v 2 Mbit ADSP 21364 EZ KIT Lite Evaluation System Manual Preface Analog audio interface v AD1835A codec v 4x2 RCA phono jack for 4 channels of stereo output v 2x1 RCA phono jack for 1 channel of stereo input v Headphone jack for 1 channel stereo output Digital audio interface v RCA phono jack output v RCA phono jack input e LEDs v 11 LEDs 1 power green 1 board reset red 1 USB mon itor amber and 8 general purpose amber Push buttons v 5 push buttons 1 reset 2 connected to DAI 2 connected to the FLAG pins of the processor Expansion interface type A v Parallel port FLAGs DAI SPI Other features v JTAG ICE 14 pin header v O ohm resistors for processor current measurement v SPI header v DAI header The EZ KIT Lite board has a total of 1 MB of parallel flash memory and 2 MB of SPI flash memory The flash memories can store user specific boot code allowing the board to run as a stand alone unit For more ADSP 21364 EZ KIT Lite Evaluation System Manual xi Purpose of This Manual information see External Memory on page l 7 and Boot Mode and Clock Ratio Select Sw
67. ssing Documentation From Web sere xix Printed BORSE sicario Go e vd bii xix VisualDSP Documentation Set arar xix Hardware Tools Manuals sin xx Procesor ET TE xx ADSP 21364 EZ KIT Lite Evaluation System Manual CONTENTS Data Sheets L rar rer EREE EEE nn nn nn tn nee nn xx Notirion Conventions a EC CR EU is XX USING ADSP 21364 EZ KIT LITE t Rt ll egener ee 1 2 Rosse l l e 1 3 Installation and Session DOR PUD a 1 5 Evaluation License triana cine tu n EU IM eds ExuR E PP E 1 7 ER l 7 FIDE AW WE 1 8 LEDs and Push A i vend 1 10 Eure PS inn ieee eines 1 12 Background Telemetry Channel aii detis n Onde pope ud 1 12 ADSP 21364 EZ KIT LITE HARDWARE REFERENCE ENNER eenegen 2 2 L G E 2 3 FUE I AAA 2 5 ulii A E A E T 2 6 A A M PR MM MM 2 6 Expansion OTE is skiet 2 7 TI Emulation DOM i dedi dpQ EMI CUR DIEE EMEUNIME 2 8 Mol coU A a A 2 9 Electret Microphone Select Switch SW6 ese 2 9 Codec Setup Swich ISW T NEE 2 10 vi ADSP 21364 EZ KIT Lite Evaluation System Manual CONTENTS SPI Disable Switch SWB cn 2 11 Push Button Enable Switch WD nina 2 11 Boot Mode and Clock Ratio Select Switch SW10 2412 LoapeBack Test Switch CA EE 2 13 Leeann Pash Bue ari ninien 2 13 General Purpose LEDs CLEDB sana 2 14 Resat a A N 2 14 Power LED LEDIO aa oa 2 14 USB Monitor LED OTZLELDUM suu vexienp bucket sis d 2 14 Push Buttons SW Dod EE 2 15 Board Reset Push Botton SW5 ovin
68. t and two push buttons Figure 2 3 illustrates the EZ KIT Lite s connections to the DAI DAIP17 i CI 2 284MHz SP FLASH CS FLAG PB3 FLAG2 PB4 SP AD1836 CS Figure 2 3 DAI Connections Block Diagram ADSP 21364 EZ KIT Lite Evaluation System Manual 2 5 Svstem Architecture To use the DAI for a different purpose disable anv signal driving the DAI pins with a switch See Codec Setup Switch SW7 on page 2 10 for how to In addition the codec setup switch can route the output signal of the 12 288 MHz audio oscillator Bv default the signal is used as the mas ter clock MCLK for the AD1835A codec All of the DAI signals are available externally via the expansion interface connectors J1 3 as well as the 0 1 spaced header P3 The pinout of the connectors can be found in ADSP 21364 EZ KIT Lite Schematic on page B 1 SPI Interface The serial peripheral interface SPI of the processor connects to an SPI flash memory and the AD1835A audio codec The FLAGO pin is used as a memory select for the SPI flash memory and the FLAG3 pin for the AD1835A s configuration registers The SPI chip select lines for the SPI flash memory and the AD1835A audio codec connect to the processor via switch SW8 pins l and 3 The default for SW8 is all positions ON The switch disables the SPI devices on the EZ KIT Lite enabling the same flag pins be driven on the expansion interface All of the SPI signals are available e
69. vstem Manual
70. xternally via the expansion interface connectors J1 3 as well as the 0 1 spaced header P2 The pinout of the connectors can be found in ADSP 21364 EZ KIT Lite Schematic on page B 1 FLAG Pins The processor has four general purpose IO FLAG pins Table 2 1 describes each flag connections 2 6 ADSP 21364 EZ KIT Lite Evaluation System Manual ADSP 21364 EZ KIT Lite Hardware Reference Table 2 1 IO FLAG Pins FLAG Pin EZ KIT Lite Function FLAGO SPI flash chip select FLAGI Push button SW1 input FLAG2 Push button SW2 input FLAG3 AD1835A s SPI interface chip select For information on how to disable the push buttons from driving the cor responding processor flag pin see Push Button Enable Switch SW9 on page 2 11 The FLAG signals are available externally via the expansion interface con nectors J1 3 The pinout of the connectors can be found in ADSP 21364 EZ KIT Lite Schematic on page B 1 Expansion Interface The expansion interface consists of three 90 pin connectors Table 2 2 shows the interfaces each connector provides For the exact pinout of the connectors refer to ADSP 21364 EZ KIT Lite Schematic on page B 1 The mechanical dimensions can be obtained from Technical or Customer Support Table 2 2 Expansion Interface Connectors Connector Interfaces J1 5V AD15 0 J2 3 3V FLAG3 0 DAI_P20 1 SPI J3 5V 3 3V reset parallel port

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