EVBUM2314 - AP0100AT Evaluation Board User`s Manual
Contents
1. APO100AT2LOOXUGAH GEVB APO100AT Evaluation Board User s Manual Evaluation Board Overview ON Semiconductor The evaluation boards are designed to demonstrate the features of Www onsemi com ON Semiconductor s image sensors products This headboard is intended to plug directly into the Demo 2x system Test points and EVAL BOARD USER S MANUAL jumpers on the board provide access to the clock I Os and other miscellaneous signals Features e Clock Input Default 27 MHz Crystal Oscillator Optional Demo 2x Controlled MCIk Two Wire Serial Interface Parallel Interface HiSPi High Speed Serial Pixel Interface ROHS Compliant Figure 1 APO100AT Evaluation Board Block Diagram To Demo2 To Headboard Ext 45V SUPPLY USB SV SUPPLY Power Supplies HISPI 2 HISPI 1 Peripheral Sensor Peripheral Sensor RJ 45 RJ 45 D 4 HVDDIO LE E 7 DEMO LV 4 gt gt gt gt a DEMO PIXCLK EN Shifter wm Discrete LPF 0 16 DEMO DOUT 16 0 Connector e p Connector HCLK_IN Connector 13 Pin Demo2 26 Pin Demo2 AP0100 CHIP MCLK OUT M TRIG g Level Shifter 13 Pin Headboard Connector 26 Pin Headboard 4EVDDIO LE N Selector Header Serial Level Shifter Beagle Serial Level hifter Beagle Level Connector Shifter ial 8bit I O Expander 3 3V HVDDIO LE 2 wi2. ault Off Frame LED P19 AVDD Closed Default Connects to On Board Regulator 1V8 Internal Regulator Use Open Disconnects from On Board Regulator 1V8 External Regulator Use 42V8 VDDPHY Connects to On Board 2V8_VDDPHY Power Supply j vm oe External Power Supply Connection 43V3 VDDADAC Connects to On Board 3V3 VDDADAC Power Supply ORAE ee External Power Supply Connection P22 P23 Oscillator Xtal P22 1 2 Selects Oscillator as APO100 Input Clock Selection P23 Open Default ia Selects Crystal as AP0100 Input Clock P23 Closed P24 EXT REG Internal Regulator VDD 1 2 Default Internal Regulator 1V2_VDD 2 3 External On Board Regulator U2 Set 1V2 P28 UART Transceiver Open Default Turn Off UART Transceiver Closed Turn On UART Transceiver P30 P31 P32 P33 P34 SEN_CLK Beagle Serial No Access to Demo 2x amp Sensor eel Sec coe Beagle Serial Access to Demo 2x amp Sensor SEN_DATA Open Default Beagle Serial No Access to Demo 2x amp Sensor Beagle Serial Access to Demo 2x amp Sensor ENLDO Enable Internal Regulator Se Disable Internal Regulator GPIO1_LED Set to GPI GPIO 4 Serial IO Expander Control Set to Normal Set to Horizontal Mirror P35 GPIO 3 Serial IO Expander Control 1 2 Set to NTSC 2 3 Set to PAL P36 GPIO 2 Open Default Serial IO Expander Control UU I DENMEM WWW onsemi com 4 APO100AT2LOOXUGAH GEVB Table 1 JUMPERS AND HEADERS continued JumperesderNo Ju
3. d the headboard with spacers and screws ON Semiconductor and the ON are registered trademarks of Semiconductor Components Industries LLC SCILLC or its subsidiaries in the United States and or other countries SCILLC owns the rights to a number of patents trademarks copyrights trade secrets and other intellectual property A listing of SCILLC s product patent coverage may be accessed at www onsemi com site pdf Patent Marking pdf SCILLC reserves the right to make changes without further notice to any products herein SCILLC makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does SCILLC assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation special consequential or incidental damages Typical parameters which may be provided in SCILLC data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating parameters including Typicals must be validated for each customer application by customer s technical experts SCILLC does not convey any license under its patent rights nor the rights of others SCILLC products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support or sustain life or for any oth
4. er application in which the failure of the SCILLC product could create a situation where personal injury or death may occur Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application Buyer shall indemnify and hold SCILLC and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part SCILLC is an Equal Opportunity Affirmative Action Employer This literature is subject to all applicable copyright laws and is not for resale in any manner PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT N American Technical Support 800 282 9855 Toll Free ON Semiconductor Website www onsemi com Literature Distribution Center for ON Semiconductor USA Canada 19521 E 32nd Pkwy Aurora Colorado 80011 USA Europe Middle East and Africa Technical Support Order Literature http www onsemi com orderlit Phone 303 675 2175 or 800 344 3860 Toll Free USA Canada Phone 421 33 790 2910 Fax 303 675 2176 or 800 344 3867 Toll Free USA Canada Japan Customer Focus Center For additional information please contact your local Email orderlit onsemi com Phone 81 3 5817 1050 Sales Representative EVBUM2314 D
5. mpertHeaderName Pins Desorption Setting P38 Closed Default P38 Open P39 Closed EEPROM Address Set to 0x44 P38 Open P38 Closed LUI IM eee pU Io ia NMME UL IT ee P43 SP1 SDO SDI 1 2 Default Open Beagle SPI Access to Sensor SPI P44 SP1 SCLK CS N 1 2 Default Beagle SPI No Access to Sensor SPI P44 Open Beagle SPI Access to Sensor SPI P45 SPI SDI Open Default Data or GND AP0100 in Flash Host Mode High Z AP0100 in Auto Config Mode P47 P48 P59 Serial 12C EEPROM P47 Closed EEPROM Address Set to 0xAA Default Address P48 Open P59 Open P47 Closed EEPROM Address Set to 0xA2 P48 Open P59 Open P47 Open EEPROM Address Set to 0xA6 P48 Closed P59 Open P47 Open EEPROM Address Set to OXAE P48 Open P59 Open P49 SEN_SCLK 2 3 Default AP0100 Serial Control Demo 2x Serial Control P50 SEN SDATA 2 3 Default AP0100 Serial Control Demo 2x Serial Control P51 SEN_RST_OUT 2 3 Default AP0100 Reset P52 BEAGLE SCL 1 2 Default Demo 2x Accessed 2 3 Sensor Accessed P53 BEAGLE_SDA 1 2 Default Demo 2x Accessed 2 3 Sensor Accessed haat M INNEN Ls a 3 SW7 RESET N A When Pushed 240 ms Reset Signal will be Sent to AP0100 Chip www onsemi com 5 APO100AT2LOOXUGAH GEVB Interfacing to ON Semiconductor Demo 3 Baseboard The ON Semiconductor 2x baseboard has a similar 26 pin of the headboard The four mounting holes secure the connector and 13 pin connector which mate with J5 and J6 baseboard an
6. re Serial S EPI EDI Control GPIO Auto Config GPIO Auto Config GPIO2 5 SPI EEPROM Flash oe JTAG GPIO 1Mbit DEMO Serial Figure 2 Block Diagram of APO100AT2LO0OXUGAH GEVB Semiconductor Components Industries LLC 2015 1 Publication Order Number September 2015 Rev 0 EVBUM2314 D APO100AT2LOOXUGAH GEVB Top View ee 4 Dod ru ple Bie e APeiee ATBESDEIONEDT CAES E Headboard Connector J8 Headboard Connector J7 SEN CLK P30 1OE 2OE P54 EEPROM Sel P47 P48 P59 SEN RST OUT P51 SEN DATA P31 MCLK_IN P16 SPI_SDI_BAR P5 SPI_SCLK CS_N P44 OSC XTAL Sel P22 P23 VDD P26 SPI Mem Sel P7 Video Filter Sel P56 P57 P58 TEST_BAR P3 D D t meum nupIEIHREEEIUL LU ON LED P11 GPIO1 LED P17 GPIO DATA16 P37 P40 P41 P42 RESET Switch SW7 STANDBY P6 Bottom View HVDDIO P12 SVDDIO P10 2V8_VDDPHY P20 AVDD P9 3V3 VDDADAC P21 VCC P14 cx Giwe eu TT lacio N iil ccsa PAPE CE RSS S RST OUT T a 1 DL rt d 2 gt c acsj cr D E mE Guo TPIS HiSPi Connector J1 HiSPi Connector J2 ITE jm o gt we ar a jt ee a uL gt D lt gt a L oO gt Baseboard Connector J6 Baseboard Connector J5 Figure 4 Bottom View of the Board www onsemi com 2 APO100AT2LOOXUGAH GEVB Jumper Pin Location The jumpers on headboards start with Pin 1 on the leftmost side of the pin Gro
7. uped jumpers increase in pin size with each jumper added Pin 1 Pins 1 4 Figure 5 Pin Locations for a Single Jumper Pin 1 is Located at the Leftmost Side and Increases as it Moves to the Right Pin 1 Pins 1 and 2 Pins 3 and 4 Pins 5 and 6 Pins 7 and 8 Pins 9 and 10 Figure 6 Pin Locations and Assignments of Grouped Jumpers Pin 1 is Located at the Top Left Corner and Increases in a Zigzag Fashion Shown in the Picture Jumper Header Functions amp Default Positions Table 1 JUMPERS AND HEADERS SADDR Ope LE P7 SPI Memory Selection 3 Default AVDD Closed Default Connects to On Board Regulator 1V8 Internal Regulator Use Open Disconnects from On Board Regulator 1V8 External Regulator Use SVDDIO Select Demo 3 Baseboard Clock Select Slave Clock for Slave Sensor in Multi Camera Mode www onsemi com 3 APO100AT2LOOXUGAH GEVB Table 1 JUMPERS AND HEADERS continued Jumper Header No Jumper Header Name Description ON LED 1 2 Default Connects to On Board to Indicate Power On HVDDIO 1 2 Default Connects to On Board HVDDIO Power Supply 2 3 External Power Supply Connection P14 VCC 1 2 Default Connects to On Board VCC Power Supply 2 3 External Power Supply Connection 5V0 USB 5V0_BUS Power Supply Connection Nee Connects to On Board 5VO_EXT Power Supply MCLK_IN Connects to On Board Oscillator BERNER Connects to XMCLK i e Clock Signal from Demo2 Baseboard GPIO1 LED Open Def
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