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1. NEXT CHAR LOAD ING3 LOADINGS 63 LDA ADDR PUT THE START ADDRESS IN THE B REG MOV B A SO WE CAN CALL THE LOADSWORD SBR CALL LOAD VORD TMP LOADING5 JUMP AHEAD TO REPEAT ROUTINE LDA KEYBOARD BUFFER 2 CHECK IF INPUT WAS A SPACE CPI 20H JNZ ERROR IF IT WASN T A SPACE WE HAVE AN ERROR LDA ADDR GET NEXT ADDRESS TO LOAD INR A BY INCREMENTING CURRENT ADDRESS CALL ASC ENCODE CHANGE ADDRESS BACK ASCII STA ADDR STORE IT BACK CALL LINE LOADING2 RETURN TO CONTINUE ROUTINE THE EXAMINE COMMAND THIS COMMAND HAS 4 PARTS AN EXAMINE ALL OPTION WHICH DISPLAYS THE PRESENT CONTENTS OF ALL THE THREE DISPLAY REGISTERS ON THE 2900 THE DATA PIPELINE AND MICROWORD REGISTERS THE OTHER OPTIONS ARE TO VIEW ANY ONE OF THE REGISTERS INDIVIDUALLY NOTE OF COURSE THAT YOU CANNOT CHANGE THE CONTENTS OF THESE REGISTERS EXAMINE EXAMINE ALL LDA KEYBOARD BUFFER 1 USUAL WE FIRST CHECK 02H TO MAKE SURE THE RIGHT COMMAND VZ EXAMINE ONE WAS ENTERED JNC ERROR IF IT WASN T WE GO TO THE ERROR ROUTINE CALL DISPLAY ALL THE REGISTERS DATA FIRST CALL PIPELINE SECOND CALL MICROWORD LAST CALL A CR AND LE AM2900 RETURN TO THE MAIN ROUTINE EXAMI NE ONE 1 2 THE XD XP AND 64 LDA KEYBOARD BUFFER 3 DISPLAY ONLY ONE2. DDD 1 AIO OV VA V N ed 14 11 14 12 4 13 unused 14 15 14 16 unused unused Outputs from Interface to 9080 25 23 21 19 33 P13 P24 P25 P14 P17 Pio Pii P12 P16 23 Color Red Blue Grn Org Yellow Brown Violet w Blk w Blue w Grn w Org w Brn w Vio Blk Red Blue Grn RUN LOAD LATCH 2900 KIT DLO DL3 DATA REGISTER PLO PL3 PIPELINE REGISTER 9688086 CPU SYSTEM 29 MICROWORD MEMORY REGISTER MEMORY LOAD SIGNAL UNUSED BATA LATCH MUX LATCH 2000 5 28 ADDRESS LATCH SELECT SWITCH UNUSED RUN LOAD LATCH MEMORY LOAD PULSE 25 decisions had to be made The main subroutines for each operation e g load ing reading etc are simple and are explained below Loading a nibble of data into memory Below is a detailed example of a microprogram memory load subroutine It is suggested that the reader follow these steps while referring to Figure 9 the Interface Block Diagram This subroutine loads one nibble field of a micro word at a time Field 3 of the microword is used for this example i e the ALU function and the Am 2901 carry input few assumptions are made in this example 1 The address of the microword is located in the register called ADDR 2 The data to be loaded is located in the register addressed as DATA 8Selected by using the RAM and mux se
3. START SINGSTEP SINGSTEP1 IF NO N IS ENTERED THE DEFAULT IN OH LDA KEYBOARD BUFFER 1 FIND OUT HOW MANY CHARS WERE INPUT CPI 02H 2 CHARS MVI 30 ONLY S INPUT THEN DEFAULT ADDR 0H SINGSTEP 1 JUMP AHEAD JNZ ERROR IF MORE THAN 2 CHARS ERROR LDA KEYBOARD BUFFER 3 GET INTO STA ADDR SAVE THE ASCII ADDRESS CALL HEXCHECK VALID N JC ERROR STA HEXADDR SAVE THE START ADDR CALL RUN SETUP 5 UP PIPELINE ETC SINGSTEP2 61 CALL PRINT PULSE SINGLE STEP CALL CONSIN READ USER S INPUT LDA KEYBOARD BUFFER 1 1 00H WAS IT A CR I E ONLY ONE CHAR WAS ENTRD JNZ AM2900 IF NOT RETURN TO MAIN ROUTINE JMP SINGSTEP2 IF CONTINUE SINGLE STEP THE LOAD COMMAND THIS COMMAND ALLOWS THE USER TO MICROPROGRAM THE AM2900 IT ALSO ALLOWS THE USER TO VIEW AND OPTIONALLY CHANGE THE CONTENTS OF THE MICROPROGRAM RAM THE COMMAND FORMAT IS LN WHERE N IS THE START ADDRESS N IS OPTIONAL AND IF IT IS NOT PRESENT THE DEFAULT ADDRESS IS 0 LOADING LOADING LOADING2 LDA KEYBOARD BUFFER 1 FIND OUT HOW MANY CHARS WERE JUST READ IN CPI 02H CHECK FOR 2 CHARS MVI A 30H DEFAULT ADDRESS IS ZERO LOADING1 ONLY ONE CHAR USE DEFAULT ADDRESS JNZ ERROR MORE THAN 2 CHARS ERROR LDA KEYBOARD BUFFER 3 READ THE ADDRESS IF THERE WAS ONE STA ADDR SAVE THE ADDRESS LDA ADDR GET THE ASCII ADDRESS STA CONSOLE BUFFER STORE IT TO PRIN
4. 2 00 Saher guna ove Trot SIENALS ufo Am 290540 d eter ace c ut Select 7 ee ONES Sew Ti Ryn 1 Load 2 m 72 W120 EMI 2 gt Y l T Fig 4 Interface board schematics III Coit OC AA CHRUS 24 0 Xol 01 He 14 1 Jumper 2 4 z to 754 Wires 4 4 3 55 6 3 03 13 9 42 x pon m se 4 K 2 gp 05 io 24 9 aS a Me 0 H Or 13 14 m 7 9 to 19 6 ond QA Fig 5 Interface board schematics 9 47 Software Listing LAST UPDATE 6 6 84 ORG 100H JMP STARTPOINT ORG 1000H BDOS EQU 5H THE BDOS ENTRY POINT TH S IS USED BY SELECTING ONE OF THE MANY BDOS OPTIONS AS DOCUMENTED IN THE REPORT INSERTING THIS VALUE INTO THE C REGISTER AND CALL THE BDOS ROUTINE THE FOLLOWING LOCATIONS ARE USED WITH PORT B AS CONTROL SIGNALS TO THE INTERFACE BOARD THE AM2900 KIT DATA LATCH EQU 01H SELECTS 1 AND LATCHES IN THE DATA NYBBLES MUX LATCH EQU 02H SELECTS 2 AND LATCHES IN THE RAM MUX SELECT ADDRESS LATCH EQU 03H 03 LATCHES IN THE ADDRESS RUN LOAD LATCH EQU 05H 05 LATCHES IN THE RUN OR LOAD CHOICE WHERE RUN 1 AND LOAD 0 MEMORY LOAD EQU 06H PULSES TO LOAD MEMORY PULSE EQU 07H THE CLOCK PULSE THE NEXT THR
5. AN ABSTRACT THE THESIS OF Ninan Mammen for the degree of Master of Science in Electrical and Computer Engineering presented on June 8 1984 Title A Microprogramming Learning System Redacted for privacy Abstract Approved Roy Rathja Ph D A microprogramming teaching tool was designed and implemented This tool was based on the Am 2900 bit slice microprocessor family It provides tools for understanding software development for a simple bit slice microprocessor Microprogramming Learning System by Ninan Mammen A THESIS submitted to Oregon State University in partial fulfillment of the requirements for the degree of Master of Science Completed June 8 1984 Commencement June 1985 APPROVED Redacted for privacy Assistant Professor of Electrical Engineering in charge of major Redacted for privacy Date thesis is presented Typed by Joanne Oshiro for Acknowledgements Thanks are due to Advanced Micro Devices Incorporated for their grant of the AM 2900 kit and the System 29 Their generosity made this project possible I would like to thank Don Heuster of Advanced Micro Devices Incorporated for his invaluable help in obtaining the AM2900 kit and for continually putting me in contact with all the right people during the development stages of this work I would also like to thank Robert Searfus for being around to help with details about the System 29 and for his
6. configuration is determined 16 EXTERNAL CONNECTOR 65 PERIPHERAL INTERFACE ADAPTOR U26 100 IODS 1905 1004 1003 1001 0 m 31 29 27 19 21 23 25 MIG 35 37 39 RST MAS MAB 41 49 47 45 43 USER DEFINED TERMINATORS OR DRIVERS System 29 parallel ports 7 Fig 17 Interface Methods There were two choices for running the interface be tween the two systems the first was to run the system as it was intended to run i e to use the 29 05 outputs to to simulate the 2900 s switches The other choice was to reconfigure the system and run it synchronously The lat ter method would mean that the address would have to be present at a certain time At the data would be expected Then once the data was present it could be loaded at the next pulse t This would of course involve timing restrictions a clock pulse and a lot of extra timing logic As a consequence it was decided instead to use the 29 05 to simulate the 2900 kit s swit ches Also by using software to raise and lower the signal at one of the 29 05 s output ports the Single Step Clock Switch could be simulated This avoided the neces sity of using an external clock pulse to run the kit This method though slower than the synchronous method is fast enough such that the time penalty is of no consequence and is unnoticed by th
7. READ IN THE FIRST CHAR CPI L _ CHECK IF IT 15 AN L Jz LOADING IF SO DO THE LOAD ROUT INE CPI x Jz EXAMINE CPI 6 G JZ GORUN CPI s 5 Jz SINGSTEP CPI E E EXIT END JNZ ERROR IF THNOT AN THEN WE HAVE AN ERROR MVI C 0H IF E WAS INPUT WE RETURN TO CPM CALL BDOS BY USING THE BDOS RESET COMMAND JMP AM2900 LOOP 99999999490940909909999990909999999999999209999999999990999999929 THE READ KEYBOARD SUBROUTINE THIS SUBROUTINE SELECTS THE APPROPRIATE VALUE FOR THE C REGISTER AND CALLS BDOS BDOS EXPECTS THE BUFFER LOCATION IN THE DE REGISTER AND THE SIZE OF THE INPUT BUFFER IN THE FIRST BUFFER LOCATION THE ROUTINE RETURNS WITH THE NO OF CHARS INPUTTED IN THE SECOND BUFFER LOCATION THE BUFFER HERE IS KEYBOARD BUFFER CONSIN MVI C 10 THE 9 SELECTS THE INPUT STRING ROUTINE IN BDOS LXI D KEYBOARD BUFFER 5 THE BUFFER LOCATION CALL BDOS RET THE PRINT ROUTINE THIS SUBROUTINE USES THE BDOS MONITOR ALSO THE END OF THE STRING TO BE PRINTED IS BY A IN THE BUFFER CONSOUT MVI C 09 THE 10 SELECTS THE BDOS OUTPUT STRING LXI CONSOLE BUFFER THE LOCATION OF THE BUFFER IS GIVEN CALL BDOS RET 51 THE ERROR ROUTINE THIS ROUTINE PRINTS IGNORES INPUT AND RETURNS CONTROL TO THE MAIN PROGRAM 2900 ERROR MVI CALL CR LF LXI H CONSOLE BUFFER UP THE
8. The X Examine command Examine data register System responds with the 8 data nibbles Note the lowest significant nibble is the currently addressed memory location Examine presently addressed microword System responds with 8 microword nibbles Examine present pipeline register contents System responds with 8 pipeline nibbles 31 X Examine all output registers D 12345678 P 9ABCDEFO0 M 1A2B3C4D System responds with contents of all three output registers System prompt Running the program the Go command10 G3 F lt cr gt G for go 3 for start location F for breakpoint 3 D 54002192 P 21000000 M F1000000 2 D AA65430F P F1000000 M F1000000 System responds by running program from location 3 output ting address of the location 8 data nibbles 8 microvord nibbles and 8 pipeline register nibbles at each step most significant nibble first User can break program at any time by hitting any key on the console d The S Single Step 410 52 lt cr gt 8 for single step 2 for start location 2 D ABCDEFO P 18675309 M 54002192 System responds by running program from location 2 outputting as above the address of the location 8 data 10 G and 8 commands executed in Run mode Should the user wish to execute commands in the Load mode certain examples in the Am 2900 kit user s manual do this it is suggested that he do
9. m 8 i gt e Processor 2 8 Input Fig 5 Multiplexer input detail 14 Am 2900 Kit Output The method of output i9 was simple since it was possible to tap into the display outputs just prior to the LED s of the 2900 kit as shown in Figure 6 Loading was not a concern due to the short distance the signals needed to be carried between the Am 2900 and the interface board output 777 jumper wires to interface registers 3 board Fig 6 Am 2900 output connection to Interface Board 15 System 29 Input and Output After the kit s method of output and input had been decided upon it was Reel to decide on the method of input and output on the 29 05 It was decided to use the three 8 bit bidirectional parallel ports on the 9080A processor board see Figure 7 Each of these ports can be configured as either inputs or outputs Their configuration is decided by the following two factors 1 How the ports are addressed from the 9080A i e whether an OUT port address command or an IN port address is used 2 Whether receivers or drivers are inserted into the optional sockets as shown in Figure 4 Thus by putting drivers on all the ports that are to be outputs and using the OUT port address 009 output port configuration is determined Likewise using receivers and the IN port address command an input port
10. of Port This resulted in the input output configuration shovn in Table 3 1 and the block diagram shovn in Figure 9 The Interface Board The interface board vas vired using virevrap methods that being the easiest to debug and modify The board vas designed to be as physically modular as possible i e it can be disconnected from the 2900 kit for testing or modifying This also allovs the entire system to be moved vithout breaking vires or loosening connections A schematic of all connections is included in the Appendix Software Decisions Having decided on the hardware options the software 6 The Single Step Pulse Generator Svitch does not need to be accessed by the 29 05 The user must make sure it remains in the Single Step position vhenever using the simulation program 7By using to select a source it vas possible to reduce the number of 29 05 input lines needed and thus use the DB25 connector vith its limited number of pins Table 3 1 2900 Signal 8 DATA BUS DATA BUS DATA BUS DATA BUS DATA BUS DATA BUS DATA BUS NADU Q CONTROL 0 CONTROL 1 CONTROL 2 UNUSED MUX SELECT MUX SELECT UNUSED UNUSED OUTPUT BUS OUTPUT BUS OUTPUT BUS OUTPUT BUS UNUSED Table of 1 0 signals Inputs to Interface Board from 9080 N 29 05 Signal Name Edge Conn DB25 Pin No N C Jumper Pin No M
11. Donnamaie Bit Slice Design Controllers and ALUs Garland and STPM Press 1981 Sieworek Bell and Newell Computer Structures Principles and Examples McGraw Hill 1982 Chapters 11 12 13 and 14 Mick and Brick Bit Slice Microprocessor Design McGraw Hill 1980 Appendix 37 Table 41 Drivers and Terminators used for 9080 parallel ports Port Name Socket Chip Chip and bits Configuration Number Type No A0 3 OUTPUT V6 NAND 7400 NAND 7400 OUTPUT NAND 7400 Vio AND 7408 60 3 9 Resistor 221 331 pack 4 7 UNUSED Va x r Table AZ Jumper color coding pin outs Pin Number Color 1 Black 2 Red 3 Blue 4 Green 5 Orange 6 Yellow 7 Brown 8 Violet 9 White Black 10 White Red 11 White Blue 12 White Green 13 White Orange 14 White Yellow 15 White Brown 16 White Violet refer to Figure 4 38 Table Jumper pin outs Signals from Am 2900 kit to Interface Jumper pin From Switch No Am 2900 Signal Name 11 1 511 MASS 11 2 510 MAS 11 4 5 MAS J1 6 S MDS2 11 8 5 50 11 10 5 RMS 11 12 Qo single switch input J1 13 01 load run switch input J1 14 514 memory load switch input 12 1 DL 3 2 DL 13 3 DL 13 4 DL J3 6 PL 13 7 PL J3 8 PLo 73 9 UL3 13 10 UL 13 11 UL J3 12 UL J 3 15 G 13 16 5 Table A3 lumper pin outs cont Sig
12. PROGRAM IT IS DONE BY SENDING OUT A CLOCK SINGLE STEP PULSE TO THE AM2900 WHILE IT IS STILL IN LOAD MODE THAT IS COMPLETED THE ROUTINE PUTS THE AM2900 INTO RUN MODE THE START ADDRESS SHOULD BE IN THE WHEN THE CALL IS MADE RUN SETUP ANI 01 RLC RLC RLC MOVE ADDRESS INTO BITS 6 OUT PORT A SEND OUT THE ADDRESS MVI A ADDRESS LATCH LATCH IT IN OUT PORT B MVI A 00H PORT B MVI A SEL LOAD SELECT LOAD MODE OUT PORT A SEND IT OUT MVI A RUN LOAD LATCH LATCH IT IN OUT MVI A PULSE SEND OUT THE SING STEP PULSE OUT PORT B LOAD THE FIRST MICROWORD INTO THE PIPELINE MVI A 0H OUT PORT B MVI A SEL RUN SELECT RUN MODE OUT PORT A MVI A RUN LOAD LATCH 3 OUT 0011 OUT PORT B LOWER LATCH SIGNAL RET 59 THE GO ROUTINE THIS ROUTINE RUNS THE AM2900 BOARD THE FORMAT FOR THIS COMMAND IS GN M WHERE S N IS THE START ADDRESS AND M IS THE BREAK ADDRESS NOTE THE M IS OPTIONAL GORUN GORUN3 1 MVI A 0H WE USE A FLAG LATER ON STA FLAG ALL SO WE CLEAR IT HERE LDA KEYBOARD BUFFER 1 VE CHECK IF CPI 02H LESS THAN 2 CHAR VERE ENTERED Jc ERROR JZ GORUN3 IF EXACTLY 2 CHAR WERE ENTERED WE JUMP AHEAD CPI 04H IF MORE THAN 2 CHAR WE CHECK FOR 4 CHARS INZ ERROR IF NOT 4 CHARS WE HAVE AN ERROR MVI A OFFH IF 4 CHARS WE SET THE FLAG THAT MEAN
13. REGISTER CPI D IS IT D JNZ EXAMI NO TRY NEXT LETTER CALL XD 1F IT WAS DISPLAY IT CALL CR LE TMP AM2900 CPI CHECK FOR JNZ EXAM2 IF NOT JUMP AHEAD CALL XP CALL 2900 7 CHECK FOR M JNZ ERROR IF NONE OF THE ABOVE WE HAVE AN ERROR CALL XM CALL CR LF AM2900 XM ROUTINES MVI A D PUT A D IN THE BUFFER PRINT STA CONSOLE BUFFE MVI A STA CONSOLE BUFFER 1 MVI AND END OF STRING MARKER FOR STA CONSOLE BUFFER 2 THE BDOS SUBROUTINE CALL CONSOUT PRINT THE D C SEL DATA SELECT THE DATA REGISTER BE LOADED CALL RD PRINT 8NYBBLES LOAD IN AND PRINT OUT THE MVI A P STA CONSOLE BUFFER MVI STA CONSOLE BUFFER 1 A STA CONSOLE BUFFER 2 CALL CONSOUT MVI C SEL PIPELINE CALL RD PRINT 8NYBBLES RET A IM 5 CONSOLE BUFFER MVI CONSOLES BUFFER 1 MVI A j STA CONSOLE BUFFER 2 CALL CONSOUT MVI C SEL MICROWORD CALL RD PRINT 8NYBBLES RET END 100H 65
14. SEND THE DATA OUT PORT A DATA LATCH SET TO LATCH THE DATA PORT B SEND OUT PORT B WHICH LATCHES THE DATA IN 00 A B LOAD ADDRESS INTO FROM THE REG PORT A SEND THE ADDRESS OUT PORT A A ADDRESS LATCH SET UP TO LATCH IN THE ADDRESS PORT B LATCH A MUX LATCH SET UP TO LATCH IN THE RAM MUX SELECT LATCH MEMORY LOAD SET UP STROBE THE MEMORY LOAD PORT B LOAD THE MEMORY DELAY DELAY FOR PROPAGATION ETC 0 PORT B LOWER THE MEMORY LOAD PULSE 56 THE LOAD WORD SUBROUTINE EXPANSION OF THE LOAD NYBBLE ROUTINE EARLIER THIS ROUTINE LOADS ALL 8 NYBBLES OF THE MICROWORD FROM THE LSN OF THE 8 BYTE LONG BUFFER CALLED LOAD BUFFER THE ADDRESS OF THE MICROWORD TO BE LOADED SHOULD BE PASSED IN REGISTER B LOAD WORD LOAD WORD1 MVI A SEL LOAD MAKE SURE SYSTEM IS LOAD OUT PORT A MODE MVI A RUN LOAD LATCH LATCH IN OUT PORT B MVI OUT PORT B LOWER LATCH SIGNAL MOV A B PUT THE MICROWORD ADDRESS IN THE ACC ANI OFH MASK OFF GARBAGE RLC RLC RLC THE ADDRESS INTO BITS TO A6 ORI 07H SO THAT THE MUX RAM ADDRESS CAN BE IN MOV B A BITS A0 TO A2 RETURN IT TO REG B MVI C 8 SET UP A COUNTER FOR 8 NYBBLES LXI LOAD BUFFER SET UP TO READ THE BUFFER MOV A M GET THE NYBBLE CALL LOAD NYBBLE LOAD IT INTO THE MICROWORD INX H SE
15. USED AND THE 1ST LOCATION IS THE MOST SIGNIFICANT NYBBLE 12 A 12 BYTE BUFFER USED STORE LETTERS NOS WHICH ARE TO BE PRINTED THE LAST CHAR HAS TO BE A OUTPUT FROM Z 80 TO CRT 12 A 12 BYTE BUFFER WHICH STORES THE INPUT FROM THE CRT KEYBOARD INPUT CONSOLE TO Z 80 49 INITIALIZATION STARTPOINT MVI STA MVI OUT MVI LXI CALL 12 SET THE SIZE OF THIS BUFFER BY PUTTING KEYBOARD BUFFER THE SIZE IN THE 1ST LOCATION 89H SET THE PPI AM9555 TO HAVE PORTS 73H A amp B AS OUTPUTS AND AS AN INPUT OUT 73 WRITES THE CONTROL C 09H PRINT THE START MESSAGE D MESSAGE BDOS 999999999 MATN CONTROL THIS PROGRAM IS THE MAIN LOOP THAT CALLS ALL THE DIFFERENT BRANCHES AM2900 MVI A SEL LOAD RESET SYSTEM TO LOAD MODE OUT PORTA SENDING OUT 1 TO THE LATCH MVI A RUN LOAD LATCH AND BY LATCHING IN THE 1 OUT PORT B LXI H CONSOLE BUFFER SET UP THE SYSTEM PROMPT MVI 0111 0AH LF INX H MVI M INX H LOAD IT INTO THE CONSOLE BUFFER MVI M PUT THE TO INDICATE THE END OF STRING CALL CONSOUT PRINT IT BY CALLING THE PRINT ROUTINE CALL CONS IN READ THE USER S INPUT CALL CR LF CR AND LF LDA KEYBOARD BUFFER 1 CHECK IF USER ONLY ENTERED CR CPI 0H 72 AM2900 IF SO WE JUST LOOP AROUND 50 LDA KEYBOARD BUFFER 2
16. from four indi cator light emitting diodes LED s The LED s may be used to read outputs from both the 2901 and the 2909 as well as some of the other registers Two other sets of LED s allow the user to examine the microword memory and the pipeline register contents see Figure 2 The pipeline register is a device used to speed up processing time by reducing the amount of time the system has to wait to fetch the next instruction Microinstruc tions being executed are in the pipeline register Thus while all the ALU functions and other micro operations are being carried out the next address can be decoded and the new microinstruction can be made ready at the inputs of the pipeline register Thus when the present microinstruction has been executed the next microinstruc tion has already been fetched and can be loaded and exe cuted immediately Further details about microprogramming can be obtained from White Bit slice Design Controllers and ALUs and Sieworek Bell and Newell Computer Structures Principles and Examples and Mick and Brick Bit slice Mi croprocessor Design Using the Am 2900 Kit Once the user has developed a microprogram it can be loaded into memory using the three sets of input switches and a number of control switches see Figure 2 The RAM and Mux Select Switches These three swit ches allow access to the eight different fields of the microprogram word These switches are needed because the kit h
17. microprogram word 6 4 Basic block diagram of the Am 2900 Microprogramming Learning System 12 5 Multiplexer input detail 13 6 Am 2900 output connection to Interface Board 14 7 System 29 parallel ports 16 8 Single step and load run connections 19 9 Interface Block Diagram 24 10 Effective 7 bit address for a microword field 27 Al Interface board layout top view 42 2 Interface board schematics I 43 Interface board schematics II 44 4 Interface board schematics III 45 5 Interface board schematics IV 46 1 2 4 5 6 List of Tables Table of I O signals Control signals for Port C source Drivers and terminators used for 9080 parallel ports Jumper color coding outs Jumper pin outs Inputs from 9080 to Interface Board Table of ports Jumper cables Page 23 28 37 37 38 40 41 41 MICROPROGRAMMING LEARNING SYSTEM CHAPTER INTRODUCT ION Microprogramming is taught in senior level computer architecture classes at Oregon State University In an effort to provide a practical example of microprogramming the design of a microprogramming teaching tool was under taken To be useful in a lab situation a microprogramming teaching tool must have the following characteristics 1 Be simple to use 2 Allow students to write and run their own microprograms 3 Demonstrate the advantages and disadvantages o
18. 0H IF YES IT S NOT A HEX NO MORE THAN 39H SIE LESS THAN 39H IT COULD BE BETWEEN 0AH TO 0111 CHECK IF IT IS LESS THAN 41H IF LESS THAN 41H AND MORE THAN 39H MEANS BAD IF IT IS MORE THAN 41H SEE IF MORE THAN 46H IF MORE THAN 46H IT IS BAD IF BETWEEN 0AH AND 0 WE ADD 9H TO GET HEX VALUE HEXCHECK CPI 3 0H JC HEXBAD CPI 3AH JC HEXGOOD CPI 41H HEXBAD CPI 47H JNC HEXBAD ADI 09H HEXGOOD ANI 0FH RET HEXBAD STC BAD HEX VALUE CLEAR THE CARRY FLAG AND MASK OFF THE TOP NYBBLE INDICATE BY RAISING CARRY FLAG RET 55 THE HEX ASCII ENCODING ROUTINE THIS ROUTINE ENCODES HEX VALUES TO THEIR EQUIVALENT ASCII VALUES THE HEX VALUE IS PASSED THROUGH THE ACC AND THE ASCII VALUE IS RETURNED IN THE ACC ASC ENCODE ANI ADI CPI RC ADI RET 0FH GET RID OF TOP NYBBLE GARBAGE 3 0H ADD 30H 3AH CHECK IF VALUE WAS 0AH OFH IF NOT VE ARE DONE RETURN 07H IF ABOVE 9H WE ADD 7 TO GET ASCII EQU THE RAM LOADING SUBROUTINE THIS SUBROUTINE LOADS ONE NYBBLE OF THE MICROWORD RAM WITH THE DATA PASSED TO IT IN THE ACC THE ADDRESS OF THE RAM INCLUDING THE RAM MUX ADDRESS IS PASSED THROUGH REGISTER B NOTE THIS ADDRESS IS THEN 7 BITS LONG THE LOWER THREE BITS BEING THE RAM MUX SELECT BITS LOAD NYBBLE OUT MVI OUT MVI MOV MVI OUT MVI OUT MVI OUT CALL MVI RET PORTA
19. BUFFER M PUT A IN THE BUFFER INX H SET UP THE NEXT BUFFER LOCATION MVI M 07H PUT A BELL IN BUFFER INX H MVI M 0AH LE INX H MVI 0DH CR INX H NEXT LOCATION MVI M g PUT A TO INDICATE THE END OF THE STRING CALL CONSOUT GO TO PRINT THE BUFFER JMP AM2900 BACK TO THE MAIN PROGRAM THE DELAY ROUTINE THIS DELAY ROUTINE IS USED JUST AS TO ALLOW FOR PROPAGATION DELAYS AND ETC WHEN ADDRESSING THE AM2900 DELAY DELAY1 SHLD DELAYSAVE SAVE THE HL REGISTER LXI H DELAYREG SET UP A COUNTER MVI M 001H DOWN FROM DCR M INZ DELAY1 LHLD DELAYSAVE RESTORE THE HL REGISTER RET 52 SUBROUTINE TO READ THE AM2900 BOARD LEDS THIS SUBROUTINE READS ANY ONE OF THE DATA PIPELINE OF MICROWORD NYBBLES THE CHOICE OF WHICH SET TO READS 1S SELECTED BY PASSING THE CHOICE THROUGH THE REGISTER AS EXPLAINED AHEAD IN THE RD PRINT 8NYBBLES ROUTINE THE CHOICE OF RAM MUX FOR THE AM2900 IS PASSED THROUGH THE ACCUMULATOR THE ACCUMULATOR RDLEDS OUT PORT A MOV A C ORI MUX LATCH OUT PORT C ANI 0FH RET THE DATA IS RETURNED IN THE LSN OF SEND OUT MUX RAM SELECT THROUGH PORT MOV THE CHOICE OF LED S TO BE READ INTO ACC SET UP THE SIGNAL TO LATCH IN THE MUX RAM SELECT AND TO SEND OUT THE CONTROL SIGNALS THAT SELECT WHICH SET OF LEDS TO READ SO IT IS READY FOR NEXT TIME READ IN THE LED
20. EE LOCATIONS ARE USED WITH PORT C TO SELECT WHICH OF THE 3 2900 LED NYBBLES TO READ I E IT CONTROLS THE MUX THIS MUX IS CONTROLLED BY BITS 5 AND 4 OF PORT C SEL DATA EQU 10H DATA NYBBLE MUX Cl C220 1 ETC SEL PIPELINE EQU 20H SEL MI CROWORD EQU 30H OTHER REGISTERS AND BUFFERS TEMP DS 1 A SCRATCH REGISTER ADDR DS 1 A REGISTER USED TO STORE AN ADDRESS TEMP HEXADDR DS 1 USED TO STORE THE ABOVE ADDRESS IN HEX FLAG ALL DS 1 USED AS ELAG PORT A EQU 70H USED TO ADDRESS PORT PORT B EQU 71H USED TO ADDRESS PORT B EQU 72H USED TO ADDRESS PORT C BREAK PT DELAYSAVE DELAYREG SEL LOAD SEL RUN MESSAGE DATA BUFFER LOAD BUFFER DS DS DS EQU EQU DS CONSOLE BUFFER DS KEYBOARD BUFFER DS 48 1 THIS BYTE IS USED TO STORE THE BREAK POINT FOR THE GO COMMAND 2 USED TO SAVE HL REG FOR DELAY ROUTINE 1 COUNTER USED FOR DELAYING 01H WHEN LATCHED IN PUTS 32900 IN LOAD MODE 00H WHEN LATCHED IN PUTS 2900 IN RUN MODE OAH OAH 2900 MICRO PROGRAMING LEARN ING SYSTEM 0AH NEIL MAMMEN 1984 OAH 0AH g 8 THIS 8 BYTE BUFFER IS USED TO STORE THE 2900 LED DATA THAT IS READ ONLY THE LSN S ARE USED INPUT FROM 2900 TO 2 80 8 AN 8 BYTE BUFFER USED TO STORE THE 8 NYBBLES THAT WILL DOWN LOADED INTO THE AM2900 RAM I E THE MICROWORD ONLY THE LSN ARE
21. S MASK OFF THE UNWANTED BITS I E THE MSN RETURN WITH DATA IN LSN OF ACCUMULATOR THE READ WORD ROUTINE THIS SUBROUTINE READS ALL 8 NYBBLES OF ANY OF THE AM2900 LED OUTPUTS WHAT IT IS IS JUST AN EXPANSION ON THE LAST RD DATA SUBROUTINE THE WHOLE WORD DATA PIPELINE OR MICROWORD IS READ AND STORED IN THE DATA BUFFER WHAT THE ROUTINE DOES IS GO THRU ALL 8 RAM MUX COMBINATIONS THE INFO IS STORED STARTING WITH MUX RAM SELECT EQUAL TO 7 FIRST THEN 6 ETC OBVIOUSLY ONLY THE LSN OF EACH OF THE DATA BUFFER BYTES ARE USED RD WORD RD WORD1 MVI B 8 USED TO ADDRESS THE MUX RAM LXI H DATA BUFFER SET UP THE BUFFER TO STORE THE INFO DCR B COUNTDOV N AND MUX RAM ADDRESS MOV A B MOVE ADDRESS INTO ACCUMULATOR CALL RD LEDS 53 GO TO READ THE LEDS THE REGISTER SHOULD ALREADY HAVE THE CHOICE OF WHICH OF THE 3 LEDS WE ARE TO BE READING MOV M A RDgLEDS RETURNS WITH THE NYBBLE IN THE ACC SO WE STORE IT IN THE BUFFER MVI A 0 LOWER THE LATCH SIGNAL OUT PORT B SO THE LATCH CAN BE USED AGAIN INX H SET UP THE NEXT BUFFER LOCATION MOV CHECK FOR ALL 8 NYBBLES ADI TRIGGER THE FLAGS JNZ HEROD IF NOT GO BACK RET WHEN DONE RETURN READING AND PRINTING ALL 8 NYBBLES OF ANY OF THE THREE REGISTERS THIS ROUTINE TAKES THE PRESENT LATCHED IN ADDRESS AND PRINTS ALL 8 NYBBLES OF ANY OF THE DATA PIPELINE MICROWORD REGISTERS ON THE CON
22. S STA FLAG ALL VE HAVE BREAK POINT LOOK OUT FOR LDA KEYBOARD BUFFER 4 CHECK FOR A JNZ ERROR LDA KEYBOARD BUFFER 5 GET THE BREAK ADDRESS CALL HEXCHECK CHECK IF M IS A VALID HEX VALUE ERROR STA BREAK PT SAVE THE BREAKPOINT ADDRESS LDA KEYBOARD BUFFER 3 N STA ADDR SAVE THE ADDRESS IN ASCII CALL HEXCHECK CHECK IF START ADDRESS IS VALID JC ERROR STA HEXADDR SAVE THE ADDRESS IN HEX CALL RUNgSETUP SET UP THE PIPELINE REGISTER ETC CALL PRINT PULSE SINGLE STEP LDA FLAG ALL CHECK TO SEE IF WE HAVE A BREAKPOINT CPI 0H THAT NEEDS TO BE CHECKED JZ GORUN2 NOT JUMP AHEAD LDA HEXADDR IF WE HAVE A BREAKPOINT CHECK IT AGAINST THE HEX VALUE OF THE ADDRESS LXI H BREAK PT GET THE BREAK POINT ADDRESS GORUN2 60 CMP M COMPARE THEM JZ AM2900 IF WE HAVE REACHED THE ADDRESS WE EXIT MVI C 11 CALL BDOS CHECK FOR ANY INPUT ON CONSOLE CPI 0H JZ GORUN1 IE NOT WE GO BACK TO LOOP JMP 2900 IF ANY INPUT WE BREAK AND EXIT CARRIAGE RETURN LINE FEED SUBROUTINE PRINTS A CR AND A LE CR LF MVI A 0DH CR STA CONSOLE BUFFER PUT INTO OUTPUT BUFFER MVI A 0AH LE STA CONSOLE BUFFER 1 A END STRING MARKER STA CONSOLE BUFFER 2 CALL CONSOUT RET THE SINGLE STEP COMMAND THIS COMMAND EXPECTS AN INPUT THE FORMAT SN WHERE IS THE ADDRESS AT WHICH TO
23. SOLE THE CHOICE OF WHICH REGISTER TO PRINT IS SELECTED BY SETTING BITS 5 AND 4 OF THE REGISTER AND SUBSEQUENTLY PORT AS SHOWN 5 C SEL DATA 10H C SEL PIPELINE 20H C SEL MICROWORD 30H THIS ROUTINE IS A FURTHER EXPANSION OF THE RD WORD SUBROUTINE ABOVE RD PRINT 8NYBBLES CALL RD WORD MVI 8 1ST READ ALL 8 NYBBLES SELECTED BY C SET UP THE 8 NYBBLE COUNTER LXI D CONSOLE BUFFER SET UP THE CONSOLE BUFFER TO ACCEPT THE 8 NYBBLES TO PRINTED ON THE CONSOLE LXI H DATA BUFFER SET UP TO READ RD PRINT1 MOV A M THE DATA 7 WITH THE DATA WE JUST READ READ THE 15 NYBBLE CALL A SC ENCODE CONVERT FROM HEX TO ASCII IF DONE PUT A AN 54 STORE IT IN THE CONSOLE PRINT BUFFER SET UP FOR THE NEXT NYBBLE DONE IF NOT RETURN FOR NEXT NYBBLE END OF STRING MARKER STAX D INX D INX H DCR B JNZ RD PRINT1 MVI A 09H STAX D INX D MVI A STAX D CALL CONSOUT RET THE HEXCHECK AND DECODE ROUTINE THE VALUE IN THE ACC IS AN ASCII BETWEEN 0 9 OR IT ISN T IT SETS THE CARRY BI IT IS DONE BY USING COMPARES AND SETS THE CARRY FLAG IF THE ACC THAN THE COMPARED VALUE TO PRINT THE BUEFER RETURN THIS ROUTINE CHECKS IF HEX DIGIT I E IF IT IS IT CONVERTS IT INTO HEX T TO INDICATE A NON HEX THE CPI COMMAND WHICH IS LESS LESS THAN 3
24. T IT CALL HEXCHECK MAKE SURE AND CONVERT TO HEX ERROR STA ADDR SAVE THE HEX VERSION OF ADDRESS MVI A toe STA CONSOLE BUFFER 1 SET UP DISPLAY MVI A END MARKER STA CONSOLE BUFFER 2 CALL CONSOUT LDA ADDR CALL BACK HEX ADDRESS ANI OFH MASK OFF GARBAGE RLC MOVE ADDRESS TO BITS 6 RLC LOADING4 62 OUT PORTA SEND THE ADDRESS OUT 2900 MVI A ADDRESS LATCH LATCH IN THE ADDRESS OUT PORT B MVI 00 OUT PORT B MVI C SEL MICROWORD SET UP TO READ THE MICROWORD CALL RDgPRINT 8NYBBLES LEDS GO TO READ CALL CONSIN READ THE USERS INPUT LDA KEYBOARD BUFFER 1 CHECK TO SEE IF WE ARE TO LOAD CONTINUE OR EXIT ADI 0 SET ZERO FLAG IF ACC IS ZERO 12 AM2900 NO INPUT I WE CR ONLY WE EXIT CPI 01H CHECK FOR 1 CHAR INPUT 1 E SP IZ LOADING IF ONLY 1 CHAR VE CHECK CPI 08H CHECK FOR 8 CHAR INPUT JNZ ERROR IF NONE OF THE ABOVE WE HAVE AN ERROR LXI H KEYBOARD BUFFER 2 NOV WE CHECK TO SEE IF ALL MVI B 08H 8 CHARS INPUT ARE VALID FOR DATA LXI D LOADBUFFER SET UP THE BUFFER THAT WILL USE TO LOAD THE NEW DATA INTO THE AM2900 MOV A M GET THE CHAR CALL HEXCHECK CHECK IF IT IS A VALID HEX DIGIT Jc ERROR STAX D VALID PUT IT IN THE LOAD BUFFER INX H SELECT NEXT CHAR INX D SELECT NEXT LOAD BUFFER LOCAT ION DCR B COUNTDOWN JNZ LOADING4 ALL NOT DONE GO BACK
25. T UP TO GET NEXT NYBBLE OF DATA DCR B SET UP NEXT MUX RAM ADDRESS DCR DECREMENT THE COUNTER JNZ LOAD WORD1 IF NOT DONE JUMP BACK TO CONT RET IF DONE RETURN 57 THE PRINT AND PULSE ROUTINE THIS ROUTINE PRINTS THE ADDRESS THAT IS STORED IN THE MEMORY AS ADDRESS AND THEN PRINTS EACH OF THE PRESENT AM2900 DISPLAY REGISTERS 1 E THE DATA PIPELINE AND MICROWORD REGISTERS WHEN THIS IS COMPLETED THE ROUTINE SENDS OUT A CLOCK PULSE THE AM2900 PRINT PULSE LDA ADDR CALL IN THE PRESENT ADDRESS STA CONSOLE BUFFER PUT IN THE BUFFER TO PRINT PUT AN IN BUFFER STA CONSOLE BUFFER 1 MVI A INDICATE END OF STRING STA CONSOLE 2 CALL CONSOUT PRINT THE BUEFER CALL xD PRINT OUT THE DATA REGISTER LDA CONSOLE BUFFER 47 THE LAST POSITION IN THIS REGISTER STA ADDR IS GOING TO BE THE NEXT ADDRESS SO WE SAVE IT CALL HEXCHECK CHANGE IT TO HEX STA HEXADDR AND SAVE IT CALL XP PRINT OUT THE PRESENT PIPELINE REG S CONTENTS CALL PRINT OUT THE PRESENT MICROWORD REG S CONTENTS CALL CR LF DO A CR AND A LF MVI A PULSE SEND OUT A CLOCK PULSE TO AM2900 OUT PORT B_ MVI A 0H CLEAR THE SIGNAL OUT PORTjB RET RETURN WITH NEXT ADDRESS ADDRESS NOTE IT IS IN ASCII 58 THE SET UP RUN ROUTINE THE ROUTINE IS USED TO LOAD IN THE FIRST ADDRESS INTO THE PIPELINE BEFORE YOU START RUNNING THE
26. as only four data LED s four pipeline LED s and four microprogram word LED s Thus to view all 32 bits of each of the above registers it is necessary to view them four bits at a time Since only four data switches are sup plied it is also necessary to load the microprogram word in fields of four bits at a time The RAM and Mux Select Switches allow the selection of these fields The Memory Address Switches These four switches are used to address the sixteen microwords in the kit s micro program memory The Memory Data Switches These four switches are set to the bit configuration that is to be loaded into the presently addressed microinstructions field at the presently addressed memory location 2The Memory Data Switches are set to opposite polarity due to the fact that the RAMused in the kit inverts data from input to output 3 selected using the RAM and Mux Switches 4selected using the Memory Address Switches The Memory Load Switch This momentary switch loads data into the microprogram memory Run Load Switch This toggle switch is used to select the mode of the processor In Load mode the data and address switches may be used to load i e program the RAM In Run mode the Memory Load Switch is inhi bited and programs in memory can be run using the Single Step Clock Switch or the clock pulse input The Single Step Clock Switch This momentary switc
27. d for micropro gramming development The MPS was not used in this project The SSP consists of a CPU card and a RAM card processor on the CPU card is an Am 9080A microprocessor which can run four RS232 serial I O ports three 8 bit parallel ports a dual disk drive a CRT and various other peripherals The CPU can also run the MPS part of the system if a user wishes Through the SSP a user may run the entire system CP M is available to run on the Am 9080A utilities include an Assembler a Dynamic Debugging Technique rou tine and a Context Editor Additional System 29 details may be obtained from the AMDOS System 29 Users Manual 11 CHAPTER III HARDWARE AND SOFTWARE CONSIDERATIONS AND DECISIONS System Overview Figure 4 is the block diagram of the main parts of the completed system The area under A is the System 29 29 05 development system It includes 1 terminal CRT and keyboard 2 a dual floppy disk drive 3 the 9080A system support processor The units under B include 4 The interface between the Am 2900 and 29 05 which consists of muxes latches drivers and receivers 5 The Am 2900 kit which has been modified to run with the 29 05 Am 2900 Kit Inputs The 2900 kit is set up with sets of switches which are used for addressing and data input The interface board uses the switches on the kit and the outputs of the 29 05 as the two inputs to a bank of 2 1 multipl
28. e user Am 2900 Kit Load and Single Step Clock Pulses The Load and Single Step Clock pulses on the 2900 are activated with momentary switches and each of these are used with a debouncer an Am 9314 To avoid signal problems inputs to the interface board were taken by 18 bypassing the debouncer as shown in Figure 8 In this way one is able to mux in and choose whichever inputs are desired to run the board i e the kit s switches or the 29 05 The 29 05 Bidirectional Port Drivers and Receivers In deciding to use the 29 05 s I O ports the selec tion of which ports to use as inputs and outputs had to be made Furthermore the method of driving the output ports and receiving the input signal had to be determined These I O ports have configurations like NAND gates as shown in Figure 7 Due to the inability to locate drivers and receivers with the right configurations the concept of an external adapter board for the 29 05 1 O vas researched This adaptor would consist of MC1488 drivers and MC1489 receivers However this was discarded in favor of a simpler solution It was determined that regular TTL gates would have the capability to drive a 10 foot twisted pair cable needed to carry signals between the interface board and the 29 05 Thus 7400 NAND gates were used as drivers on the output ports and standard resistor pack were used for receivers on the input ports I O Configurations and Connectors Thus all the I O and mo
29. exers Note System 29 and 29 05 are used interchangeably within this text SING PULSE GEN SELECT RUN LOAD SWITCH STNG STEP MEMORY ADDRESS SWITCHES venrous _ gt DATA SWITCH CIRCUIT b INPUTS DISP EXTERNRL CLOCK CONTROL CLK AM2909 SEQUENCER CONTROLS PULSE R INPUT Y ADDRESS OUTPUT o LOAD SWITCH SHIFT SHIFT gt CLK CONT I CONTROLS CIN 2901 El MICRO 4 R INPUT PROCESSOR 4 B INPUT STATUS REGISTER PIPELINE REGISTER CONTROL SIGNALS CONT vv REG OUTPUT BUS TRANSCEIVER 607 Fig 4 Basic block diagram of the Am 2900 Microprogramming Learning System 21 13 The multiplexer outputs then go to the inputs of the 2900 processor This is shown diagrammatically in Figure 5 Thus a user can decide which inputs to use for the 2900 processor A switch on the interface board allows the user to select the source he wishes An attempt was made to wire the system without cutting traces However after examining the Am 2900 circuitry it was obvious that to make the system stable and reliable traces would have to be cut before external connections could be made A detailed description of these connections are given in the Appendix 4 INTERFACE M select line selects m 5 gt original traces cut 3 gi lt
30. f microprocessing 4 Be practical to use to assign lab projects The Am 2900 Evaluation and Learning Kit vas selected as the basis for the design of the microprogramming teach ing 1001 It had the following useful characteristics 1 vas designed to demonstrate microprogramming techniques 2 It could be used to load and run user micro programs lDonated to OSU by Advanced Micro Devices Inc 3 It was simple to modify if necessary The Am 2900 kit also had a number of disadvantages as follows 1 It was tedious to use due to slow and complicated program loading technique 2 It was difficult to observe the flow of program execution due to a limited number of output indicator lights Thus while the kit was an excellent demonstration tool it was not a practical lab instrument To make the kit useful for lab applications it was necessary to interface it with an external system The external system would have to be able to simplify the program loading and data output procedures Most main frame personal computers and development systems would be able to satisfy these requirements The AMC System 29 was selected for the task It was a microprogramming develop ment system upon which future development in the micropro gramming area was planned It was also a system which would allow the greatest flexibility for expansion of the Am 2900 kit beyond the modifications done in this project At the time of
31. g the intricacies of microprogramming However it is very tedious to program and if it were to be used as a teaching tool students could easily get confused by the technicalities of its use The end effect is that more time is spent wrestling with the methods of loading a program than the actual details of microprogramming The objective of this work was to interface the kit with a development system and make a system that would be simple to program and practical to use for class projects This goal has been achieved and the modified kit proved to be more versatile and convenient to use Students may now load debug run and most importantly watch the flow of an executing program while on line Observing the flow of an executing program is vital to the total understanding of any system especially one as complex as a microprogrammed 34 microprocessor Prior to the modifications a student would have found this almost impossible to do due to the limited display capabilities of the kit Much can be done to extend the present project and all software has been written to allow for the ease of modification or extension The following are a few possible ideas for future students 1 Write software that will break down the 2900 microword into its separate fields and actually list what action is taking place The user will then be able to decode and debug the micro word while on line 2 Write software that will allow 2900 prog
32. h is used to apply a debounced clock pulse to all the clocked devices in the kit This switch is also used to fill the pipeline register with the first microvord This is important because should the user attempt 7 run program with random values in the pipeline register it will be impossible to guess which instruction will be fetched next This switch is inhibited when the Single Step Pulse Generator Select Switch is set to Pulse Generator The Single Step Pulse Generator Select Switch This toggle switch is used to decide if the kit will be run by the Single Step Clock Switch or an external pulse genera tor Summary To use the kit the user sets the control toggle switches to Load mode and then stores a program into the 16 word RAM With the address of the start location stored in the Memory Address Switches the user 10 fills the pipeline register with the first microinstruc tion to be executed Finally the user runs the program in Run mode using a clock pulse or the Single Step Switch Further operation details may be obtained from The Am 2900 Learning and Evaluation Kit User s Manual The System 29 Advanced Microprogramming Development System The System 29 29 05 consists of two main parts The first part of the system is called the Microprogrammed System MPS the second part is called the System Support Processor SSP Both parts are housed in the System Mainframe The MPS consists of hardware require
33. ignal f 1 Load Run selection input 21 8 1 Clock Pulse Single Step selection input h 4 data outputs i 4 pipeline register outputs 4 microword memory register outputs The above totals 15 input signals and 12 output signals However if the data needed can be latched in at the 2900 kit s input all the lines will not have to be used simul taneously This method is shown in Figure 9 the Inter face Block Diagram This bus like structure enables each line to be used for more than one input signal Am 29 05 Port Configurations The 29 05 ports were broken down into input and output as follows Port A output from 29 05 to 2900 used for Data Address etc Port B output from 29 05 to 2900 used for control signals clock pulses to latches memory loads etc Port input to 29 05 from 2900 used for reading data register contents pipeline register contents and memory contents Rather than using all eight output lines of Port B Port B was used to run 3 8 decoder a 74LS138 This required only three lines from Port B B to B2 By using Port B as a control port data from Port A can be clocked into the desired latches Through the decoder Port B is also used to run the 22 Single Step Clock Pulse and the Memory Load Pulse The three output registers muxed to the lovest significant nibble of Port The selection of sources for the mux is made vith lines and
34. k drive processor and Am 2900 kit 2 Set the Am 2900 Single Step Pulse Generator Select Switch to Single Step 3 Set the 29 05 Am 2900 Select Switch on the Interface Board to 29 05 4 Hit the reset button on the 29 05 processor 5 Insert the Am 2900 Simulation disk into Drive The system will boot up with a request for the date Once this has been entered the system will return with a CP M prompt A gt The user then types in the simulation program name and enters the simulation monitor A gt 2900 lt cr gt 9 For clarity input typed by the user is shown in bold face type with lt cr gt representing a carriage return 30 The system responds with the monitor title and the simulation prompt and the user may then enter any command as follows a L3 cr 3 AF011001 56423101 cr 4 ACE611AF space lt cr gt 5 4653ABCD lt cr gt The microvord is first Loading microvord vith data The L Load command L for Load 3 for location 3 onwards System shovs original N displayed highest data user enters nev data Old data is unchanged Exit Load mode left System prompt significant nibble The user will need to refer to the Am 2900 user s manual for microprogramming details b Reading registers and data XD D ABCDEF 12 XM lt cr gt M 12345678 lt cr gt P 54321ACE lt gt N
35. lect OH 7H Fig 10 Effective 7 bit address for microword field Thus the microword can be loaded for all 8 RAM and mux locations from 0 to 7 Reading a nibble of data To read the Am 2900 kit s outputs it is necessary to select which register to read with the control signals of Port see Table 3 2 below Then using the PORT C com mand on the 9080A the 4 bit data can be loaded through Port C into the LSN of the 9080A accumulator see Figure 9 28 Table 3 2 Control Signals for Port source 5 Data on Port bits Co C4 B NC 0 0 1 Data Register Dp D 1 0 Pipeline Register Pg P 11 Microvord Memory Register Running a program In running a program on the 2900 kit the kit is first put into run mode and line is used as a Single Step Clock input Software is used to create the pulse The Simulation Monitor The simulation monitor is the software that controls the system and simulates the Am 2900 kit switches All user input and output through the terminal is handled by the monitor using CP M utilities The user s input is decoded by the monitor and the appropriate load read or run subroutine is executed All software is written in assembly language and is listed in the Appendix 29 CHAPTER IV USING THE AM 2900 MICROPROGRAMMING LEARNING SYSTEM Using the Am 2900 with the 29 05 To use the simulation program 1 the power switches the CRT dis
36. lect as listed on page 3 4 of the Am 2900 manual 26 Assembly Listing of Program LOAD NIBBLE MVI A 01H Put the 2900 into Load mode by sending OUT PORT A out a 1 to Port bit Ag and then latch this into the 1 bit latch MVI A 05H This is done by sending out a 10 binary to Port B which OUT PORT B will send a high signal out line Os Run Load Latch MVI A 00H The line Og is lowered to simulate a OUT PORT B single clock pulse LDA ADDR Load in the 4 bit address RLC Move the address to bits as RLC these are the output lines connected to the address mux on the RLC interface board ORI 03H OR in the RAM Mux Select choice This results in a 7 bit address as shown in Figure 10 OUT nov send this address out PORT A MVI A 03H latch in the Address and then latch OUT PORT B the RAM Mux Select This is done using lines and respectively MVI A 02H OUT LDA DATA Send OUT PORT A the data out port A in bits A0 A MVI A 01H And in the same way latch the data in OUT PORT B using the line O MVI A 06H Nov that the address and data are in OUT PORT B send out a memory load pulse This is MVI A 00H done using OUT PORT B Lower the signal to simulate a single pulse 27 6 5 A4 A3 A2 Al 0 l a Micro word Address RAM and Mux OH FH Se
37. nals from Interface to Am 2900 kit Jumper Pin Am 2900 Kit Signal Name single step clock signal load run select signal memory load signal GND GND 39 Color Inputs from 9080 to Interface Board Signal Name 40 Edge Conn Table 4 DB25 to Jumper Pin 14 3 P2 14 4 P3 4 5 P4 14 6 P5 14 7 P6 14 8 7 14 9 P8 unused P9 unused P10 unused 11 unused P12 unused P13 J5 1 P14 J5 4 P15 J4 2 P16 unused P17 unused P18 J4 11 P19 J4 12 P20 J 4 13 P21 unused P22 J4 15 P23 J 4 16 P24 J5 2 P25 15 3 Green Orange Yellow Brown Violet W Black Black Green Red W Blue W Green W Orange W Brown W Violet Red Blue 25 19 41 Table 45 Table of Parts Chip No Chip Name Function 11 7415138 1 of 8 decoder demux 12 741 5 04 Inverter 741 5175 Quad D Latch 14 741 5175 Quad D Latch 15 741 5175 Quad D Latch 16 74 157 Quad 2 1 Mux 17 74 157 Quad 2 1 18 74 157 Quad 2 1 Mux 19 74LS175 Quad D Latch 10 741 5253 Dual 4 1 Mux 11 7415253 Dual 4 1 Mux 112 74 00 Two Input NAND 113 74 157 Quad 2 1 Mux 114 74 00 Two Input NAND 115 74 00 Two Input NAND 116 74 00 Two Input NAND Table 6 Jumper Cables 71 From 2900 to Interface Board J2 From Interface Board to 2900 13 From 2900 to Interface Board 14 From System 9080 to Interface Board J5 From Interface Board to Sy
38. rams of longer than 16 microwords What is envisioned is that the user writes in a program of any length The 29 05 then loads a page of 16 words When the page of microinstructions has been executed the 29 05 will automatically load in the next page and so on until the entire program has been run Users will be limited to branching within the current page unless a system of branching outside each page is developed This would not be too complicated as all that would be needed is 35 to add an extra nibblel to each microword which vould be the branch page number On every branch instruction the 29 05 then halts Am 2900 execu tion and checks if the branch is in the current page or not it is not in the current page the 29 05 loads the branch page next and continues processing from there 3 Add more data and pipeline LED s on the interface board so that a user may see all 32 data pipeline or memory word bits at a single glance 4 Use the bit slice capabilities of the Am 2901 to expand the ALU length of the Am 2900 kit to an 8 or 16 bit microprocessor 12 nibble would not be loaded into the Am 2900 microvord memory but vould be stored and used by the 29 05 for branching 36 BIBLIOGRAPY Am 2900 Learning and Evaluation Kit User s Manual Advanced Micro Devices Inc 1980 AMDOS System 29 Manual Advanced Micro Devices Inc 1978 White
39. sed of an Am 2901 bit slice microprocessor an Am 2909 0 71 sequencer regis ters multiplexers muxes and several memories see Figure 2 Each microprogram word on the kit consists of 32 bits which are broken down into 8 fields see Figure 3 Sixteen microwords can be loaded and stored in the microprogram memory These sixteen locations in memory are addressed by a four bit address from the Am 2909 sequencer Loading of the sixteen words is done through toggle switches which 1 Select the address of the memory word to be loaded 2 Set the data which is to be loaded 3 Activate the load signal which writes the data into the memory AY cB 2 DUAL DISK i 5 DRIVE 609 i EVALUATION 4 3 AND LEARNING 9088 SUPPORT 1 INTERFACE PROCESSCR BOARD i i 1 TERMINAL CRT amp KBD to es 7 Fig 2 Block diagram of Am 2900 Evaluation and Learning Kit RAM MUX SELECT 5 4 FIELD NO BET 31 28 27 24 23 20 19 16 NUMBER BRANCH NEXT ALU ALU EEE INST DEST SOURCE DEFINITION ADDRESS CONTROL CONTROL SELECT Fig 3 Am 2900 microprogram word 15 12 ALU CONTROL 1 0 7 4 D Run modes are selected through toggle switches as well A user may run the kit with the Single Step Switch or an external clock Operation of the kit may be observed
40. so using the Am 2900 kit independently of the 29 05 11 microword at the breakpoint is not executed The contents of the output registers at this point may be viewed by using the X command 32 nibbles 8 microword nibbles and 8 pipeline register nib bles most significant nibble first User continues sin gle stepping by hitting Carriage Return To exit single step mode the user hits any other key before Carriage Return e The E Exit command E lt er gt E for Exit A gt System returns to CP M f Errors any undefined inputs will cause the system to respond with a bell and a The system then returns with a prompt for the next command Running the Am 2900 Kit Independently of the 29 05 Power up the 2900 kit and the interface board set Am 2900 29 05 switch to Am 2900 Now the switches on the kit will be used as the input to the Am 2900 kit with no interference from the 29 05 development system 33 CHAPTER V CONCLUSION AND FUTURE EXPANSION SUGGESTIONS The Am 2900 kit is an effective bit slice demonstra tion utensil yet the author feels that AMD should have added external I O capabilities This could be the form of a bus which would enable the kit to be used for more than just demonstration Had these interface options been present kit users would have been able to see some real world applications of bit slice The Am 2900 kit is already very useful for under standin
41. st of the format decisions 19 2200 4 CUT TRACES SINGLE SINGLE v MOMENTARY P CLOCK SWITCH NO NC LORD RUN gh L J RUN TOGGLE RUN SWITCH V NO 12 6 03080 BOARD INTERFACE BOARD vec 19 Y l FROM 1 SEL OUTPUTS MUX A2 al GND STB SEC Tis Fig 8 Single step and load run connections 20 were made What remained was the actual configuration of the I O ports themselves i e which ports would be used as outputs and which as inputs decide configura tion it was necessary to determine how the signals were going to be routed to the 10 foot cable The 29 05 uses a 50 pin edge connector and ribbon cable to route the 24 parallel port I O signals 3 ports X 8 bits to a DB25 pin connector on the frame Every alternate line on the edge connector is grounded Unfortunately a lot of the 85 pins are also grounded and only port A and two lines of port C are actually connected to the DB25 connector The other signal lines were unconnected By determining which connector pins were unused and by using jumper wires to connect the I O port lines to these pins all necessary signals were routed to the connector without any traces being cut Am 2900 Kit I O Requirements The kit requires 4 data inputs b 4 address inputs c 3 Mux RAM select inputs d 1 Single Step Clock Pulse signal 1 Memory Load s
42. stem 9080 QUAD LATCH 7415175 18 7400 QUAD LATCH QUAD LATCH QUAD LATCH QUAD LATCH NAND 7415175 75 7415175 4 5175 114 I1 15 14 DTE QUAD QUAD QUAD QUAD Hu 2 1 MUX 2 1 MUX 2 1 MUX 2 1 MUX 12 7415157 415157 7415157 7415157 7400 NAND 71 JUMPER JUMPER J4 CABLES CABLES 0 TO FROM J2 NAND TO FROM 60 112 DUAL 4 1 d MUX KIT SYSTEM 29 PCT 111 Fig Al Interface board layout top view 2 frua fo TJO Am 2 Select Son th r 1 Samper Cob f N T 59 Am 29 05 ace Okom 72 61 MAE 8 Nd rd 20 os 2400 0 A 2400 lew Ac 2 10 2200 Interface board schematics I Fig 2 cb Am 2900 k IT 33 1 Fig m o CONTROL M AGNALS 6 Va na M bow ry Vee EB e edito BA 000 B4 yg n 5 3 31 39 0 gt 3 m x lt z e 5915 35 3 2 E 5 3 acy A 1 1 2 35 10 20 gt wue q z gt SIGNALS ace lo A 414 8 SH 2 2 xa t gt hp 3 163 2 Interface board schematics bv Aan From Am 25 o
43. the conception of this project it was decided to allow users of the combined system the option of using the AM 2900 kit independently or with the System 29 BACKGROUND INFORMATION Microprogramming The technique of microprogramming involves using microwords or microinstructions to run various devices within a microprocessor A microword consists of a number of bits broken down into fields Each field consists of the control bits required to run each device an example of which is given in Figure 1 In the example a 010 binary in the ALU field would cause the ALU to do a S R operation SAMPLE MICROWORD EM ALU y gt CONTROL F r n OTHER CONTROL FIELDS ALU 2 OPERATION ea l Rts gQGI R S 52101018 R Rog dd RvS ra eons 100 RAS Bn 101 RAS I 1101 R S ALU Fig 1 ALU Control microprocessor with a large number of devices will require more fields and consequently a longer microword than a microprocessor with less devices One of the fields within a microword is the next address field This field is used with an address decoder or microsequencer to select the next microword to be executed Microsequencers allow conditional and unconditional microword branching and subroutine calls Microwords are stored in memory referred to as the microprogramming memory The Am 2900 Evaluation and Learning Kit The Am 2900 kit is compo
44. willingness to sit through and evaluate my oral presentation rehearsals Table of Contents Page Chapter I Introduction 1 Chapter II Background Information 3 The Am 2900 Evaluation and Learning Kit 4 Using the Am 2900 Kit 8 The RAM and Mux Select Switches 8 The Memory Address Switches 8 The Memory Data Switches 8 The Run Load Switch 9 The Single Step Clock Switch 9 The Single Step Pulse Generator Select Switch 9 Summary 9 The System 29 Advanced Microprogramming Development System 10 Chapter III Hardware and Software Considerations and Decisions 11 System Overview 11 Am 2900 Kit Inputs 11 Am 2900 Kit Output 14 System 29 Input and Output 15 Interface Methods 17 Am 2900 Kit Load and Single Step Clock Pulses 17 The 29 05 Bidirectional Port Drivers and Receivers 18 Configurations and Connectors 18 Am 2900 Kit I O Requirements 20 29 05 Port Configurations 21 The Interface Board 22 Software Decisions 22 Loading a Nibble of Data into Memory 25 Assembly Listing of Example Program 26 Reading a Nibble of Data 27 Chapter IV Using the Am 2900 Microprogramming Learning System Using the Am 2900 with the 29 05 Running the Am 2900 Kit Independently of the 29 05 Chapter V Conclusion and Further Expansion Suggestions Bibliography Appendix 29 29 32 33 36 37 List of Figures Figure Page 1 ALU Control 3 2 Block diagram of Am 2900 Evaluation and Learning Kit 5 3 Am 2900
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