bdiRDI_UserManual_ARM11
Contents
1. Copyright 1999 2004 by ABATRON AG V 1 002. Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2000 AMT 1 User Manual 13 2 4 2 Ethernet communication The BDI2000 has a built in 10 BASE T Ethernet interface see figure below Connect an UTP Un shilded Twisted Pair cable to the BD2000 For thin Ethernet coaxial networks you can connect a commercially available media converter BNC gt 10 BASE T between your network and the BDI2000 Contact your network administrator if you have questions about the network 10 BASE T Connector 1 TD 2 TD 3 RD Target System 6 RD Rev B C PC Host mm The following explains the meanings of the built in LED lights TX RX 10 BASE T LU TX RX 10 BASE T BDl2000 Ethernet 10 BASE T C LED Name Description LI Link When this LED light is ON data link is successful between the UTP port of the BDI2000 and the hub to which it is connected TX Transmit When this LED light BLINKS data is being transmitted through the UTP port of the BDI2000 RX Receive When this LED light BLINKS data is being received through the UTP port of the BDI2000 Copyright 1999 2004 by ABATRON AG V 1 00 ldi JTAG interface for RDI Debuggers BD 2000 ARM11 User Manual 14 2 5 Installation of the Configuration Software On the enclosed diskette you will find the BDI configuration software and the firmware required
3. N elastic sealing front panel Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2000 ARMT 1 User Manual 33 4 1 While holding the casing slide carefully the print in position as shown in figure below m Jumper settings o m e n DEFAULT INIT MODE Fuse Position Fuse Position Rev B C e Rev A o X Pull out carefully the fuse and replace it Type Microfuse MSF 1 6AF Manufacturer Schurter Reinstallation 5 1 Slide back carefully the print Check that the LEDs align with the holes in the back panel 5 2 Push carefully the front panel and the red elastig sealing on the casing Check that the LEDs align with the holes in the front panel and that the position of the sealing is as shown in the figure below casing NS elastic sealing back panel EF front panel 5 3 Mount the screws do not overtighten it 5 4 Mount the two plastic caps that cover the screws 5 5 Plug the cables A ks Observe precautions for handling Electrostatic sensitive device Unplug the cables before opening the cover Use exact fuse replacement Microfuse MSF 1 6 AF Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2000 ARMT 1 User Manual 34 C Trademarks All trademarks are property of their respective holders
4. BDI TRGT The green LEDs BDI and TRGT marked light up when target is powered up and the jumper is inserted correctly Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2000 ARMT 1 User Manual 11 2 3 Status LED MODE The built in LED indicates the following BDI states Rev B C MODE LED BDI STATES The BDI is ready for use the firmware is already loaded The power supply for the BDI2000 is 4 75VDC The BDI loader mode is active an invalid firmware is loaded or loading firmware is active Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2000 ARMT 1 User Manual 12 2 4 Connecting the BDI2000 to Host 2 4 1 Serial line communication The host is connected to the BDI through the serial interface COM1 COM4 The communication cable between BDI and Host is a serial cable RXD TXD are crossed There is the same connector pinout for the BDI and for the Host side Refer to Figure below RS232 Connector for PC host Target System 2 RXD data from host 3 TXD data to host 5 GROUND PC Host mm RS232 Rev B C RS232 Connector for PC host Target System 2 RXD data from host 3 TXD data to host 5 GROUND BDl2000 PC Host mm RS232
5. GROUND The green LED BDI marked light up when 5V power is connected to the BDI2000 Please switch on the system in the following sequence 1 gt external power supply 2 gt target system Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2000 AMT 1 User Manual 10 2 2 2 Power Supply from Target System The BDI2000 needs to be supplied with 5 Volts max 1A via BDI MAIN target connector Rev A or via TARGET A connector Rev B C This mode can only be used when the target system runs with 5V and the pin Vcc Target is able to deliver a current up to 1A 5V For pin description and layout see chapter 2 1 Connecting the BDI2000 to Target Insert the enclosed Jumper as shown in figure below Please ensure that the jumper is inserted correctly A For error free operation the power supply to the BDI2000 must be between 4 75V and 5 25V DC The maximal tolerable supply voltage is 5 25 VDC Any higher voltage or a wrong polarity might destroy the electronics CEE BDI OPTION Connector BDI TRGT BDI MAIN BDI OPTION 13 14 2 2 Jumper The green LEDs BDI and TRGT marked light up when target is powered up and the jumper is inserted correctly 13 Vcc Target 5V 14 Vcc BDI2000 5V POWER 3 1 Connector 1 Vcc BDI2000 45V n 2 Vcc Target 5V 4 Jumper POWER
6. AM29BX16 128BX16 AT49X16 For 16 32 bit flash in 16bit mode AM29DX16 For 16 32 bit flash in 32bit mode AM29DX32 For 32bit only flash l28BX32 The AMD and AT49 algorithm are almost the same The only difference is that the AT49 algorithm does not check for the AMD status bit 5 Exceeded Timing Limits Only the AMD and AT49 algorithm support chip erase Block erase is only supported with the AT49 algorithm If the algorithm does not support the selected mode sector erase is performed If the chip does not support the selected mode erasing will fail The erase command sequence is different only in the 6th write cycle Depending on the selected mode the following data is written in this cycle see also flash data sheets 0x10 for chip erase 0x30 for sector erase 0x50 for block erase To speed up programming of Intel Strata Flash and AMD MirrorBit Flash an additional algorithm is implemented that makes use of the write buffer This algorithm needs a workspace otherwise the standard Intel AMD algorithm is used The following table shows some examples Chipsize Am29F010 AM29F 0x020000 Am29F800B AM29BX8 AM29BX16 0x100000 Am29DL323C AM29BX8 AM29BX16 0x400000 Am29PDL128G AM29DX16 AM29DX32 0x01000000 Intel 28F032B3 128BX8 0x400000 Intel 28F640J3A STRATAX8 STRATAX16 0x800000 Intel 28F320C3 128BX16 0x400000 AT49BV040 AT49 0x080000 AT49BV1
7. address of the flash sector to erase mode This parameter defines the erase mode Not all flash types support CHIP erase The following modes are accepted CHIP BLOCK and SECTOR default is sector erase 5 2 4 Flash Load This command enables loading to flash memory If the address of a data block is within the given flash range the BDI automatically uses the appropriate programming algorithm This command must be executed before downloading is started Syntax flash load addr 0x02800000 size 0x200000 addr The start address of the flash memory size The size of the flash memory 5 2 5 Flash ldle This command disables loading to flash memory Syntax flash idle Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2000 ARMT 1 User Manual 25 5 3 Download to Flash Memory The BDI supports download and debugging of code that runs out of flash memory To automate the process of downloading to flash memory the BDI looks for two command files in the working direc tory PRELOAD CMD This command file is executed just before download begins POSTLOAD CMD This command file is executed after download is terminated Following is an example used to download into the flash memory of the PID7T board socket U12 with a AMD flash Am29F010 PRELOAD CMD Reset target target reset Define used flash memory AM29F010 flash setup type am29f size 0x20000 bus 8 workspace 0x00001000 Erase se
8. can be used this direct command must be execut ed Syntax flash setup type am29f size 0x80000 bus 32 workspace 0x1000 type This parameter defines the type of flash used It is used to select the correct program ming algorithm The following flash types are supported AM29F AM29BX8 AM29BX16 128BX8 I28BX16 AT49 AT49X8 AT49X16 STRATAX8 STRATAX16 MIRROR MORRORX8 MIRRORX16 128BX32 AM29DX16 AM29DX32 size The size of one flash chip in bytes e g AM29F010 0x20000 This value is used to calculate the starting address of the current flash memory bank bus The width of the memory bus that leads to the flash chips Do not enter the width of the flash chip itself The parameter TYPE carries the information about the number of data lines connected to one flash chip For example enter 16 if you are using two AM29F010 to build a 16bit flash memory bank workspace If a workspace is defined the BDI uses a faster programming algorithm that run out of RAM on the target system Otherwise the algorithm is processed within the BDI The workspace is used for a 1kByte data buffer and to store the algorithm code There must be at least 2kBytes of RAM available for this purpose Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2000 AMT 1 User Manual 24 5 2 3 Flash Erase This command allows to erase one flash sector block or chip Syntax flash erase addr 0x02800000 mode chip addr The start
9. debugger attaches This way you can investigate the current status of the target You may use a name instead of a number as IP address but then the appropriate entry has to be present in the hosts file Do not use for the command path use instead Also some debuggers limit the size of a config uration string Therefore use a short name for the command path Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2000 AMT 1 User Manual 23 5 2 BDI Direct Commands For special functions mainly for flash programming the BDI supports so called Direct Commands This commands can be entered in a command file e g PRELOAD CMD This Direct Commands are not interpreted by the debugger but directly sent to the BDI After processing the command the result is displayed in the debuggers Command Line Window Direct Commands are ASCII Strings with the following structure lt Object gt lt Action gt lt ParName gt lt ParValue gt Example flash erase addr 0x02800000 All names are case insensitive Parameter values are numbers or strings Numeric parameters can be entered as decimal e g 700 or as hexadecimal 0x80000 values 5 2 1 Target Reset This direct command executes a real physical reset of the target system 5 2 2 Flash Setup In order to support loading into flash memory the BDI needs some information about the used flash devices Before any other flash related command
10. firmware was successful Possible reasons The BDI2000 is not connected or not correctly connected to the network LAN cable or media converter An incorrect IP address was entered BDI2000 configuration Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2000 ARMT 1 User Manual 32 B Maintenance The BDI needs no special maintenance Clean the housing with a mild detergent only Solvents such as gasoline may damage it If the BDI is connected correctly and it is still not responding then the built in fuse might be damaged in cases where the device was used with wrong supply voltage or wrong polarity To exchange the fuse or to perform special initialization please proceed according to the following steps A ks Observe precautions for handling Electrostatic sensitive device Unplug the cables before opening the cover Use exact fuse replacement Microfuse MSF 1 6 AF 1 1 Unplug the cables Swiss Made BDI2000 AG IE 2 1 Remove the two plastic caps that cover the screws on target front side e g with a small knife 2 2 Remove the two screws that hold the front panel BDI OPTION BDI MAIN BDI TRGT MODE 3 1 While holding the casing remove the front panel and the red elastig sealing casing
11. for the BDI Copy all these files to a directory on your hard disk The following files are on the diskette b20a11 exe b20a11 hlp b20a1 1fw xxx armjed20 xxx armjed21 xxx bdiifc32 dll bdirdi dll bdi Configuration program Helpfile for the configuration program Firmware for BDI2000 for ARM targets JEDEC file for the BDI2000 Rev A B logic device programming JEDEC file for the BDI2000 Rev C logic device programming BDI Interface DLL for configuration program RDI Interface DLL Configuration Examples Example of an installation process Copy the entire contents of the enclosed diskette into a directory on the hard disk You may create a new shortcut to the b20a11 exe configuration program The RDI interface DLL has to be copied to the appropriate debugger directory Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2000 AMT 1 User Manual 15 2 6 Configuration Before you can use the BDI together with the debugger the BDI must be configured Use the SETUP menu and follow the steps listed below Load or update the firmware logic store IP address gt Firmware Set the communication parameters between Host and BDI gt Communication Setup an initialization list for the target processor gt Initlist Select the working mode gt Mode Transmit the configuration to the BDI gt Mode Transmit For information about the dialogs and menus use the
12. help system F1 2 6 1 BDI2000 Setup Update First make sure that the BDI is properly connected see Chapter 2 1 to 2 4 The BDI must be con nected via RS232 to the Windows host To avoid data line conflicts the BDI2000 must be disconnected from the target system while programming the logic for an other target CPU see Chapter 2 1 1 The following dialogbox is used to check or update the BDI firmware and logic and to set the network parameters r Connect BD12000 Loader Channel Baudrate C COMI C 9600 COM2 C 19200 C COM3 C 38400 C COM4 57600 SN 95111242 C MAC 000C01951112 m BDI2000 Firmware Logic Current Newest Loader 1 05 Current Firmware 1 00 1 00 Logic 1 06 1 06 Uude nl r TCP IP Configuration IP Address 151 120 25 101 Subnet Mask 255 255 255 255 Default Gateway 255 255 255 255 Cancel k Transmit Writing setup data passed dialog box BDI 2000 Update Setup The following options allow you to check or update the BDI firmware and logic and to set the network parameters Channel Select the communication port where the BDI2000 is connected during this setup session Baudrate Select the baudrate used to communicate with the BDI2000 loader during this setup session Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2000 ARMT 1 User Manual 76 Connect Current Update IP Address Subnet Mask Default Gate
13. 000 ARMT 1 User Manual 21 4 1 Startup Mode Startup mode defines how the BDI interacts with the target system after a reset or power up sequence 4 1 1 Startup mode RESET In this mode no ROM is required on the target system The necessary initialization is done by the BDI with the programmed init list The following steps are executed by the BDI after system reset or system power up RESET is activated on the target system RESET is deactivated and the target is forced into debug mode The BDI works through the initialization list and writes to the corresponding addresses The RESET mode is the standard working mode Other modes are used in special cases i e applications in ROM special requirements on the reset sequence 4 1 2 Startup Mode STOP In this mode the initialization code is in a ROM on the target system The code in this ROM handles base initialization At the end of the code the initialization program enters an endless loop until it is interrupted by the BDI This mode is intended for special requirements on the reset sequence e g loading a RAM based programmable logic device In this mode the following steps are executed by the BDI after system reset or power up RESET is activated on the target system RESET is deactivated and the target starts executing application code After a delay of RUNTIME seconds the target is forced into debug mode The BDI works through the initialization list a
14. 614 AT49X8 AT49X16 0x200000 M58BW016BT 128BX32 0x200000 SST39VF160 AT49X16 0x200000 Am29LV320M MIRRORX8 MIRRORX16 0x400000 Copyright 1999 2004 by ABATRON AG V 1 00 ldi JTAG interface for RDI Debuggers BD 2000 ARM11 User Manual 27 6 Telnet Interface A Telnet server is integrated within the BDI that can be accessed when the BDI is connected via eth ernet to the host It may help to investigate problems and allows access to target resources that can not directly be accessed by the debugger The following commands are available MD lt address gt lt count gt MDH lt address gt lt count gt MDB lt address gt lt count gt MM lt addr gt lt value gt lt cnt gt MMH lt addr gt lt value gt lt cnt gt MMB lt addr gt lt value gt lt cnt gt MT lt addr gt count MC lt address gt lt count gt MV RD RDALL RDCP lt cp gt number RDFP RI nbr value RMCP lt cp gt lt number gt lt value gt DTLB lt from gt lt to gt ITLB lt from gt lt to gt LTLB lt from gt lt to gt ATLB lt from gt lt to gt DTAG lt from gt lt to gt ITAG from lt to gt RESET GO lt pc gt TI lt pc gt HALT BI lt addr gt CI lt id gt BD R W lt addr gt BDH R W lt addr gt BDB R W lt addr gt CD lt id g
15. BDI2000 you control and monitor the microcontroller solely through the stable on chip de bugging services You won t waste time and target resources with a software ROM monitor and you eliminate the cabling problems typical of ICE s This combination runs even when the target system crashes and allows developers to continue investigating the cause of the crash A RS232 interface with a maximum of 115 kBaud and a 10Base T Ethernet interface is available for the host interface The configuration software is used to update the firmware and to configure the BDI2000 so it works with the RDI compatible debugger 1 1 BDI2000 The BDI2000 is a processor system in a small box It implements the interface between the BDM JTAG pins of the target CPU and a 10Base T Ethernet RS232 connector BDI2000 is powered by a MC68360 512Kbyte RAM and a flash memory of 1024Kbyte As a result of consistent implementa tion of lasted technology the BDI2000 is optimally prepared for further enhancements The firmware and the programmable logic of the BDI2000 can be updated by the user with a simple Windows based configuration program The BDI2000 supports 1 8 5 0 Volts target systems 3 0 5 0 Volts target systems with Rev A B Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2000 ARMT 1 User Manual 4 2 Installation 2 1 Connecting the BDI2000 to Target The enclosed cables to the target system are designed for th
16. I error of the previous firmware in the flash memory Before carrying out the following procedure check the possibilities in Appendix Troubleshooting In case you do not have any success with the tips there do the following Switch OFF the power supply for the BDI and open the unit as described in Appendix Maintenance Place the jumper in the INIT MODE position Connect the power cable or target cable if the BDI is powered from target system V genes c i o E Switch ON the power supply for the BDI again and waituntilthe lt INIT MODE LED MODE blinks fast Me Turn the power supply OFF again iu DEFAULT Return the jumper to the DEFAULT position e Reassemble the unit as described in Appendix Maintenance Copyright 1999 2004 by ABATRON AG V 1 00 ldi JTAG interface for RDI Debuggers BD 2000 ARM11 User Manual 17 3 Init List Startup Init List f Type Address Value Comment 3000 Power up delay WCP15 04001 Ox00F00000 CPACC allow CP10 and CP11 access WCP10 Ox00E8 Ox40000000 FPEXC enable VFP11 coprocessor wM32 Ox1000000C Ox00000005 REMAP 1 MISC LED ON NOP Setup MMU and enable cache Translation table at 0 WCP15 0x0002 Ox00004000 set Translation Base Address WCP15 00003 OxFFFFFFFF set Domain Access Control WM32 Ox00004000 Ox00000C0E MMU 0x00000000 cacheable bufferable WM32 000004004 O
17. JTAG debug interface for RDI compatible debuggers ARM User Manual Manual Version 1 00 for BDI2000 ANR N 1999 2004 ABATRON AG e A JTAG interface for RDI Debuggers BD 2000 ARMT 1 User Manual 2 Mun M 3 Bot PID ns da 3 MCI 4 2 1 Connecting the BDIZODO to Target ne nn 4 2 1 1 Changing Target Processor Type sssesessseeeeeeeeeeeen nennen nennen nnns 6 2 1 2 Adaptive ClOGKING cc sscnviadinnds 7 2 2 Connecting the BDI2000 to Power Supply issus 9 2 2 External Power SUIS eise Eo pus Rae biu uro iav eS Lagu RN N RE 9 2 2 2 Power Supply from Target System sssssssseeeeeeeeneeeeennernnn 10 2 3 Status LED MODES e nn nn nn ententes 11 2 4 Connecting the BDIZODDO to MOS o och orania NN nn 12 2 4 1 Serial line communication iii 12 242 Ethernet OMMAMI QUOMESS cR dp m 13 2 5 Installation of the Configuration Software 14 2 5 C nfig ratoN e cnc P sd nee Ree me eee er em re UI IM DI ee er iU 15 2 6 1 BDI2000 Setup Update ennemie eu caine 15 cH gs c o mer 17 4 BDI udiDEDDIIM 19 4 1 Startup MORE nr ie a oi 21 2 1 1 Startup mode HESET kinase tena
18. Target System 1 7 19 1 Vcc Target ECC CS 3 TRST 2 20 ol 4 U BDI2000 iO oo QO A 13 TDO 15 RESET The green LED TRGT marked light up when target is powered up For TARGET B connector signals see table on next page Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2000 ARMT 1 User Manual 8 BDI TARGET B Connector Signals TDO Describtion JTAG Test Data Out This input to the BDI2000 connects to the target TDO line reserved TDI JTAG Test Data In This output of the BDI2000 connects to the target TDI line reserved RTCK Returned JTAG Test Clock This input to the BDI2000 connects to the target RTCK line Vcc Target 1 8 5 0V This is the target reference voltage It indicates that the target has power and it is also used to create the logic level reference for the input comparators It also controls the output logic levels to the target It is normally fed from Vdd I O on the target board 3 0 5 0V with Rev A B This input to the BDI2000 is used to detect if the target is powered up If there is a current limiting resistor between this pin and the target Vdd it should be 100 Ohm or less JTAG Test Clock This output of the BDI2000 connects to the target TCK line JTAG Test Reset This open drain push pull output of the BDI2000 resets the JTAG TAP co
19. U type of the target system not used yet When startup mode STOP is selected this option allows to set the run time after reset in milliseconds until the target CPU is stopped Values from 100 0 1 sec till 32000 32 sec are accepted Select the exceptions that should lead to debug mode entry instead of en tering the normal exception handler The ARM vector catch register is used for this Check this switch if the target memory uses Big Endian format This option allows to select the used JTAG clock rate adaptive needs a special cable from Abatron please ask for it Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2000 ARMT 1 User Manual 20 JTAG Scan Chain The BDI can also handle systems with multiple devices connected to the JTAG scan chain In order to put the other devices into BYPASS mode and to count for the additional bypass registers the BDI needs some informa tion about the scan chain layout Enter the number and total instruction register IR length of the devices present before the ARM chip Predeces sor Enter the appropriate information also for the devices following the ARM chip Successor Transmit Click on this button to send the initialization list and the working mode to the BDI This is normally the last step done before the BDI can be used with the debugging system Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2
20. ctor 0 to 7 of flash memory bank flash erase addr 0x04000000 flash erase addr 0x04004000 flash erase addr 0x04004000 flash erase addr 0x04008000 flash erase addr 0x0400C000 flash erase addr 0x04010000 flash erase addr 0x04014000 flash erase addr 0x04018000 flash erase addr 0x0401C000 D Enable loading into flash Flash load addr 0x04000000 size 0x200000 POSTLOAD CMD flash idle Note Some Intel flash chips e g 28F800C3 28F160C3 28F320C3 power up with all blocks in locked state In order to erase program those flash chips use the init list to unlock the appropriate blocks WM16 OxFFF00000 0x0060 unlock block 0 WM16 OxFFF00000 0x00D0 WM1 6 OxFFF10000 0x0060 unlock block 1 WM16 OxFFF10000 0x00D0 WM1 6 OxFFF00000 OxFFFF select read mod Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2000 AMT 1 User Manual 26 Supported Flash Memories There are currently 3 standard flash algorithm supported The AMD Intel and Atmel AT49 algorithm Almost all currently available flash memories can be programmed with one of this algorithm The flash type selects the appropriate algorithm and gives additional information about the used flash For 8bit only flash AM29F MIRROR Il28BX8 AT49 For 8 16 bit flash in 8bit mode AM29BX8 MIRRORX8 I28BX8 STRATAX8 AT49X8 For 8 16 bit flash in 16bit mode AM29BX16 MIRRORX16 128BX16 STRATAX16 AT49X16 For 16bit only flash
21. e ARM Development Boards In case where the target system has the same connector layout the cable 14 pin or 20 pin can be directly connected In order to ensure reliable operation of the BDI EMC runtimes etc the target cable length must not exceed 20 cm 8 LZ 44141411117 20 pin Multi ICE 1 19 4 4 Connector EE WEE 1 Vcc Target Target System r EEEEEEEN 14141114 2 20 lic 1 13 i 14 pin Target 5 TDI gt BEEBE lt Connector Vcc Target 7 TMS GROUND 8 GROUND TRST 9 TCK GROUND 10 GROUND TDI TMS 13 TDO TCK 15 RESET TDO RESET The green LED TRGT marked light up when target is powered up Rev B C BR CR 20 pin Multi ICE 19 7 Connector LA 1 Vcc Target Target System MD a Ne 4 i 14 pin Target 5 TDI gt SEHEERN i Connector 1 Vcc Target 7 TMS 2 GROUND 8 GROUND 3 TRST 9 TCK 4 GROUND 10 GROUND 5 TDI EI 7 TMS 13 TDO 9 TCK 15 RESET 11 TDO 12 RESET The green LED TRGT marked light up when target is powered up For BDI MAIN TARGET A connector signals see table on next page Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2000 AMT 1 User Manual 2 BDI MAIN TARGET A Connector Signals Describtion reserved This pin is currently no
22. interface for RDI Debuggers BD 2000 ARMT 1 User Manual 6 2 1 1 Changing Target Processor Type Before you can use the BDI2000 with an other target processor type e g ARM lt gt PPC a new setup has to be done see Appendix A During this process the target cable must be disconnected from the target system The BDI2000 needs to be supplied with 5 Volts via the BDI OPTION connec tor Rev A or via the POWER connector Rev B C For more information see chapter 2 2 1 External Power Supply To avoid data line conflicts the BDI2000 must be disconnected from the target system while programming the logic for an other target CPU Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2000 ARMT 1 User Manual 7 2 1 2 Adaptive Clocking Adaptive clocking is a feature which ensures that the BDI2000 never loses synchronization with the target device whatever the target clock speed is To achieve this BDI2000 uses two signals TCK and RTCK When adaptive clocking is selected BDI2000 issues a TCK signal and waits for the Returned TCK RTCK to come back BDI2000 does not progress to the next TCK until RTCK is received For more information about adaptive clocking see ARM documentation Note Adaptive clocking is only supported with BDI2000 Rev B C and a special target cable This special cable can be ordered separately from Abatron Rev B C 20 pin Multi ICE SDDDDDD DD E Connector
23. is 21 4 1 2 Startup Modes TOP ed a ic des 21 4 1 3 Startup MOOS RUN c 21 5 Working with RDI Debuggers 0 40 22 o L OC AN PEERS a a ee Re nn cn 22 5 2 BDI Direct GoOImmmandss scene mike t o aet buda Eri si ene bbs kN MAE ees ea S RM RAE 23 GRORWEE C OBC o PC st durs 23 2 2 2 mol e T 23 5 23 ICONS C E 24 9 2 4 Flash LOAd E 24 Se ne Ios 24 5 3 Download to Flash Memory ce ce en usa Edd SS ee 25 6 Telnet Interface mec n 27 rage 28 aunuiniudili ec 29 9 Declaration of Conformity CE tres cH ERR SNRRI a RUEEEDE XM S RR SRE I ECCE KR nena 29 10 WADE AIAG sidecases ved Siena inn ie wn dnd ened aes ddan ewe ies amen eae cae se dedicate 30 Appendices A Troubleshooting uui sinc nn sn a ar ns nadie in nt nan eee 31 B EE La LUNN PRE 32 C TFAdONMATRS c 34 Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2000 AMT 1 User Manual 3 1 Introduction Target System Target System JTAG Interface JTAG Interface PC Host RDI Debugger E Em H RS232 Ethernet 10 BASE T UJ The BDI2000 adds JTAG based debugging to RDI compatible debuggers e g AXD from ARM Lat With the
24. nd writes the corresponding addresses 4 1 3 Startup mode RUN This mode is used to debug applications which are already stored in ROM The application is started normally and is stopped when the debugger is started In this mode the following steps are executed by the BDI after system reset or power up RESET is activated on the target system RESET is deactivated and the target starts executing application code The application runs until it is stopped by the debugger Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2000 ARMT 1 User Manual 22 5 Working with RDI Debuggers 5 1 Configuration The debugger manual describes how to install a RDI target connection When you configure the RDI connection the following dialog box will be displayed Enter the appropriate communication param eters and if necessary the path to the BDI command files BDI Configuration r Chanel Baudrate Startup C COMI 9600 Reset C COM2 Eom c C 38400 n COM3 C 57600 C CoM4 C 115200 IP Address Network 151 120 25 101 Command Path c bdi2000 Cancel The Startup mode defines how the BDI interacts with the target when the debugger starts If Reset is selected default the BDI forces a hardware reset of the target when the debugger attaches The Halt mode is useful when you would like to connect to a running target The BDI simply stops the target when the
25. ntroller on the target Default driver type is open drain JTAG Test Mode Select This output of the BDI2000 connects to the target TMS line reserved reserved GROUND System Ground RESET System Reset This open collector output of the BDI2000 is used to reset the target system reseved reseved GROUND System Ground Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2000 ARMT 1 User Manual 9 2 2 Connecting the BDI2000 to Power Supply 2 2 1 External Power Supply The BDI2000 needs to be supplied with 5 Volts max 1A via the BDI OPTION connector Rev A or via POWER connector Rev B C The available power supply from Abatron option or the enclosed power cable can be directly connected In order to ensure reliable operation of the BDI2000 keep the power supply cable as short as possible A For error free operation the power supply to the BDI2000 must be between 4 75V and 5 25V DC The maximal tolerable supply voltage is 5 25 VDC Any higher voltage or a wrong polarity might destroy the electronics LIN BDI OPTION Connector 2 GROUND BDI OPTION 1 4 GROUND RE 6 GROUND 2 Vec GND 8 GROUND 10 GROUND The green LED BDI marked light up when 5V power is connected to the BDI2000 12 Vcc 5V 14 Vcc 45V Rev B C POWER Connector 1 Vcc 1 Vcc 5V 3
26. rmal ARM GPR s covers a range from 0 to 15 Other GPR s are used to set BDI internal registers 8005 8006 8007 8008 8009 8010 This entry in the init list allows to change the JTAG clock frequency This is useful if you have to start with a slow JTAG clock out of reset but after some initialization e g PLL setup you can use a faster clock As an example see AT91EB55 setup The value you enter selects the following JTAG frequency 0 adaptive 1 16 MHz 6 200 kHz 2 8 MHz 7 100 kHz 3 4 MHz 8 50 kHz 4 1 MHz 9 20 kHz 5 500 kHz 10 10 kHz This entry in the init list allows to define a delay time in ms the BDI inserts between releas ing the reset line and starting communicating with the target This delay is necessary when a target needs some wake up time after a reset By default the BDI asserts the RESET signal during reset processing After writing zero to this special register the BDI no longer drives RESET low This may be useful in some spe cial cases This entry in the init list allows to define a time in ms the BDI asserts the hardware reset signal By default the reset signal is asserted for about 3 ms By default the TRST signal is driven with an open drain driver by the BDI Write a 1 to this special BDI register if the TRST signal should be driven with a push pull driver When using adaptive clocking write a 1 to this special BDI register if the ARM core is clocked with a frequency slo
27. rs BD 2000 AMT 1 User Manual 28 7 Specifications Operating Voltage Limiting Power Supply Current RS232 Interface Baud Rates Data Bits Parity Bits Stop Bits Network Interface Serial Transfer Rate between BDI and Target Supported target voltage Operating Temperature Storage Temperature Relative Humidity noncondensing Size Weight without cables Host Cable length RS232 5 VDC 0 25 V typ 500 mA max 1000 mA 9 600 19 200 38 400 57 600 115 200 8 none 1 10 BASE T up to 16 Mbit s 1 8 5 0 V 3 0 5 0 V with Rev A B 5 C 60 C 20 C 65 C 90 rF 190 x 110 x 35 mm 420 g 2 5 m Specifications subject to change without notice Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2000 ARMT 1 User Manual 29 8 Environmental notice Dj ak Disposal of the equipment must be carried out at a designated disposal site 9 Declaration of Conformity CE DECLARATION OF CONFORMITY This declaration is valid for following product Type of device BDM JTAG Interface Product name BDI2000 The signing authorities state that the above mentioned equipment meets the requirements for emission and immunity according to EMC Directive 89 336 EEC The evaluation procedure of conformity was assured according to the following standards EN 50081 2 EN 50082 2 This declaration of conformity is based on the test repo
28. rt no QNL E853 05 8 a of QUINEL Zug accredited according to EN 45001 Manufacturer ABATRON AG St ckenstrasse 4 CH 6221 Rickenbach Authority VOILA aura FC ds I PI Max Vock Ruedi Dummermuth Marketing Director Technical Director Rickenbach May 30 1998 Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2000 ARMT 1 User Manual 30 10 Warranty ABATRON Switzerland warrants the physical diskette cable BDI2000 and physical documentation to be free of defects in materials and workmanship for a period of 24 months following the date of purchase when used under normal conditions In the event of notification within the warranty period of defects in material or workmanship ABATRON will replace defective diskette cable BDI2000 or documentation The remedy for breach of this warranty shall be limited to replacement and shall not encompass any other damages includ ing but not limited loss of profit special incidental consequential or other similar claims ABATRON Switzerland specifically disclaims all other warranties expressed or implied including but not limited to implied warranties of merchantability and fitness for particular purposes with respect to defects in the diskette cable BDI2000 and documentation and the program license granted here in including without limitation the operation of the program with respect to any particular application use or purpo
29. ses In no event shall ABATRON be liable for any loss of profit or any other commercial damage including but not limited to special incidental consequential or other damages Failure in handling which leads to defects are not covered under this warranty The warranty is void under any self made repair operation except exchanging the fuse Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2000 ARMT 1 User Manual 37 Appendices A Troubleshooting Problem The firmware can not be loaded Possible reasons The BDI is not correctly connected with the target system see chapter 2 The power supply of the target system is switched off or not in operating range 4 75 VDC 5 25 VDC gt MODE LED is OFF or RED The built in fuse is damaged MODE LED is OFF The BDI is not correctly connected with the Host see chapter 2 A wrong communication port Com 1 Com 4 is selected Problem No working with the target system loading firmware is ok Possible reasons Wrong pin assignment BDM JTAG connector of the target system see chapter 2 Target system initialization is not correctly gt enter an appropriate target initialization list An incorrect IP address was entered BDI2000 configuration BDM JTAG signals from the target system are not correctly short circuit break The target system is damaged Problem Network processes do not function loading the
30. t INFO DCMD lt direct command gt HELP QUIT display target memory as word 32bit display target memory as half word 16bit display target memory as byte 8bit modify word s 32bit in target memory modify half word s 16bit in target memory modify byte s 8bit in target memory memory test calculates a checksum over a memory range verifies the last calculated checksum display general purpose register display all ARM registers display CP register default is CP15 display floating point register modify general purpose register modify CP register default is CP15 display Data Micro 1 display Inst Micro display Lockable Main display Set Associative Main TLB entries display L1 Data Cache Tag s display L1 Inst Cache Tag s reset the target system set PC and start target system single step an instruction force target to enter debug mode set instruction breakpoint clear instruction breakpoint s set data watchpoint 32bit access set data watchpoint 16bit access set data watchpoint 8bit access clear data watchpoint s display information about the current state execute a BDI direct command see manual display command list terminate the Telnet session LB entries LB entries LB entries l roc Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debugge
31. t used JTAG Test Reset This open drain push pull output of the BDI2000 resets the JTAG TAP controller on the target Default driver type is open drain System Ground JTAG Test Clock This output of the BDI2000 connects to the target TCK line JTAG Test Mode Select This output of the BDI2000 connects to the target TMS line This open collector output of the BDI2000 is used to reset the target system TDI JTAG Test Data In This output of the BDI2000 connects to the target TDI line Vcc Target 1 8 5 0V This is the target reference voltage It indicates that the target has power and it is also used to create the logic level reference for the input comparators It also controls the output logic levels to the target It is normally fed from Vdd I O on the target board 3 0 5 0V with Rev A B This input to the BDI2000 is used to detect if the target is powered up If there is a current limiting resistor between this pin and the target Vdd it should be 100 Ohm or less JTAG Test Data Out This input to the BDI2000 connects to the target TDO line The BDI2000 works also with targets which have no dedicated TRST pin For this kind of targets the BDI cannot force the target to debug mode immediately after reset The target always begins execu tion of application code until the BDI has finished programming the Debug Control Register Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG
32. way Transmit Click on this button to establish a connection with the BDI2000 loader Once connected the BDI2000 remains in loader mode until it is restarted or this dialog box is closed Press this button to read back the current loaded BDI2000 software and logic versions The current loader firmware and logic version will be dis played This button is only active if there is a newer firmware or logic version present in the execution directory of the BDI setup software Press this button to write the new firmware and or logic into the BDI2000 flash mem ory programmable logic Enter the IP address for the BDI2000 Use the following format xxx xxx xxx xxxe g 151 120 25 101 Ask your network administrator for assigning an IP address to this BDI2000 Every BDI2000 in your network needs a different IP address Enter the subnet mask of the network where the BDI is connected to Use the following format xxx xxx xxx xxxe g 255 255 255 0 A subnet mask of 255 255 255 255 disables the gateway feature Ask your network administrator for the correct subnet mask Enter the IP address of the default gateway Ask your network administra tor for the correct gateway IP address If the gateway feature is disabled you may enter 255 255 255 255 or any other value Click on this button to store the network configuration in the BDI2000 flash memory In rare instances you may not be able to load the firmware in spite of a correctly connected BD
33. wer that 6 MHz Copyright 1999 2004 by ABATRON AG V 1 00 e A JTAG interface for RDI Debuggers BD 2000 AMT 1 User Manual 79 4 BDI working modes ECTS 0 Identification Integrator CM1136JF S r Startup Breakpoint CPU Type ARM1136 Reset Software JTAG Clock fis MHz C Stop C C Bun Hardware Workspace FFFFFFFF Hex Big Endian memory format RunTime 2000 ms r Trap Exceptions FIQ_ IRQ Sy DABT P amp BT Swi UND RST r JTAG Scan Chain Predecessor 0 IR length 0 Successor 1 IR length 4 dialog box BDI Working Mode With this dialog box you can define how the BDI interacts with the target system Identification Startup Breakpoint CPU Type Workspace Run Time Trap Exceptions Big Endian JTAG Clock Enter a text to identify this setup This text can be read by the debugger with the appropriate Command Startup mode defines how the BDI interacts with the target processor after reset or power up The options RESET STOP or RUN can be selected Breakpoint mode defines how breakpoints are implemented When Soft ware is selected default Breakpoints are set by replacing program code in target memory When Hardware is selected the built in breakpoint logic of the target CPU is used to implement Breakpoints In this mode only up to 6 Breakpoints are available This mode may be used when debugging code stored in a ROM Select the CP
34. x00100C0E MMU 0x00100000 cacheable bufferable WM32 000004008 Ox00200COE MMU 0x00200000 cacheable bufferable WM32 Ox0000400C Ox00300C0E MMU 0x00300000 cacheable bufferable 116499 00004010 OO ANNE RABAT Le AN lel hifkarshla zl Paste Delete Cancel dialog box Startup Init List In order to prepare the target for debugging you can define an Initialization List This list is stored in the Flash memory of the BDI2000 and worked through every time the target comes out of reset Use it to get the target operational after a reset The memory system is usually initialized through this list After processing the init list the RAM used to download the application must be accessible Use on line help F1 and the supplied configuration examples on the distribution disk to get more information about the init list CPx register number The register number is used to build the appropriate MCR or MRC instruction opc_2 0 CRm opo 1 0 nbr CP15 ID register CRn 0 opcode 2 0 0x0000 CP15 Cache Type CRn 0 opcode_2 1 0x2000 CP15 Invalidate cache line CRn 7 opcode 2 1 CRm 5 0x2507 Copyright 1999 2004 by ABATRON AG V 1 00 ldi JTAG interface for RDI Debuggers BD 2000 ARMT 1 User Manual 18 Special BDI Configuration Registers In order to change some special configuration parameters of the BDI the GPR entry in the init list is used No
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