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886LCD-M Family

1. 99 OE __ 5 _ PW 9 5 GD PWR k 9 _____ _ j DVOBD ___ DVD j 9 Uv __ ua DvoB Hsm L VREFCO The AGP buffers operate only in 1 5V mode not 3 3 V tolerant The AGP interface supports 1 2 4 AGP signaling and 2x 4x Fast Writes Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 30 of 81 Signal Description AGP Connector Signal Address Description Pipelined Read This signal is asserted by the AGP master to indicate a full width address is to be enqueued on by the target using the AD bus One address is placed in the AGP request queue on each rising clock edge while PIPE is asserted When PIPE is deasserted no new requests are queued across the AD bus During SBA Operation This signal is not used if SBA Side Band Addressing is selected During FRAME Operation This signal is not used during AGP FRAME operation PIPE is a sustained tri state signal from masters graphics controller and is an input to the GMCH ADD ID 7 0 Side band Address These signals are used by the AGP master graphics controller to pass address and command to the GMCH The SBA bus and AD bus operate independently That is transactions can proceed on the SBA bus an
2. Gkontron 886LCD M Family KTD 00474 U Public User Manual 6 System Ressources 6 1 Memory map Date 2010 06 22 53 of 81 Address range hex Size Description 00000000 0007FFFF 512 Kbytes Conventional memory 00080000 0009FBFF 127 Kbyte Extended conventional memory 0009 00 0009FFFF 1 Kbyte Extended BIOS data 000A0000 000AFFFF 64 Kbytes 885GME VGA Controller Video memory and BIOS 000B0000 OOOBFFFF 64 Kbytes 885GME VGA Controller Video memory and BIOS 000C0000 000CC5FF 49 Kbytes 885GME VGA Controller Video memory and BIOS 000CC800 000CD7FF 4 Kbytes Realtek 8110 Ethernet Controller D0000000 DFFFFFFF OxFFFFFFF 885GME Processor Controller E8000000 EFFFFFFF Ox7FFFFFF 885GME VGA Controller F0000000 F7FFFFFF Ox7FFFFFF 885GME VGA Controller FF7FF400 FF7FFAFF OxFF Realtek 8110 Ethernet Controller FF7FF800 FF7FF8FF OxFF Realtek 8110 Ethernet Controller FF7FFCOO FF7FFCFF OxFF Realtek 8110 Ethernet Controller FF980000 FF9FFFFF Ox7FFFF 885GME VGA Controller FFA7B000 FFA7BOOF OxF PCI System Peripheral FFA7B400 FFA7B7FF Ox3FF USB Controller FFA7B800 FFA7B8FF OxFF Realtek AC97 Audio FFA7BCOO JFFA7BDFF Ox1FF Realtek AC97 Audio FFA7FCOO FFAFFFFF 0x803FF Ultra SATA Controller FFA80000 FFAFFFFF Ox7FFFF 885GME VGA Controller FFB00000 FFEFFFFF 0x3FFFFF Intel 82802 Firmware Hub Device FFF00000 FFFFFFFF 1 Mby
3. Pull PIN Pull Note U D loh lol Type Signal Signal Type loh lol U D Note PWR GND 5 9 RI I5K O DTR 48 CTS I5K TxD 37 RTS z ISK 5 RxD 2 6 DSR 5 DCD 1 4 8 2 2 Com3 amp Com4 Pin Header Connectors The pinout of Serial ports Com2 Port2 Com3 SIO Port1 and Com4 SIO Port2 is as follows Pull Pull m MGE IE DSR Eum He E ro gt 6 co jamaa me ia eee s Note 1 5V supply is shared with supply pins in Com2 Com3 Com4 headers The common fuse is 1 1A If the DB9 adapter ribbon cable is used the DB9 pinout will be identical to the pinout of Serial Com1 Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 40 of 81 4 9 Ethernet connectors The 886LCD M Flex 886LCD M ATX and 886LCD M mITX boards supports channels of 10 100 1000Mb Ethernet In order to achieve the specified performance of the Ethernet port Category 5 twisted pair cables must be used with 10 100MB and Category 5E 6 or 6E with 1Gb LAN networks The signals for the Ethernet ports are as follows Signal Description MDI 0 In MDI mode this is the first pair 1000Base T i e the BI_DA pair and is the transmit pair in 10Base T and 100Base TX In MDI crossover mode this pair acts as the DB pair and is the receive
4. 26 4 4 Display TE E UE DE 27 4 4 1 CRT Connector 27 4 4 2 LVDS Flat Panel Connector 5 28 4 4 3 AGP DVO connector 29 45 Parallel ATA harddisk 1 33 4 5 1 IDE Hard Disk Connector IDE 34 4 5 2 IDE Hard Disk Connector IDE 5 34 4 5 3 IDE Hard Disk Connector IDE S2 35 454 CF Connector CP u reb pene ap eee abes S FU ee 36 4 6 Serial ATA harddisk interface u 37 4 6 1 SATA Hard Disk Connector SATAO 5 37 47 Printer Port Connector 1 241 U ica U dm cauia u dm u cessed 38 Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 5 of 81 4 8 Serial i l l lll 39 4 8 1 Comi Port1 DB9 Connector uu tud de aed ead dr ane ed 39 4 8 2 2 Com3 amp Com4 Pin Header 2 0040000001 39 49 Ethernet connectors iioii cue eost eurer e 40 4 9 1 E
5. V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Options Description Power Management APM Disabled Setup the SMI APM support Enabled Power Button Mode On Off Select Power button functionality Suspend USB Controller Resume Disabled Lets the USB devices wake up from sleep state Enabled PME WOL Disabled Allow PME WOL to wake from sleep states Enabled RI Resume Disabled Allow RI Modem to wake from sleep states Enabled RTC Resume Enabled Let the board start up on a specific date and time Disabled RTC Alarm Date Every Day Setup the date you want the board to start 1 31 RTC Alarm Time HH MM SS Setup the time you want the board to start PS 2 Kbd Mouse 54 55 Disabled When disabled the board can wake from S1 and S3 Wake Enabled and when enabled it can also wake from S4 and S5 S3 S5 Keyboard Hotkey Any key Setup the key that can wake up the board Space Enter Sleep button AC Power Loss Restart Select whether or not to restart the system after AC On power loss Off keeps the power off until the power Previous State button is pressed On restores power to the computer Previous State restores the previous power state before power loss occurred Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 79 of 81 8 9 Exit Menu Main Advanced PCIPnP Boot Security Chipset Power Exit Exit Options Exit system setup af
6. DU CEU daga 52 6 5 vo Drag va ac Dana Va deus va oia 53 Memory ALL 53 6 2 eiu 53 6 3 Interrupt USAGE 54 6 4 E 55 65 LIU RS Sa 55 7 OVERVIEW OF BIOS 56 7 1 System Management BIOS SMBIOS DNI u u u u 56 7 2 USB Su ppm ricci uu ul 56 8 BIOS CONFIGURATION SETUP u 57 8 1 eleif memt 57 82 Menu uuu 57 8 3 M M 58 8 3 1 Advanced settings CPU 58 8 3 2 Advanced settings IDE 59 Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 6 of 81 8 3 3 Advanced settings LAN Configuration I enne 61 8 34 Advanced settings Floppy
7. Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 46 of 81 4 15 Front Panel connector FRONTPNL Pull Pull loh lol PEE LE 93535 6112 Elm 3 4 USB 45 6 95 ___ GND sj o l j 6 LED 5 74 SUS LED ___ j GND 5 16 PWRBTN __ L GND a SU 5 3 L 1 SPKR_OUT_L SPKROUTR Signa Description 0000202 5V supply for the USB devices on USB Port 1 and 3 is on board fused with a 1 5A USB13 5V reset able fuse The supply is common for the two channels SB5V is supplied during power down to allow wakeup on USB device activity USB1 USB1 USB3 USB3 Universal Serial Bus Port 1 Differentials Bus Data Address Command Bus Universal Serial Bus Port 3 Differentials Bus Data Address Command Bus Maximum load is 1A or 2A per pin if using IDC connectorfladkabel or crimp terminals respectively HD_LED Hard Disk Activity LED active low signal Output is via 4750 to OC SUS LED Suspend Mode LED active high signal Output is via 4750 PWRBTN_IN Power Button In Toggle this signal low to start the ATX PSU and boot the board RSTIN Reset Input Pull low to reset the board SPKR_OUT_L Speaker Out Left channel amplified 3W SPKR OUT R Sp
8. 2814 10 DO 0815 jma KEY 1 212 7 9 PWR GND PwR 27 29 21 c 133 3 35136 37 39 HDIRQB 32 34 CELICE 5 36 DAB2 TBD 38 40 HDCSB1 O TBD GND PWR NONE sm DDACKB Oo o Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 35 of 81 4 5 3 IDE Hard Disk Connector IDE S2 This connector 44 pin 2 0 mm pitch can be used for connection of up till two secondary IDE drives but only if no drive s is installed via IDE S socket Pull Pull pee BH ses ow o De ee UU NM nr GND jM TEUS ps 088 TBD TED io 066 5 6 TBD L TED o 065 78 10 TBD L5 Eel 0812 0 EDS D DB3 IO TBD Ds 0814 lO TD __ 9815 PWR GND 20 2 2 OB 1231244 NN GND IORDYB GND jis DDACKB TBD 52 1 NC Ds CBLIDB GSS S DABO 2 TBD
9. cN NC jw Note 1 Pin is longer than average length of the other pins Note 2 Pin is shorter than average length of the other pins 2 3 4 5 6 7 8 9 0 1 2 3 4 Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 37 of 81 4 6 Serial ATA harddisk interface Two serial harddisk controllers are available on the board a primary controller SATAO and a secondary controller SATAB 4 6 11 SATA Hard Disk Connector SATAO SATA1 SATAO Pull Type loh lol U D Ey es mer 2 SATAOTX 5 4 5 SATAORX 6 SATAO RX SSS GND signals used for the primary Serial harddisk interface the following Signal Description SATAO RX Host transmitter differential signal pair SATAO RX SATAO TX Host receiver differential signal pair SATAO TX All of the above signals are compliant to 4 SATA1 Pull mer 2 SATA TX S p sare SEES 4 GND 5 SATA1 RX 6 SATA1 RX LI GND jY The signals used for the secondary Serial ATA harddisk interface are the following Sigma Description SATA1 RX Host transmitter differential signal pair SATA1 RX SATA1 TX Host receiver differential signal pair SATA1 TX All
10. connected to GND pin 25 collector and basis shorted and connected to 23 Temp3 In Further a resistor 30K 1 shall be connected between pin 23 and pin 24 Vref Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 48 of 81 4 17 1 PCI Slot Connector Terminal Note Type Signal S C Signal Type Note Uv Tis __ mae PR GND TMS 0 ee So MS PWMR sv x ji IND ge PWR _ o j GND GND GND 0 ovs or PWR GND nov PWMR GND o I REO GND x _ PWR SV VO REO I j 101 1 AD30 ir AD9 PWR GND 028 o O I X 17 4026 o 145 GND PW x 33 0 oo j x _ V x _ GND __ 22 o _ IO j AD 0 GND j PW 33 ADi8 AD OBER ow PWR GND FRAMER or GND PWR
11. PWR ava 2 12 12v PWR PWR ava 1 11 3v3 PWR Note 1 5V supply is not used onboard Note 2 pull up resistor on old board revision Note 3 Pull up to 5VSB The requirements to the supply voltages are as follows also refer to ATX specification version 2 03 mn Mac Toce Control signal description Signal Description Active high signal from the power supply indicating that the 5V and 3V3 supplies are within operating limits It is strongly recommended to use supply with the 886LCD M Flex 886 and 886LCD M mITX boards in order to implement the supervision of the 5V and 3V3 supplies These supplies not supervised onboard the 886L CD M Flex 886LCD 886LCD M mlITX boards PS Active low open drain output with pull up to Standby 5V Used to turn on power supply outputs Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 26 of 81 4 3 Keyboard and PS 2 mouse connectors Attachment of a keyboard or PS 2 mouse adapter can be done through the stacked PS 2 mouse and keyboard connector MSE amp KBD Both interfaces utilize open drain signaling with on board pull up The PS 2 mouse and keyboard is supplied from 5V STB when in standby mode in order to enable keyboard or mouse activity to bring the system out from power saving states The supply is provided through a 1 1A res
12. TBD TBD HDCSBO HDCSB 1 HDACTB 39 40 PWR VCC 42 PWR GND 44 Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 36 of 81 4 5 4 CF Connector CF This connector is mounted on the backside of the 886LCD M mITX only If a Compact Flash Disk is used then no IDE drive can be connected to the IDE_S2 connector The socket support DMA UDMA modules Pull Pull U D loh lol Type Type loh lol U D 11 u __ cno uuu bb DB 012 DB4 a eae 1501 15 0813 DBS D DB6 NENNEN bb 3 c o TBD O TBD S lt 33 TBD IORB 34 9 PWR TBD O IOWB PWR 11 IRQB NC PWR 11 112 GND PWR av pew GND 14 GND e NE NER 15 GND e 16 17 GND 18 DAB2 19 DABI 20 21 22 DDREQB DDACKB DASP 3 3 3 3 NC 4 RESETB 4 42 4 44 4 4 4 4 36 37 38 39 40 E41 IORDYB 22 43 44 45 46 47 48 49 6 7 8 9 0 1 3 5 6 7 8 1 1 1 1 1 1 1 1 2 2 2 2 23 49
13. Feature Options Description ACPI 2 0 Features No Enable Disable ACPI 2 0 features Yes ACPI APIC support Enabled Setup if the APIC controller should be supported Disabled in the ACPI code APIC ACPI SCI IRQ Enabled Enable Disable APIC ACPI SCI IRQ Disabled AMI OEMB table Enabled Enable Disable AMI OEMB table Disabled Headless mode Enabled Enable Disable Headless mode Disabled Gkontron 886LCD M Family KTD 00474 U 8 3 11 Public User Manual Date 2010 06 22 68 of 81 Advanced settings Remote Access Configuration Advanced Configure Remote Access type and parameters Remote Access Serial port number Serial Port Mode Flow Control Redirection After BIOS POST Terminal Type VT UTF8 Combo Key Support Enabled ICH COMI 115200 8 n 1 None Always ANSI Disabled Enable RSDP pointers to 64 bit Fixed System Description Tables lt Select Screen Select Item t change option F1 General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Remote Access Settings below not displayed if Remote Access is disabled Options Disabled Enabled Description Allows you to see the screen over the comport interface in a terminal window Serial port number SIO COMA SIO COMB Setup which comport that should be used for communication Se
14. 22 24 26 36 LVDS BCLK LVDS LVDS B3 LVDS Max 0 5A 18 20 22 24 26 8 0 3 3 36 38 40 Signal Description LVDS A0 A3 LVDS A Channel data LVDS ACLK LVDS A Channel clock LVDS BO B3 LVDS B Channel data LVDS BCLK LVDS B Channel clock BKLTCTL Backlight control 1 PWM signal to implement voltage in the range 0 3 3V BKLTEN Backlight Enable signal active low 2 VDD ENABLE Output Display Enable LCDVCC VCC supply to the flat panel This supply includes power on off sequencing The flat panel supply may be either 5V DC or 3 3V DC depending on the CMOS configuration Maximum load is 1A at both voltages DDC CLK DDC Channel Clock DDC DATA DDC Channel Data Note 1 Windows API version Hwmon_KTAPI ver 4 5 or newer is available to operate the BKLTCTL signal Some Inverters has a limited voltage range 0 2 5V for this signal If voltage is gt 2 5V the Inverter might latch up Some Inverters generates noise to the BKLTCTL signal and this noise can make the Ivds transmision fail resulting in corrupted picture on the display By adding Ohm resistor in series with this signal and mounted in the Inverter end of the cable kit the noise is limited and picture is stabil Note 2 If the Backlight Enable is required to be active high then make the BIOS Chipset setting Backlight Signal Inversion Enabled Gkontron 886LCD M Family KTD 00474 U Public User Manual
15. AD 31 0 0 31 0 Address Data During PIPE and FRAME Operation The AD 31 0 signals are used to transfer both address and data information on the AGP interface During SBA Operation The G AD 31 0 signals are used to transfer data on the AGP interface continues kontron 886LCD M Family KTD 00474 U CBE 3 0 Public User Manual Date 2010 06 22 Page 32 of 81 Command Byte Enable During FRAME Operation During the address phase of a transaction the G_CBE 3 0 signals define the bus command During the data phase the CBE 3 0 signals are used as byte enables The byte enables determine which byte lanes carry meaningful data The commands issued on the CBE signals during FRAME based AGP transactions are the same G_CBE command described in the PCI 2 2 specification During PIPE Operation When an address is enqueued using PIPE the C BE signals carry command information The command encoding used during PIPEZ based AGP is different than the command encoding used during FRAME based cycles or standard PCI cycles on PCI bus During SBA Operation These signals are not used during SBA operation Parity During FRAME Operation PAR is driven by the GMCH when it acts as a FRAME based AGP initiator during address and data phases for a write cycle and during the address phase for a read cycle G PAR is driven by the GMCH when it acts as a FRAMEZ based AGP target dur
16. aav 107 DEVSE GND PWR j PWR GND sros LOCKK v PER 500 10 O R EE so SER GND PR PR nav o j CB o x j AD 3 3 PW PWR GND D o j T ADI or j ADO PWR PW GND AD09 IOT SOLDER SIDE COMPONENT SIDE o Ao C BEOR IOT o j AD PW PWR av Abo or j j r j or AD GND PWR _ GND 00 j IT j ADI r j PWR V O PWR Reas lor _ PWR ev PW j LL v 5v Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 49 of 81 4 17 2 Signal Description PCI Slot Connector SYSTEM PINS CLK Clock provides timing for all transactions on PCI and is an input to every PCI device All other PCI signals except RST INTA INTB INTC and INTD are sampled on the rising edge of CLK and all other timing parameters are defined with respect to this edge PCI operates at 33 MHz RST Reset is used to bring PCI specific registers sequencers and signals to a consistent state What eff
17. F1 General Help Interrupt 19 Capture Disabled F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Options Description Quick Boot Enabled Allows BIOS to skip certain test while booting Disabled Quiet Boot Disabled Shows boot logo instead of POST screen Enabled Enabled amp Maintain Bootup Num Lock Off On Select Power on state for numlock PS 2 Mouse Support Disabled Select support for PS 2 Mouse Enabled Auto Halt on see note Disabled Wait for F1 key to be pressed if error If no All But Keyboard keyboard present post will continue Hit DEL Message Display Disabled Display the message or not Enabled Interrupt 19 Capture Disabled Allows option ROMs to trap interrupt 19 Enabled Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 73 of 81 Note List of errors INS Pressed Primary Master Hard Disk Error PCI I O conflict Timer Error Interrupt Controller 1 error Keyboard Interface Error Halt on Invalid Time Date NVRAM Bad Feature Auto adjust Boot Priority S M A R T HDD Error Cache Memory Error DMA Controller Error Resource Conflict Static Resource Conflict PCI ROM conflict PCI IRQ conflict PCI IRQ routing table error Options Yes No Description If Yes then eg USB devices will be placed first in the boot Device Priority Menu when booting Removable Devices 1st No Yes Should remova
18. PC is routed through codec Problems with DRAM will be announced through AMP regardless of this setting Description Setup type of boot screen Backlight Signal Inversion Disabled Enabled Select the signal polarity LCDVCC Voltage 3 3V 5V Setup the LCD Voltage Backlight PWM modulation 1KHz 5KHz 10KHz 20KHz Backlight intensity PWM signal frequency setup Backlight PWM ratio 0 12 5 25 37 5 50 62 5 75 87 5 100 Backlight intensity PWM signal pulse width setup EDID Support Enabled Disabled LVDS auto configuration via EEProm LVDS Panels Chose the connected LVDS panel DVO DVO Chip Select the DVO connection Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 78 of 81 8 8 Power Menu Main Advanced PCIPnP Boot Security Chipset Power Exit Enable Disable SMI ADVANCED SMI ENABLE CONTROLS based power management Power Management APM Enabled and APM support Power Button Mode On Off ADVANCED RESUME EVENT CONTROLS USB Controller Resume Disabled PME Resume Disabled RI Resume Disabled RTC Resume Enabled RTC Alarm Data 11 RTC Alarm Time alba ee lt Select Screen PS 2 Kbd Mouse S4 S5 Wake Disabled Select Item S3 S5 Keyboard Hotkey Any key t Change Option Fl General Help AC Power Loss Restart Off 10 Save Exit FSC Exit
19. Some CDROM cable kits expect reverse pin order Signal Description CD Left Left and right CD audio input lines or secondary Line in CD Right CD GND Analogue GND for Left and Right CD This analogue GND is not shorted to the general digital GND on the board Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 44 of 81 4 11 3 AUDIO Header AUDIO HEAD Pull loh loh Pull Note ioi Pm Type AMP LFE OUT AMP CEN OUT AAGND 3 AAGND SPKR OUT f 5 6 SPKR OUT R AAGND AAGND SURR OUT L f 9 10 SURR OUT R NC F FRONT MIC1 F FRONT MIC2 AAGND F AUX IN L F AUX IN R F MONO OUT AAGND GND F SPDIF IN F SPDIF OUT GND Suma Ne OUT Front Speakers Speaker w SPK OUT R Front Speakers Speaker OutRigh sw SURR OUT R Select 4 or 5 1 speakers AMP CEN OUT Select 5 1 speakers AMP LFE OUT Select 5 1 speakers F SPDIF OUT S PDIF Output Enable SPDIF AAGND Audio Analogue ground Not amplified on 886LCD M mITX In the Realtek Audio Driver In the Realtek Audio Driver XP only Also enable SPDIF in Player if used Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 45 of 81 4 12 Fan connect
20. Two Parallel ATA IDE interfaces with UDMA 33 ATA 66 100 support PS 2 keyboard and mouse ports Memory Chipset continues Gkontron 886LCD M Family KTD 00474 U LAN Support Public User Manual Date 2010 06 22 Page 11 of 81 3x 10 100 1000Mbits s LAN subsystem using Realtek RTL8110SB 32 LAN controllers or 1x 3x 10 100Mbits s LAN subsystem using Realtek RTL8100C LAN controllers depending on board configuration PXE and RPL netboot supported Wake On LAN WOL supported on ETH1 only BIOS e Kontron Technology AMI BIOS core version e Support for Advanced Configuration and Power Interface ACPI 1 0 2 0 Plug and Play o Suspend To Ram o Suspend To Disk o Intel Speed Step Secure CMOS OEM Setup Defaults Always On BIOS power setting RAID Support RAID modes 0 and 1 Instantly Available PC Technology Support for PCI Local Bus Specification Revision 2 2 Suspend to RAM support Expansion Capabilities SMBus routed to FEATURE connector LPC Bus routed to LPC connector DDC Bus routed to LVDS connector 8 x GPIOs General Purpose l Os routed to FEATURE connector PCI Bus routed to PCI slot s PCI Local Bus Specification Revision 2 2 Hardware Monitor Subsystem Smart Fan control system support Thermal amp and Speed cruise for three onboard Fan control connectors FAN PROC FAN SYS and FEATURE Three thermal inputs CPU die temperature System temperature and Ex
21. amp INT Dec 13 2006 routing and to BIOS Riser card setting Added info to Onboard Connectors Size of video memory added to Component Main Data June 14 2004 Text removed from rev U Nov 26 2008 Aug 18 2008 Oct 18 2007 Sept 17 2007 May 25 2007 Mar 13 2007 Feb 16 2007 Copyright Notice Copyright 2006 KONTRON Technology A S ALL RIGHTS RESERVED No part of this document may be reproduced or transmitted in any form or by any means electronically or mechanically for any purpose without the express written permission of KONTRON Technology A S Trademark Acknowledgement Brand and product names are trademarks or registered trademarks of their respective owners Disclaimer KONTRON Technology A S reserves the right to make changes without notice to any product including circuits and or software described or contained in this manual in order to improve design and or performance Specifications listed in this manual are subject to change without notice KONTRON Technology assumes no responsibility or liability for the use of the described product s conveys no license or title under any patent copyright or mask work rights to these products and makes no representations or warranties that these products are free from patent copyright or mask work right infringement unless otherwise specified Applications that are described in this manual
22. is asserted When GNT is deasserted these signals have no meaning and must be ignored ST 2 0 Meaning 000 Previously requested low priority read data is being returned to the master 001 Previously requested high priority read data is being returned to the master 010 The master is to provide low priority write data for a previously queued write command 011 The master is to provide high priority write data for a previously queued write command 100 Reserved 101 Reserved 110 Reserved 111 The master has been given permission to start a bus transaction The master may queue requests by asserting PIPE or start a PCI transaction by asserting FRAMES AGP Strobes ADSTB O0 Address Data Bus Strobe 0 provides timing for 2x and 4x data on AD 15 0 and C BE 1 0 signals The agent that is providing the data will drive this signal ADSTB 0 Address Data Bus Strobe 0 Complement With AD STBO forms a differential strobe pair that provides timing information for the AD 15 0 and C BE 1 0 signals The agent that is providing the data will drive this signal ADSTB 1 Address Data Bus Strobe 1 Provides timing for 2x and 4x data on AD 31 16 and C BE 3 2 signals The agent that is providing the data will drive this signal ADSTB 1 Address Data Bus Strobe 1 Complement With AD STB1 forms a differential strobe pair that provides timing information for the AD 15 0 and C BE 1 0 signals in 4X mode The agent
23. 58 C Copyright 1985 2005 American Megatrends Inc Feature Options Change Supervisor Password Password Description When not cleared the advanced Supervisor Password protection system is enabled see below diagram Hereafter setting can only be accessed when entering BIOS as Supervisor User Access Level Full Access View Only Limited No Access Only visible if Supervisor Password is installed Full Access User can change all BIOS settings View Only User can only read BIOS settings Limited User can only read settings except Date amp Time Quick Boot Quiet Boot Repost Video on S3 Resume Active State Power Management and Remote Access No Access User can not enter BIOS but if Password Check Always then User password will allow boot Change User Password Password Change the User Password Clear User Password Ok Cancel Clears the User Password Boot Sector Virus Protection Enabled Disabled Will write protect the MBR when the BIOS is used to access the harddrive HDD Password Password Locks the HDD with a password the user needs to type the password on power on Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 75 of 81 Supervisor Password protection setup Supervisor before User BIOS User Access control Full Supervisor PSW CMOS most Date amp Time y also Quick Boot Quiet Boot Repost Video o
24. 6 2 Measured Power Consumption Net 886LCD M board 3x1GB LAN with Pentium M 1600 400MHz 1MB L2 Cache 256MB DDR RAM 333MHz Power State Net Current I Power W DOS FULL LOAD 5VDC 4 560A 22 8W 3 3VDC 2 568A 8 7W DOS IDLE 5VDC 3 3VDC 12VDC ACPI S1 5VDC 1 758A 8 8W 3 3VDC 2 560A 8 8W ACPI S3 5VSB 1 007A 5 16W ACPI S4 5VSB 1 007A 4 95W WINDOWS XP IDLE 5VDC 2 212A 11 1W 3 3VDC 2 720A 8 7W WINDOWS XP FULL LOAD 5VDC 4 704A 23 7W 3 3VDC 2 572 8 7W Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 18 of 81 3 6 3 Power Consumption Total 886LCD M board 3x1GB LAN with Pentium M 1600 400MHz 1MB L2 Cache 256MB DDR RAM 333MHz Power State CPU Speed Power consumption Full load 1600Mhz Idle 1600Mhz ACPI 51 1600Mhz ACPI S3 1600Mhz ACPI S4 1600Mhz ACPI 55 1600Mhz 886LCD M board 3x1GB LAN with Intel Mobile Celeron 800 400MHz OMB L2 Cache BGA 256MB DDR RAM 333MHz Power State CPU Speed Power consumption Full load 800MHz Idle 800MHz ACPI 51 800MHz ACPI S3 800MHz ACPI S4 800MHz ACPI 85 800MHz 3 6 4 Minimum recommended power supply specifications Note Minimum recommended power supply specifications do not include attachment of AUDIO Speakers AMP out USB AGP PCI devices If these devices are added to the board additional power requirements must be taken into account Refer to the
25. Date 2010 06 22 Page 29 of 81 4 43 AGP DVO connector Note Type Signal PN _________ Note 1 PAR _ v TYEDET O R E 5 US PM GND B6 A6 INTA 11 RS r X Gto 9 _ PWR 5 PR 5 sl XJ 3 0D PWR k ws _ I ADI 33 Me 03 j I j x I _____ _25 PWR PWR ADDIS 1 Sia Sa PWR Saas Ss PWR DVOBC Int _____ _ 1 VOC Ds Pp VOC po ee aa awa i PWR pex Ed w s PWR SS a AT DVOCD2 DVOCDO PIR ADDRS VOC PR 2 Mp O _ PR GPERR 9E PME x _ PR k XA 99 Detect _ DVOBBlak MDDCCK x _ PR v 5v Pw DVOB DVOBCCKnt j _ GND ____ PWR k 008 j j _ __ DVOBD
26. No Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 66 of 81 8 3 9 Advanced settings General ACPI Configuration Advanced General ACPI Configuration Select the ACPI state used for System Suspend mode S1 amp S3 STR Suspend Repost Video on 3 Resume No SABIOS Support Disabled lt Select Screen Select Item change option F1 General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Options Description Suspend mode S1 POS only Select the ACPI state used for System Suspend 1 amp S3 STR Repost Video on S3 No Determines whether to invoke VGA BIOS post on Resume Yes S3 STR resume 548105 Support Disabled Determines if you want to support S4 power state Enabled Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 67 of 81 8 3 10 Advanced settings Advanced ACPI Configuration Advanced Advanced ACPI Configuration Enable RSDP pointers to 64 bit Fixed System ACPI 2 0 Features No Description Tables ACPI APIC support Enabled APIC ACPI SCI IRQ Disabled AMI OEMB table Enabled Headless mode Disabled lt Select Screen E Select Item t change option F1 General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc
27. are for illustration purposes only KONTRON Technology A S makes no representation or warranty that such application will be suitable for the specified use without further testing or modification Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 3 of 81 Life Support Policy KONTRON Technology s PRODUCTS ARE NOT FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT EXPRESS WRITTEN APPROVAL OF THE GENERAL MANAGER OF KONTRON Technology A S As used herein 1 Life support devices or systems are devices or systems which a are intended for surgical implant into body or b support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in significant injury to the user critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness KONTRON Technology Technical Support and Services If you have questions about installing or using your KONTRON Technology Product check this User s Manual first you will find answers to most questions here To obtain support please contact your local Distributor or Field Application Engineer FAE Before Contacting Support Please be prepared to provide as much informatio
28. if the device should run in Block mode PIO Mode Auto Selects the method for transferring the data between the hard disk and system memory The Setup menu only lists those options supported by the drive and platform DMA Mode Auto SWDMAO SWDMA1 SWDMA2 MWDMAO MWDMA1 MWDMA2 UDMAO UDMA1 UDMA2 UDMA3 UDMA4 UDMA5 Selects the Ultra DMA mode used for moving data to from the drive Autotype the drive to select the optimum transfer mode Note To use UDMA Mode 2 3 4 and 5 witha device the harddisk cable used MUST be UDMA66 100 cable 80 conductor cable Auto Disabled Enabled Select if the Device should be monitoring itself Self Monitoring Analysis and Reporting Technology System 32Bit Data Transfer Disabled Enabled Select if the Device should be using 32Bit data Transfer Gkontron 886LCD M Family KTD 00474 U Feature ATA PI 80Pin Cable Detection Public User Manual Options Host amp Device Host Device Date 2010 06 22 61 of 81 Description Select the mechanism for detecting 80Pin ATA Cable P ATA1 Cable Detection Force Disable 40Pin 80Pin Force the board to operate as if a 40Pin ATA cable or 80Pin ATA cable is installed on the Primary channel P ATA2 Cable Detection Force Disable 40Pin 80Pin Force the board to operate as if a 40Pin ATA cable or 80Pin ATA cable is installed on the Primary channel Hard D
29. interface to be running in Mode No enhanced mode or legacy mode P ATA Channel Selection Primary Secondary Setup the active IDE channels Both S ATA Ports Definition P0 3 P1 4 Select physical ports PO P1 to be 37 4 or 4 p1 3 4 3 Configure S ATA as RAID No Only available when P ATA Only is selected Yes Note Install the driver via USB Floppy connected to USB port 2 lower conn Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 60 of 81 Advanced Primary IDE Master Select the type of devices connected to Device Hard Disk the system Vendor ST340014A Size 40 0GB LBA Mode Supported Block Mode 16Sectors PIO Mode 4 Async DMA MultiWord DMA 2 Ultra DMA Ultra DMA 5 S M A R T Supported Type Auto lt Select Screen LBA Large Mode Auto n Select Item Block Multi Sector Transfer Auto t Change Option PIO Mode Auto E General Help DMA Mode Auto F10 Save and Exit S M A R T Auto ESC Exit 32Bit Data Transfer Disabled V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Options Not Installed Auto CDROM ARMD Description Select the type of device installed LBA Large Mode Disabled Auto Enabling LBA causes Logical Block Addressing to be used in place of Cylinders Heads and Sectors Block Multi Sector Transfer Disabled Auto Select
30. lt Select Screen Select Item t change option Fl General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature OnBoard Floppy Controller Options Disabled Enabled Description Enable or disable the Floppy Controller Serial Port1 Address Disabled 3F8 IRQ4 3E8 IRQ4 3E8 IRQ6 3E8 IRQ10 2E8 IRQ11 Select the BASE addresse and IRQ The available options depends on the setup for the the other Serial Ports Serial Port2 Address Disabled 2F8 IRQ3 2E8 IRQ3 3E8 IRQ6 3E8 IRQ10 2E8 IRQ11 Select the BASE addresse and IRQ The available options depends on the setup for the the other Serial Ports Serial Port2 Mode Normal IRDA ASK IR Select Mode for Serial Port2 Parallel Port Address Disabled 378 278 3BC Select the I O address for the LPT NOTE you cannot enable the floppy controller and parallel port at the same time Parallel Port Mode Normal Bi Directional EPP ECP Select the mode that the parallel port will operate in EPP Version 1 9 1 7 Setup with version of EPP you want to run on the parallel port ECP Mode DMA Channel DMAO DMA1 DMA3 Select a DMA channel Parallel Port IRQ IRQ5 IRQ7 Select a IRQ ICH SIO Serial Port1 Address Disabled 3E8 IRQ6 3E8 IRQ10 2E8 IRQ11 Select the BASE addresse and IRQ The available op
31. of the above signals are compliant to 4 Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 38 of 81 4 7 Printer Port Connector PRINTER The printer port connector is provided in a standard DB25 pinout The signal definition in standard printer port mode is as follows Pull Pull woe Um type signat signa type UD Note 2 2 se Fig l _ aro oco 2424 2K2 as 2 2 2424 i0 2 2 2424 FPD i The interpretation of the signals in standard Centronics mode SPP with a printer attached is as follows Description Parallel data bus from PC board to printer The data lines are able to operate in PS 2 compatible bi directional mode Signal to select the printer sent from CPU board to printer Signal from printer to indicate that the printer is selected This signal indicates to the printer that data at PD7 0 are valid Signal from printer indicating that the printer cannot accept further data Signal from printer indicating that the printer has received the data and is ready to accept further data This active low output initializes resets the printer This active low output causes the printer to add a line feed after each line printed Signal from printer indicating that an error has been dete
32. operating system that supports USB verify that Legacy USB support in the BIOS Setup program is set to Enabled and follow the operating system s installation instructions Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 57 of 81 8 BIOS Configuration Setup 8 1 Introduction The BIOS Setup is used to view and configure BIOS settings for the 886LCD M board The BIOS Setup is accessed by pressing the DEL key after the Power On Self Test POST memory test begins and before the operating system boot begins The Menu bar look like this Main Advanced PCIPnP Boot Security Chipset Power Exit The available keys for the Menu screens are Select Menu lt gt or lt gt Select Item 1 or Select Field Tab Change Field lt gt or lt gt Help F1 Save and Exit lt F10 gt Exits the Menu Esc 8 2 Main Menu Main Advanced PCIPnP Boot Security Chipset Power Exit System Overview Use ENTER TAB or SHIFT TAB to select AMIBIOS a field Version 08 00 10 Build Date 11 17 08 Use or to ID 886LCD46 configure system Time PCB ID 14 Serial 00374708 PCB ID 63650000 Processor Type Intel R Pentium R M Processor 1600 MHz lt Select Screen Speed 600MHz Select Item Change Field System Memory Tab Select Field Size 1016MB F1 General Help Speed
33. ownership of LOCK If a device implements Executable Memory it should also implement LOCK and guarantee complete access exclusion in that memory A target of an access that supports LOCK must provide exclusion to a minimum of 16 bytes aligned Host bridges that have system memory behind them should implement LOCK as a target from the PCI bus point of view and optionally as a master IDSEL Initialization Device Select is used as a chip select during configuration read and write transactions DEVSEL Device Select when actively driven indicates the driving device has decoded its address as the target of the current access As an input DEVSEL indicates whether any device on the bus has been selected continues Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 50 of 81 ARBITRATION PINS BUS MASTERS ONLY Request indicates to the arbiter that this agent desires use of the bus This is a point to point signal Every master has its own REQ which must be tri stated while RST is asserted Grant indicates to the agent that access to the bus has been granted This is a point to point signal Every master has its own GNT which must be ignored while RST is asserted While RST is asserted the arbiter must ignore all REQ lines since they are tri stated and do not contain a valid request The arbiter can only perform arbitration after RST is deasserted A master must ignore its GNT while RST is asserted R
34. pair in 10Base T and 100Base TX MDI 1 In MDI mode this is the second pair in 1000Base T i e the BI DB pair and is the MDI 1 receive pair in 10Base T and 100Base TX In MDI crossover mode this pair acts as the pair and is the transmit pair in MDI O 10Base T and 100Base TX In MDI mode this is the third pair in 1000Base T i e the pair In MDI crossover mode this pair acts as the 0 pair In MDI mode this is the fourth pair in 1000Base T i e the DD pair In MDI crossover mode this pair acts as the pair Note MDI Media Dependent Interface 4 9 1 Ethernet connector 1 ETHER1 Ethernet connector 1 is mounted together with USB Ports 0 and 2 The pinout of the RJ45 connector is as follows Signal loh lol Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 41 of 81 4 9 2 Ethernet connector 2 3 ETHER2 3 The two Ethernet channels in ETHER2 3 are supported by two discrete Ethernet controllers connected to the onboard PCI bus This connector is not supported on the Engineering sample boards The pinout of the RJ45 s connector are as follows Signal loh lol Note The connector has two LEDs
35. which indicates connection and traffic status The left LED is status for the buttom port and the right LED is for ETHER2 More than one type of connector is approved for this application Please notice that it is possible that the shape of the LED might vary depending on actual type of connector Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 42 of 81 4 10 USB Connector USB 886LCD M Flex 886LCD M ATX and 886LCD M mITX contains two USB Universal Serial Bus ports UHCI Host Controllers Each Host Controller includes a root hub with two separate USB ports each for a total of 4 USB ports The USB Host Controllers support the standard Universal Host Controller Interface UHCI Specification Rev 1 1 All 4 USB ports support both USB1 0 and USB2 0 signaling and all ports supports Legacy mode See chapter Legacy USB Support for more info Over current detection on all four USB ports is supported USB Port 0 and 2 are supplied on the combined ETHER1 USBO USB2 connector USB Ports 1 and 3 are supplied on the FRONTPNL connector please refer to the FRONTPNL connector section for the pin out 4 10 1 USB Connector 0 2 05 0 2 USB Ports 0 and 2 are mounted together with ETHER1 ethernet port loh lol Signal EET Signal loh lol 5V SB5V USBO 5V SB5V USB2 Note 1 The 5V supply for the USB devices is on board fused
36. with a 1 5A reset able fuse The supply is common for the two channels SB5V is supplied during power down to allow wakeup on USB device activity In order to meet the requirements of USB v 1 1 standard the 5V input supply must be at least 5 00V Signal Description USBO Differential pair works as Data Address Command Bus USB2 USB2 USB5V 5V supply for external devices Fused with 1 5A reset able fuse Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 43 of 81 4 11 Audio Connector 4 11 1 Audio Line in Line out and Microphone Audio Line in Line out and Microphone are available in the stacked audio jack connector Line in Left RING Line in Right SLEEVE GND TIP Line out Left RING Line out Right SLEEVE GND TIP RING SLEEVE Note 1 Signals are shorted to GND internally in the connector when jack plug not inserted Note 2 Microphone is not supported on Engineering board samples 4 11 2 CD ROM Audio input CDROM CD ROM audio input may be connected to this connector It may also be used as a secondary line in signal Type loh lol Pull U D CD Left s 2 3 224 CO Right Note 1 The definition of which use for the Left Right channels is worldwide accepted standard
37. 1 10 WARRANTY aaa Aa e eaaa aa aa Aa aa Aaa anaa Enda ena r anaa aaa aa Nadaanan aa ARKEA 81 Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 7 of 81 1 Introduction This manual describes the 886L CD M Flex 886LCD M ATX 886LCD M mITX boards made by KONTRON Technology A S The boards will also be denoted 886LCD family if no differentiation is required All boards are to be used with the Intel Pentium M amp Intel Celeron M Processors Use of this manual implies a basic knowledge of PC AT hard and software This manual is focused on describing the 886 Board s special features and is not intended to be a standard PC AT textbook New users are recommended to study the short installation procedure stated in chapter 3 before switching on the power All configuration and setup of the CPU board is either done automatically or by the user in the CMOS setup menus Except for the CMOS Clear jumper no jumper configuration is required Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 8 of 81 2 Installation procedure 2 1 Installing the board To get the board running follow these steps In some cases the board shipped from KONTRON Technology has CPU DDR DRAM and Cooler mounted In this case Step 2 4 can be skipped 1 Turn off the PSU power supply unit Warning Do not use Power Supply without 3 3V monitoring watchdog which is standard fe
38. 333MHz F10 Save and Exit ESC Exit System Time 10218215 System Date Wed 26 11 2008 V02 58 C Copyright 1985 2005 American Megatrends Inc Note on Speed If the actual processor support Speed Step Pentium M does then BIOS will run at minimum Speed until BIOS is almost booted and then speed switch as selected for the Intel Speed Tech setting Celeron M do not support Speed Step and therefore the Processor Speed will be fixed and identical to the clock speed listed for the Processor Main Menu Selections You can make the following selections Use the sub menus for other selections Options i Description O System Time HH MM SS Set the system time System Date MM DD YYYY Set the system date Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 58 of 81 8 3 Advanced Menu Main Advanced PCIPnP Boot Security Chipset Power Exit Advanced Settings Configure CPU Warning Setting wrong values in below sections May cause system to malfunction CPU Configuration IDE Configuration LAN Configuration Floppy Configuration SuperlO Configuration Hardware Health Configuration Voltage Monitor lt 1 Configuration Se1 Remote Access Configuration Enter USB Configuration F1 lect Screen lect Item Go to Sub Screen General Help 10 Save Exit ESC Exit VV V V V V V VV V02 58 C Copyright 1985 2005
39. 5 RPM 30 75 C Options Disabled 16 seconds 38 seconds 1 minute 2 minutes 5 minutes 10 minutes The fan can operate in Thermal mode or in a fixed fan speed mode Description Adjust the amounts of boot time allowed before system reset occurs Software must disable or reload timer Disable IO 869h Init value 861h 4 3Fh 2 4 38 sec Reload write to 860h Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 65 of 81 8 3 7 Advanced settings Voltage Monitor Advanced Voltage Monitor Enable Hardware Health Monitoring Device Requested Cor 1 484 V VcoreA 1 431 V VcoreB 1 483 V 3 3Vin 3 290 V 5Vin 4 985 V 12Vin 12026 V 12Vin Good 5VSB 25 012 V lt Select Screen Select Item t change option F1 General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc 8 3 8 Advanced settings ACPI Configuration Advanced ACPI Settings Enable Hardware Health Monitoring Device ACPI Aware O S Yes General ACPI Configuration Advanced ACPI Configuration lt Select Screen Select Item t change option F1 General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Options __ Description Aware O S Select if your O S supports ACPI
40. 6 22 9 of 81 2 2 Requirement according to EN60950 Users of 886LCD boards should take care when designing chassis interface connectors in order to fulfill the EN60950 standard When an interface connector has a VCC or other power pin which is directly connected to a power plane like the VCC plane To protect the external power lines of peripheral devices the customer has to take care about e That the wires have the right diameter to withstand the maximum available power e That the enclosure of the peripheral device fulfils the fire protecting requirements of IEC EN 60950 Lithium Battery precautions CAUTION Danger of explosion if battery is incorrectly replaced Replace only with same or equivalent type recommended by manufacturer Dispose of used batteries according to the manufacturer s instructions ADVARSEL Lithiumbatteri Eksplosionsfare ved fejlagtig h ndtering Udskiftning ma kun ske med batteri af samme fabrikat og type Lev r det brugte batteri tilbage til leverandgren VARNING Explosionsfara vid felaktigt batteribyte Anv nd samma batterityp eller en ekvivalent typ som rekommenderas av apparattillverkaren Kassera anv nt batteri enligt fabrikantens instruktion VORSICHT Explosionsgefahr unsachgem f3em Austausch der Batterie Ersatz nur durch den selben oder einen vom Hersteller empfohlenen gleichwertigen Typ Entsorgung gebrauchter Batterien nach Angaben des Herst
41. American Megatrends Inc 8 3 1 Advanced settings CPU Configuration Advanced Configure advanced CPU settings Maximum CPU Speed is Module Version 11 05 set to maximum Minimum CPU Speed is Manufacturer Intel dus 1 Brand String Intel R Pentium R M processor 1600M VP dde controlled by Frequency 600MHz Operating Syste FSB Speed 400MHz Disabled Default CPU Cache L1 32 KB Cache 12 1024 KB lt Select Screen Intel R SpeedStep tm tech Automatic MS ORE pun tol Select Item t Change Option F1 General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Beseipion Intel R SpeedStep tm tech Maximum Speed Select the operation mode of the CPU To Minimum Speed ensure full performance of the CPU use the Automatic Maximum Speed setting Disabled Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 59 of 81 8 3 2 Advanced settings IDE Configuration Advanced IDE Configuration Select IDE Mode P ATA Only IDE Configuration S ATA Running Enhanced Yes PHATA oniy P ATA Channel Selection Both 5 Ports Definition P0 3 2 P1 4th _ Configure S ATA as RAID No STATA OnLy 2 S ATA Primary IDE Master Hard Disk
42. Configuration 62 8 3 5 Advanced settings SuperlO Configuration a 63 8 36 Advanced settings Hardware Health Configuration 64 8 3 7 Advanced settings Voltage emen nennen 65 8 3 8 Advanced settings ACPI Configuration 65 8 3 9 X Advanced settings General ACPI Configuration 66 8 3 10 Advanced settings Advanced ACPI Configuration a 67 8 3 11 Advanced settings Remote Access Configuration 40 68 8 3 12 Advanced settings USB 69 8 3 13 Advanced settings USB Mass Storage Device Configuration 70 MEE elc uq uhu uuu Quq qasasqa auqa X 71 8 5 c ee N 72 8 5 1 Boot Boot Settings 72 8 6 Securty 74 87 Chipset MS 76 8 7 1 Advanced Chipset Settings Intel Montara GML NorthBridge Configuration 76 8 7 2 Advanced Chipset Settings SouthBridge 77 IMMUNE 78 8 9 GEI un L EE 79 8 10 AMI BIOS Beep Codes 80 9 OS SETUP 8
43. Detailed Device Power consumption section Current 1 Peak Current 5VDC 40 0A 3ms 3 3VDC 14 0A 3ms 12VDC 6 0A 4ms 5VSB 3 5A 14ms 12 VDC 1 0A 4ms 5VDC N A 3 6 5 Recommended Power Supply specifications Note Recommended power supply specifications includes attachment of COM Fan 4xAudio Speakers 4 8ohm USB AGP PCI devices Current 1 Peak Current 5VDC 50 0A 3ms 3 3VDC 20 0A 3ms 12VDC 8 0A 4ms 5VSB 5 0A 14ms 12 VDC 1 0A 4ms 5VDC N A Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 19 of 81 3 7 886LCD M Clock Distribution HOST QLOCKPAIRS CPU CU PAKE 10M FU amp QK D 100M Ref Peries QK MH BAK amp AK MH PAK 10M Noth Biicoe DREROLK MH MH ICHS Me MHS ak icra CK 66M POX SATACLOCKPAR Ref QIC 8 CL KTOOP SATA South Biche R amp IOHS _ PA LPG FAH icra ME Rg POX BOSRASH FARO PAH VR Super YO 14348VrE aksa 14318 Ref LPQO Clock buffer
44. EQ and GNT are tri state signals due to power sequencing requirements when 3 3V or 5 0V only add in boards are used with add in boards that use a universal I O buffer ERROR REPORTING PINS The error reporting pins are required by all devices and maybe asserted when enabled Parity Error is only for the reporting of data parity errors during all PCI transactions except a Special Cycle The PERR pin is sustained tri state and must be driven active by the agent receiving data two clocks following the data when a data parity error is detected The minimum duration of PERR is one clock for each data phase that a data parity error is detected If sequential data phases each have a data parity error the PERR signal will be asserted for more than a single clock PERR must be driven high for one clock before being tri stated as with all sustained tri state signals There are no special conditions when a data parity error may be lost or when reporting of an error may be delayed An agent cannot report a until it has claimed the access by asserting DEVSEL for a target and completed data phase or is the master of the current transaction System Error is for reporting address parity errors data parity errors on the Special Cycle command or any other system error where the result will be catastrophic If an agent does not want a non maskable interrupt NMI to be generated a different reporting mechanism is required SERR is pure open drain a
45. Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 1 of 81 User Manual for the Mother Boards 886LCD M ATX Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 2 of 81 Document revision history June 22 2010 Minor BIOS information corrections Oct 13 2009 Correction to LAN connector pinning Battery alternative added Added mounting the board to chassis Added to BIOS PWM IRQ5 IRQ7 Any Harddrive F11BBS popup control and more info to Security Arrow for COM3 position on mITX corrected CPU list updated Added picture of 886LCD M mITX BGA May 30 2008 Note on Processor Speed displayed in BIOS Battery type updated April 2274 2008 Battery load information added RJ45 4 5 name correction Note on CDROM audio connector and ETHER2 3 connector Corrected text RTL8100C to RTL8110SB 32 in chapter 6 1 Included warning in Installation procedure RJ45 pin 4 5 name correction Note on CDROM audio connector Removed text RTL8100C from chapter 4 9 2 ULV 600MHz changed to 800MHz Suspend LED HDD LED info added Feature port pin 7 text corrected Chap 2 1 Pressing the F2 changed to Pressing the DEL ECC not supported USB Legacy correction PS ON pull up added Added more info on BGA CPU P OK pullup removed CF socket description corrected Added PCI Riser card info to section 886LCD M PCI IRQ
46. If non SPD memory is used the BIOS will attempt to configure the memory settings but performance and reliability may be impacted 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 14 of 81 3 4 System overview The block diagram below shows the architecture and main components of the 886LCD boards The two key components on the board are the Intel 855GME and Intel 6300ESB ICH S Embedded Chipsets Components shown shaded are optional depending on board type 886L CD M Flex ATX or mITX and variants of the board Irtel X LG 24 hit 1164 1 pins Irtel 05888 COREE AGP i Fd Fd Fd Fd FO 2222 bit ZMH 1010F 10007 FO X 32 bit 22 22 22 22 22 22 GE et 2 pia bt 2 bt IHS MHz MHz 4 5 Gl ESI C3 2x 90 AM IW yikend veu FLAGH Itera USB COM LPT a m 8 a Header Header Header Sb ull ANH Center orFront LIR Rear L R LPF Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 15 of 81 3 5 886LCD M Power Distribution amp Power State Map ATX P
47. NY CLAIM AGAINST THE CUSTOMER BY ANY OTHER PARTY
48. PPY ETHER1 USB0 USB2 Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 23 of 81 4 1 2 886LCD M ATX SATAO IDE S2 IDE S IDE P FRONTPNL CIr CMOS FAN_SYS AGP DVO c INT ATXPWR J INT gt CDROM RX SWAY AL DDR1 DDR0 ETHER1 USB0 USB2 Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 24 of 81 4 1 3 886LCD M mITX CF backside of 886L CD M mITX FRONTPNL LVDS FEATURE DE 52 SATAO usu sa ata 4 z IDE_P SATA1 e ATXPWR g COM3 SIO Port1 k oW 4 COM4 X SIO Port2 b COM2 Port2 FAN PROC S ETHER1 USBO LINE IN USB2 LINE OUT MIC 886LCD M mITX BGA Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 25 of 81 4 2 Power Connector ATXPWR 886LCD M Flex 8860 CD M ATX 886LCD M mITX is designed to be supplied from a standard power supply Power Connector 886L CD M Flex 886 CD M ATX 886LCD M mITX Pull PIN Pull Note U D loh lol Type Signal Signal Type loh lol U D Note 12 ee 5657 1 191 _ 5 18 v o c CND GNO eee s 6 161 ER GND ES 15 CND PWR 14 PSON EE co 5 5 cup mam f
49. Rg QLKGENABM Glock Generator CODEC I Ref Codec continues Gkontron 886LCD M Family KTD 00474 U Public User Manual DAC DDCACLK Date 2010 06 22 Page 20 of 81 M_CLK_DDRX amp M_CLK_DDRX CRT VGA Ref CRT COMA _ _ North Bridge Ref GMCH_ LVDS_CLKX amp LVDS_CLKX LVDS_DDCPCLK DDR Memory Ref DDR0 DDR1 LVDS Interface Ref LVDS Real Time 25 MHz Clock 32 768 Ref Y1EX Ref Qill South Bridge Ref ICHS_ ETHERNET controllers Ref ETH KBCLK MSE KBD Super BETIS M Ref LPCIO CLK SIO48 KBD MSE Clock buffer CLK 485 Ref CLKGEN48M CLK_ICH48 97 97 BITCLK CODEC Ref Codec Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 21 of 81 4 Connector Definitions The following sections provide pin definitions and detailed description of all on board connectors The connector definitions follow the following notation Description Shows the pin numbers in the connector The graphical layout of the connector definition tables is made similar to the physical connectors The mnemonic name of the signal at the current pin The notation XX states that the signal is act
50. S V1 5 ALWAYS 3 3 DUAL V2 5 V1 25S V3 3S V1 5S V3 3S V5S VCC12 V3 3 ALWAYS V3 3S V5S VCC12 VCC 12 V3 3 ALWAYS 3 3 DUAL V3 3S 16 of 81 Processor Ref BANIAS _ North Bridge Ref GMCH_ South Bridge Ref ICHS_ DDR Memory Ref DDRX AGP Ref AGP PCI slots Ref PCIX Ethernet Controllers Ref ETH1 Ethernet Controllers Ref 2 Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 17 of 81 3 6 Power Consumption This section lists a summary of the power consumption of the 886LCD M Boards For additional details please refer to the Power Supply Characteristics document available from Kontron Technology The idle full power consumption of the 886LCD M is measured under 1 DOS prompt idle full CPU load 2 WindowsXP idle full CPU load 3 6 1 Test system configuration The following items were used in the test setup 1 886LCD M Flex board 710180 4500 with 256MB SDRAM 333MHz EZ128DDR16M168 333INF 2 Pentium M 1600 400Mhz 1MB Cache CPU 3 Standard Pentium 4 active CPU cooler 4 PS 2 keyboard amp mouse 5 CRT 6 Primary Master HD Fujitsu MPG3102AT 10 24GB 7 ATX PSU Antec 550W 8 Tektronix TDS 620B P6243 probes 9 Fluke Current Probe 80i 100S AC DC 10 Ethernet Ports 1 2 3 are enabled 10 100 1000MB LAN 3
51. SU Battery or V3 3 ALWAY Ref ATXPWR s V RTC Ref V5_ALWAYS V5S V3 3S VCC12 VCC 12 BT1II VCC 12 VCC12 LDO Regulator V1 8S Ref U3SS DC DC regulator 4VCC CORE COREREG V1 2S DC DC LDO regulator regulator VCCP Ref Ref V1 5S VCCPAMP VCCPREG DC DC V2 5 regulator Ref V1 25S ACPICTRL MOSFET Ref 150 750 MOSFET DUAL Ref 150 750 LDO Regulator V3 3ALWAYS Ref U1SS LDO Regulator Ref 0255 V1 5ALWAYS continues Gkontron 886LCD M Family KTD 00474 U Public User Manual 50 S3 S5 4V5S X N A N A V3 3S X N A N A VCC12 X N A N A VCC 12 X N A N A V1 8S X N A N A CORE X N A N A VCCP x N A N A V1 2S X N A N A V1 5S X N A N A V2 5 X X N A V1 25S x N A N A V5 DUAL X X N A V3 3 DUAL X X N A 5 ALWAYS x X N A V3 3ALWAYS X X N A V1 5ALWAYS x X N A X X X USB V5 DUAL connectors Ref USB_ETH FRONTPNL V3 3S AC97 Codec V5 DUAL KBD MSE Ref Ref Codec KBD MSE VCC12 2 1 V5S PET pent Ref Ref CRT COMA L U1A1 U1A2 PT V3 3S BIOS Flash V5S COM drivers VCC12 Ref VCC 12 Ref FWH COMXDRV Date 2010 06 22 CORE VCCP V1 8S VCCP V1 2S V1 5S V2 5 V3 3S V5S V3 3S V1 5S VCCP V_RTC V5 ALWAYS V3 3 ALWAY
52. Slot 1 The BIOS option of PCI riser Support is for support of another type of dual PCI Riser module having one PCI slot IDSEL IRQs signals routed straight through and the other PCI slot routing IDSEL AD19 INT PIRQZH INT PIRQZE INT PIRQZF INT PIRQZG Such Riser card to be is not available from Kontron at present time 51 of 81 Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 52 of 81 5 Onboard Connectors Connector Onboard Connectors Mating Connectors pris FAN SYS 22 23 2031 1375820 3 FAN PROC INT KBDMSE Molex 22 23 2061 Molex 22 01 2065 CDROM Foxconn HF1104E Molex 50 57 9404 Molex 70543 0038 SATAO Molex 67491 0020 Molex 67489 8005 SATA1 Kontron KT 821035 cable kit ATXPWR FoxConn HM2510E Molex 39 01 2205 Foxconn HL20051 Molex 90635 1103 Kontron KT 821016 cable kit Kontron KT 821017 cable kit AUDIO_HEAD 87831 2620 Molex 51110 2651 Kontron KT 821043 cable kit Kontron KT 821044 cable kit FRONTPNL Foxconn HL20121 Molex 90635 1243 Kontron KT 821042 cable kit FEATURE Molex 87831 3020 Molex 51110 3051 Kontron KT 821041 cable kit IDE_P Foxconn HL20201 UD2 Kontron KT 821018 cable kit IDE_S Kontron KT 821013 cable kit Foxconn HS5522V AMP 2 111623 5 Kontron KT 821010 cable kit Kontron KT 821012 cable kit Don Connex C44 40BSB1 G Don Connex A32 40 C G B 1 Kontron KT 821515 cable kit Kontron KT 821155 cable kit
53. a Primary IDE Slave Not Detected poate E SRTA Secondary IDE Master ot Detected Secondary IDE Slave Not Detected Third IDE Master Not Detected Third IDE Slave ot Detected Fourth IDE Master Not Detected Fourth IDE Slave Not Detected Select Soreen Select Item ATA PI 80Pin Cable Detection Host amp Device JN change operon 1 Cable Detection force Disabled 875 Help Hard Disk Write Protect Disabled ESC Exit IDE Detect Time Out Sec V02 58 C Copyright 1985 2005 American Megatrends Inc P ATA2 Cable Detection force Disabled F10 Save and Exit Feature Options Description IDE Configuration Disable Setup the configuration of the hard drive P ATA Only interfaces S ATA Only P ATA amp S ATA When P ATA amp S ATA mode is selected Feature Options Description Combined Mode Option P ATA 1st Channel Setup the configuration of the hard drive S ATA 1st Channel interfaces S ATA Ports Definition P0 Master P1 Slave Select physical ports PO P1 to be Master Slave PO Slave P1 Master or Slave Master When S ATA only mode is selected Feature Options Description S ATA Ports Definition PO 1st P1 2nd Select physical ports PO P1 to be 1st 2nd or PO 2nd P 1 1st 2nd 1st When P ATA only mode is selected Feature Options Description S ATA Running Enhanced Yes Setup the S ATA
54. ased AGP target The assertion of G_IRDY indicates the current FRAME based AGP bus initiator s ability to complete the current data phase of the transaction During Fast Write Operation In Fast Write mode G_IRDY indicates that the AGP compliant master is ready to provide all write data for the current transaction Once G_IRDY is asserted for a write operation the master is not allowed to insert wait states The master is never allowed to insert a wait state during the initial data transfer 32 bytes of a write transaction However it may insert wait states after each 32 byte block is transferred TRDY G_TRDY Target Ready During PIPE and SBA Operation Not used while enqueueing requests via AGP SBA and PIPE but used during the data phase of PIPE and SBA transactions During FRAME Operation G_TRDY is an input when the GMCH acts as AGP initiator and is an output when the GMCH acts as a FRAME based AGP target The assertion of indicates the target s ability to complete the current data phase of the transaction During Fast Write Operation In Fast Write mode G_TRDY indicates the AGP compliant target is ready to receive write data for the entire transaction when the transfer size is less than or equal to 32 bytes or is ready to transfer the initial or subsequent block 32 bytes of data when the transfer size is greater than 32 bytes The target is allowed to insert wait states after each block 32 bytes is
55. aster IDE ultra DMA 33 66 100 MHz and standard operation modes The signals used for the harddisk interface are the following DA 2 0 Address lines used to address the registers in the IDE hard disk HDCS 1 08 Hard Disk Chip Select HDCSO selects the primary hard disk High part of data bus Low part of data bus IOR Read IOW Write IORDY This signal may be driven by the hard disk to extend the current I O cycle RESET Reset signal to the hard disk The signal is similar to RSTDRV in the PC AT bus HDIRQ Interrupt line from hard disk Routed by the SiS630 chipset to PC AT bus interrupt CBLID This input signal CaBLe ID is used to detect the type of attached cable 80 wire cable when low input and 40 wire cable when 5V via 10Kohm pull up resistor DDREQ Disk DMA Request might be driven by the IDE hard disk to request bus master access to the PCI bus The signal is used in conjunction with the PCI bus master IDE function and is not associated with any PC AT bus compatible DMA channel DDACK Disk DMA Acknowledge Active low signal grants IDE bus master access to the PCI bus HDACT Signal from hard disk indicating hard disk activity The signal level depends on the hard disk type normally active low The signals from primary and secondary controller are routed together through diodes and passed to the connector FEATURE All of the above signals are compliant to 4 15 A for pri
56. ature in ATX Power Supplies Running the board without 3 3V connected will damage the board after a few minutes 2 Insert the DIMM DDR 184pin DRAM module s Be careful to push it in the slot s before locking the tabs For a list of approved DDR DRAM modules contact your Distributor or FAE list under preparation DDR333 DIMM 184pin DRAM modules are supported 3 Install the processor The CPU is keyed and will only mount in the CPU socket in one way Use the handle to open close the CPU socket Intel Pentium M and Celeron M processors Banias processors are supported 4 Use heat paste or adhesive pads between CPU and cooler and connect the Fan electrically to the FAN PROC connector 5 Insert all external cables for hard disk keyboard etc except for flat panel Connect monitor in order to change CMOS settings to flat panel support etc To achieve UDMA 66 100 performance on the IDE interface 80poled UDMA cables must be used If using the IDE S2 connector care should be taken in correct orientation The cables that KONTRON provide do not have a key There is a risk of damaging the HDD or PCB if the cable is not orientated correctly Note If the Audio Amplifiers shall be used to generate up to 3W on one or more of the Audio output channels then make sure that sufficent airflow is around the Audio Amplifier The Amplifier has integrated Thermal Protection and will not be damaged even though the airflow is insufficient for normal opera
57. ble USB devices get first boot priority when inserted Force Boot Device Disabled Primary IDE Master Primary IDE Slave Secondary IDE Master Secondary IDE Slave Third IDE Master Forth IDE Master Any Harddrive above Network Does overwrite current boot setting Device must be in the boot priority menu though If the device fails to boot the system will not try other devices F11 BBS popup boot menu Disabled Enabled Full Access Disabled hide F11 BBS post setup message Enabled F11 post unless Force Boot Device Full Access F11 post Hide Removable Devices No Yes Hide Removable Devices in BBS POPUP menu F11 Execute Embedded Firmware Disabled Enabled Execute OEM software if embedded into BIOS Default MemTest 86 Gkontron 886LCD M Family KTD 00474 U Public User Manual 8 6 Security Menu Date 2010 06 22 74 of 81 Main Advanced PCIPnP Boot Security Chipset Power Exit Security Settings Supervisor Password Installed User Password Installed Change Supervisor Password Change User Password Clear User Password Boot Sector Virus Protection Disabled Hard Disk Security Primary Master HDD User Password Primary Slave HDD User Password Secondary Slave HDD User Password Install or Change the password lt Select Screen Select Item Enter Go to Sub Screen F1 General Help F10 Save and Exit ESC Exit V02
58. can Megatrends Inc Feature Options Description Primary Video Device Internal Select which graphics controller to use as the External PCI primary boot device External AGP Auto Graphics Mode Select Disabled 1MB 4MB Select the amount of system memory used by the 8MB 16MB 32MB internal graphics device IGD Device 2 Function 1 Disabled Setup the multimonitor function Enabled Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 77 of 81 8 7 2 Advanced Chipset Settings SouthBridge Configuration Chipset Enable Disable the ICHA IOAPIC function IOAPIC Enabled lt Select Screen Extended IOAPIC Enabled Select Item OnBoard AC 97 Audio Enabled Enter Go to Sub Screen OnBoard Amplifier Enabled F1 General Help F10 Save and Exit FSC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Options Disabled Enabled Description Setup the ICHS IOAPIC function Extended IOAPIC Disabled Enabled Setup the extended mode of ICHS IOAPIC OnBoard AC 97 Audio Disabled Enabled Setup the onboard audio OnBoard Amplifier Feature Boot Type Disabled Enabled Enabled Early Options VBIOS Default CRT LFP CRT LFP EFP TV CRT EFP CRT TV EFP EFP2 EFP TV If Enabled the AMP is turned on after boot If Early bios beeps will be out as
59. cted Signal from printer indicating that the printer is out of paper The printer port additionally supports operation in the EPP and ECP mode as defined in 3 Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 39 of 81 4 8 Serial Ports Four RS232C serial ports are available on the 886LCD M Flex 886LCD M ATX and 886LCD M mlTX The typical interpretation of the signals in the COM ports is as follows Signal Description Transmitte Data sends serial data to the communication link The signal is set to a marking state on hardware reset when the transmitter is empty or when loop mode operation is initiated Receive Data receives serial data from the communication link Data Terminal Ready indicates to the modem or data set that the on board UART is ready to establish a communication link Data Set Ready indicates that the modem or data set is ready to establish a communication link RTS Request To Send indicates to the modem or data set that the on board UART is ready to exchange data Clear To Send indicates that the modem or data set is ready to exchange data Data Carrier Detect indicates that the modem or data set has detected the data carrier R Ring Indicator indicates that the modem has received a telephone ringing signal The connector pinout for each operation mode is defined in the following sections 4 8 1 Comi Port1 DB9 Connector
60. d the AD bus simultaneously During PIPE Operation These signals are not used during PIPE operation During FRAME Operation These signals not used during AGP FRAME operation NOTE When sideband addressing is disabled these signals are isolated no external internal pull ups are required Flow control RBF Read Buffer Full Read buffer full indicates if the master is ready to accept previously requested low priority read data When RBFF is asserted the GMCH is not allowed to initiate the return low priority read data That is the GMCH can finish returning the data for the request currently being serviced RBF is only sampled at the beginning of a cycle If the AGP master is always ready to accept return read data then it is not required to implement this signal During FRAME Operation This signal is not used during AGP FRAME operation Write Buffer Full indicates if the master is ready to accept Fast Write data from the GMCH When WBF is asserted the GMCH is not allowed to drive Fast Write data to the AGP master WBF is only sampled at the beginning of a cycle If the AGP master is always ready to accept fast write data then it is not required to implement this signal During FRAME Operation This signal is not used during AGP FRAME operation AGP Status ST 2 0 Status Provides information from the arbiter to an AGP Master on what it may do ST 2 0 only have meaning to the master when its GNT
61. eaker Out Right channel amplified 3W SB3V3 Standby 3 3V voltage AGND Analogue Ground for Audio 5V 4 16 Intruder Connector INT This connector is available on the 886LCD M Flex only however please notice that the INTRUDER function is also available on the Feature connector Pull Type loh lol U D GND gt RN L INTRUDER detect May be used to detect if the system case has been opened This signal s status is readable so it may be used like GPI when the Intruder switch is not needed Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 47 of 81 4 17 Feature Connector FEATURE Pull Pull U D loh lol Type Type loh lol U D 2 100 INTRUDER _ f EXT ISAIRQ EXT 1 15 6 sov L 7 8 5 20 CPO masis i al 02 __ GPIOS 5 6 GO _____ ___ ___ 7 GD FANSOUT FANN v L TEMPSI VREF Rx ___ GND ES Note 1 Pull up to 3V3 supply Note 2 Pull up to RTC Voltage Sina Description INTRUDER INTRUDER may be used to detect if the system case has been opened This signal s status is readable so it ma
62. ect RST has on a device beyond the PCI sequencer is beyond the scope of this specification except for reset states of required PCI configuration registers Anytime RST is asserted all PCI output signals must be driven to their benign state In general this means they must be asynchronously tri stated SERR open drain is floated REQ and GNT must both be tri stated they cannot be driven low or high during reset To prevent AD C BE and PAR signals from floating during reset the central resource may drive these lines during reset bus parking but only to a logic low level they may not be driven high RST may be asynchronous to CLK when asserted or deasserted Although asynchronous deassertion is guaranteed to be a clean bounce free edge Except for configuration accesses only devices that are required to boot the system will respond after reset ADDRESS AND DATA AD 31 00 Address and Data are multiplexed on the same PCI pins A bus transaction consists of an address phase followed by one or more data phases PCI supports both read and write bursts The address phase is the clock cycle in which FRAME is asserted During the address phase AD 31 00 contain a physical address 32 bits For I O this is a byte address for configuration and memory it is a DWORD address During data phases AD 07 00 contain the least significant byte Isb and AD 31 24 contain the most significant byte msb Write data is stable and valid when IRDY
63. ellers ADVARSEL Eksplosjonsfare ved feilaktig skifte av batteri Benytt samme batteritype eller en tilsvarende type anbefalt av apparatfabrikanten Brukte batterier kasseres i henhold til fabrikantens instruksjoner VAROITUS Paristo voi r j ht jos se on virheellisesti asennettu Vaihda paristo ainoastaan laltevalmistajan suosittelemaan tyyppiln H vit kaytetty paristo valmistajan ohjeiden mukaisesti Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 10 of 81 3 System specification 31 Component main data The table below summarises the features of the 886LCD M Flex 886LCD M ATX and 886LCD M mITX embedded motherboards Form factor 886LCD M Flex Flex ATX 190 50mm by 228 60mm 886 190 50mm by 304 00mm 886LCD M mITX mini ITX 170 18mm by 170 18 Processor e Support for Intel Pentium M and Celeron M Processors in mPGA478 socket with 400 2 system bus Banias 0 13um and Dothan 0 09um family processors Flex and ATX 2x184pin DDR SDRAM Dual Inline Memory Module DIMM sockets ImITX 1x184pin DDR SDRAM Dual Inline Memory Module DIMM socket Support for DDR 266 333 PC2100 PC2700 Support for 128MB up to 2GB of system memory Flex and ATX Support for 128MB up to 1GB of system memory mITX ECC not supported ntel 855GME Chipset consisting of Intel 855GME Chipset Graphics and Memory Controller Hub GMCH Intel amp 6300ESB I O Control
64. erial and workmanship during the warranty period If a product proves to be defective in material or workmanship during the warranty period KONTRON Technology will at its sole option repair or replace the product with a similar product Replacement Product or parts may include remanufactured or refurbished parts or components The warranty does not cover 1 Damage deterioration or malfunction resulting from Accident misuse neglect fire water lightning or other acts of nature unauthorized product modification or failure to follow instructions supplied with the product Repair or attempted repair by anyone not authorized by KONTRON Technology Causes external to the product such as electric power fluctuations or failure Normal wear and tear Any other causes which does not relate to a product defect 2 Removal installation and set up service charges gt Exclusion of damages KONTRON TECHNOLOGY LIABILITY IS LIMITED TO THE COST OF REPAIR OR REPLACEMENT OF THE PRODUCT KONTRON TECHNOLOGY SHALL NOT BE LIABLE FOR 1 DAMAGE TO OTHER PROPERTY CAUSED BY ANY DEFECTS IN THE PRODUCT DAMAGES BASED UPON INCONVENIENCE LOSS OF USE OF THE PRODUCT LOSS OF TIME LOSS OF PROFITS LOSS OF BUSINESS OPPORTUNITY LOSS OF GOODWILL INTERFERENCE WITH BUSINESS RELATIONSHIPS OR OTHER COMMERCIAL LOSS EVEN IF ADVISED OF THEIR POSSIBILITY OF SUCH DAMAGES 2 ANY OTHER DAMAGES WHETHER INCIDENTAL CONSEQUENTIAL OR OTHERWISE 3 A
65. etable fuse 4 3 1 Stacked MINI DIN keyboard and mouse Connector MSE amp KBD Pull Pull BEN DENT mm pam usc Jammu E ____ _ l O C I ss ____ PWR SV SBSV GNO ___ _ IN KBDDAT 4K7 Signal Description Keyboard amp and mouse Connector MSE amp KBD see below 4 3 2 keyboard and mouse pin row Connector KBDMSE Pull pe loh lol U D KBDCLK reb 2 KBDDAT St ma MSDAT 5V SB5V Signal Description Keyboard amp and mouse Connector KBDMSE Signal Description sn sxs MSCLK Bi directional clock signal used to strobe data commands from to the PS 2 mouse MSDAT Bi directional serial data line used to transfer data from or commands to the PS 2 mouse KDBCLK Bi directional clock signal used to strobe data commands from to the PC AT keyboard KBDDAT Bi directional serial data line used to transfer data from or commands to the PC AT keyboard Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 27 of 81 4 4 Display Connectors 886LCD board family provides onboard two basic types of interfaces to a display Analog CRT interface and a digital interface typically used with flat panels The digital interface to flat panels can be achieved through the onboard LVDS dual channel interface and or the DVO port available on the AGP c
66. ile not found in root directory of diskette in A 3 Base Memory error 4 Flash Programming successful 5 Floppy read error 6 Keyboard controller BAT command failed 7 No Flash EPROM detected 8 Floppy controller failure 9 Boot Block BIOS checksum error 10 Flash Erase error 11 Flash Program error 12 AMIBOOT ROM file size error 13 BIOS ROM image mismatch file layout does not match image present in flash device POST BIOS Beep Codes Number of Beeps Description Memory refresh timer error Parity error in base memory first 64KB block Base memory read write test error Motherboard timer not operational Processor error 8042 Gate A20 test error cannot switch to protected mode General exception error processor exception interrupt error Display memory error system video adapter oO O N AMIBIOS ROM checksum error CMOS shutdown register read write error Cache memory test failed Troubleshooting POST BIOS Beep Codes Number of Beeps 1 2 or 3 Troubleshooting Action Reseat the memory or replace with known good modules 4 7 9 11 Fatal error indicating a serious problem with the system Consult your system manufacturer Before declaring the motherboard beyond all hope eliminate the possibility of interference by a malfunctioning add in card Remove all expansion cards except the video adapter If beep codes are generated when all
67. ing each data phase of a FRAME based AGP memory read cycle Even parity is generated across AD 31 0 and G_CBE 3 0 During SBA and PIPE Operation This signal is not used during SBA and PIPE operation Hub Interface signals HL 10 0 Packet Data Data signals used for HI read and write operations HLSTB Packet Strobe One of two differential strobe signals used to transmit or receive packet data over HI HLSTB Packet Strobe Complement One of two differential strobe signals used to transmit or receive packet data over HI Clocks CLKIN Input Clock 66 MHz 3 3 V input clock from external buffer DVO Hub interface DVOBCLK DVOBCLK DVOCCLK DVOCCLK Differential DVO Clock Output These pins provide a differential pair reference clock that can run up to 165 MHz DVOBCLK corresponds to the primary clock out DVOBCLK corresponds to the primary complementary clock out DVOBCLK and DVOBCLK should be left as NC Not Connected if the DVO B port is not implemented Differential DVO Clock Output These pins provide a differential pair reference clock that can run up to 165 MHz DVOCCLK corresponds to the primary clock out corresponds to the primary complementary clock out DVOCCLK and DVOCCLK should be left as NC Not Connected if the DVO C port is not implemented DVOBCCLKINT DVOBC Pixel Clock Input Interrupt This signal may be selected as the reference input to ei
68. ion of Hazardeous Substances RoHS All boards in the 886LCD M family is planned for RoHS compliance Capacitor utilization No Tantal capacitors on board Only Japanese brand Aluminium capacitors rated for 100degrees Celsius used on board Battery Exchangeable 3 0V Lithium battery for onboard Real Time Clock and CMOS RAM Manufacturer Panasonic PN CR2032NL LE CR 2032L BE or CR 2032L BN Approximately 5 years retention varies depending on temperature actual application on off rate and variation within chipset and other components Approximately current draw is 5 34 A no PSU connected CAUTION Danger of explosion if the battery is incorrectly replaced Replace only with the same or equivalent type recommended by the manufacturer Dispose of used batteries according to the manufacturer s instructions Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 13 of 81 3 2 Processor support table The 886LCD M mITX Flex and ATX are designed to support the following PGA 478 pins processors Intel amp Pentium amp M Processor Dothan 90 nm process FSB 400MHz with 2 MB L2 cache Intel amp Pentium amp M Processor Banias 130 nm process FSB 400MHz with 1 MB L2 cache Intel amp Celeron amp M Processor Dothan 90 nm process FSB 400MHz with 1 MB L2 cache Intel amp Celeron amp M Processor Banias 130 nm process FSB 400MHz with 512 L2 cache Processor Brand Processor sS
69. is asserted and read data is stable and valid when TRDY is asserted Data is transferred during those clocks where both IRDY and TRDY are asserted C BE 3 0 Bus Command and Byte Enables are multiplexed on the same PCI pins During the address phase of a transaction C BE 3 0 define the bus command During the data phase C BE 3 0 are used as Byte Enables The Byte Enables are valid for the entire data phase and determine which byte lanes carry meaningful data C BE 0 applies to byte 0 Isb and C BE 3 applies to byte 3 msb PAR Parity is even parity across AD 31 00 and C BE 3 0 Parity generation is required by all PCI agents PAR is stable and valid one clock after the address phase For data phases PAR is stable and valid one clock after either IRDY is asserted on a write transaction or TRDY is asserted a read transaction Once PAR is valid it remains valid until one clock after the completion of the current data phase PAR has the same timing as AD 31 00 but it is delayed by one clock The master drives PAR for address and write data phases the target drives PAR for read data phases INTERFACE CONTROL PINS FRAMEZ Cycle Frame is driven by the current master to indicate the beginning and duration of an access FRAME is asserted to indicate a bus transaction is beginning While FRAME is asserted data transfers continue When is deasserted the transaction is in the final data phase or has comple
70. isk Write Protect Disable Enabled Enable write protection on HDDs only works when it is accessed through the BIOS IDE Detect Time Out Sec 8 3 8 Advanced settings LAN Configuration 0 5 10 15 20 25 30 35 Select the time out value when the BIOS is detecting ATA ATAPI Devices Advanced LAN Configuration Control of Ethernet Devices and RPL PXE Configuration With RPL PXE boot boot MAC Address 00 0 4000001 2 Configuration Enabled MAC Address 00E0F4000002 ETH3 Configuration Enabled MAC Address 00E0F4000003 lt Select Screen Select Item t change option F1 General Help F10 Save and Exit ESG Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature ETH1 Configuration Options Disabled Enabled With RPL PXE boot Description Select if you want to enable the LAN adapter or if you want to activate the RPL PXE boot rom ETH2 Configuration Disabled Enabled With RPL PXE boot Select if you want to enable the LAN adapter or if you want to activate the RPL PXE boot rom ETH3 Configuration Disabled Enabled With RPL PXE boot Select if you want to enable the LAN adapter or if you want to activate the RPL PXE boot rom Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 62 of 81 8 3 4 Advanced settings Flopp
71. ive low Al Analog Input Analog Output Input TTL compatible if nothing else stated Input Output TTL compatible if nothing else stated Bi directional tristate IO pin Schmitt trigger input TTL compatible Input open collector Output TTL compatible Pin not connected Output TTL compatible Output open collector or open drain TTL compatible Output with tri state capability TTL compatible LVDS Low Voltage Differential Signal PWR Power supply or ground reference pins loh Typical current in mA flowing out of an output pin through a grounded load while the output voltage is gt 2 4 V DC if nothing else stated lol Typical current in mA flowing into an output pin from a VCC connected load while the output voltage is 0 4 V DC if nothing else stated Pull U D On board pull up or pull down resistors on input pins or open collector output pins Note Special remarks concerning the signal The abbreviation TBD is used for specifications which are not available yet or which are not sufficiently specified by the component vendors Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 22 of 81 41 Connector layout 4 1 4 886LCD M Flex SATAO IDE_S2 IDE S DDR1 DDRO SATA1 FRONTPNL FAN_SY ives ATXPWR LPC CIr CMOS COM3 SIO Port1 SIO Port2 FAN PROC KBDMSE COM1 ETHER2 Port1 MSE PRINTER FLO
72. ler Hub ICH 4 Mbit Firmware Hub FWH Intel Extreme Graphics 2 controller Shared Video Memory up to 32MB 64MB when using min 128MB 256MB SDRAM Analog Display Support 350 MHz integrated 24 bit RAMDAC with support for analogue monitors up to 2048x1536 at 75 Hz Digital Video Out Port DVOB amp DVOC support dot clock up to 165 MHz DVI DVO ADD and CRT DVO ADD supported LVDS DVO ADD cards currently not supported Single or dual channel LVDS panel support 18 24bit OpenLDI SPWG up to UXGA panel resolution Dual independent pipe support Mirror and Dual independent display support Tri view support through LVDS interface DVO B C port and CRT CRT LVDS supported CRT DVO Add card supported LVDS DVO Add card supported e 2 0 1 5V connector DVO B C muxed w AGP supporting 1x 2x and 4x AGP cards or an AGP Digital Display ADD card Audio AC97 version 2 3 subsystem using the Realtek ALC655 codec e Audio Amplifier o FLEX and ATX 4x3W o ImlTX 2x3W Line out CDROM in SPDIF Interface Surround e Microphone Onboard speaker Control Winbond W83627THF LPC Bus Controller Peripheral e Four USB 2 0 ports interfaces e Four Serial ports RS232 Note Intel 6300258 Serial port FIFO COM C D is not standard compliant May cause issues with specific SW One Parallel port SPP EPP ECP Floppy optional floppy with special cabling Two Serial ATA 150 IDE interfaces ATA Mode 6 not supported due to Intel Chipset restrictions
73. mary and for secondary controller The pinout of the connectors are defined in the following sections Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 34 of 81 4 5 1 IDE Hard Disk Connector IDE P This connector can be used for connection of two primary IDE drives Pull Pull Bm ower ee su nne wo ee 112 cno o vs TID io De 5 6 4 10 Tn o _ 07 bo Lo p jma Dw9 DA2 D DA DA14 Do DA eee GND jaa 7 GNO ov J GND IORA GND IORDYA GND 0o PWR oo E DA2 TBD O 5 HDCSA1 0 TBD GND Hina 4 5 2 Hard Disk Connector IDE S This connector can be used for connection of up till two secondary IDE drive s but only if no drive s is installed via IDE S2 socket The IDE S is not available on the 886L CD M mITX Pull Pull pee ese De ee PZ ee TD O 112 o os DENM NNNM
74. n S3 Resume Active State Power Management Remote Access User Password protection only no Supervisor Password used PSW CMOS Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 76 of 81 8 7 Chipset Menu Main Advanced PCIPnP Boot Security Chipset Power Exit Advanced Chipset Settings Intel Montara GML NorthBridge chipset configuration options Warning Setting wrong values in below sections may cause system to malfunction gt Intel Montara GML NorthBridge Configuration gt SouthBridge Configuration Boot Type CRI LFP Backlight Signal Inversion Disabled LCDVCC Voltage 5V lt Select Screen Backlight PWM modulation 10KHz Select Item Backlight PWM ratio 50 Enter Go to Sub Screen F1 General Help EDID Support Enabled F10 Save and Exit LVDS LM201U03 FSC Exit DVO N A V02 58 C Copyright 1985 2005 American Megatrends Inc 8 7 1 Advanced Chipset Settings Intel Montara GML NorthBridge Configuration Chipset Configure advanced settings for NorthBrigde Select which graphics controller to use as Primary Video Device Auto the primary boot Graphics Mode Select Enabled 8MB device IGD Device 2 Function 1 Enabled lt Select Screen Select Item Enter Go to Sub Screen F1 General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 Ameri
75. n as possible CPU Board 1 Type 2 Part number Number starting with 53 3 Serial Number Configuration 1 CPU Type Clock speed 2 DRAM Type and Size 3 BIOS Revision Find the Version Info in the BIOS Setup in the Kontron Section 4 BIOS Settings different than Default Settings Refer to the Software Manual System 1 O S Make and Version 2 Driver Version numbers Graphics Network and Audio 3 Attached Hardware Harddisks CD rom LCD Panels etc Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 4 of 81 Table of contents 1 INTRODUCTION m 7 2 1 55 17 tetro cst bec uote utere dee det 8 24 da nee 8 2 2 Requirement according to EN60950 u u u uu uu u 9 3 SYSTEM SPEGIFICATION sassa 10 31 Gomponentmainidalgu u LL I 10 3 2 Processor Support table I II se 13 33 System Memory 13 3 4 Syst m OVerVIeW u III 14 3 5 886LCD M Power Distribution am
76. n eq 1 pesn eq 4e o3u09 Aq pesn eq eN gsf pesn eq ulejs s punos 10 pesn eq 49 04 U09 xsippaeu Ajepuooes Aq pesn eq Joj oujuoo xsippueu Aq 10sse20Jd oo 20 yoddns S d Aq pesn pseoquo p sn xsip Addoj4 q eq Aq pesn eq q pesn eq lenas pesn eq Jeues pesn eq uod pesn eq V Hoq lenas pesn eq 10 p sn jdnueju preoghey 0 euBis MHOHOO pue 1 uejs s IRQ4 IRQ5 IRQ6 IRQ7 IRQ8 IRQ9 IRQ10 IRQ11 IRQ12 IRQ13 IRQ14 IRQ15 IRQ16 IRQ17 IRQ18 IRQ19 IRQ20 IRQ21 IRQ22 IRQ23 IRQ24 IRQ25 IRQ26 Notes 1 Availabili
77. nd is actively driven for a single PCI clock by the agent reporting the error The assertion of SERR is synchronous to the clock and meets the setup and hold times of all bused signals However the restoring of SERR to the deasserted state is accomplished by a weak pullup Same value as used for s t s which is provided by the system designer and not by the signaling agent or central resource This pull up may take two to three clock periods to fully restore SERR The agent that reports SERR s to the operating system does so anytime SERR is sampled asserted INTERRUPT PINS OPTIONAL Interrupts on PCI are optional and defined as level sensitive asserted low negative true using open drain output drivers The assertion and deassertion of INTx is asynchronous to CLK A device asserts its INTx line when requesting attention from its device driver Once the INTx signal is asserted it remains asserted until the device driver clears the pending request When the request is cleared the device deasserts its INTx signal PCI defines one interrupt line for a single function device and up to four interrupt lines for a multi function device or connector For a single function device only INTA be used while the other three interrupt lines have no meaning Interrupt A is used to request an interrupt INTBZ Interrupt B is used to request an interrupt and only has meaning on a multi function device INTCZ Interrupt C is used to request an i
78. nterrupt and only has meaning on a multi function device INTD Interrupt D is used to request an interrupt and only has meaning on a multi function device Gkontron 886LCD M Family KTD 00474 U Public User Manual 4 17 3 886LCD M PCI IRQ amp INT routing Board type 886LCD M mITX Date 2010 06 22 886LCD M FLEX 886LCD M ATX INTA INTB INTC INTD INT INT INT PIRQZG INT 1 AD16 PIRQ amp E INT PIRQ4F INT INT 2 AD17 INT_PIRQ F INT PIRQZG INT PIRQZH INT 3 AD18 PIRQZG INT INT _PIRQ E INT_PIRQ F 1 AD16 INT_PIRQ E INT INT INT 2 AD17 INT_PIRQ F INT PIRQZG INT INT 3 AD18 INT_PIRQ G INT INT _PIRQ E INT 4 AD19 INT_PIRQ H INT INT INT 5 AD20 INT PIRQZD INT INT INT_PIRQ A 6 AD21 INT_PIRQ C INT INT INT PIRQZD When using the 820982 PCI Riser Flex 2slot w arbiter the BIOS option PCI riser Support shall be disabled Then the lower slot has IDSEL IRQs routed straight through and the top slot has the routing IDSEL AD22 INT PIRQZF INT PIRQ ZG INT INT 820982 PCI Riser shall be plugged into
79. ntroller 16 bits Available 16 bits Available 16 bits Available Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 56 of 81 7 Overview of BIOS features This Manual section details specific BIOS features for the 886LCD M boards The 886LCD M boards are based on the AMI BIOS core version 8 10 with Kontron BIOS extensions 7 1 System Management BIOS SMBIOS DMI SMBIOS is a Desktop Management Interface DMI compliant method for managing computers in a managed network The main component of SMBIOS is the Management Information Format MIF database which contains information about the computing system and its components Using SMBIOS a system administrator can obtain the system types capabilities operational status and installation dates for system components The MIF database defines the data and provides the method for accessing this information The BIOS enables applications such as third party management software to use SMBIOS The BIOS stores and reports the following SMBIOS information BIOS data such as the BIOS revision level Fixed system data such as peripherals serial numbers and asset tags Resource data such as memory size cache size and processor speed Dynamic data such as event detection and error logging Non Plug and Play operating systems such as Windows require an additional interface for obtaining the SMBIOS information The BIOS support
80. o PCI card is detected No Spread Spectrum Disabled A technique for spreading the signal bandwidth Enabled over a wide range of frequencies to lower Radiated Emission PCI Slot 1 IRQ Preference Auto Manual IRQ selection does not guarantee PCI 5 6 7 slot device will be configured with choice 9 10 11 WARNING Selected IRQ will not be allowed for other devices Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 72 of 81 8 5 Boot Menu Main Advanced PCIPnP Boot Security Chipset Power Exit Boot Settings Configure Settings during System Boot Boot Settings Configuration gt Boot Device Priority lt Select Screen Auto adjust Boot Priority Yes Select Item Removable Devices 1st No Enter Go to Sub Screen Force Boot Device Disabled F1 General Help 11 BBS popup boot menu Enabled F10 Save and Exit Hide Removable Devices No ESC Exit Execute Embedded Firmware Disabled V02 58 C Copyright 1985 2005 American Megatrends Inc 8 5 1 Boot Boot Settings Configuration Boot Boot Settings Configure Settings during System Boot Quick Boot Enabled Quiet Boot Disabled Bootup Num Lock On lt Select Screen PS 2 Mouse Support Auto N Select Item Halt on A11 But Keyboard Enter Go to Sub Screen Hit DEL Message Display Enabled
81. oller 480Mbps USB 2 0 Controller Mode only if USB Controller Enabled FullSpeed HiSpeed Configures the USB 2 0 controller in HiSpeed 480Mbps or FullSpeed 12Mbps BIOS EHCI Hand Off Enabled Disabled This is a workaround for OSes without EHCI hand off support The EHCI ownership change should claim by EHCI Driver Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 70 of 81 8 3 13 Advanced settings USB Mass Storage Device Configuration Advanced USB Mass Storage Device Configuration Enables USB host controllers USB Mass Storage Reset Delay 20 Sec Device 1 JetFlash TS256MJF2L Emulation Type Auto lt Select Screen Select Item t change option F1 General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Options USB Mass Storage Reset Delay 10 Sec 20 Sec 30 Sec 40 Sec Description Number of seconds the BIOS waits for the USB device after start unit command Emulation Type Auto Floppy Forced FDD Hard Disk CDROM Setup the emulation type for the USB device Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 71 of 81 8 4 PCIPnP Menu PCIPnP Advanced PCI PnP Settings NO lets the BIOS configure all the Wa
82. onnector 4 4 1 CRT Connector CRT Pull Pull U D a eee maman EE T SSR LL R AO GREEN 2 12 ppcDarT 10 TBD 2k2 E 17758 BLUE 03 13 HSYNC TBD Note 1 The 5V supply in the CRT connector is fused by a 1 1A reset able fuse Signal Description CRT Connector Sew _ Analog output carrying the red color signal to the CRT For 75 Ohm cable impedance GREEN Analog output carrying the green color signal to the CRT For 75 Ohm cable impedance BLUE Analog output carrying the blue color signal to the CRT For 75 Ohm cable impedance DIG GND Ground reference for HSYNC and VSYNC ANA GND Ground reference for RED GREEN and BLUE Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 28 of 81 4 4 2 LVDS Flat Panel Connector LVDS Noe Type Signa Note LVDS LVDSAO 175 LVDS LVDSAZ C LVDSACLK S C M vosas LVDSBO LVDS LVDSBt LVDSE LVDS LVDSBCLK LVDSB3 Signal Description LVDS Flat Panel Connector 060 LVDS LVDSA1T tps LVDS A2 LVDS LVDSACLK 1 5 LVDSA3 LVDS 1008804 LVDS tps _____ LVDS eel 6 8 18 20
83. ors FAN PROC and FAN SYS The FAN PROC is used for connection of the active cooler for the CPU The FAN SYS can be used to power control and monitor a fan for chassis ventilation etc Pull Type loh lol U D pow Signal description Signal Description 12V 12V supply for fan can be turned on off or modulated PWM by the chipset A maximum of 800 mA can be supplied from this pin Tacho signal from the fan for supervision The signals shall be generated by an open collector transistor or similar On board is a pull up resistor 4K7 to 12V The signal has to be pulses typically 2 Hz per rotation 4 13 The Clear CMOS Jumper Cir CMOS The Clr CMOS Jumper is used to clear the CMOS content T CPU location T No Jumper installed Pin numbers Jumper normal position Jumper Clear CMOS position To clear all CMOS settings including Password protection move the CMOS_ CLR jumper with or without power on the system for approximately 1 minute Alternatively if no jumper is available turn off power and remove the battery for 1 minute but be careful to orientate the battery corretly when reinserted 4 14 LPC connector unsupported Pull Pull pe loh lol Eg 421 cc EITI L LPC FRAME 5 6 tPCAD 71 INTSERQ 7 8 LPCAD2 W 9 10 Pecans
84. other expansion cards are absent consult your system manufacturer s technical support If beep codes are not generated when all other expansion cards are absent one of the add in cards is causing the malfunction Insert the cards back into the system one at a time until the problem happens again This will reveal the malfunctioning card If the system video adapter is an add in card replace or reseat the video adapter If the video adapter is an integrated part of the system board the board may be faulty Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 81 of 81 9 OS setup Use the Setup exe files for all relevant drivers The drivers can be found on the 886LCD M Driver CD or they can be downloaded from the homepage www kontron emea com Note When installing using ADD cards like ADD DVI or ADD LVDS it s possible that the OS start up without any connected display s active If you are able to pass the Log On to Windows etc by entering the password etc without actually see the picture on the display and If the Hot Keys have not been disabled in the Extreme Graphic driver then the following key combinations you can select a connected display Ctrl Alt F1 enables the CRT on board Ctrl Alt F3 enables the LVDS on board Ctrl Alt F4 enables display conneted to the ADD card 10 Warranty KONTRON Technology warrants its products to be free from defects in mat
85. p Power State Map 2 U u u 15 3 0 Power Consumption uu III ante aaea aoaaa a a aa aean 17 3 6 1 Testsystem configuration 17 3 6 2 Measured Power Consumption 2 00 00 000000000000 17 3 6 3 Power Consumption 18 3 6 4 Minimum recommended power supply 18 3 6 5 Recommended Power Supply specifications 18 3 7 886LCD M Clock Distribution J u u u u u u u u 19 4 CONNECTOR DEFINITIONS 21 41 layoUt u uuu S u aid 22 4 1 1 886LCD MF Flex MM 22 4 1 2 886 23 413 886_ 0 24 42 Power Connector ATXPWR canna u u u 25 4 3 Keyboard and PS 2 mouse connectors 26 4 3 1 Stacked MINI DIN keyboard and mouse Connector MSE 8 26 4 3 2 keyboard and mouse pin row Connector
86. pec no Thermal Embedded Number Guideline Intel Pentium M 90nm 2 1 GHz 765 SL7V3 21 0W No 2 0 GHz 755 SL7EM 21 0W No 1 8 GHz 745 SL8U6 21 0 W Yes 1 8 GHz 745 SL7EN 21 0 W Yes 1 7 GHz 735 SL7EP 21 0W No 1 6 GHz 725 SL7EG 21 0W No 1 5 GHz 715 SL7GL 21 0 W No Intel Pentium M 130nm Intel Celeron M 90nm Intel Celeron M 130nm 886LCD M mITX BGA is a version including an Intel Mobile Celeron ULV 800 MHz BGA CPU 0 12 Embedded having TDP Thermal Design Power 5 5W other specifications as for ULV Banias and Dothan 3 3 System Memory support 886LCD M Flex and 886LCD M ATX boards have two onboard DIMM sockets 886LCD M mITX equipped with one DIMM socket only and support the following memory features 2 5V only 184 pin DDR SDRAM DIMMs with gold plated contacts e Supports up to two one on mITX single sided and or double sided DIMMs four rows populated with unbuffered PC1600 PC2100 PC2700 DDR SDRAM without ECC e Supports 64 Mbit 128 Mbit 256 Mbit and 512 Mbit technologies for x8 and x16 width devices e Maximum of 2 Gbytes system 1GB on mITX memory by using 512 Mbit technology devices double sided e Supports 200 MHz 266 MHz and 333 MHz DDR devices 64 bit data interface The installed DDR SDRAM should support the Serial Presence Detect SPD data structure This allows the BIOS to read and configure the memory controller for optimal performance
87. rial Port Mode 115200 8 n 1 57600 8 n 1 38400 8 n 1 19200 8n 1 9600 8 n 1 Select the serial port speed Flow Control None Hardware Software Select Flow Control for serial port Redirection After BIOS POST Disabled Boot Loader Always How long shall the BIOS send the picture over the serial port Terminal Type ANSI VT100 VT UTF8 Select the target terminal type VT UTF8 Combo Key Support Disabled Enabled Setup VT UTF8 Combo Key Gkontron 886LCD M Family KTD 00474 U Public User Manual 8 3 12 Advanced settings USB Configuration Date 2010 06 22 69 of 81 Advanced USB Configuration Module Version 2 USB Devices 1 Drive USB Function Legacy USB Support USB 2 0 Controller USB 2 0 Controller Enabled 24 0 11 4 All USB Ports Enabled Enabled Mode HiSpeed USB Mass Storage Device Configuration Enables USB host controllers lt Select Screen Select Item change option Fl General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature USB Function Options Disabled 2 USB Ports All USB Ports Description Select the USB ports you want to enabled Legacy USB Support Disabled Enabled Auto Support for legacy USB Keyboard USB 2 0 Controller Enabled Disabled Setup the USB 2 contr
88. rning Setting wrong values in below sections devices in the system May cause system to malfunction YES lets the operating system Plug amp Play o s o configure Plug and PCI Latency Timer 64 Play PnP devices not Allocate IRQ to PCI VGA Yes required for boot if PCI IDE BusMaster Enabled your system has a Plug 1805 Available and Play operating IRQ7 Available system PCI Riser Support Disabled Disable Unsed PCI Clocks Auto lt Select Screen Spread Spectrum Mode Disabled Select Item change option PCI Slot 1 IRQ Preference Auto F1 General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Options Description Plug amp Play O S Select if you have a PnP O S PCI Latency Timer Value in units of PCI clocks for PCI device latency timer register 248 Allocate IRQ to PCI VGA Yes Assigns IRQ to PCI VGA card No PCI IDE BusMaster Enabled Setup PCI bus mastering for read write to IDE Disabled drives IRQ5 Available Available can be used for PCI PnP Reserved Reserved can be used for legacy ISA IRQ7 Available Available can be used for PCI PnP Reserved Reserved can be used for legacy ISA PCI Riser Support Disabled Disabled as default and also when using the PCI Slot3 Kontron 820982 Riser card PCI Slot2 Setup if using a PCI Riser card as described in PCI Slot1 section 886LCD M PCI IRQ amp INT routing Disable Unused PCI Clocks Auto Disables PCI clocks if n
89. s an SMBIOS table interface for such operating systems Using this support an SMBIOS service level application running on a non Plug and Play operating system can obtain the SMBIOS information The 886 CD M Boards supports reading certain MIF specific details by the Windows Refer to the API section in this manual for details 7 2 Legacy USB Support Legacy USB support enables USB devices such as keyboards mice and hubs to be used even when the operating system s USB drivers are not yet available Legacy USB support is used to access the BIOS Setup program and to install an operating system that supports USB By default Legacy USB support is set to Enabled Legacy USB support operates as follows 1 When you apply power to the computer legacy support is disabled 2 POST begins 3 Legacy USB support is enabled by the BIOS allowing you to use a USB keyboard to enter and configure the BIOS Setup program and the maintenance menu 4 POST completes 5 The operating system loads While the operating system is loading USB keyboards and mice are recognized and may be used to configure the operating system Keyboards and mice are not recognized during this period if Legacy USB support was set to Disabled in the BIOS Setup program 6 After the operating system loads the USB drivers all legacy and non legacy USB devices are recognized by the operating system and Legacy USB support from the BIOS is no longer used To install an
90. te Intel 82802 Firmware Hub Device 6 2 PCI devices Device Function Vendor ID Device ID IDSEL 6300ESB Device Function Host bridge 6300ESB Controller 6300ESB Controller 6300ESB Pci to Pci bridge 6300ESB VGA controller 6300ESB Display controller 6300ESB Pci to Pci bridge 6300ESB USB 6300ESB USB 6300ESB Watchdog timer 6300ESB APIC 6300ESB USB 6300ESB Pci to Pci bridge 6300ESB ISA Bridge 6300ESB IDE Controller 6300ESB IDE Controller 6300ESB SMBus 6300ESB Audio O ojo A A5 oo 2j o ojo 23 o PCI slot 1 PCI slot 2 PCI slot 3 PCI slot 4 RTL8110 Ethernet RTL8110 Ethernet N N 5 O S O O O O O O Values dynamically selected BIOS Note All PCI slots for the 886LCD M boards supports PCI BUS Mastering RTL8110 Ethernet Gkontron 886LCD M Family KTD 00474 U 54 of 81 Date 2010 06 22 Page Public User Manual Interrupt Usage 6 3 SOI8 y ui suonoejes uo GOYI VOUI 1015 IOd uo snglNS Aq pesn eq JejoJjuo2 pJeoquo Aq pesn eq 1e ojuoo pes
91. ted IRDY Initiator Ready indicates the initiating agent s bus master s ability to complete the current data phase of the transaction IRDY is used in conjunction with TRDY A data phase is completed on any clock both IRDY and TRDY are sampled asserted During a write IRDY indicates that valid data is present on AD 31 00 During a read it indicates the master is prepared to accept data Wait cycles are inserted until both IRDY and TRDY are asserted together TRDY Target Ready indicates the target agent s selected device s ability to complete the current data phase of the transaction TRDY is used in conjunction with IRDY A data phase is completed on any clock both TRDY and IRDY are sampled asserted During a read TRDY indicates that valid data is present on AD 31 00 During a write it indicates the target is prepared to accept data Wait cycles are inserted until both IRDY and TRDY are asserted together STOP Stop indicates the current target is requesting the master to stop the current transaction LOCK Lock indicates an atomic operation that may require multiple transactions to complete When LOCK is asserted non exclusive transactions may proceed to an address that is not currently locked A grant to start a transaction on PCI does not guarantee control of LOCK Control of LOCK is obtained under its own protocol in conjunction with GNT It is possible for different agents to use PCI while a single master retains
92. ter saving the changes Save Changes and Exit Discard Changes and Exit 10 Key be used Discard Changes for this operation Load Optimal Defaults Load Failsafe Defaults Halt on invalid Time Date Enabled Secure CMOS Disabled lt Select Screen 11 Select Item Enter Go to Sub Screen Fl General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Options Description Save Changes and Exit Ok Exit system setup after saving the changes Cancel Discard Changes and Exit Ok Exit system setup without saving any changes Cancel Discard Changes Ok Discards changes done so far to any of the setup Cancel questions Load Optimal Defaults Ok Load Optimal Default values for all the setup questions Cancel Load Failsafe Defaults Ok Load Failsafe Default values for all the setup questions Cancel Halt on invalid Time Date Enabled Shall the BIOS halt and wait for a keypress when the Disabled cmos is corrupted Secure CMOS Disabled Enable will store the current CMOS in the BIOS flash Enabled rom this will maintain the settings even if the battery is failing Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 80 of 81 8 10 AMI BIOS Beep Codes Boot Block Beep Codes Number of Description Beeps 1 Insert diskette in floppy drive A 2 AMIBOOT ROM f
93. ternal temperature input routed to FEATURE connector e Voltage monitoring e Intrusion detect input SMI violations BIOS on HW monitor not supported Supported by API Windows Operating Systems Support e Win2000 WinXP Win98 USB2 0 ACPI S4 not supported Win2003 WinXP Embedded limitations may apply WinCE net limitations may apply Linux Feodora Core 3 Suse 9 2 limitations may apply continues Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 12 of 81 Environmental Operating Conditions 0 C 60 C operating temperature forced cooling It is the customer s responsibility to provide sufficient airflow around each of the components to keep them within allowed temperature range 1096 9096 relative humidity non condensing Storage 20 C 70 C 5 95 relative humidity non condensing Electro Static Discharge ESD Radiated Emissions EMI All Peripheral interfaces intended for connection to external equipment are ESD EMI protected EN 61000 4 2 2000 ESD Immunity EN55022 1998 class B Generic Emission Standard Safety UL 60950 1 2003 First Edition CSA C22 2 No 60950 1 03 1st Ed April 1 2003 Product Category Information Technology Equipment Including Electrical Business Equipment Product Category CCN NWGQ2 NWGQ8 File number E194252 Theoretical MTBF 199 799hours 22 8years Calculation based on Telcordia SR 332 method Restrict
94. that is providing the data will drive this signal SBSTB Sideband Strobe Provides timing for 2x and 4x data on the SBA 7 0 bus It is driven by the AGP master after the system has been configured for 2x or 4x sideband address mode SBSTB Sideband Strobe Complement The differential complement to the SB_STB signal It is used to provide timing 4x mode continues kontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 Page 31 of 81 AGP PCI Signals Semantics FRAME G_FRAME Frame During PIPE and SBA Operation Not used by AGP SBA and PIPE operations During Fast Write Operation Used to frame transactions as an output during Fast Writes During FRAME Operation is an output when the GMCH acts as an initiator on the AGP Interface is asserted by the GMCH to indicate the beginning and duration of an access FRAMEZ is an input when the GMCH acts as a FRAME based AGP target As a FRAME based AGP target the GMCH latches the C BE 3 0 and the AD 31 0 signals on the first clock edge on which GMCH samples FRAME active IRDY G_IRDY Initiator Ready During PIPE and SBA Operation Not used while enqueueing requests via AGP SBA and PIPE but used during the data phase of PIPE and SBA transactions During FRAME Operation G_IRDY is an output when GMCH acts as a FRAME based AGP initiator and an input when the GMCH acts as a FRAME b
95. ther dot clock PLL DPLL or may be configured as an interrupt input A TV out device can provide the clock reference The maximum input frequency for this signal is 85 MHz DVOBC Pixel Clock Input When selected as the dot clock PLL DPLL reference input this clock reference input supports SSC clocking for DVO LVDS devices DVOBC Interrupt When configured as an interrupt input this interrupt can support either DVOB or DVOC DVOBCCLKINT needs to be pulled down if the signal is NOT used Display Power Management Signaling This signal is used only in mobile systems to act as the DREFCLK in certain power management states i e Display Power Down Mode DPMS Clock is used to refresh video during S1 M Clock Chip is powered down in S1 M DPMS should come from a clock source that runs during S1 M and needs to be 1 5 V So an example would be to use a 1 5 V version of SUSCLK from ICH4 M Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 33 of 81 4 5 Parallel ATA harddisk interface Two parallel ATA harddisk controllers are available on the board a primary and a secondary controller Standard 377 harddisks or CD ROM drives may be attached to the primary and secondary controller board by means of the 40 pin IDC connectors IDE P and IDE S The secondary controller is shared between the IDE S connector and the IDE S2 connector which is intended for 272 harddisks The harddisk controllers support Bus m
96. thernet connector 1 n nanas 40 4 9 2 Ethernet connector 2 3 2 3 41 4 10 USB Connector USB nore aaa co on nee du nar EcL cn ae eau na eR 42 4 10 1 USB Connector 0 2 18 0 2 42 4 11 Audio U M 43 4 11 1 Audio Line in Line out and 2 nnns 43 4 11 2 CD ROM Audio input 43 4 11 3 AUDIO Header AUDIO _HEAD I 44 4 12 Fan connectors FAN PROC and 6 6 22 22 2 222 45 4 13 The Clear CMOS Jumper CIlr CMOS enne nnne u u 45 4 14 LPC connector unsupported 45 4 15 Front Panel connector 46 4 16 Intruder Connector INT IILI 46 4 17 Feature Connector FEATUREBE 47 4171 PCI SIoE OOBnBeCfhoru suu PET 48 4 17 2 Signal Description PCI Slot 49 4 17 3 886LCD M PCI IRQ amp INT 51 5
97. tion 6 Connect PSU to the board by the ATXPWR connector and turn on power to the PSU 7 The PWRBTN IN must be toggled to start the Power supply this is done by shorting pins 16 PWRBTN and 18 GND on the FRONTPNL connector see Connector description A normally open switch can be connected via the FRONTPNL connector 8 Enterthe BIOS setup by pressing the DEL key during boot up Refer to the Software Manual under preparation for details on BIOS setup Enter Advanced Menu CPU Configuration Intel SpeedStep Tech and select Maximum Performance Note To clear all CMOS settings including Password protection move the CMOS CLR jumper with or without power for approximately 1 minute Alternatively turn off power and remove the battery for 1 minute but be careful to orientate the battery corretly when reinserted 9 Mounting the board to chassis Warning When mounting the board to chassis etc please notice that the board contains components on both sides of the PCB which can easily be damaged if board is handled without reasonable care A damaged component can result in malfunction or no function at all When fixing the Motherboard on a chassis it is recommended using screws with integrated washer and having diameter of 7mm Note Do not use washers with teeth as they can damage the PCB mounting hole and may cause short circuits Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 0
98. tions depends on the setup for the the other Serial Ports ICH SIO Serial Port2 Address Disabled 3E8 IRQ6 3E8 IRQ10 2E8 IRQ11 Select the BASE addresse and IRQ The available options depends on the setup for the the other Serial Ports Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 64 of 81 8 3 6 Advanced settings Hardware Health Configuration Advanced Hardware Health Event Monitoring Disable Full Speed System Temperatur 379C 98 F Thermal Does regulate CPU Temperature 439 1099 fan speed according to External Temperature Sensor N A specified temperatur Fanl Speed Fail Speed Does regulat Fan Cruise Control Disabl according to specified Fan2 Speed 2537 RPM RTM Fan Cruise Control Thermal Fan Setting 45 C 113 F Fan3 Speed 2164 Fan Cruise Control Speed Fan Setting 2177 RPM Watchdog Function Disabl lt Select Screen Select Item change option F1 General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Fan Cruise Control Options Disabled Thermal Speed Description Select how the Fan shall operate When set to Thermal the Fan will start to run at the CPU die temperature set below When set to Speed the Fan will run at the Fixed speed set below Fan Settings Feature Watchdog 1406 562
99. transferred on write transactions STOP G_STOP Stop During PIPE and SBA Operation This signal is not used during PIPE or SBA operation During FRAME Operation G_STOP is an input when the GMCH acts as a FRAME based AGP initiator and is an output when the GMCH acts as a FRAME based AGP target G_STOP is used for disconnect retry and abort sequences on the AGP interface DEVSEL DEVSEL Device Select During PIPE and SBA Operation This signal is not used during PIPE or SBA operation During FRAME Operation DEVSEL Z when asserted indicates that a FRAME based AGP target device has decoded its address as the target of the current access The GMCH asserts DEVSEL based on the DDR SDRAM address range being accessed by a PCI initiator As an input DEVSEL indicates whether the AGP master has recognized a PCI cycle to it REQ G_REQ Request During SBA Operation This signal is not used during SBA operation During PIPE and FRAME Operation REQ when asserted indicates that AGP master is requesting use of the AGP interface to run a FRAME or PIPE based operation GNT Grant During SBA PIPE and FRAME Operation GNT along with the information on ST 2 0 signals status bus indicates how the AGP interface will be used next Refer to the AGP Interface Specification Revision 2 0 for further explanation of the ST 2 0 values and their meanings
100. ty of the shaded IRQs depends on the setting in the BIOS According to the PCI Standard PCI Interrupts IRQA IRQD can be shared These interrupt lines are managed by the PnP handler and are subject to change during system initialisation 2 IRQ16 to IRQ26 are APIC interrupts 3 Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 55 of 81 6 4 Address hex Description Programmable interrupt controller System Timer Standard keyboard System speaker System CMOS Real time clock Secondary Parallel ATA IDE Channel Primary Parallel ATA IDE Channel Comport 4 Comport 2 Printer Port 855GME VGA Controller 855GME VGA Controller Comport 3 Comport 1 PCI Bus Realtek 8169 Ethernet Controller PCI standard PCI to PCI brigde Realtek 8169 Ethernet Controller Realtek 8169 Ethernet Controller Standard Universal PCI to USB Host Controller Standard Universal PCI to USB Host Controller PCI System Management Bus Realtek AC97 Audio Realtek AC97 Audio 855GME VGA Controller Primary Serial ATA IDE Channel Secondary Serial ATA IDE Channel CO 5 6 5 Channel Usage Channel Number Data Width System Ressources 8 or 16 bits Available 8 or 16 bits Available 8 or 16 bits Available 8 or 16 bits Available 8 or 16 bits DMA Co
101. y Configuration Advanced Floppy Configuration Select the type of Floppy A Floppy B Disabl Disabl floppy drive connected to the system Select Screen Select Item t change option F1 General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Floppy A Options Disabled 360KB 1 2MB 720KB 1 44MB 2 88MB Description Select Floppy device installed in the system using the LPT gt Floppy cable Floppy B Notes Disabled 360KB 1 2MB 720KB 1 44MB 2 88MB Select Floppy device installed in the system using the LPT gt Floppy cable Enter SuperlO Configuration and enable Onboard Floppy Controller Parallel port can not be used if Onboard Floppy Controller is enabled Gkontron 886LCD M Family KTD 00474 U Public User Manual Date 2010 06 22 63 of 81 8 3 5 Advanced settings SuperlO Configuration Advanced Configure Win627THF Super IO Chipset OnBoard Floppy Controller Serial Portl Address Serial Port2 Address Serial Port2 Mode Parallel Port Mode Parallel Port Mode Parallel Port IRQ SIO Serial 1 Addresse ICH SIO Serial Port2 Addresse Disabled 3F8 IRQ4 2F8 IRQ3 ormal 378 Normal IRQ7 Disabled Disabled Enable onboard Floppy Controller for use at parallel port
102. y be used like when the Intruder switch is not needed EXT ISAIRQ EXTernal ISA IRQ active low input can activate standard AT Bus IRQ interrupt EXT_SMI External SMI active low input signal can activate SMI interrupt PWR_OK PoWeR OK signal is high if no power failures is detected SB5V StandBy 5V supply SB3V3 Standby 3 3V Max load is 0 75A 1 5A lt 1 sec EXTernal BATtery the terminal of an external primary cell battery can be connected to this pin The terminal of the battery shall be connected to GND etc pin 10 The external battery is protected against charging and can be used with or without the on board battery installed The external battery voltage shall be in the range 2 5 4 0 V DC 5V Max load is 0 75A 1 5A lt 1 sec General Purpose Inputs Output These Signals may be controlled or monitored through GPIOO 7 the use of the KONTRON API Application Programming Interface available for Win98 1 SMBD EXT BAT WinXP and Win2000 FAN 3 speed control OUTput This analogue voltage output signal can be used to control the Fan s speed The output has 16 values in the range from 0 5V For more information please look into the datasheet for the Winbond controller W83627 FANSIN FANS Input OV to 5V amplitude Fan 3 tachometer input 12V Max load is 0 75A 1 5A lt 1 sec Temperature sensor 3 input Recommended Transistor 2N3904 having emitter

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