Hardware Reference and Installation Manual C²I² Systems Dual 4
Contents
1. CT Systems CCIl Systems Pty Ltd Registration No 1990 005058 07 Communications Computer Intelligence 2 Integration 2 Hardware Reference and Installation Manual for the C 1 Systems Dual 4 Gbps Fibre Channel PMC Adapter Cl Systems Document No Document Issue Issue Date Print Date File Name Distribution List No CCII FC 6 MAN 005 2009 01 19 2009 01 19 P Fibrechn TECH MAN CFCMANO05 WPD C4 Systems The copyright of this document is the property of C2l Systems The document is issued for the sole purpose for which it is supplied on the express terms that it may not be copied in whole or part used by or disclosed to others except as authorised in writing by Cl Systems Document prepared by and for C2l Systems Cape Town Signature Sheet Completed by Ovan Schalk dject Engineer FC C212 Systems Accepted by Project Manager 2009 OC 19 FC 1 ov al 1G C l2 Systems W IOYTE Quality Assfirance 2209 0 19 C2l2 Systems Accepted by he Rua Amendment History Description Date ECP No 0 1 Initial Revision 2009 01 09 1 0 Baseline 2009 01 19 H FE U P Fibrechn TECH MAN CFCMANO5 WPD Contents T CODE ccs sehen eae eae o 2 1 1 IdentifiCatlony 2 usa A Donets del eee EKAR Meat ean PE eae baat ee ee 2 1 2 SYSTEM OVOIVIW unir ete we been Bee Meh bine eb rele Pern E eee Gale Bier ated dee ds algae Gt 2 1 3 Document O2. Dated 2002 03 29 PCI Special Interest Group PCI X Addendum to the PCI Local Bus Specification Rev 1 0a Dated 2000 07 22 CCII FC 6 MAN 001 User Manual for the C2l Systems PMC Fibre Channel END VxWorks Driver Reference Documents CCII FC 6 MAN 002 Procedure for Firmware Download and EEPROM Configurations for the C2l Systems Fibre Channel PMC Adapter IEEE Std 1386 2001 IEEE Standard for a Common Mezzanine Card CMC Family Dated 2001 06 14 IEEE Std 1386 1 2001 IEEE Standard Physical and Environmental Layers for PCI Mezzanine Cards PMC Dated 2001 06 14 CCII FC 6 MAN 005 2009 01 19 Issue 1 0 P Fibrechn TECH MAN CFCMANO5 WPD Page 3 of 15 3 Functional Description This section provides a technical hardware overview of the CCII Dual 4 Gbps FC PMC Adapter 3 1 Hardware Features The following is a list of some of the FC PMC Adapter s hardware features Highly integrated full duplex Dual Channel Fibre Channel Input Output I O Processor Dual 4 Gbps FC links 64 bit 133 MHz host PMC bus backward compatible with 32 bit 33 MHz modes Embedded 32 bit ARM processors Integrated Bit Error Rate BER link testing Full simultaneous Target and Initiator operations Implements a common Message Passing Interface MPI Firmware stored in Flash Read Only Memory ROM supports up to 2000 concurrent host commands Serial Electrically Erasable Programmable Read Only Memory EEPROM for storing factory settings PCI X 1 0a compliant bac
3. P Fibrechn TECH MAN CFCMANO5 WPD 5 3 3 Step 3 Securing the FC Adapter The FC PMC Adapter is secured to the HCC by four M2 5 screws supplied two of which secure the bezel and the other two the standoffs This is illustrated in Figure 6 below Figure 6 HCC side Screw Locations 5 3 4 Step 4 Attach the Fibre Optic Cablin Care should be taken never to look directly into the path of a Fibre Optic Transceiver s laser beam to avoid possible eye damage It is thus recommended that fibre optic cabling should only be connected to disconnected from the FC PMC Adapter whilst the HCC is powered down After removing the transceiver s protective dust cap a mating LC style connector is plugged into the transceiver with sufficient positive force to engage the connector s locking mechanism Figure 7 shows a FC PMC Adapter with duplex multi mode fibre optic cabling plugged into both the FCO and FC1 transceivers CCII FC 6 MAN 005 2009 01 19 Issue 1 0 P Fibrechn TECH MAN CFCMANO5 WPD Page 11 of 15 pa aif 2 E miimi BES q Bl Act e a 0 o 3 Ch Je pe 0 s E z SCSI BUSY PIB BUSY PCI MEZZANINE C PCI MEZZANINE CARO MEZZANINE CARD Figure 7 FC Adapter with Duplex LC Connectors Attached Unused ports or any FC PMC Adapters in storage should always have protective dust caps installed on the fibre optic transceivers Issue 1 0 CCII FC 6 MAN 005 2009 01 19 Page 12 of 15 P Fibrechn TECH M
4. tasa 9 5 Hardware Installations isini ono innne ct mhe naa peek ot phones cbse es 10 5 1 The Adapter Kit v 05 24s a Pale ean PEAR oP Dede ged Gad Pe ea feeb eda a 10 5 2 Handling Instructions sasia ahi sie Sake eae eae ei Pah ete A dew Pek eee a NE Se 10 5 3 Installation of the Adapter 0 0 ccc etn tet 10 5 3 1 Step 1 Prepare the Host Carrier Card HCC 2 0 0c tees 10 5 3 2 Step 2 Install the Adapter onto Host Carrier Card 0 0 eae 10 5 3 3 Step 3 Securing the FC Adapter 0 6 0 11 5 3 4 Step 4 Attach the Fibre Optic Cabling 00 cece tees 11 6 Programming interface 4 ss 2 A O RAPE att RE ald RIPE Le 13 6 1 PMG Addressing airada a Sebo dee este EEE ele egies a ee a 13 6 2 Multifunctions PME ura nacht te a OP ice Oe ast check eer arate Na ae cea hg ede A Naas ay oe age bbe Ba Shs 13 6 3 Host Interface Registers eos marar iran SANEA KA ete 13 ANEXAS ihe rara a a a a a fa ti 15 Functional Specifications u uessa eunana eaea 15 P Fibrechn TECH MAN CFCMANO5 WPD Page iv of v ANSI API ASIC BER CCIl CMC CPU EEPROM EMC END FC FC AL 2 FCP Gbps HCC 1 0 ID INT IOC IP Kb LC MB MHz MPI nm OS PC PCB PCI PCI X PMC RAM ROM SCSI SFF SIG SSRAM TCP TCP IP VPD WWN x86 Abbreviations and Acronyms American National Standards Institute Application Programming Interface Application Specific Integrated Circuit Bit Error Rate C212 System
5. to minimize the amount of time spent on the PCI bus for non data moving activities such as initialisation command and error recovery The interface consists of a PMC bus interface and a number of bus mode signals On the FC PMC Adapter the bus mode signalling is implemented using dedicated logic circuitry which prevents the card from operating on a non PMC bus and allows the host to sense the presence of a card in a PMC slot Refer to Paragraph 5 2 of the PMC Specification Par 2 2 3 for a complete description of the PMC interface signals and to Paragraph 6 4 of the Common Mezzanine Card CMC Specification Par 2 2 2 for information on bus mode signalling Serial EEPROM The serial EEPROM stores nonvolatile data for the embedded processor such as the World Wide Name WWN Vendor Product Data VPD and other vendor specific information The serial EEPROM also stores the configuration settings such as the link speed setting The serial EEPROM data is programmed by the firmware therefore the firmware must be downloaded and running before the serial EEPROM can be programmed The serial EEPROM has an 8 Kb capacity PMC configuration information is also stored in the serial EEPROM The information in the EEPROM is loaded by the PMC bridge when the board is reset either at power up or during use The EEPROM must be programmed with valid values before the FC PMC Adapter will be plug and play compatible The CCIl FC Adapter uses the default co
6. AN CFCMANO5 WPD 6 1 6 2 6 3 Programming Interface PMC Addressing There are three types of PMC defined address spaces e Configuration space e Memory space e lO space Configuration space is a contiguous 256 x 8 bit set of addresses dedicated to each slot or stub on the PMC bus The host processor uses the PMC configuration space to initialise the FC PMC Adapter At initialisation time each PMC device is assigned a base address for memory and I O accesses Multifunction PMC The CCII FC PMC Adapter supports multifunction capability on the PMC bus Both I O Controller 0 IOC 0 and I O Controller 1 IOC 1 have identical configuration space memory maps and most of the data reported in these registers by the host processor are also the same The only exceptions are the Device Identification ID Class Code Subsystem ID and Subsystem Vendor ID The user must do a PMC find based on the Device ID either 0x0622 or 0x0623 and the Vendor ID 0x1000 to obtain a handle to the device The base address of the card may then be read from the PMC configuration space at offset 0x010 for the I O Base Address or at offset 0x01C for the Memory Base Address Host Interface Registers The first 128 bytes of PMC Memory 0 address space contains the Host Interface Register Set The FC PMC Adapter also specifies an I O Space requirement of 128 bytes of I O mapped space which the System is required to assign during PMC configuration
7. The 128 bytes of I O Space are mapped onto the first 128 bytes of Memory 0 space providing an alternate access path to the Host Interface Register Set CCII FC 6 MAN 005 2009 01 19 Issue 1 0 P Fibrechn TECH MAN CFCMANO5 WPD Page 13 of 15 The Host Interface Register Set is given in Table 3 below Table 3 Host Interface Register Set PPE EIN TE AAE EEEE EE A inlet A A A A al CCII FC 6 MAN 005 P Fibrechn TECH MAN CFCMANO5 WPD Doorbell Write Sequence Diagnostic Test Base Address Reserved Host Interrupt Status Reply Interrupt Mask Reserved Request Queue Reply Queue High Priority Request FIFO Reserved 2009 01 19 Issue 1 0 Page 14 of 15 Designation Annexure A Functional Specifications CCII FC PMC 2P FP COM SX CCII FC PMC 2P FP IND SX CCII FC PMC 2P FP RGD SX CCII FC PMC 2P FP COM LX CCII FC PMC 2P FP IND LX CCII EC PMC 2P FP RGD LX PMC Interface Dimensions Power Requirements Environmental Specifications Software Drivers Protocols CCII FC 6 MAN 005 P Fibrechn TECH MAN CFCMANO5 WPD VO Connector Grade media Speed Dual SFF LC Commercial Multi mode Fibre 4 Gbps Dual SFF LC Industrial Multi mode Fibre 4 Gbps Dual SFF LC Ruggedised Multi mode Fibre 4 Gbps Dual SFF LC Commercial Single mode Fibre 4 Gbps Dual SFF LC Industrial Single mode Fibre 4 Gbps Dual SFF LC Ruggedised Single mode Fibre 4 Gbps Bus Address PnP auto selected Bus 64 bit 133 MHz b
8. ackward compatible with 32 bit 33 MHz Compliancy PCI Rev 2 3 PCI X Rev 1 0a Interrupts PCI INT A B Address Cycle Dual Address Cycle Support Data Transfer Bus Mastering and Scatter Gather Single Common Mezzanine Card CMC IEEE P1386 compliant 149 mm x 74 mm x 9 8 mm 110g 10g Supply 5 V 1 5 A max PMC I O Signalling 3 3 V Figures according to MIL HDBK 217F Parts Count Method Ground Mobile 23 000 hrs Naval 33 000 hrs Sheltered Airborne 29 000 hrs Inhabited Cargo Temperature Commercial Industrial Conduction Cooled Operating Temp 0 C to 55 C 15 C to 75 C 40 C to 85 C Storage Temp 40 C to 85 C 40 C to 85 C 55 C to 125 C Humidity 0 90 0 95 0 95 N A 30 g peak 40 g peak half sine half sine 11 ms 11 ms Random N A 0 04 g Hz 0 1 g Hz Vibration 15 to 2 KHz 15 to 2 KHz VxWorks 5 x VxWorks 6 x Windows 2000 Windows Server 2003 Windows XP Solaris x86 Solaris SPARC SUSE Linux Red Hat Linux Fibre Channel Internet singular or intermixed TCP IP s SCSI Custom Protocols supported singular or intermixed 2009 01 19 Issue 1 0 Page 15 of 15
9. g Request Messages 1024 This roughly equates to the maximum number of outstanding I O requests pending in the IOC Flash ROM The memory controller in the IOC also manages a Flash ROM The Flash ROM is used to store the firmware for the IOC In an Intel x86 Architecture x86 Personal Computer PC environment the Flash can also store the Interrupt INT 0x13 boot software The Flash ROM is accessed using the upper eight bits of the Memory Interface Refer to the programming manual Par 2 2 1 for procedures regarding the programming of the Flash ROM Small Form factor SFF Fibre Optic Transceivers The FC PMC Adapter connects to the external FC LAN via duplex fibre optic cabling These connect to the onboard transceivers via mating LC style duplex fibre optic connectors Indicators The FC PMC Adapter provides five Front Panel Indicators and ten Printed Circuit Board PCB Mounted Indicators to report hardware and software status Table 2 below describes the meaning of each of these indicators Table 2 Indicator Description indicator Description O S Front Panel Indicator Channel 0 Channel 1 Link Failure Amber Act0 Act Front Panel Indicator Channel 0 Channel 1 Transmit Receive Activity Green Front Panel Indicator Adapter Heart Beat Green LD9 LD12 PCB Mounied Indicator Channel 0 Channel 1 1 Gbps Link Speed Green LD8 LD11 PCB Mounied Indicator Channel 0 Channel 1 2 Gbps Link Speed Gree
10. hannel over fibre optic media and connects to a host carrier card HCC via a 64 bit 133 MHz PCI X interface The FC PMC Adapter provides optimal flexibility by supporting simultaneous Internet Protocol IP and Small Computer System Interface SCSI protocols on each full duplex 4 Gbps FC link The FC PMC Adapter integrates an Application Specific Integrated Circuit ASIC with three embedded ARM processors which handle all protocol processing and data transfers This reduces overhead on the host carrier processor to a minimum thus allowing higher network data throughput Data transfers to and from the FC PMC Adapter are controlled independently using single channel Bus Mastering or Scatter Gather Mode over the PMC bus 1 3 Document Overview The first section in this document gives a functional description and general overview of the hardware features of the CCII Dual 4 Gbps FC PMC Adapter This is followed by an illustrative layout of the PMC connectors and the user indicators on the FC PMC Adapter A hardware installation guide with descriptive notes is also given in this section The last section in this document will be concerned with the Application Programming Interface API of the FC PMC Adapter CCII FC 6 MAN 005 2009 01 19 Issue 1 0 P Fibrechn TECH MAN CFCMANO5 WPD Page 2 of 15 2 2 1 2 2 2 2 2 3 Applicable and Reference Documents Applicable Documents PCI Special Interest Group PC Local Bus Specification Rev 2 3
11. itecture allows the Operating System OS driver to support automatic failover without the need for IOC intervention Diagnostics The IOC provides the capabilities to do a simplified Link Check BER test on the link for diagnostic purposes In a special test mode the controller can transmit and verify a programmed data pattern for link evaluation Link Controllers The integrated link controller is Fibre Channel Second Generation Arbitrated Loop FC AL 2 Rev 7 0 compatible and performs all link operations The controller monitors the Link State and strictly adheres to the Loop Port State Machine ensuring maximum system interoperability The link control interfaces to the integrated transceivers CCII FC 6 MAN 005 2009 01 19 Issue 1 0 P Fibrechn TECH MAN CFCMANO5 WPD Page 8 of 15 4 1 4 2 1 0 Interface Description This section describes the I O interfaces found on the FC PMC Adapter being the the PMC bus connectors and the fibre optic transceivers as shown in Figure 4 below TLF8524E2GNV 850 nm JADE IN MALAYSIA 08 32 re lass 1 21CFR1040 10 LNOSO 7 01 AG IN PE62KLY EAM UIDINO NINN 1101 1 in is ar Sunnyvale CA 94089 LS e 620628 ISTFCIASA At E T 0746 WEJ 5008 1 KOREA gt OS TLF8524E2GNV 850 nm a ADE IN MALAYSIA 08 32 lt il S 1 21CFR1040 10 LN SO 7 01 AG 1 PE62VCM TA mis ar Sunnyvale CA 94089 Figure 4 I O Interface Loca
12. kward compatible with PCI 2 3 systems 3 2 Architecture A functional block diagram of the FC PMC Adapter is depicted in Figure 1 PMC Clock Clock Bus 106 25 MHz 106 25 MHz La FC Channel 0 l 7 32 64 SFF 7 7 Int ted Fibre Optic 2 Tranecaiver LSIFC949X Transceiver Y 2 E 4 ss Memory dd manco ver y Transceiver Controller Logic lt P FG Channel 1 32 ae 4 SSRAM Flash ROM Seikel E F EEPROM 1 MB min 1 MB min 8 Kb min a Figure 1 Fibre Channel PMC Adapter Functional Block Diagram CCII FC 6 MAN 005 2009 01 19 Issue 1 0 P Fibrechn TECH MAN CFCMANOS5 WPD Page 4 of 15 3 2 1 3 2 2 3 2 3 The FC PMC Adapter consists of the following functional elements PMC Interface Serial EEPROM Processor Synchronous Static Random Access Memory SSRAM Memory FLASH ROM SFF Fibre Optic Transceivers Indicators PMC Interface The PMC interface allows the FC PMC Adapter to be fitted on any host carrier card conforming to the PMC Specification The FC PMC Adapter can interface directly to a host s 64 bit 133 MHz PMC bus or a standard PC s PCI X bus via a special PMC to PCI converter which can be ordered seperately and is backward compatible with 32 bit 33 66 100 MHz PCI 2 3 modes of operation The system interface is designed
13. n LD7 LD10 PCB Mounied Indicator Channel 0 Channel 1 4 Gbps Link Speed Green LD1 LD2 PCB Mounied Indicator Channel 0 Channel 1 FC Link Bypassed Red PCB Mounied Indicator 1 2 V Power Supply Failure Red PCB Mounied Indicator 3 3 V Power Supply Failure Red CCII FC 6 MAN 005 2009 01 19 Issue 1 0 P Fibrechn TECH MAN CFCMANO5 WPD Page 6 of 15 Refer to Figure 2 below for the location of the Front Panel Indicators and Figure 3 for that of the PCB Mounted Indicators The PCB Mounted Indicators are found on the Secondary Side of the adapter the visible side when installed in a PMC site on an HCC PCI MEZZANINE CARD Figure 2 Front Panel Indicators a a a a 3 20 9 1 065 08 00 1 0101 a a qa oag IPMC712 e 9 Figure 3 PCB Indicator Locations During Firmware initialisation the indicators may also have a secondary function The indicators may blink out a fault code in case of a hardware or software failure In case of such a fault code being displayed please record it and contact C2l Systems for further support CCII FC 6 MAN 005 2009 01 19 P Fibrechn TECH MAN CFCMANO5 WPD 3 3 3 3 1 3 3 2 3 3 3 3 3 4 General Features Description The CCIl 4 Gbps FC PMC Adapter is used to connect a host to a high speed FC Link The Fibre Channel Protocol FCP ANSI Standard FC Private Loop Direct Attach and Fabric Loop are supported with the use
14. nfiguration space values as specified in Table 1 Table 1 PCI Configuration Data 0x000 0x1000 PCI SIG allocated Vendor Identifier 0x002 0x0622 or 0x0623 Device Identifier 0x010 Base Address of FC Adapter assigned by Host Embedded Processor The FC PMC Adapter uses the LSI Logic FC 949X ASIC hereafter referred to as the Input Output 1 0 Controller IOC to control all system interface and message transport functionality This frees the host Central Processing Unit CPU for other processing activity and improves overall I O P Fibrechn TECH MAN CFCMANO5 WPD Page 5 of 15 3 2 4 3 2 5 3 2 6 3 2 7 performance The IOC and associated firmware have the ability to manage an I O transaction from start to finish without any host intervention The IOC also handles the Message Passing Interface SSRAM Memory The primary function of this memory is to store data structures used by the IOC to manage exchanges and transmit and receive queues The Random Access Memory RAM also stores part of the run time image of the IOC firmware such as initialisation and error recovery code The IOC uses a 32 bit non multiplexed memory bus to access the SSRAM This memory bus has the capability to address up to 4 MB of SSRAM The IOC firmware also supports optional wide parity error detection This option is configurable and is specified as a serial EEPROM parameter The amount of SSRAM 1 MB determines the maximum number of outstandin
15. of a sophisticated firmware implementation Although optimised for use with a 64 bit PMC interface to communicate with the system CPU s and memory the IOC also supports a 32 bit PMC environment The system interface to the IOC is designed to minimize the amount of PMC bandwidth required to support I O requests A packetised message passing interface is used to reduce the number of single cycle PMC bus cycles All FC data traffic on the PMC bus occurs with zero wait bursts across the PMC bus The intelligent IOC architecture allows the system to specify l O commands at the command level The IOC manages I Os at the Frame Sequence and Exchange level Error detection and I O retries are also handled by the IOC allowing the system to offload part of the exception handling work from the system software driver Simple Auto Speed Negotiation Backward compatibility with 1 and 2 Gbps FC devices is maintained through the use of a Simple Auto Speed Negotiation Algorithm After a power on loss of signal or loss of word synchronization for longer than a certain amount of time the IOC will perform this operation to determine whether a point to point device or all the devices on a loop are either 1 2 or 4 Gbps capable devices Redundant Management The IOC supports two PMC functions and FC ports which improves performance and provides a redundant path in highly availability systems which require failover capabilities In case of a Link Failure the IOC arch
16. s Common Mezzanine Card Central Processing Unit Electrically Erasable Programmable Read Only Memory Electromagnetic Compatibility Enhanced Network Device Fibre Channel Fibre Channel Second Generation Arbitrated Loop Fibre Channel Protocol Gigabit per second Host Carrier Card Input Output Identification Interrupt 1 O Controller Internet Protocol Kilobit Lucent Connector Megabyte Megahertz Message Passing Interface nanometre Operating System Personal Computer Printed Circuit Board Peripheral Component Interconnect Peripheral Component Interconnect eXtended PCI Mezzanine Card Random Access Memory Read Only Memory Small Computer System Interface Small Form Factor Special Interest Group Synchronous Static Random Access Memory Transfer Control Protocol Transfer Control Protocol over Internet Protocol Vendor Product Data World Wide Name Intel x86 Architecture CCII FC 6 MAN 005 2009 01 19 P Fibrechn TECH MAN CFCMANO5 WPD Issue 1 0 Page 1 of 15 1 Scope 1 1 Identification This document is the technical reference and installation manual for the Cl Systems CCIl Dual 4 Gigabit per second Gbps Fibre Channel FC Peripheral Component Interconnect PCI Mezzanine Card PMC Adapter hereafter simply referred to as the FC PMC Adapter 1 2 System Overview The FC PMC Adapter is a high performance Dual 4 Gbps Fibre Channel PMC Adapter It offers a maximum link speed of 4 Gbps per c
17. structions Installation of the Adapter The installation of the CCII FC PMC Adapter will be illustrated in the following steps Note that the installation shown here was done on an arbitrary HCC to demonstrate the general steps for installing the Front Panel I O FC PMC Adapter During the installation process and handling of the FC PMC Adapter all relevant antistatic precautions should be observed to protect both the adapter as well as the HCC These include working on an antistatic workstation whilst being electrically grounded by means of an antistatic wristband ankle strap or similar device Step 1 Prepare the Host Carrier Card HCC Observe all relevant antistatic precautions and remove the HCC from it s antistatic bag and place on an antistatic workstation Please refer to the HCC s Hardware Installation Manual for any special care instructions relevant to that particular HCC Step 2 Install the Adapter onto Host Carrier Card Remove the FC PMC Adapter from the antistatic bag and ensure that the bezel and standoffs are properly secured and the elastic electromagnetic compatibility EMC gasket is installed on the bezel Proceed with the installation of the FC PMC Adapter as shown in Figure 5 ensuring that the female PMC connectors on the FC PMC Adapter align properly with the male PMC connectors on the HCC before pressing down on the adapter errr A Ad Figure 5 FC PMC Adapter Installation CCII FC 6 MAN 005 2009 01 19
18. tions PMC Connectors The FC PMC Adapter s three PMC connectors P11 P12 and P13 are identified in Figure 4 Please refer to the PMC Specification Par 2 2 2 for a more detailed description of the PMC pinouts The adapter is keyed for 3 3 V PMC I O signalling and should only be plugged into an HCC PMC slot that supports 3 3 V PMC I O signalling SFF Fibre Optic Transceivers The FC PMC Adapter incorporates two SFF Fibre Optic Transceivers for direct connection to the Fibre Channel LAN The FC PMC Adapter comes standard with two 850 nm Fibre Optic Transceivers SX part number for use with multi mode fibre optic media Single mode Fibre Optic Transceivers are also available on special request LX part number These transceivers accept standard LC style fibre optic connectors CCII FC 6 MAN 005 2009 01 19 Issue 1 0 P Fibrechn TECH MAN CFCMANO5 WPD Page 9 of 15 5 1 5 2 5 3 5 3 1 5 3 2 Hardware Installation This section will describe the procedure for installing the CCII FC PMC Adapter on an HCC The Adapter Kit The adapter kit consists of the following items Cardboard Package Antistatic Protective Bag The FC PMC Adapter A Paper Envelope containing an Installation Diskette PMC Fasteners and Standoffs This Installation Guide If any item is missing or damaged contact C2I Systems Please refer to the Release Notes on the diskette for the latest information regarding this product Handling In
19. vervieW ooo 2 2 Applicable and Reference Documents o o eee ee 3 2 1 Applicable Documents 3 sc4o0 oe od da we ee Ra pe bi A A ee y 3 2 2 Reference Documents 000 cece ee nent eens 3 3 Functional Description 000 Et Geeks i ten US Glen bles er Senos 4 3 1 Hardware Features tiacke a beet ae VG ene ark Ee gree PA Ree eee ee 4 3 2 Architecture aa e De A A ee ol Be Bek Rie Rie ea a aaa eae 4 A E es stat ES O tia aa taal eisai erates sen a a A 5 9 2 2 Senai EERROM stack ccnp E steak Mayet taal ea keh age Charen VTA VIO Cla eels ada 5 3 2 3 Embedded Process ica tse ir Goa Se ee DL ae eed ee Ds 5 3 24 SSRAM MEMON osc Sa ai okies Di ies SR ee eee Mae ee ee ae ee Bee Vas 6 320 Flash ROM Siei aaa sense et aie a teed Se Ee Pa Mi eed eae es 6 3 2 6 Small Form factor SFF Fibre Optic Transceivers 0 00 0 6 Se PACAS 3 s23 sa at al toes a ee ess eee Ra ee BE Gi wi Ae Ree Gn Bs 6 3 3 General Features Description 0 0 0c ct t eee 8 3 3 1 Simple Auto Speed Negotiation 0 tetas 8 3 3 2 Redundant Management 2 00 eens 8 3 3 3 DIAGNOSTICS cotas leases A AA ton a Pea wing it 8 3 3 4 gt Link Controllersicges faces wii tesla wie e Poe Se Pare sie is Gare pyle Bade 8 4 VO Interface Descnpuon asssast csbsesters cues ea bees pees ees ees 9 4 1 PMG GOnnecClors narede neia eann A 0 AAA AAA A AAA oe ha a 9 4 2 SFF Fibre Optic Transceivers eterna dads Shes tirar
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