56F8323
Contents
1. DE IOR IND 8 L 9NV A09 0 9 S SN 29 9 S SU AEE y ENV y SU 1012 a 2 MH lt o LNW z L ONY ver 9r D LHOd OId5 T cer o 6 A ADOTO 3 T g Z 091 OH IOS 3 1909 OId5 9 LASax OUI RIS ees B Ze D THNNVHO JAWIL Sy NYO os APER 9 P XL NVO y D Xd Nvo CO y n Xu NO WIX y D NLG En a S RE wa Ee s mx si z L ER vba rec l haa 004 z I EE ww 19599 z L youl Em er or TT 8 LHOd OId5 EH ACE 0L 6 Y THNNWHO NHWIL 2 E SCH 0V3SVHd Y g L 0g3svHd oi 9900290 ano TH IOS 04 Ids ang ma jo S 288 0 O3WNOH AEEY O 9 S AO S O 9 S ngero 9 s OS y OISOIN 03WOH H OX3ONI NEE O y 0ss H Tas ES EEN Q wavaa EE TT G main mi tz L USS RE 2 L asa ovasvHd 00SIW2 gt l L xax A 088 a l I son i a DR nu Sr V Laod OId5 EH E WWMd vo el vo el zvsl SL h vS ER z 1 Hive 2 neet Twa D GEI majo 6 DE EW IW IK ras TES 6 See zy Lins Dm 3 E 1 e De Im 8 L sur SS ee Zur mal um zuel mm Svid emmi assa p eme SI oa eva L zwa OVWMd evwMd K 1SS z mms 2 ig oa So lost ewa_ 7 ISS tW OVINMd wd ovd TOSIN TISOW TWA ovd Str Sir oF 3 a 5 a Y Preliminary Freescale Semiconductor MC56F8323EVM User Manual Rev 2 Appendix A 8 S10j29uuo2 pied 1ajyBneg gv ni2. J18 Pin Signal Pin Signal 1 PBO SSO 2 PB1 MISOO 3 PB2 MOSIO 4 PB3 SCLKO 5 PB4 HOMEO 6 PB5 INDEXO 7 PB6 PHASEBO 8 PB7 PHASEAO 9 GND 10 3 3V 2 12 12 GPIO Port C Expansion Connector The GPIO port C is attached to this connector Refer to Table 2 25 for connection information Table 2 25 GPIO Port C Connector Description J19 Pin Signal Pin Signal 1 PCO EXTAL 2 PC1 XTAL 3 PC2 CAN RX 4 PC3 CAN TX 5 PC4 TC3 6 PCB TC1 7 PC6 TCO 8 NC 9 GND 10 3 3V Technical Summary Rev 2 Freescale Semiconductor 2 29 Preliminary 2 12 13 IRQA RESET CLOCK Expansion Connector The IRQA RESET CLOCK signals are attached to this connector Refer to Table 2 26 for connection information Table 2 26 IRQA RESET CLOCK Connector Description J11 Pin Signal Pin Signal 1 IRQA 2 RESET 3 EXTAL PCO 4 XTAL PC1 9 GND 10 3 3V 2 13 Test Points The 56F8323EVM board has a total of eleven test points Analog Ground AGND TP4 Four Digital Grounds GND TP1 TP2 TP3 amp TP10 Two 3 3V TP6 amp TP11 3 3VA TPS Two 5 0V TP7 amp TP8 12V TP9 MC56F8323EVM User Manual Rev 2 2 30 Freescale Semiconductor Preliminary Appendix A 56F8323EVM Schematics 56F8323EVM Schematics Rev 2 Freescale Semiconductor Appendix A 1 Preliminar
3. Power On E 3 3V Regulator 3 3VA DC 56F8323 ADCA U15 R67 gt 100 3 0V 3 0VA DC l 56F8323 Regulator VREFH Figure 2 7 Schematic Diagram of the Power Supply Technical Summary Rev 2 Freescale Semiconductor 2 13 Preliminary 2 7 Daughter Card Connectors The EVM board contains two daughter card expansion connectors One connector J1 contains the processor s peripheral port signals The second connector J2 contains addional power and ground signals 2 7 1 Peripheral Daughter Card Expansion Connector The processor s peripheral port signals are connected to the Peripheral Daughter Card Expansion connector J1 The Peripheral Daughter Card connector is used to connect a user specific daughter card to the processor s peripheral port signals The Peripheral Port Daughter Card connector is a 100 pin high density connector with signals for the IRQs RESET SPI SCI PWM ADC and Quad Timer ports Table 2 9 shows the Peripheral Daughter Card connector s signal to pin assignments Table 2 9 Peripheral Daughter Card Connector Description J1 Pin Signal Pin Signal 1 12V 2 12V 3 GND 4 GND 5 5 0V 6 5 0V 7 GND 8 GND 9 3 3V 10 3 3V 11 GND 12 GND 13 NC 14 NC 15 NC 16 NC 17 GND 18 GND 19 PHASEAO PB7 TAO 20 PHASEBO PB6 TA1 21 INDEXO PB5 TA2 22 HOMEO PB4 TA3 23 TCO 24 sso 25 TCO 26 sso 27 TC1
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5. Figure 2 10 CAN Interface Table 2 12 CAN Signal Isolation Jumper Options JG15 Pin Signal Pin Signal 1 CAN_TX 2 CAN TX to CAN Transceiver 3 CAN_RX 4 CAN_RX from CAN Transceiver Technical Summary Rev 2 Freescale Semiconductor 2 21 Preliminary Table 2 13 CAN Header Description J12 and J13 Pin Signal Pin Signal 1 NC 2 NC 3 CANL 4 CANH 5 GND 6 NC 7 NC 8 NC 9 NC 10 NC 2 11 Software Feature Jumpers The 56F8323EVM board contains two software feature jumpers that allow the user to select user defined software features Two GPIO port pins PB3 and PBO are pulled high or low with 10K ohm resistors on JG7 and JG8 respectively Attaching a jumper between pins 1 and 2 will place a high or 1 on the port pin Attaching a jumper between pins 2 and 3 will place a low or 0 on the port pin see Figure 2 11 56F8323 User Jumper 0 SCLKO PB3 User Jumper SS0 PBO 4 1 Figure 2 11 Software Feature Jumpers MC56F8323EVM User Manual Rev 2 2 22 Freescale Semiconductor Preliminary 2 12 Peripheral Expansion Connectors The EVM board contains a group of Peripheral Expansion Connectors used to gain access to the resources of the 56F8323 The following signal groups have expansion connectors PWM Port A Serial Peripheral Interface Port 0 S
6. MC56F8323EVM User Manual Rev 2 Freescale Semiconductor Appendix A 6 Preliminary sq31 6nq q Joen 9 v inBijJ 3 a I El bi el JO 9 joous uBised OdSd ueuBiseg COOC z Aew Aepuon a eq v a t JequunwN ezi NY NSQ INAgECE849SOIA juouinood IS sadiongsaadsasn ont OLSZ ELV 08h xv4 060S 8LF 08p ve9csg euozuy eduie peoy olla 1583 00LZ UOISIAIG sjonpo4gd pJepuejs dsa VIOHO LONW Wy gt x 031N3389 oo Le 472 ozz qu 9H Sod 32N Le 472 Ma 09T MOTIAN LY d31d33 SCH I AASA 02c lt KOL OT LL vod SH ain 022 Le 472 azn Le 472 gt gt aJI NIJA 20 EH Le 472 gt wu aa MOTIAN LY ag Gay AC E lt f X NWO 34N 022 lt TY LX P Tod TH azn Le 472 vin 56F8323EVM Schematics Rev 2 Appendix A 7 Freescale Semiconductor Preliminary SJ0j29uuo uoisuedx3 uod V 91n614 3 S n EL jo 2 jeeus ubiseq OdSQ Jeufiseq 00z z Aew Aepuoyy ajeg a eH NSQ INA3 CE839SOIN JSQUINN ezis jueunooq SHOLO3NNOO NOISNVdX3 LHOd dSaA ont 0LSZ E LE 081 XVA 0609 l p 09v uy ad Tus wIOHOLON Vy UOISIAIQ Sjonpo4qd piepuejs deg V Laod q v HAIYAN O 0 6
7. 56F8323 Evaluation Module User Manual 56F8300 16 bit Digital Signal Controllers MC56F8323EVMUM Rev 2 07 2005 freescale com NA freescale semiconductor Ya Document Revision History Version History Description of Change Rev 1 0 Initial Public Release Rev 2 0 Updated look and feel TABLE OF CONTENTS Preface Preface vii Chapter 1 Introduction 1 1 Bb SN NI Architecitire AA 1 2 56F8323EVM Configuration Jumpers 1 3 56F8323EVM C et EEN Chapter 2 Technical Summary KA NEE 22 RS 232 Serial Communications tes sde KA e E A EE EE K La CIA AA E EE A E T E E E ET 2 3 2 Parallel JTAG Interface Connector 2a EE TEE dk A Eege eege 0 ANI eege eg rai eb 2 Daughter Card Connectors AAA FAM Peripheral Daughter Card Expansion Connector 2 1 2 Memory Daughter Card Expansion Connector 2 8 Serial 10 bit 4 channel D A Converter Optional 29 Motor Control PWM SignalsandLEDs Set CAN 000 0 rc rU Z T Software Feature JU EE EE EE LIIS Peripheral Expansion ON AMM 2121 PWM Port A Expansion Connector 2 122 Serial Peripheral Interface 0 Expansion Connector 2 12 3 Serial Peripheral Interface 1 Expansion Connector
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9. e cor bly L1 ZHINOO 8 Wi LA 56F8323EVM Schematics Rev 2 Appendix A 3 Freescale Semiconductor Preliminary S10 98UU09 DS pue ZeZ SM V eJnDi4 Preliminary 9 V JO 1 us ubiseq Odsa euBiseq 00c z en Aepuou ayeq S NSQ WA3EZ2 8J9SOlIN JOHN AL jueuunoo Toes ME SHOIO3NNOOI OS GNV ZEZ SH 9WML K PTY VAS OLSZ ELV 08t XVd4 O60S ELv 08p seu Nivel 182798 euozuy eduie c emite V TOHO LOIN E ss Freescale Semiconductor MC56F8323EVM User Manual Rev 2 UOISIAIG SJONPOld p epuejs dsa A Li L Zou NIEL EI ON Ost N3 ag e gt EE amavsia Cer em L ror o sava ZEZ SU IV33SvZEXVW AO LOANNOD VAN 14039404 YIANINF NMMOGLNHS ZEZ SH ZK ZM NO9401 NISH 1noss T IOS E Tnors ES SLO SLY NICH 1noeu T z MEN inozu LA S19 L Slo El ISLA NILH ANOI Let Kren ara 8Lnoz8 HL SLA axa m noe NIEL ver So 1NOZL NIZL Ley Tore ve SS ee oa LNOLL NILL Let Te Z L 0SS qoa 5 sor L jno ECH v ve y ne ano zeo O Ag e a a 9 9 Y Appendix A 4 193191409 y q euueyD p jenas Bngag p y anfia El a I 5 iu EL jo v 1jeeus ubiseq OdSd ueubiseg 00z z Aew Aepuow e 3 H NSQ INA3EZE82H9SOIN Teens ezis H3LHSANOO V d THNNVHO v 1VINIS ONIA G n OLSZ ELV 08t xv4 060S 8LF 08p ve9csg euozuy ed
10. S19 14 Indu a y LL V eunBi4 a 9 LL EL jo LL jeeus ubiseq OdSd ueuBiseg 00z z Aen Aepuon eyeq Vv eH JequunwN ezis jueuinooq NO WA Oo SOL UNI ON ent OLGz Lv 08t Xv4 060S 8LPF 087 v9ccg euozuy eduie L peo 101113 1562 00LZ UOISIAIG sjonpoag PAEPUEIS dsa VIOHO LON Wy qutod yaN9 uouuoo oua 07 sTeuBts VAND 107 2213 aTSUuTs e sn HALON A 3nZZz00 0 jnzzooo 999 SSO 00L 00 VNV CC lt lt NV VNV lt lt lt lt 99H 999 A anzz00 0 3022000 v99 zt 001 00 9vNv lt lt e lt lt 9NV zvNv lt lt lt vou 9H aX 4NZZ00 0 322000 290 199 00L 00 SVNV lt lt lt lt SNY LVNV lt lt lt zou Lou A jnzz0o o jnzzooo 099 6v9 00L 00 Fv lt lt lt lt FNY ovnv lt lt lt 09H 683 ENV NV LNY ONY MC56F8323EVM User Manual Rev 2 Freescale Semiconductor Appendix A 12 Preliminary saljddng 1amog ZL V anbi4 3 a E 8 V P
11. 1 Flow Control Header Options JG13 Pin Signal 1 RTS to Transceiver 2 CTS from Transceiver MC56F8323EVM User Manual Rev 2 2 4 Freescale Semiconductor Preliminary Table 2 2 SCI1 Jumper Options RS 232 Serial Communications JG5 Pin Signal Pin Signal 1 TXD1 2 TXD to RS 232 Transceiver 3 RXD1 4 RXD from RS 232 Transceiver Table 2 3 RS 232 Serial Connector Description P2 Pin Signal Pin Signal 1 Jumper to 6 amp 4 6 Jumper to 1 amp 4 2 TXD 7 CTS 3 RXD 8 RTS 4 Jumper to 1 amp 6 9 NC 5 GND The 56F8323EVM uses on chip 8 00MHz relaxation oscillator or the on board 8 00MHZ crystal Y1 connected to its External Crystal Inputs EXTAL and XTAL To achieve its maximum internal operating frequency the 56F8323 uses its internal PLL to multiply this input clock frequency Additionally an external oscillator source can be connected to the device by using the oscillator bypass connectors JG1 and JG2 see Figure 2 2 If the input frequency is above 8MHz then the EXTAL input should be jumpered to ground by adding a jumper between JG1 pins 2 and 3 The input frequency would then be injected on JG2 s pin 2 If the input frequency is below 4MHz then the input frequency can be injected on JG1 s pin 2 Technical Summary Rev 2 Freescale Semiconductor Preliminary 2 5 EXTERNAL O L 8 00MHz SCILLATOR HEADERS
12. 11 LEA Header Description asado R 6 K REO EC E o eO Ach dates 2 19 2 12 CAN Signal Isolation Jumper Options 2 21 2 13 CAN Header LESOTO Ate gett KC 2 22 2 14 PWM Port Connector Description 2 23 2 15 SPI 0 Connector Description SEENEN EA LS 2 24 2 16 SPI 41 Connector Description idu A 2 24 2 17 SCI F0 Connector AA 2 25 2 18 SCIFI Connector AAA 2 25 2 19 Timer A Signal Connector Description i2 ever ER E TES se oes 2 26 2 20 Timer Channel C Connector Description error retar ces 2 26 2 21 LAN Connector DOS BO e sora dE AAA 2 27 2 22 A D Port A Conector Description 9205005000 ERA AER Sg 2 27 2 23 GPIO Port A Connector Description 2 28 2 24 GPIO Port B Connector Description 2 29 2 25 GPIO Port C Connector Description cari 2 29 2 26 IRQA RESET CLOCK Connector Description 2 30 List of Tables Rev 2 Freescale Semiconductor V Preliminary MC56F8323EVM User Manual Rev 2 vi Freescale Semiconductor Preliminary Preface This reference manual describes in detail the hardware on the 56F8323 Evaluation Module Audience This document is intended for application developers who are creating software for devices using the Freescale 56F8323 part Organization This manual is organized into two chapters and two appendixes Chapter 1 Introduction provides an ove
13. 2 12 6 Encoder 0 Quad Timer Channel A Expansion Connector The Encoder 0 Quad Timer Channel A port is an MPIO port attached to the Timer A expansion connector This port can be configured as a Quadrature Decoder interface port as a Quad Timer port or as GPIO Refer to Table 2 19 for the signals attached to the connector Table 2 19 Timer A Signal Connector Description J7 Pin Signal Pin Signal 1 PHASEAO TAO PB7 2 PHASEBO TA1 PB6 3 INDEXO TA2 PB5 4 HOMEO TA3 PB4 5 GND 6 3 3V 2 12 7 Timer Channel C Expansion Connector The Timer Channel C port is an MPIO port attached to the Timer C expansion connector This port can be configured as a Quad Timer Interface as SCIO signals or as GPIO Refer to Table 2 20 for the signals attached to the connector Table 2 20 Timer Channel C Connector Description J9 Pin Signal Pin Signal 1 TCO TXDO PC6 2 TC1 RXDO TC5 3 GND 4 TC3 PC4 MC56F8323EVM User Manual Rev 2 2 26 Freescale Semiconductor Preliminary Peripheral Expansion Connectors 2 12 8 FlexCAN Expansion Connector The FlexCAN port is an MPIO port attached to the FlexCAN expansion connector This port can be configured as a FlexCAN Interface or as GPIO Refer to Table 2 21 for connection information Table 2 21 CAN Connector Description J10 Pin Signal Pin Signal 1 CAN TX PC3 2 GND 3 CAN RX PC2
14. Request To Send RTS Preface x Resistor Capacitor Network R C Preface x RS 232 2 1 level converter 2 4 schematic diagram 2 4 RTS Preface x S SCI Preface x SCI MPIO compatible peripheral 2 2 Serial Communications Interface SCI Preface x Serial Peripheral Interface SPI Preface x SPI Preface x SPI MPIO compatible peripheral 2 2 SRAM Preface x Static Random Access Memory SRAM Preface x T Timer compatible peripheral 2 2 U UART Preface x Universal Asynchronous Receiver Transmitter UART Preface x W Wait State WS Preface x WS Preface x MC56F8323EVM User Manual Rev 2 Index ii Freescale Semiconductor Preliminary How to Reach Us Home Page www freescale com E mail support freescale com USA Europe or Locations Not Listed Freescale Semiconductor Technical Information Center CH370 1300 N Alma School Road Chandler Arizona 85224 1 800 521 6274 or 1 480 768 2130 support freescale com Europe Middle East and Africa Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen Germany 44 1296 380 456 English 46 8 52200080 English 49 89 92103 559 German 33 1 69 35 48 48 French support freescale com Japan Freescale Semiconductor Japan Ltd Headquarters ARCO Tower 15F 1 8 1 Shimo Meguro Meguro ku Tokyo 153 0064 Japan 0120 191014 or 81 3 5437 9125 support japan freescale com Asia Pacific Freescale Semiconductor Hong Kong
15. not populated on board by default NC JG10 CAN bus termination selected 1 2 JG11 Connect Analog Ground to Digital Ground NC JG12 Enable on chip regulator 1 2 JG13 Pass RTS to CTS 1 2 JG14 Select 3 3V operation of on board Parallel JTAG Host Target Interface 1 2 JG15 Pass CAN_TX 8 CAN_RX signals to CAN tranceiver 1 2 8 3 4 MC56F8323EVM User Manual Rev 2 Freescale Semiconductor Preliminary 56F8323EVM Connections 1 3 56F8323EVM Connections An interconnection diagram is shown in Figure 1 3 for connecting the PC and the external 12 0V DC AC power supply to the 56F8323EVM board Parallel Extension Cable 56F8323EVM PC i Connect cable P3 to Parallel Printer port External with 2 1mm 12V receptacle Power connector Figure 1 3 Connecting the 56F8323EVM Cables Perform the following steps to connect the 56F8323EVM cables 1 Connect the parallel extension cable to the Parallel port of the host computer 2 Connect the other end of the parallel extension cable to P1 shown in Figure 1 3 on the 56F8323EVM board This connection allows the host computer to control the board 3 Make sure that the external 12V DC 1 2A power supply is not plugged into a 120V AC power source 4 Connect the 2 1mm output power plug from the external power supply into P3 shown in Figure 1 3 on the 56F8323EVM board 5 Apply power to the external power supply The green Power On
16. technical experts Freescale Semiconductor does not convey any license under its patent rights nor the rights of others Freescale Semiconductor products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur Should Buyer purchase or use Freescale Semiconductor products for any such unintended or unauthorized application Buyer shall indemnify and hold Freescale Semiconductor and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part lt La Z freescale semiconductor Freescale and the Freescale logo are trademarks of Freescale Semiconductor Inc All other product or service names are the property of their respective owners This product incorporates SuperFlash technology licensed from SST O Freescale Semiconductor Inc 2005 All rights reserved MC56F8323EVMUM Rev 2 07 2005
17. y zr E S BRNS Dr 3 a 9 g v Appendix A 9 56F8323EVM Schematics Rev 2 Freescale Semiconductor Preliminary 998J193U41 NVI peeds uBiH 6 V eJnBiJ Jo 6 Sous ubiseq OdSd ueuBiseg 002 gz eunr Aepines ejeq NSQ INA3E ZE8H9SOIN JequunN ju uinooq JOVIHILNI NYO G33dS HOIH em OLSZ ELV 08t xv4 O60S ELv Ogp ve9csg euozuy eduie peoy 101113 1962 00LC UOISIAIG sjonpoag p4epueJjs dsd W IOHO LOIA E INVO8 E MEI L e I x or 6 Lac x OL 6 x x 8 Lx x8 Lp x19 S 49 S ANVOE 4 T INVO8 ANVOS r INVO8 NOLLVNIWHZI c gt z L L xz L Lac sna NWO y HNVO8 ST TIT over YJOLOHNN na NY SEES OD 5 2 AOLOANNOD SNE NYD NIVHO ASIVG STE Loszozevod Ir QNO 3do1s AAN ma T INVO AN HNVO8 AA HNVO 109198 NV a J3HA XY ve 22M NYO DOA QXL Z L amp XL NYO stor Q AO S Je AO 8 3 a 9 a i MC56F8323EVM User Manual Rev 2 Freescale Semiconductor Appendix A 10 Preliminary 10 JaUU0 Ig LP pue a9eJ1a3u 396181 sOH TW LP JejeJed OL v 21nB14 3 a el Jo OL AS ubiseg OdSQ Jeufiseq LL 002 oz eunr epu4 ejeq 8 KE NSQ INA3 CE8J9SOlIN JequnN azis jueuinooq HOLO3NNOO CU ANY 3OVJH3LINI LH398VL LSOH Ov LP THTIVHVd oul 0LSZ E LE 095 xv3 060S LF 087 y8ZS8 euozuy odue 1 peoy 10113 1se3 001Z UOJSIAIG s
18. 2 12 4 Serial Communications Port 0 Expansion Connector 2 12 5 Serial Communications Port 1 Expansion Connector 2 12 6 Encoder 0 Quad Timer Channel A Expansion Connector 2 12 7 Timer Channel C Expansion Connector 2 12 8 FIXLAN Expansion Connector ie AEN tiin ATRAS REDERNE e ha 129 A D Port A Expansion COME s were ede OCC C Eee d Table of Contents Rev 2 Freescale Semiconductor Preliminary 24210 GPIO Port A Expansion Connector d AE R ARA 2 28 2421 GPIO Port B Expansion Connector ANA AC i rd REN AE A Edd 2 29 21212 GPIO Pont C Expansion CNE EE 2 29 2 12 13 IRQA RESET CLOCK Expansion Connector 2 30 PIER ele eege dt A Sah ENEE d EXPERIRI HD ERA EP ne pusaq 2 30 Appendix A 56F8323EVM Schematics Appendix B 56F8323EVM Bill of Material MC56F8323EVM User Manual Rev 2 ii Freescale Semiconductor Preliminary 1 1 1 2 1 3 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 2 10 2 11 2 12 LIST OF FIGURES Block Diagram of the 56F8323EVM 1 2 EA AMS 1 3 Connecting the S6P 63238 Mt Cables ci ves chews E E ENER 1 5 Schematic Diagram of the RS 232 Inter a asss ya A SE 2 4 Schematic Diagram of the Clock Interface 2 6 Schematic Diagram of the Debug LED Interface 2 7 Bl
19. 26 R28 R30 R32 R34 R37 SMEC RC73L2A103OHMJT 56F8323EVM Bill of Material Rev 2 Freescale Semiconductor Preliminary Appendix B 1 Qty Description Ref Designators Vendor Part Resistors Continued 1 120 Q 1 4W R38 YAGEO CFR 120QBK 7 5 1K Q R41 R47 SMEC RC73L2A5120HMJT 13 00 R51 R55 R68 R69 R75 R80 SMEC RC73JP2A 2 510 R56 R57 SMEC RC73L2A510HMJT 0 5 1K Q R58 Optional SMEC RC73L2A5120HMJT 8 100 Q R59 R66 SMEC RC73L2A1010HMJT 0 00 R67 R70 R73 Optional SMEC RC73JP2A 0 1K O R82 Optional SMEC RC73L2A1030HMJT Potentioneters 0 1K O R48 Optional BC MEPCOPAL ST4B102CT Inductors 1 CAN Bus Filter L1 EPCOS B82790 S0513 N201 5 1 0mH FERRITE BEAD L2 L6 Panasonic EXC ELSA35V LEDs 2 Red LED LED1 LED4 Hewlett Packard HSMS C650 5 Yellow LED LED2 LED5 LED7 LEDS9 LED11 Hewlett Packard HSMY C650 6 Green LED LED3 LED6 LED8 LED10 LED12 LED13 Hewlett Packard HSMG C650 Diode 1 50V 1A BRIDGE RECT D1 DIODES DF02S 1 S2B FM401 D2 Vishay DL4001DICT 0 S2B FM401 D3 amp D4 Optional Vishay DL4001DICT Capacitors 4 2 2uF 25V DC C1 C4 TAIYO YUDEN CELMK212BJ225MG T Low ESR 29 0 1uF C5 C31 C57 C58 SMEC MCCE104K2NR T1 4 1 0uF 25V DC C32 C35 SMEC MCCE105K3NR T1 MC56F8323EVM User Manual Rev 2 Appendix B 2 Freescale Semicon
20. 28 MISOO MC56F8323EVM User Manual Rev 2 2 14 Freescale Semiconductor Preliminary Table 2 9 Peripheral Daughter Card Connector Description Continued J1 Pin Signal Pin Signal 29 IRQA 30 NC 31 TC1 32 TC3 33 PWMAO 34 PWMA1 35 PWMA2 36 PWMA3 37 PWMA4 38 PWMA5 39 GND 40 GND 41 ISAO 42 ISA1 43 ISA2 44 GND 45 FAULTA1 46 FAULTAO 47 NC 48 FAULTA2 49 GND 50 GND 51 NC 52 MISOO 53 NC 54 NC 55 NC 56 NC 57 GND 58 GND 59 NC 60 NC 61 NC 62 sso 63 NC 64 NC 65 NC 66 NC 67 MOSIO 68 sso 69 TCO 70 TC1 71 SCLKO 72 TCO 73 CAN TX 74 CAN RX 75 MOSIO 76 MISOO 77 SCLKO 78 sso Technical Summary Rev 2 Daughter Card Connectors Freescale Semiconductor Preliminary Table 2 9 Peripheral Daughter Card Connector Description Continued J1 Pin Signal Pin Signal 79 GND 80 GND 81 VREFH 82 VREFH 83 GNDA 84 GNDA 85 NC 86 NC 87 NC 88 NC 89 NC 90 NC 91 NC 92 NC 93 ANO 94 AN1 95 AN2 96 AN3 97 AN4 98 AN5 99 AN6 100 AN7 MC56F8323EVM User Manual Rev 2 Freescale Semiconductor Preliminary 2 7 2 Memory Daughter Card Expansion Connector Daughter Card Connectors Additional power and ground signals are connected to the Memory Daughter Card Expansion connector J2 Table 2 10 shows the port signal to pin assignments Table 2 10 Memory Daughter C
21. 4 GND 2 12 9 A D Port A Expansion Connector The 8 channel Analog to Digital conversion port A is attached to this connector Refer to Table 2 22 for connection information There is an RC network on each of the Analog Port A input signals see Figure 2 12 Table 2 22 A D Port A Connector Description J6 Pin Signal Pin Signal 1 ANO 2 AN1 3 AN2 4 AN3 5 AN4 6 AN5 7 AN6 8 AN7 9 GNDA 10 VREFH Technical Summary Rev 2 Freescale Semiconductor 2 27 Preliminary 2 12 10 GPIO Port A Expansion Connector 100 ohm Analog Input gt To Controller Analog Port 0 00224F Figure 2 12 Typical Analog Input RC Filter The GPIO port A is attached to this connector Refer to Table 2 23 for connection information Table 2 23 GPIO Port A Connector Description J16 Pin Signal Pin Signal 1 PAO PWMAO 2 DAT PWMA1 3 PA2 PWMA2 SST 4 PA3 MISO1 PWMA3 5 PA4 PWMA4 MOSI1 6 PAS SCLK1 PWMA5 7 PAG FAULTAO 8 PA7 FAULTA1 9 PA8 FAULTA2 10 PAQ ISAO 11 PA10 ISA1 12 PA11 1SA2 13 GND 14 3 3V MC56F8323EVM User Manual Rev 2 2 28 Freescale Semiconductor Preliminary Peripheral Expansion Connectors 2 12 11 GPIO Port B Expansion Connector The GPIO port B is attached to this connector Refer to Table 2 24 for connection information Table 2 24 GPIO Port B Connector Description
22. EXVN TSTSXVN 0S22c8VNO 6n orn en sn 8n Dr m cx E EE EE E ED EE I I I anro Le ano le amoo L7 amoo gt amoo Le amo WE ano L ano Ar no SE 1 819 no 6 0 8 0 LE9 919 s19 Le eLo I I 4 4 4 I 9 e I vA e Acer t cCt849SON In MC56F8323EVM User Manual Rev 2 Freescale Semiconductor Appendix A 14 Preliminary Appendix B 56F8323EVM Bill of Material Qty Description Ref Designators Vendor Part Integrated Circuits 1 MC56F8323 U1 Freescale Semiconductor MC56F8323VFB60 0 Power On Reset U2 Optional Dallas Semiconductor DS1818 1 RS 232 Transceiver U3 Maxim MAX3245EEAI 0 SPI 4 Channel D A U5 Optional Maxim MAX5251BEAP R74 R81 2 74AC04 U6 U7 ON Semiconductor MC74AC04AD 1 CAN Transceiver U8 Philips Semiconductor PCA82C250T 1 74HC244 U9 ON Semiconductor MC74LHC44AADW 1 74LCX244 U10 ON Semiconductor MC74LCX244ADW 1 74AC00 U11 Fairchild 7Z4ACO0SC 1 5 0V Voltage Regulator U12 ON Semiconductor MC33269DT 5 2 3 3V Voltage Regulator U13 U14 ON Semiconductor MC33269DT 3 3 1 3 0V Voltage Regulator U15 Burr Brown REG113NA 3 3K Resistors 13 2700 R1 R13 SMEC RC73L2A2710HMJT 1 IMQ R14 SMEC RC73L2A1050HMJT 8 47KQ R15 R22 SMEC RC73L2A4730HMJT 4 10K Q R23 R24 R25 R27 SMEC RC73L2A1030HMJT 11 1K O R
23. Gan 0v3svHd 18d 0v L 0v Hd 13938 13S34 VONJI BIS v LTD 3 LIU S u wyo O wyo O bv Lins 97 arvin ZOd XH NvO our NWO A A OVLINVA 9Vd OVLINVA Od XL NYO XL NYO EE EL Y Y ZdVO TN Or GGA G EL Lvarevsi z9 Leet gt ri OLVA LVSI vOd EDL yy 91 OVSI Gr vd Ovsl SOd OCXS LO L 59 S LOL v wyo 0 wyo 0 SYNMd or SVd LHTOSISVNMA 9000X1001 FF SS 091 A A Baie vVdlHSOW TVIAMd SN ozy SAS ag 9 GGA VINMd S evd LOSIW EVWMd Ogd LQX L OSS r4 oss ZVNMd ZWd LSS ZWWMd Caas gg S 09108 gt Lee Lvd LVWMd zad oisow 9 oisow 91090 0A NESA OVINMd Ovd OvVIAMd Lad L AXH 0OSIN amp 0OSIIN in MC56F8323EVM User Manual Rev 2 Appendix A 2 OUI 9 H2019 Josey z V inBij 3 I g 9 EL jo Z jeeus ubiseq OdSd euBbiseg e00z CL Aew epuon ayeq LL V Jequun Aen NSQ AASEZE8d9SOW stool IS OJI 2 Y00790 LSSSY am OLSZ ELV 08t xv4 0609 Lt 087 vr9ccg euozuy eduie L peoy 101113 18587 O0LC UOISIAIG SIINMPOIG PIEPUEIS 4S VIOHO LONWN wy z T rere H VDUI lt lt zs MOL NOLINAHSNA WONT LGE AE E 8cx Tit 3edunp L KEE iesn Ser yu 328 SaHdWwnl HANLVHH HAVMLIOS A DCH OH S 3edunp i Es KANTOS MOL SzH A E NE TOOIdD s HOd lt C IVNOIlLdO NOLLNIHSAd LASHA o o EE L MOL ECH AE Ex
24. LED LED13 will illuminate when power is correctly applied Introduction Rev 2 Freescale Semiconductor 1 5 Preliminary MC56F8323EVM User Manual Rev 2 Freescale Semiconductor Preliminary Chapter 2 Technical Summary The 56F8323EVM is designed as a versatile Flash based microcontroller development card for developing real time software and hardware products to support a new generation of applications in servo and motor control digital and wireless messaging digital answering machines feature phones modems and digital cameras The power of the 16 bit 56F8323 combined with the on board RS 232 interface CAN interface Daughter Card Expansion interface and parallel JTAG interface makes the 56F8323EVM ideal for developing and implementing many motor controlling algorithms as well as for learning the architecture and instruction set of the 56F8323 processor The main features of the 56F8323EVM with board and schematic reference designators include MC56F8323 a 16 bit 3 3V 2 5V processor in a 64 pin LQFP package operating at 60MHz U1 8 00MHz crystal oscillator for processor frequency generation Y1 Optional external oscillator frequency input connectors JG1 and JG2 Joint Test Action Group JTAG port interface connector for an external debug Host Target Interface J3 On board Parallel JTAG Host Target Interface with a connector for a PC printer port cable P1 including a disable jumper JG3 On board P
25. Lord uo ES ES OdAS Z eptaozd aen OL HLON T T Gs E 7 M EE E ant Ll 0 S L0692 9 INANI Sa pes PEK T avag 2118833 re EE exooaan t AAA ie Sir 019 evo E en Teuzoaxa dH I dood HHMOd a 1NOA NIA r ozz e10900A ely A0 Sr an ra hoor CS e AO S gt fd za OV OG ACT L LAdNI WHMOd IVNHHLXH 3 a 5 a Y Appendix A 13 56F8323EVM Schematics Rev 2 Freescale Semiconductor Preliminary sioyioedey ssed g L v ainbi4 3 a EL jo EL Iesus ubiseq OdSQ euBiseq 00z oz eunr Aepu4 eyeg a N NSQ WNA3ECE8H9SOIN JequnN ezis ey jueuinooq SHOllovdVO SSVvdAgd ML 0LSZ E LE 097 xv3 060S LF 08 y8ZS8 euozuy odue 1 peoy 10113 1se3 00LZ UOJSIAIG s 9npoid pepuejs dS V IOHO LOIW Ww POOL LA ARA 9n 0020VTL TIN 14000 Ste anro Le anro Ha 659 859 SO HOLOSNNOO AJONHAN HOIOSNNOO Gd V Lano Ste anro 069 679 I H338A Acl PA AS ye A HOLOSNNOO IVeHdHdI Mdd ec 9r TL re EN tee AA n Ee I I I I I I i I i I i I I I I pinio o I ano I anro ano SL ayo L ano I j oro j 29 Ji eco az 079 9 l I I l I l l I l I I l I l 9 a I I i eh AES I Acts I I gie AE i nose I I I I I AR Espero APR Ee E YVCOHVL YVCXO IVL SYT
26. Ltd Technical Information Center 2 Dai King Street Tai Po Industrial Estate Tai Po N T Hong Kong 800 2666 8080 support asia freescale com For Literature Requests Only Freescale Semiconductor Literature Distribution Center P O Box 5405 Denver Colorado 80217 1 800 441 2447 or 303 675 2140 Fax 303 675 2150 LDCForFreescaleSemiconductor hibbertgroup com Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document Freescale Semiconductor reserves the right to make changes without further notice to any products herein Freescale Semiconductor makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation consequential or incidental damages Typical parameters that may be provided in Freescale Semiconductor data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating parameters including Typicals must be validated for each customer application by customer s
27. Package Multi Purpose Input and Output port on Freescale s family of controllers shares package pins with other peripherals on the chip and can function as a GPIO Preface Rev 2 Freescale Semiconductor Preliminary OnCE PCB PLL PWM Quad Dec RAM R C SRAM RTS SCI SPI UART WS Refere On Chip Emulation a debug bus and port created by Freescale to allow a means for low cost hardware which provides a professional quality debug environment Printed Circuit Board Phase Locked Loop Pulse Width Modulation Quadrature Decoder a peripheral on the 56F8323 part Random Access Memory Resistor Capacitor Network Static Random Access Memory Request to Send Serial Communications Interface a peripherial on Freescale s family of controllers Serial Peripheral Interface a peripheral on Freescale s family of controllers Universal Asynchronous Receiver Transmitter Wait State nces The following sources were referenced to produce this manual 1 2 3 4 5 DSP56800E Reference Manual DSP56800ERM Freescale Semiconductor 56F8300 Peripheral User Manual MC56F8300UM Freescale Semiconductor 56F8323 Technical Data MC56F8323 Freescale Semiconductor CiA Draft Recommendation DR 303 1 Cabling and Connector Pin Assignment Version 1 0 CAN in Automation CAN Specification 2 0B BOSCH or CAN in Automation MC56F8323EVM User Manual Rev 2 Freescale Semiconductor Preliminary Chapter 1 Intro
28. S6F8323 Figure 2 2 Schematic Diagram of the Clock Interface Six on board Light Emitting Diodes LEDs are provided to allow real time debugging for user programs These LEDs will allow the programmer to monitor program execution without having to stop the program during debugging refer to Figure 2 3 Table 2 4 describes the control of each LED Table 2 4 LED Control Controlled by User LED Color Signal LED1 RED GPIO Port C Bit 0 LED2 YELLOW GPIO Port C Bit 1 LED3 GREEN GPIO Port C Bit 2 LED4 RED GPIO Port C Bit 3 LED5 YELLOW GPIO Port C Bit 4 LED6 GREEN GPIO Port C Bit 5 MC56F8323EVM User Manual Rev 2 2 6 Freescale Semiconductor Preliminary RS 232 Serial Communications Setting PCO PCI PC2 PC3 PC4 or PCS to a Logic One value will turn on the associated LED 56F8323 INVERTING BUFFER 3 3V RED LED uN YELLOW LED AN GREEN LED e RED LED RA YELLOW LED sud 0 GREEN LED SRV Figure 2 3 Schematic Diagram of the Debug LED Interface Technical Summary Rev 2 Freescale Semiconductor Preliminary 2 7 2 3 Debug Support The 56F8323EVM provides an on board Parallel JTAG Host Target Interface and a JTAG interface connector for external Target Interface support Two interface connectors are provided to support each of these debugging approaches These two connectors are designated the JTAG connect
29. Yellow LED LED9 Phase B Top Green LED LED10 Phase B Bottom Yellow LED LED11 Phase C Top Green LED 4 LED12 Phase C Bottom Figure 2 9 PWM Interface and LEDs MC56F8323EVM User Manual Rev 2 2 20 Freescale Semiconductor Preliminary CAN Interface 2 10 CAN Interface The 56F8323EVM board contains a CAN physical layer interface chip that is attached to the FlexCAN port s CAN RX and CAN TX pins on the 56F8323 The EVM board uses a Philips high speed 1 0Mbps physical layer interface chip PCA82C250 Due to the 5 0V operating voltage of the CAN interface chip a pull up to 5 0V is required to level shift the Transmit Data output line from the 56F8323 The CAN TX and CAN RX signals from the processor can be isolated by the connector at JG15 see Table 2 12 The CANH and CANL signals pass through inductors before attaching to the CAN bus connectors A primary J12 and daisy chain J13 CAN connectors are provided to allow easy daisy chaining of CAN devices CAN bus termination of 120 ohms can be provided by adding a jumper to JG10 Refer to Table 2 13 for the CAN connector signals and to Figure 2 10 for a connection diagram 5 0V 56F8323 JG15 1K CAN Transceiver CAN TX 1 2 TXD CANH CAN Bus CANL L Connector CAN_RX RXD PCA82C250T Daisy Chain CAN Connector CAN Bus Terminator
30. arallel JTAG Host Taget Interface voltage level selector JG14 RS 232 interface for easy connection to a host processor U3 and P2 with a disable jumper JG4 RS 232 RTS and CTS signal connector JG13 CAN interface for high speed 1 0Mbps FlexCAN communications U8 and J12 CAN bypass and bus termination J13 and JG10 CAN signal to CAN transceiver isolation connector JG15 Peripheral Daughter Card Expansion Connector which allows the user to attach his own SCI SPI PWM Quad Decoder or GPIO compatible peripherals to the Processor J1 Technical Summary Rev 2 Freescale Semiconductor 2 1 Preliminary Memory Daughter Card Expansion Connector which allows the user to attach additonal power and grounds J2 Connector which allows the user to attach his own SCI 0 MPIO compatible peripheral J21 Connector which allows the user to attach his own SCI 1 MPIO compatible peripheral J17 Connector which allows the user to attach his own SPI 0 MPIO compatible peripheral J8 Connector which allows the user to attach his own SPI 1 MPIO compatible peripheral J15 Connector which allows the user to attach his own PWMA compatible peripheral J5 Connector which allows the user to attach his own CAN physical layer peripheral J10 Connector which allows the user to attach his own Timer A Encoder 0 compatible peripheral J7 Connector which allows the user to attach his own Timer C compatible peripheral J9 Conn
31. ard Connector Description J2 Pin Signal Pin Signal 1 NC 2 NC 3 NC 4 NC 5 NC 6 NC 7 NC 8 NC 9 GND 10 GND 11 NC 12 NC 13 NC 14 NC 15 NC 16 NC 17 NC 18 NC 19 GND 20 GND 21 GND 22 GND 23 NC 24 NC 25 NC 26 NC 27 NC 28 NC 29 NC 30 NC 31 GND 32 GND 33 GND 34 GND 35 NC 36 NC 37 NC 38 NC 39 NC 40 NC 41 NC 42 NC Technical Summary Rev 2 Freescale Semiconductor Preliminary 2 17 Table 2 10 Memory Daughter Card Connector Description Continued J2 Pin Signal Pin Signal 43 GND 44 GND 45 NC 46 NC 47 NC 48 NC 49 NC 50 NC 51 NC 52 GND 53 GND 54 GND 55 3 3V 56 3 3V 57 GND 58 GND 59 5 0V 60 5 0V MC56F8323EVM User Manual Rev 2 Freescale Semiconductor Preliminary Serial 10 bit 4 channel D A Converter Optional 2 8 Serial 10 bit 4 channel D A Converter Optional The 56F8323EVM board contains the provions for a user to provide a serial 10 bit 4 channel D A converter connected to the 56F8323 s SPI 0 port The output pins are uncommitted and are connected to a 4x2 header J4 to allow easy user connections Refer to Figure 2 8 for the D A connections and Table 2 11 for the header s pin out The D A s output full scale range value can be set to a value from 0 0V to 2 4V by a trimpot R48 If this trimpot is preset to 42 05 V it would provide approximately 2mV per s
32. duction The 56F8323EVM is used to demonstrate the abilities of the 56F8323 and to provide a hardware tool allowing the development of applications that use the 56F8323 The 56F8323EVM is an evaluation module board that includes an 56F8323 part peripheral expansion connectors a CAN interface an RS 232 interface a JTAG to PC Printer port interface and a pair of daughter card connectors The peripheral expansion connectors and daughter card expansion connectors are for signal monitoring and allow expansion for user features The 56F8323EVM is designed for the following purposes Allowing new users to become familiar with the features of the 56800E architecture The tools and examples provided with the 56F8323EVM facilitate evaluation of the feature set and the benefits of the family Serving as a platform for real time software development The tool suite enables the user to develop and simulate routines download the software to on chip SRAM or Flash run it and debug it using a debugger via the JTAG Enhanced OnCE EOnCE port The breakpoint features of the EOnCE port enable the user to easily specify complex break conditions and to execute user developed software at full speed until the break conditions are satisfied The ability to examine and modify all user accessible registers memory and peripherals through the EOnCE port greatly facilitates the task of the developer Serving as a platform for hardware development The hardware platform e
33. ductor Preliminary Qty Description Ref Designators Vendor Part Capacitors Continued 6 0 01uF C36 C40 C59 SMEC MCCE103K2NR T1 1 0 001uF C41 SMEC MCCE102K2NR T1 1 100pF C42 SMEC MCCE101K2NR T1 1 470uF 16V DC C43 ELMA RV 16V471MH10R 4 47uF 16V DC C44 C47 ELMA RV2 16V470M R 1 10uF 10V DC C48 KEMET T494B106M010AS 8 0 0022uF C49 C56 SMEC MCCE222K2NR T1 Jumpers 4 3 x 1 Bergstick JG1 JG7 JG8 JG14 SAMTEC TSW 103 07 S S 8 1 x 2 Bergstick JG2 JG3 JG4 JG6 JG10 SAMTEC TSW 102 07 S S JG11 JG12 JG13 2 2 x 2 Bergstick JG5 JG15 SAMTEC TSW 102 07 S D 0 1 x 2 Bergstick JG9 Optional SAMTEC TSW 102 07 S S Test Points 4 GND Test Point TP1 TP3 TP10 KEYSTONE 5001 BLACK 1 GNDA Test Point TP4 KEYSTONE 5002 WHITE 1 3 3VA Test Point TP5 KEYSTONE 5004 YELLOW 2 3 3V Test Point TP6 TP11 KEYSTONE 5000 RED 1 5 0V amp 12V Test Point TP7 TP8 TP9 KEYSTONE 5003 ORANGE 0 1 x 1 Bergstick T15 T16 Optional Samtec TSW 101 06 S S Crystals 1 8 00MHz Crystal Y1 CTS ATS08ASM T Connectors 1 DB25M Connector P1 AMPHENOL 617 C025P AJ121 1 DE9S Connector P2 AMPHENOL 617 C009S AJ120 1 2 1mm coax P3 Switchcraft RAPC 722 Power Connector 56F8323EVM Bill of Material Rev 2 Freescale Semiconductor Preliminary Appendix B 3 Qty Description Ref Des
34. ector which allows the user to attach his own A D port A compatible peripheral J6 Connector which allows the user to attach his own peripheral to GPIO Port A J16 Connector which allows the user to attach his own peripheral to GPIO Port B J18 Connector which allows the user to attach his own peripheral to GPIO Port C J19 On board power regulation from an external 12V DC supplied power input P3 Light Emitting Diode LED power indicator LED13 Six on board LEDs allow real time debugging of user programs LED1 6 Six on board Port A PWM monitoring LEDs LED7 12 Internal OCR_DIS Core Regulator selector JG12 Temperature Sense Diode to ANA7 selector JG6 Manual RESET push button S1 Manual interrupt push button for IRQA S2 General purpose jumper on GPIO PB3 JG7 General purpose jumper on GPIO PBO JG8 Optional 4 Channel 10 bit Serial D A SPI for real time user data display U5 MC56F8323EVM User Manual Rev 2 2 2 Freescale Semiconductor Preliminary 56F8323 2 1 56F8323 The 56F8323EVM uses a Freescale MC56F8323 part designated as Ul on the board and in the schematics This part will operate at a maximum external bus speed of 60MHz A full description of the 56F8323 including functionality and user information is provided in these documents 56F8323 Technical Data Sheet MC56F8323 Electrical and timing specifications pin descriptions device specific peripheral information and package descriptions t
35. ence Manual 2 3 E Enhanced On Chip Emulation EOnCE Preface ix EOnCE Preface ix Evaluation Module EVM Preface ix EVM Preface ix External oscillator frequency input 2 1 INDEX F FlexCAN Preface ix FlexCAN Interface Module FlexCAN Preface ix G General Purpose Input and Output GPIO Preface ix GPIO Preface ix H Host Parallel Interface Connector 2 8 Host Target Interface 2 8 IC Preface ix Integrated Circuit IC Preface ix J Joint Test Action Group JTAG Preface ix JTAG Preface ix 2 1 JTAG Enhanced OnCE EOnCE 1 1 Jumper Group 1 4 JG1 1 4 JG10 1 4 JG11 1 4 JG12 1 4 JG13 1 4 JG14 1 4 JG15 1 4 JG2 1 4 JG3 1 4 JG4 1 4 JGS 1 4 JG6 1 4 JG7 1 4 JG8 1 4 JG9 1 4 Index Rev 2 Freescale Semiconductor Preliminary Index i L LED Preface ix Light Emitting Diode LED Preface ix Low profile Quad Flat Package LQFP Preface ix LQFP Preface ix MPIO Preface ix Multi Purpose Input and Output MPIO Preface ix O On board power regulation 2 2 OnCE Preface x On Chip Emulation OnCE Preface x P Parallel JTAG Host Target Interface 2 1 PCB Preface x peripheral port signals 2 14 Phase Locked Loop PLL Preface x PLL Preface x Printed Circuit Board PCB Preface x Pulse Width Modulation PWM Preface x PWM Preface x PWMA compatible peripheral 2 2 Q QuadDec Preface x Quadrature Decoder interface port 2 26 QuadDec Preface x R R C Preface x real time debugging 2 6
36. erial Peripheral Interface Port 1 Serial Communications Port 0 Serial Communications Port 1 Encoder Z0 Timer Channel A Timer Channel C FlexCAN Port A D Input Port A GPIO Port A GPIO Port B GPIO Port C IRQA RESET CLOCK 2 12 1 PWM Port A Expansion Connector The PWM port A is attached to this connector Refer to Table 2 14 for connection information Peripheral Expansion Connectors Table 2 14 PWM Port A Connector Description J5 Pin Signal Pin Signal 1 PWMAO PAO 2 PWMA1 PA1 3 PWMA2 PA2 SS1 4 PWMA3 PA3 MISO1 5 PWMAA PA4 MOSI1 6 PWMAS PAS SCLK1 7 FAULTAO PAG 8 FAULTAT PA7 9 FAULTA2 PA8 10 NC 11 ISAO PAY 12 ISA1 PA10 13 ISA2 PA11 14 GND Technical Summary Rev 2 Freescale Semiconductor Preliminary 2 23 2 12 2 Serial Peripheral Interface 0 Expansion Connector The Serial Peripheral Interface 0 is an MPIO port attached to this connector This port can be configured as a Serial Peripheral Interface or as a General Purpose I O port Refer to Table 2 15 for connection information Table 2 15 SPI 0 Connector Description J8 Pin Signal Pin Signal 1 MOSIO PB2 2 MISOO PB1 RXD1 3 SCLKO PB3 4 SS0 PBO TXD1 5 GND 6 3 3V 2 12 3 Serial Peripheral Interface 1 Expansion Connector The Serial Peripheral Interface 1 is an MPIO port attached to thi
37. eviations Definitions acronyms and abbreviations for terms used in this document are defined below for reference A D ADC CAN CiA CTS D A 56F8323 EOnCE EVM Flash FlexCAN GPIO IC JTAG LED LQFP MPIO Analog to Digital a method of converting Analog signals to Digital values Analog to Digital Converter a peripheral on the 56F8323 part Controller Area Network a serial communications peripheral and method CAN in Automation an international CAN user s group that coordinates standards for CAN communications protocols Clear To Send Digital to Analog a method of converting Digital values to an Analog form A 16 bit controller with motor control peripherals Enhanced On Chip Emulation a debug bus and port created by Freescale to enable a designer to create a low cost hardware interface for a professional quality debug environment Evaluation Module a hardware platform which allows a customer to evaluate the silicon and develop his application Nonvolatile Random Access Memory Flexible CAN Interface Module a peripheral on the 56F8323 part General Purpose Input and Output port on Freescale s family of controllers does not share pin functionallity with any other peripheral on the chip and can only be set as an input output or level sensitive interrupt input Integrated Circuit Joint Test Action Group a bus protocol interface used for test and debug Light Emitting Diode Low profile Quad Flat
38. he pin out for this connector When using the parallel JTAG interface the jumper at JG3 should be removed as shown in Table 2 6 A jumper at JG14 selects the Parallel Printer Port s interface voltage between 3 3V and 5 0V see Table 2 8 DB 25 Connector Parallel JTAG Interface 56F8323 TDI IN OUT TDI TDO IN TDO P_TRST OUT TRST TMS OUT TMS TCK OUT TCK P RESET OUT RESET P DE OUT DE Jumper Removed Enable JTAG I F Jumper Pin 1 2 Disable JTAG I F Figure 2 4 Block Diagram of the Parallel JTAG Interface Technical Summary Rev 2 Freescale Semiconductor 2 9 Preliminary Table 2 7 Parallel JTAG Interface Connector Description P1 Pin Signal Pin Signal 1 NC 14 NC 2 PORT RESET 15 PORT IDENT 3 PORT TMS 16 N C 4 PORT TCK 17 N C 5 PORT TDI 18 GND 6 PORT TRST 19 GND 7 PORT DE 20 GND 8 PORT IDENT 21 GND 9 PORT VCC 22 GND 10 NC 23 GND 11 PORT TDO 24 GND 12 NC 25 GND 13 PORT CONNECT Table 2 8 Parallel JTAG Interface Voltage Selection Jumper JG14 Comment 1 2 3 3V Parallel Printer Port Interface 2 3 5 0V Parallel Printer Port Interface MC56F8323EVM User Manual Rev 2 Freescale Semiconductor Preliminary Reset 2 4 External Interrupts One on board push button switch is provided for external interrupt generation as shown in Figu
39. his document 56F8300 Peripheral User Manual MC56F8300UM Detailed description of peripherals of the 56F8300 family of devices e DSP56800E Reference Manual DSP56800ERM Detailed description of the 56800E family architecture 16 bit core processor and the instruction set Refer to these documents for detailed information about chip functionality and operation They can be found on this URL www freescale com Technical Summary Rev 2 Freescale Semiconductor 2 3 Preliminary 2 2 RS 232 Serial Communications The 56F8323EVM provides an RS 232 interface by the use of an RS 232 level converter Maxim MAX3245EEAI designated as U3 Refer to the RS 232 schematic diagram in Figure 2 1 The RS 232 level converter transitions the SCI UART s 3 3V signal levels to RS 232 compatible signal levels and connects to the host s serial port via connector P2 Flow control is not provided but could be implemented using uncommitted GPIO signals and connected to the RTS and CTS signals on JG13 see Table 2 1 The SCII port signals can be isolated from the RS 232 level converter by removing the jumpers in JG5 reference Table 2 2 The pin out of connector P2 is detailed in Table 2 3 The RS 232 level converter transceiver can be disabled by placing a jumper at JG4 RS 232 56F8323 Level Converter Interface Jumper Removed JG4 Enable RS 232 Jumper Pin 1 2 Disable RS 232 Figure 2 1 Schematic Diagram of the RS 232 Interface Table 2
40. ic provides a low noise 3 0V DC voltage reference to the controller s A D Vpggg Optionally the processor s A D Vprry voltage can be provided by the 3 3VA supply on the board by removing U15 and adding a 10 ohm resistor at R83 A jumper JG11 and resistor R68 are provided to allow the analog and digital grounds to be isolated on the 56F8323EVM board This allows the analog ground reference point to be provided on a custom board attached to the 56F8323EVM s Daughter Card connectors By removing R68 the AGND reference is disconnected from the 56F8323EVM s digital ground By placing a jumper in JG11 or by reinstalling R68 the AGND is reconnected to the 56F8323EVM s digital ground Power applied to the 56F8323EVM is indicated with a Power On LED referenced as LED13 Optionally the user can provide the 2 5 DC voltage needed by the controller s core on connector J14 and disable the on chip CORE voltage regulator by removing the jumper on JG12 Additonally four 0 ohm resistors or shorting wires must be added at R70 R71 R72 and R73 to allow the external 2 5V DC to pass to the 56F8323 MC56F8323EVM User Manual Rev 2 2 12 Freescale Semiconductor Preliminary Power Supply P3 Power 12V DC AC Sr Bridge Regulator Condition Input Rectifier 3 3V 56F8323 Regulator Vpp jo amp PLL 56F8323EVM Parts R70 R73 56F8323 V Vpp Core
41. ignators Vendor Part Connectors Continued 1 Peripheral Daughter Card J1 HRS FX6 100P 0 8SV2 Connector 1 Memory Bus Daughter J2 HRS FX6 60P 0 8SV2 Card Connector 1 7x2 JTAG Header J3 SAMTEC TSW 107 07 S D 0 4x2 Header J4 Optional SAMTEC TSW 104 07 S D 5 5x2 Header J6 J12 J13 J18 J19 SAMTEC TSW 105 07 S D 2 7x2 Header J5 J16 SAMTEC TSW 107 07 S D 5 3x2 Header J7 J8 J11 J15 J17 J21 SAMTEC TSW 103 07 S D 2 2x2 Header J9 J10 SAMTEC TSW 102 07 S D 1 1x2 Header J14 SAMTEC TSW 102 07 S S Switches 2 SPST Pushbutton S1 S2 Panasonic EVQ PADO5R Transistors 1 2N2222A Q1 ZETEX FMMT2222ACT Miscellaneous 13 Shunt SH1 SH13 Samtec SNT 100 BL T 4 Rubber Feet RF1 RF4 3M SJ5018BLKC MC56F8323EVM User Manual Rev 2 Appendix B 4 Freescale Semiconductor Preliminary Numerics 1 2 Amp power supply 2 12 4 Channel 10 bit Serial D A 2 2 56F8300 Peripheral User Manual 2 3 56F8323 Preface ix 56F8323 Technical Data Sheet 2 3 8 00MHz crystal oscillator 2 1 A A D Preface ix ADC Preface ix Analog to Digital A D Preface ix Analog to Digital Converter ADC Preface ix C CAN Preface ix bus termination 2 1 bypass 2 1 interface 2 1 CAN in Automation CiA Preface ix CAN physical layer peripheral 2 2 CiA Preface ix Clear To Send CTS Preface ix Controller Area Network CAN Preface ix CTS Preface ix D D A Preface ix Daughter Card Expansion interface 2 1 Debugging 2 6 Digital to Analog D A Preface ix DSP56800E Refer
42. jonpo4d PAEPUEJS dS VTOJO LOM W 1030euu0 VLC dNa NL 193NNO9 140d Z NL fid 140d L 18SA 009Yt4 HUY EZ NLY eu Lk NUS VZZZZNZ 10 lve Isl T7 t z l gt m LSN lt lt I3S3N d 9 S MOL Am x 8 _ SML 0 6 13534777 a u HSE onee SCH SCH san e 30 EEN oar ars Er am Tassie lj ACC ars ER 30 d Mur Lo IST eTqesta oegz qur 296181 ISOH paeog uo ars E shu MGrbZOHPLOW uuo Le Pte MORENO ars YUS ey 20 tr Eru 2 zra Wis lee T7 IDENNOS 1904 rre oO S oH ano oz nd 1804 zr EI 92 uuo LS ois SH S OGL 1HOd TT EI 958 o gt o AEEY on0 S one anma r v2 VAZ Le rz 99 z DON LHOd x oneer o4 4 eve EAZ eve o oar Sr s Sr ISA PIO ypg 8 o4 a 2 pu c 3qa eve zaz Hr T T ZAZ vz ker 30 14Od E po AGES wyo 0 Ia anna 1SHI M ei Wer uuo 0 rm lo He Er ISHI IHOd y SSY a aa PAL wi FAL wi HO Ip H ep H pa idi 1804 s EAL evi En EAL evi ST MOL us y oo FI y MOL 1904 Fred i ZAL Zei E ZAL Zei SAL 9r Y uuo 0 9r Y SNL 1HOd t zou oir ia ort GE eg or tat Whig 13538 140d 7 ot oin Isa en La EL ld INS 1904 oDeJjIaJUI OWL TeTtered 56F8323EVM Schematics Rev 2 Appendix A 11 Freescale Semiconductor Preliminary 3
43. nables the user to connect external hardware peripherals The on board peripherals can be disabled providing the user with the ability to reassign any and all of the controller s peripherals The EOnCE port s unobtrusive design means that all memory on the Processor is available to the user Introduction Rev 2 Freescale Semiconductor 1 1 Preliminary 1 1 56F8323EVM Architecture The 56F8323EVM facilitates the evaluation of various features present in the 56F8323 part The 56F8323EVM can be used to develop real time software and hardware products based on the 56F8323 The 56F8323EVM provides the features necessary for a user to write and debug software demonstrate the functionality of that software and interface with the user s application specific device s The 56F8323EVM is flexible enough to allow a user to fully exploit the 56F8323 s features to optimize the performance of his product as shown in Figure 1 1 56F8323 MEL Optional po 8 00MHz XTAL EXTAL SPI 0 4 Channel D A Crystal 10 Bit D A Header RS 232 DSub SCI 1 Interface 9 Pin Reset Logic RESET SCI 0 Timer C Peripheral Peripheral Timer A Expansion Daughter Card PWMA Connectors Connector ADCA QuadDec 0 FlexCAN JTAG JTAG EOnCE Co
44. nnector n CAN Interface EE Parallel Debug LEDS CAN Bus DSub JTAG Daisy Chain 25Pin Interface PWM LEDs 3 3V amp GND Power Supply 3 3VA amp AGND 3 3V 3 3VA 3 0VREF 5V amp 3 0VA Figure 1 1 Block Diagram of the 56F8323EVM MC56F8323EVM User Manual Rev 2 1 2 Freescale Semiconductor Preliminary 56F8323EVM Configuration Jumpers 1 2 56F8323EVM Configuration Jumpers Fifteen jumper groups JG1 JG15 shown in Figure 1 2 are used to configure various features on the 56F8323EVM board Table 1 1 describes the default jumper group settings Figure 1 2 56F8323EVM Jumper Reference Introduction Rev 2 Freescale Semiconductor 1 3 Preliminary Table 1 1 56F8323EVM Default Jumper Options eg Comment Ge JG1 Connect on board 8 0MHz crystal input to EXTAL signal 1 2 JG2 Connect on board 8 0MHz crystal input to XTAL signal 1 2 JG3 Enable on board Parallel JTAG Host Target Interface NC JG4 Enable RS 232 output NC JG5 Pass RXD1 amp TXD1 signals to RS 232 level converter 1 2 amp 3 4 JG6 Pass Temperature Diode signal to ANA7 input 1 2 JG7 Set user Jumper 0 to a 1 value 1 2 JG8 Set user Jumper 1 to a 1 value 1 2 JG9 SPI 0 Daisy Chain Optional
45. ock Diagram of the Parallel JTAG Interface 2 9 Schematic Diagram of the User Interrupt Interface 2 11 Schematic Diagram of the RESET Interface 2 11 Schematic Diagram of the Power Supply 2 13 Serial 10 bit 4 Channel D A Converter 2 19 l hdc oro and LEDS 2 20 ri du n AA 2 21 Software Feature JUNE ns E dde b eed Ne E e HUE RR na del 2 22 Typical Analog Input RC FIE qaae died de e cds and ete e 2 28 List of Figures Rev 2 Freescale Semiconductor iii Preliminary MC56F8323EVM User Manual Rev 2 Freescale Semiconductor Preliminary LIST OF TABLES 1 1 56F8323EVM Default Jumper Options 1 4 2 1 Flow Control Header OPR E 2 4 2 2 sU os CI oh ho oh T eh A AAA oO ok eke ees 2 5 2 3 RS 232 Serial Connector Description vider prete tori SC 2 5 2 4 dkYa 20 TT rr 2 6 2 5 ITAG Connector e cud aede rs An deo EE AOR CR EE 2 8 2 6 Parallel JTAG Interface Disable Jumper Selection 2 8 2 7 Parallel JTAG Interface Connector Description 2 10 2 8 Parallel JTAG Interface Voltage Selection Jumper 2 10 2 9 Peripheral Daughter Card Connector Description 2 14 2 10 Memory Daughter Card Connector Description 2 17 2
46. or and the Host Parallel Interface Connector 2 3 1 JTAG Connector The JTAG connector on the 56F8323EVM allows the connection of an external Host Target Interface for downloading programs and working with the 56F8323 s registers This connector is used to communicate with an external Host Target Interface which passes information and data back and forth with a host processor running a debugger program Table 2 5 shows the pin out for this connector Table 2 5 JTAG Connector Description J3 Pin Signal Pin Signal 1 TDI 2 GND 3 TDO 4 GND 5 TCK 6 GND 7 NC 8 KEY 9 RESET 10 TMS 11 3 3V 12 NC 13 DE 14 TRST When this connector is used with an external Host Target Interface the parallel JTAG interface should be disabled by placing a jumper in jumper block JG3 Refer to Table 2 6 for this jumper s selection options Table 2 6 Parallel JTAG Interface Disable Jumper Selection JG3 Comment No jumpers Enable On board Parallel JTAG Interface 1 2 Disable on board Parallel JTAG Interface MC56F8323EVM User Manual Rev 2 2 8 Freescale Semiconductor Preliminary Debug Support 2 3 2 Parallel JTAG Interface Connector The Parallel JTAG Interface Connector P1 allows the 56F8323 to communicate with a Parallel Printer Port on a Windows PC reference Figure 2 4 Using this connector the user can download programs and work with the 56F8323 s registers Table 2 7 shows t
47. re 2 5 S2 allows the user to generate a hardware interrupt for signal line IRQA This switch allows the user to generate interrupts for user specific programs 56F8323 IRQA Figure 2 5 Schematic Diagram of the User Interrupt Interface 2 5 Reset Logic is provided on the 56F8323 to generate an internal Power On RESET Additional reset logic is provided to support the RESET signals from the JTAG connector the Parallel JTAG Interface and the user RESET push button S1 refer to Figure 2 6 JTAG RESET m RESET PUSHBUTTON MANUAL RESET JTAG TAP RESET Figure 2 6 Schematic Diagram of the RESET Interface Technical Summary Rev 2 Freescale Semiconductor 2 11 Preliminary 2 6 Power Supply The main power input to the 56F8323EVM 12V DC at 1 2A is through a 2 1mm coax power jack This input power is rectified to provide a DC supply input This allows a user the option to use a 12V AC power supply A 1 2Amp power supply is provided with the 56F8323EVM however less than 500mA is required by the EVM The remaining current is available for custom control applications when connected to the Daughter Card connectors The 56F83237EVM provides 5 0V DC regulation for the CAN interface and additional regulators The 56F8323EVM provides 3 3V DC voltage regulation for the processor memory D A ADC parallel JTAG interface and supporting logic refer to Figure 2 7 Additional voltage regulation log
48. rview of the EVM and its features Chapter 2 Technical Summary describes in detail the 56F8323EVM hardware Appendix A 56F8323EVM Schematics contains the schematics of the 56F8323EVM Appendix B 56F8323EVM Bill of Material provides a list of the materials used on the 56F8323EVM board Suggested Reading More documentation on the 56F8323 and the 56F8323EVM kit may be found at URL www freescale com Preface Rev 2 Freescale Semiconductor vii Preliminary Notation Conventions This manual uses the following notational conventions Term or Value Symbol Examples Exceptions Active High Signals No special symbol AO Logic One attached to the signal CLKO name Active Low Signals Noted with an WE In schematic drawings Logic Zero overbar in text and in OE Active Low Signals may most figures be noted by a back slash WE Hexadecimal Values Begin with a 0FFO0 symbol 80 Decimal Values No special symbol 10 attached to the 34 number Binary Values Begin with the letter b b1010 attached to the number b0011 Numbers Considered positive 5 Voltage is often shown as unless specifically 10 positive 3 3V noted as a negative value Blue Text Linkable on line refer to Chapter 7 License Bold Reference sources See paths emphasis www freescale com MC56F8323EVM User Manual Rev 2 viii Freescale Semiconductor Preliminary Definitions Acronyms and Abbr
49. s connector This port can be configured as a Serial Peripheral Interface or as a General Purpose I O port Refer to Table 2 16 for the connection information Table 2 16 SPI 1 Connector Description J15 Pin Signal Pin Signal 1 MOSI1 PWMA4 2 MISO1 PWMA3 3 SCLK1 PWMA5 4 SS1 PWMA2 5 GND 6 3 3V MC56F8323EVM User Manual Rev 2 2 24 Freescale Semiconductor Preliminary 2 12 4 Serial Communications Port 0 Expansion Connector Peripheral Expansion Connectors The Serial Communications Port 0 is an MPIO port attached to the SCI 0 expansion connector This port can be configured as a Serial Communications Interface or as Timer Port C channels Refer to Table 2 17 for connection information Table 2 17 SCI 0 Connector Description J21 Pin Signal Pin Signal 1 TXD0 TCO 2 RXDO TC1 3 GND 4 3 3V 5 GND 6 5 0V 2 12 5 Serial Communications Port 1 Expansion Connector The Serial Communications Port 1 is an MPIO port attached to the SCI 0 expansion connector This port can be configured as a Serial Communications Interface or as SPIO signals Refer to Table 2 18 for connection information Table 2 18 SCI 1 Connector Description J17 Pin Signal Pin Signal 1 TXD1 SSO 2 RXD1 MISOO 3 GND 4 3 3V 5 GND 6 5 0V Technical Summary Rev 2 Freescale Semiconductor Preliminary 2 25
50. tep If another device must be used with SPI 0 s MISO signal and with the D A converter on the board the daisy chain jumper JG9 can be used to extend or isolate the serial chain 56F8323 MAX5251 D A Connector DIN D A 0 D A 1 D A2 D A 3 Figure 2 8 Serial 10 bit 4 Channel D A Converter Table 2 11 D A Header Description J4 Pin Signal Pin Signal 1 D A Channel 0 2 AGND 3 D A Channel 1 4 AGND 5 D A Channel 2 6 AGND 7 D A Channel 3 8 AGND Technical Summary Rev 2 Freescale Semiconductor 2 19 Preliminary 2 9 Motor Control PWM Signals and LEDs The 56F8323 has one PWM unit This unit contains six PWM output signals three Fault input signals and three Phase Current sense inputs The PWM signals are connected to a set of six PWM LEDs via inverting buffers The buffers are used to isolate and drive the processor s PWM outputs to the PWM LEDs The PWM LEDs indicate the status of PWM signals refer to Figure 2 9 Additionally the PWM signals are routed out to a header J5 and to the peripheral daughter card connector J1 for easy use by the end user 56F8323 PWMAO PWMAO PWMA1 PWMA1 PWMA2 PWMA2 PWMA3 gt PWMA3 PWMA4 gt PWMA4 PWMA5 gt PWMA5 3 3V Yellow LED LED7 9 Phase A Top Green LED LED8 Phase A Bottom
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