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Minesweeper

1. PORTA EQU 1000 PORTB EQU 1004 PORTC EQU 1003 DDRC EQU 1007 TCNT EQU 100F KkkKKKKKKKKKKKKKKKKKKKKKKKK ck ck ck ck ck ck KKK Reserved Memory Locations KKK KKK ck ck ck ckckckckckckckckckckck ck ck ck ck ck ck ck ck ck ck ck ck ck KKK Registers are reserved for the mine pattern WINLOSE EQU C032 RINDEX EQU C033 RITEMP EQU C043 CINDEX EQU C034 CITEMP EQU 50044 KPTEMP EQU C045 BLINK EQU C035 STATUS EQU C036 REF1 EQU C037 REF2 EQU C038 NUMMIN1 EQU C03A NUMMINE EQU C039 TOTMINE EQU C03B NUMEN EQU 5 03 FLGCNT EQU C03D MINECT EQU CO3E EQU C046 MEMX EQU C048 MEMX1 EQU C049 LOOPNUM EQU C050 14 Store row number Temporary rindex Store col number Temporary cindex in memory location 33 storage in memory location 34 storage Blink LED command LED on off command index reference index reference least significant byte of NUMMINE number of adjacent mines total number of mines enable number of adj mines display number of flagged mines counter number of adj mines counter number of adjacent mines on off pattern generator seed number memory to store current row position memory to store loop number in pattern gen 000000000000 gt gt gt OOO OOo OO oO oO oO oO 052 0002 0005 0004 0001 0003 0007 0006 0000 0002 0003 ooff 0007 0005 0006 009
2. Clear Routine F Checks to see if mine in current spaces for mines records number Mine Check cleared LDAA RINDEX LSLA LSLA LSLA LSLA ADDA CINDEX ADDA 50 STAA REF LDAB REF LDX C000 X ABX LDAA SFF X CMPA 50 BNE clearl JMP lose clearl LDAB 500 5 STATUS ADDA CLRMASK 18 Shift RINDEX 2 4 1 hex number to left Set X to zero Load B th element of X B th element of mine pattern If it was not a mine they lose Otherwise load BLINK with blink signal Load current flag count Increment flag count by one Compare it to total number of mines If user has flagged every mine they win If not then store new flag count and return to start location If yes user loses If no checks adjacent of adjacent mines and returns to start Shift RINDEX 2 4 1 hex number to left Set X to zero Load B th element of X B th element of mine pattern If it was a mine go to lose you lose Store 0 into STATUS to turn off LED 044 OO O Q d2e9 a7 ff q GO EE OO Q lt OC E lt OC G G G G E Q EL E E lt O aa p O Q CO 2eb 2ef 2f2 25 2f8 2fa 2fd 300 303 306 309 30b 30e 311 314 316 319 31c 3le 321 324
3. Send information out over port Set port C to all output mode Generate a seven bit output with the number of mines adjacent to current position in 6 3 NUMEN in bit 2 WINLOSE in bits 1 0 Send information out over port C Set enable signal to 0 Branch to keypress if WINLOSE 0 Display the win or lose LED for I second after user wins or loses Evaluates keypress and jumps to appropriate subroutine keyprs noprs holdon pat flg clr LDAA ANDA CMPA BNE STAA LDAB MPA MPA EQ MPA EQ MPA EQ MPA EQ wmaowawvawawauvaw JMP JMP JMP PORTA NAVMASK NOPRESS noprs PTEMP nav PTEMP holdon pattern flagged cleared 17 Load value sent from FPGA Only look at bottom three bits f no button being pressed keep sending same data out ports B and C Load previous keypress f button being held down keep sending same data out ports B and C Store current keypress in temporary location f reset pressed then return to pattern generator f flag pressed go to FLAG routine f clear pressed go to CLEAR routine f up pressed go to UP subroutine f down pressed go to DOWN subroutine f left pressed go to LEFT subroutine f right pressed go to RIGHT subroutine Otherwise return to start routine 0351 0352 0353 0354 0355 0356 0357 0358 0359 0360 0361 0362 0363 0364 0365 0366 0367 0368 0369 0370 0371 90372 0373 d27
4. down kckckckckckckck kk LDAA CMPA BEQ INCA STAA down JMP navdown ett LDAA CMPA BEQ DECA STAA left JMP navleft KKKKK KKK KKK right ckckckckckckckc kk k LDAA CMPA STAA right JMP navrt RINDEX 501 up RINDEX JMP RINDEX 505 down RINDEX nav CINDEX 501 left CINDEX nav CINDEX 506 right CINDEX nav nav If already at top row 21 do not decrease row index Return to start routine when done If already at bottom row do not increase row index Return to start routine when done If already at leftmost column do not decrease column index Return to start routine when done If already at rightmost column do not increase column index Return to start routine when done t increase Appendix C EVB Block Diagram A C2 C1 CO R2 R1 RO BLINK STATUS 0 NUMMINE 3 0 NUMEN WWNLOSE 1 0 pattern generator mine pattern 29 0 keypress check flag check clear no navigation yes yes flag routine clear routine WINLOSE 1 0 BLINK WINLOSE 1 0 NUMMINE STATUS RINDEX CINDEX 22 Appendix D FPGA Block Diagram and FSM Diagrams A C2 C1 CO R2 R1 RO BLINK STATUS B 0 NUMMINE 3 0 NUMEN 0 A 7 5 Seg 6 0 j 7 segment Decoder Minutes Time 10 s of Seconds Decoder System Clock Seconds
5. Sclk 10 0 Sel 5 0 X td Select Perforation Clock Divider elector from EVB Poller 5 0 Grid vector 59 0 Grid update Poller FSM Column Signal 4 0 reset reset reset Row 3 0 keypress 2 0 Row 3 0 Debouncer Decoder EYB Column 3 0 Scanner 23 Appendix D Cont d Keypad Debouncer FSM Nopress 1 Nopress 0 S0 51 00 01 Nopress 1 Nopress 0 Nopress 1 Nopress 0 Nopress 0 S2 11 Nopress 1 Output Logic En state 1 amp state 0 24 Appendix D Cont d Keypad Scanner FSM Reset Nopress bar Nopress 1111 Nopress bar Nopress S0 51 0111 1011 Nopress Nopress Nopress bar Nopress bar S3 S2 1110 1101 Nopress 25 Appendix D Cont d FSM for LED Grid Poller Poller FSM for LED Grid 011111 101111 110111 Output Column 1 of grid Output Column 2 of grid Output Column 3 of grid Posedge Posedge sclk Sclk 111110 111101 111011 Output Column 6 of grid Output Column 5 of grid Output Column 4 of grid 26 Appendix E Verilog Modules module Final Project rows clk reset keypress columns A B seg gridcol poller sel win lose input clk input reset input 3 0 rows input 7 0 A input 6 0 B output 2 0 keypress output 3 0 columns output 6 0 seg output 5 0 poller sel output 4 0 gridcol output win lose FPGA
6. this allows for the use of a common procedure to recursively count adjacent mines Start Routine Generation of 8 bit data A The program begins by generating an 8 bit output that consists of the column and row indices in the 6 most significant bits followed by the blink signal and on off status signal in the least two significant bits This data is sent through PORTB to the FPGA to control the LED grid Col 2 0 Row 2 0 BLINK STATUS Check for Cleared Cell The program uses the current row and column indices to reference the byte stored in that particular memory location Since the number of mines around a cell is not supposed to be displayed if that cell has not yet been uncovered the second least significant bit must be examined for a 1 to determine whether NUMMINE should be displayed If this bit is a 1 then the user has uncovered this cell previously and the NUMEN signal will be set to 1 so that the number of mines can be displayed In addition the value of NUMMINE is also determined so that the appropriate value can be sent to the FPGA To achieve full functionality this routine must also include a check for whether a particular mine has been flagged Currently once a user flags a mine the BLINK value is set to 1 but is not stored in the byte of information corresponding to that grid location As a result when a user moves away from the current location after flagging a mine the BLINK signal remains on a
7. output bclk output 10 0 y reg 19 0 q always posedge clk or posedge reset if reset q lt 20 b0 else if q 20b1111 1111 1111 1111 1111 else assign sclk q 6 assign bclk q 16 assign y q 10 0 H endmodule 37 q lt 2050 q lt q 1 module ten sec decoder cik reset en ten sec input clk input reset input en output 4 0 ten sec reg 4 0 ten sec always posedge clk or posedge reset if reset ten sec lt 5 b00000 else if en case ten sec 5 b00000 ten sec lt 5 b00001 5 b00001 ten sec lt 5 b00010 5 b00010 ten sec lt 5 b00011 5 b00011 ten sec lt 5 b00100 5 b00100 ten sec lt 5 b00101 5 b00101 ten sec lt 5 b00000 default ten sec lt 5 b00000 endcase endmodule module winlose B win lose input 1 0 B output win output lose assign lose B 1 assign win B 0 endmodule 38
8. 327 329 32c 32f 332 335 338 33a 33d 340 342 345 348 34b d34d 350 353 355 358 35b 35e 360 363 366 369 d36c 36f 371 374 SEI 379 37c 37f 383 386 387 388 38b 38e 8 390 18 ff 00 33 43 34 43 34 44 33 43 34 44 33 43 34 44 43 34 44 33 43 34 44 33 43 34 44 33 00 39 SFF X KKK KKK KKK ck ck ck ckck ck ck ck ckckckck kk ck Mine Count Store 1 into cleared to indicate spot has been cleared Check mine pattern to see if there s a mine jump to depending on current grid position mine count routines to LDY 500 nextl LDAA RINDEX STAA RITEMP LDAA CINDEX ADDA SFF STAA CITEMP JSR adj chk nextr LDAA RINDEX STAA RITEMP LDAA CINDEX ADDA 501 5 JSR adj chk nextul LDAA RINDEX ADDA SFF STAA RITEMP LDAA CINDEX ADDA SFF STAA CITEMP JSR adj chk nextu LDAA RINDEX ADDA SFF STAA RITEMP LDAA CINDEX STAA CITEMP JSR adj chk nextur LDAA RINDEX ADDA SFF STAA RITEMP LDAA CINDEX ADDA 501 STAA CITEMP JSR adj chk nextbl LDAA RINDEX ADDA 501 5 LDAA CINDEX ADDA SFF STAA CITEMP JSR adj chk nextb LDAA RINDEX ADDA 501 5 RITEMP LDAA CINDEX STAA CITEMP JSR adj chk nextbr LDAA RINDEX ADDA 01 STAA
9. parameter S5 6 b111110 assign poller 5 0 state 5 0 assign poller 4 state 4 assign poller 3 state 3 assign poller 2 state 2 assign poller 1 state 1 assign poller 0 state 0 State Register always posedge sclk or posedge reset if reset state lt SO else state lt nextstate Next State Logic 32 always state case state SO begin gridcol 4 0 L 49 amp belkIL 48 L 37 amp belkIL 36 L 25 amp belkIL 24 L 13 amp belkIL 12 L 1 amp belkIL 0 nextstate lt S1 end SI begin gridcol 4 0 L 51 amp belkIL 50 L 39 amp belkIL 38 L 27 amp belkIL 26 L 15 amp belkIL 14 L 3 amp belkIL 2 nextstate lt S2 end 52 begin gridcol 4 0 L 53 amp belkIL 52 L 41 amp bclkIL 40 L 29 amp belkIL 28 L 17 amp belkIL 16 L 5 amp bclkIL 4 nextstate lt S3 end S3 begin gridcol 4 0 L 55 amp bclkIL 54 L 43 amp bclkIL 42 L 3 1 amp belkIL 30 L 19 amp bclkIL 18 L 7 amp beclkIL 6 nextstate lt S4 end S4 begin gridcol 4 0 L 57 amp bclkIL 56 L 45 amp belkIL 44 L 33 amp belkIL 32 L 2 1 amp bclkIL 20 L 9 amp beclkIL 8 nextstate lt S5 end S5 begin gridcol 4 0 L 59 amp belkIL 58 L 47 amp bclkIL 46 L 35 amp belkIL 34 L 23 amp belkIL 22 L 1 1 amp belkIL 10 nextstate lt SO end default begin gridcol 4 0 L 49 amp bcl
10. 0101 sel lt 6 b011111 else if y gt 11 b001_0101_0110 amp amp y lt 11 b010_1010_1010 else if y gt 11 b010_1010_1011 amp amp y lt 11 b011_1111_1111 else if y gt 11 b100_0000_0000 amp amp y lt 11 b101_0101_0100 else if y gt 11 b101_0101_0101 amp amp y lt 11 b110_1010_1001 else if y gt 11 b110_1010_1010 sel lt 6 b111110 endmodule module sevenseg s seg input 4 0 s output 6 0 seg assign seg 0 s 4 l s 3 amp s 2 amp s 1 amp s 0 I s 3 amp s 2 amp s 1 I s 3 amp s 2 amp s 1 amp s 0 assign seg 1 s 4 l s 3 amp s 2 amp s 1 I s 3 amp s 1 amp s 0 I s 3 amp s 2 amp s 1 amp s 0 assign seg 2 s 4 l s 3 amp s 2 amp s 1 I s 3 amp s 1 amp s 0 I s 3 amp s 2 amp s 1 amp s 0 assign seg 3 s 4 l s 2 amp s 1 amp s 0 I s 2 amp s 1 amp s 0 I s 3 amp s 2 amp s 1 amp s 0 I s 3 amp s 2 amp s 1 amp s 0 sel lt 6 b101111 sel lt 6 b110111 sel lt 6 b111011 sel lt 6 b111101 assign seg 4 s 4 I sl3 amp s 2 amp s 1 I s 0 I s 3 amp s 2 amp s 1 s 0 assign seg 5 S 4 I S 0 amp s 31 amp s 1 I s 3 amp s 1 I s 2 amp s 0 amp s 1 I s 3D assign seg 6 s 4 I s 3 amp s 1 amp s 2 s 0 I s 3 amp s 0 amp s 2 sE 1 endmodule module slow_clock clk reset sclk bclk y input clk input reset output sclk
11. RITEMP LDAA CINDEX ADDA 01 STAA CITEMP JSR adj chk STY NUMMINE LDAA NUMMIN1 LSLA LSLA STAA NUMMIN1 LDAA RINDEX LSLA LSLA LSLA Initialize mine 19 look look look look look look look look in in in in in in in in Earlier routines choose which counter cell cell cell cell cell cell cell cell left of current position right of current position above left of current position above current position to right of current position below left of current position below current position below right of current position Store total mine count in NUMMIN1 391 392 395 397 39a 39d 3a0 3al 3a3 3a5 3a8 3aa tQ lt lt G lt 1 3d2 3d3 3d4 3d5 3d8 3da 3dd 3e0 3e3 3e4 3e6 3e8 3ea 3ec 3ee SEL 3f4 3f5 3 8 3fa 3fd 3ff 401 d404 D lt gt G G E G OO E G G E E OO 48 bb 8b f6 ce 3a a6 84 bb a7 7e cO 03 cO FE dl 01 cO cO ff 01 01 08 cO 01 cO cO 00 01 34 37 00 e4 43 44 38 00 33 36 36 Ei REXPRUOOD D P gt gt 5 G L gt E D Pon CINDEX 501 C000 SFF X CLRMSK2 NUMMIN1 SFF X nav Shift RIN
12. cO 23 c9 cc lof d2 d5 d8 db de el ES E OOO ER 9 0 50 0 0 0 0 0 0 dle4 dle7 dlea dleb dlec dled d1f0 1 1 86 18 7e 86 b7 b7 b7 bd b6 48 48 48 bb 48 bb 00 a7 d1 01 cO 00 Q GQ GO OQ CG Q Q Q CO OQ Q Q Q0 Q Q O Q Q DO d3 32 33 36 ce 34 33 setzero LDAA STAA JMP 500 SFF Y colloop number makes the game a little more challenging KKKKKKKKKKKKKKKKKKKKKKKKK ckck ck ck ck ck ck ck ck ck ck ck KKK Initializations KKK KKK KKK KKK ckckckckckckckckckckckckckckckck ck ck ck ck ck ck ck ck ck ck ck start LDAA STAA STAA STAA LDAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA STAA 501 RINDEX CINDEX STATUS 500 WINLOSE NUMEN FLGCNT MINECT PTEMP LOOPNUM UMMINE UMMIN1 C100 C101 C102 C103 C104 C105 C106 C107 C110 C120 C130 C140 C150 C160 C117 C127 C137 C147 C157 C167 C161 C162 C163 C164 C165 C166 X X Set initial row index to one Set initial column index to one Set initial Status signal t
13. mine pattern is generated by iteratively examining the lowest 8 bits of the EVB timer for 30 cycles For a single cycle the timer bits are added to a seed and this value becomes the new seed for each successive cycle A mine will be placed in the memory location corresponding to the cycle number only if the seed is less than decimal 78 This corresponds to a probability of about 1 5 because the range of seed values is 128 127 Alternatively a mine will not be designated in that location if the seed is greater than or equal to 78 After 30 cycles the total number of mines should average 6 but it is not restricted to this value At the end of the final cycle the information for each cell will be stored in the least significant bit of the appropriate memory location The pattern generator could be improved by multiplying the timer by a relatively prime seed adding an additional relatively prime number and then setting that value as the new seed for each cycle Initializations The row and column indices are initially both set to 1 corresponding to the upper left corner of the grid The LEDs are all initialized to 1 on blink and win lose signals to 0 off and the enable signal to display the number of mines to 0 off Various counters such as the total mine counter and the flag counter are also initially set to zero In addition a value of zero is stored in a perimeter of memory locations around the mine grid
14. status to turn off LED If position has not been cleared keep LED on 0526 0527 0528 0529 0530 0531 0532 0533 0534 0535 0536 0537 0538 0539 0540 054 054 054 054 054 054 054 054 0549 0550 0551 0552 0553 0554 0555 0556 0557 0558 0559 0560 0561 0562 0563 0564 0565 0566 0567 0568 0569 0570 0571 0572 0573 0574 0575 0576 0577 0578 0579 0580 0581 0582 0583 0584 0585 0586 um AJ gt Q K d405 d407 d40a d40c d40f d412 d415 d417 d419 d4la d41d d420 d423 d425 d427 d428 d42b d42e d431 d433 d435 d436 d439 d43c d43f d441 d443 d444 d447 86 b7 86 b7 7e b6 81 27 4a b7 7e b6 27 4a b7 7e b6 27 4c b7 7e 02 cO cO d1 01 04 1 04 1 04 1 04 cO dl 32 32 e4 33 33 e4 39 33 e4 34 34 e4 34 34 e4 lose LDAA STAA win LDAA STAA JMP CkCkckckckckckckckckckckckckckck ck ck ck ck ck ck ck ck ck ck ck KKK LOSER WINLOSE WINNER WINLOSE nav Navigation Subroutines Ckckckckckckckckckckckckckckckck ck ck ck ck ck ck ck ck ck ck ck ck ck Set win lose to lose Set win lose to win Checks current grid position and adjusts row column indices according to navigation direction specified by user up kckckckck ck ck kk navup LDAA CMPA BEQ DECA STAA up
15. the EVB and game display updates to the perforation board Mounted on the perforation board is a keypad a 5x6 grid of minefield LEDs a win LED a lose LED and four dual 7 segment displays to show current game information row and column indices time and number of mines adjacent to current position Figure 1 below illustrates the layout of the game Please refer to Appendix A for a top level block diagram of the game control User Interface Col WinLED Lose LED Indicator Perf Board Keypad Figure 1 Minesweeper Layout Schematics The hardware for the project is placed on a breadboard and a perforation board The breadboard consists of the FPGA transistors and resistors The perforation board consists of the 5x6 grid of LEDSs six seven segment displays a keypad a win LED and a lose LED The LED grid is illuminated using a polling method LED status information is sent to the appropriate column while that column is being polled The six seven segment displays are time multiplexed using a selector signal driven by the system clock and transistors to switch between the displays A similar polling method is also used to interpret the button press on the keypad The FPGA and EVB communicate through Ports A B and C The FPGA sends the keypress signal to the EVB through Port A The EVB determines the new game status update and then sends 2 bytes of data and B back to the FPGA through Ports B and C respectively A
16. win lose signal The FPGA signal control can be divided into three parts the clock divider selector the grid controller and the display multiplexer Clock Divider Selector To ensure that blurring does not occur a divided clock signal will be used to multiplex the displays The displays are controlled by a six input multiplexer while the LED grid is illuminated using a polling method A one hot logic scheme is used to select among the inputs To generate the selector signal for each multiplexer the first step is to tap out the lowest 11 bits of the system clock This will yield a divided clock signal operating at approximately 1 kHz By choosing six 11 bit reference numbers that are approximately evenly spaced apart it is ensured that the multiplexer inputs will be selected at even intervals Before entering the multiplexers the six 11 bit numbers will be encoded using one hot logic so that the appropriate signals can be selected Grid Controller The grid controller inputs the byte and outputs six column vectors to be multiplexed and sent to the LED grid The grid controller uses the reference position information stored in byte A to determine which LED to alter and the blink and status bits are used to determine how the selected LED is to be altered e g ON OFF or ON BLINK Display Multiplexer The display multiplexer extracts the row and column indices from byte A the number of mines from byte B and timer information minut
17. 10 lt SIX EQU 00000110 TESTNUM EQU 81001010 ka LOSER EQU 500000010 WINNER EQU 50000000 kkkxkkkkkkxkxkxkxkxkxkkkkkkkkkkkxk Pattern Generator KKKKKKKKKKKKKKKKKKKKKKKKKK ORG D100 pattern LDX 4500 L DY 501 LDAA TESTNUM S STAA SEED LDAA 500 STAA TOTMINE rowloop LDAA TCNT ka ADDA TESTNUM STAA TEMP LDAB S10 ABX CPX 50 BGT start LDY 50001 STX MEMX K LDAB MEMX1 ABY x LDAA 00 STAA LOOPNU colloop LDAA TCNT ADDA TESTNUM STAA TEMP LDAA LOOPNU 506 BGT rowloop STAA LOOPNU LDAB 01 E ABY LDAA TCNT SS LDAB SEED ABA STAA SEED Ee CMPA SB2 BGT setzero LDAA 501 STAA SFF Y LDAB TOTMINE INCB STAB TOTMINE M JMP colloop 15 er stop incrementing at far right column of grid Increase column position by 1 Load bottom 8 bits of timer i n accumulator A Load random seed into accumulator B Add timer and seed to form new seed Compare 128 127 to 78 If greater than 78 4 5 probability set mine Otherwise 1 5 probability set mine 1 Store the number of total mines in TOTMINE This will be generally around 6 but the unknown 0 gt gt I N d166 d168 dl6b 6e 70 73 76 OO OO 96 99 9c 9f a2 a5 a8 ab ae bl b4 b7 ba
18. 2EVB FPGA2EVB2 rows clk reset keypress columns minesweeper minesweeper2 clk reset A B seg gridcol poller sel win lose endmodule module FPGA2EVB rows clk reset keypress columns input 3 0 rows input clk input reset output 2 0 keypress output 3 0 columns wire sclk bclk wire 11 0 y wire en wire 3 0 columns slow clock slow clock3 clk reset sclk bclk y debouncer debouncer3 reset rows sclk en keyscanner keyscanner3 sclk reset rows columns keydecoder keydecoder3 clk reset rows columns keypress en endmodule 27 module debouncer reset rows sclk en input reset input 3 0 rows input sclk output en wire nopress reg 1 0 state reg 1 0 nextstate assign nopress rows 3 amp rows 2 amp rows 1 amp rows 0 parameter S0 2 b00 parameter S1 2 b01 parameter 52 2 b11 parameter 53 2 b10 State Register always posedge sclk or posedge reset if reset state lt 50 else state lt nextstate Next state logic always state or nopress case state SO if nopress nextstate lt 50 else nextstate lt S1 SI if nopress nextstate lt SO else nextstate lt S2 S2 if nopress nextstate S3 else nextstate lt S2 S3 if nopress nextstate lt 50 else nextstate lt S1 default nextstate lt 50 endcase Output Logic assign en state 1 amp state 0 endmodule 28 module keydecoder clk reset rows columns keypr
19. 5 0002 0001 e C lt O O OQ G e Q lt DOG OO DOE ECO CO CO G O lt G D CG lt 00 95 00 95 10 06 Gt 01 10 00 46 3b Of 52 50 cO 49 50 Of 52 50 50 Of 46 46 ff 3b 3b 32 01 01 Masks for navigation Masks for action selections Cleared location check mask Port C output mask navigation button mask number five number six Pattern generator seed dec lose mask win mask Initialize row counter Initialize row column count directions 149 er Store test seed 4149 in memory Load lower 8 bits of counter Add to test seed Store in memory Increment row address 2nd le ast sign hex digit Stop incrementing at bottom row of grid Initialize row column count Store row number Use Y to store row column set column loop counter to 0 TEMP EQU C052 ck ck ck K K ck k k k k k k k k k k ck k k K K K K K K K K k k k lt lt lt Program Masks ck K K K ck k k k k k k k k k k k K k k K K K K K K K k k k lt lt lt UP EQU 00000010 DOWN EQU 00000101 LEFT EQU 500000100 RIGHT EQU 00000001 CLEAR EQU 00000011 FLAG EQU 500000111 RESET EQU 500000110 NOPRESS EQU 500000000 CLRMASK EQU 500000010 CLRMSK2 EQU 0000001 PCMASK EQU 1111111 NAVMASK EQU 0000011 s FIVE EQU 00000
20. 9 0270 0271 0272 0273 0274 0275 0276 0277 0278 0279 0280 0281 0282 0283 0284 0285 0286 0287 0288 0289 0290 0291 0292 0293 0294 0295 0296 0297 e JO FS S d1f4 41 8 1fb 1fd 200 203 204 207 208 209 20c 20f 211 214 217 d219 215 21f 222 226 228 22a 22d 22T 230 233 E lt 0 236 239 23b 23d 23f 242 245 248 249 24b 24e 251 253 255 257 259 25b 25d 25f 261 263 265 267 269 26b 26d C 0 0 G D 060 65 G O 00 G lt G 0 Q QD E d270 d276 48 bb b7 I I I IINO O NONONONONON I I 10 ff 10 10 00 03 d1 cO 06 07 03 02 05 04 01 di di d2 d2 36 04 07 3a 32 03 3c 32 00 00 4e 2a 00 45 e4 45 e4 45 e4 00 88 00 2 LSLA ADDA STAA STATUS PORTB send data out through PORT C K ck ckckckckckckck ck ck ck ck ck ck ck ke skipc onesec one_st one 1p pat2 LDY LDX CPY NY CPX NX JMP JMP PCMASK DDRC UMMIN1 UMEN WINLOSE PORTC 4500 UMEN WINLOSE 500 keyprs 50000 50000 002 pat2 0E4E one_st one_lp pattern kkkkkkkKKKKKKKKKKKKKKKKK Determine Keypress
21. 9 d27c d27f d282 d285 d288 d28b 28c 28d 28e 28f 292 294 297 29a 29d 29e 2a0 2a2 2a4 2a 2a9 2ac 2ae 2b1 2b4 2b5 208 2c0 CL CL GO OQ lt G 2c3 2c6 2c7 2c8 2c9 2ca 2cd 2cf 2d2 2d5 2d8 2d9 2db 2dd 2df 2e2 2e4 2e7 O O 06 06056 OO 7e 7e 7e 7e 7e d4 d4 d4 d4 di 01 cO 06 dl d4 cO 01 ff 01 03 00 02 12 20 2 e4 33 34 37 37 00 05 35 36 3b 3d e4 0a 33 34 37 3 00 05 36 upl JMP navup down1 JMP navdown left1 JMP navleft rightl JMP navrt JMP nav Flag Routine KKK KKK KKK ck ck ckck ckckckckckckckck ck ck ck ck ck kk Once done with routine return to start location If no user loses If yes stores a 1 in the blink signal increments the flag counter and returns to start Checks to see if mine in current flagged LDAA RINDEX LSLA LSLA LSLA LSLA ADDA CINDEX ADDA 50 STAA REF LDAB REF LDX 5 000 LDAA SFF X CMPA 50 flagl lose flagl LDAA 50 STAA BLINK LDAA 500 STAA STATUS LDAA FLGCNT TOTMINE winner 5 FLGCNT winner JMP win KKK KKK KK KKK ck ckck ck ck ckckckck kc ko k kk
22. C11 game management code is organized as follows 1 Definitions and Initializations 2 Pattern Generation 3 Start Routine a Position Check Routine b Write output data c Read input data d Determine Keypress Clear Routine Flag Routine Navigation Routines Win Lose Routines Ly A An rst file of our assembly code appears in Appendix B while a block diagram of the EVB game logic appears in Appendix C The following descriptions will walk the reader through the primary routines and algorithms used in the HC11 code Port Definitions Define memory locations for PORTA PORTB PORTC DDRC and TCNT Variable Definitions Patterns are defined for navigation directions clear flag reset loser winner and various masks Memory locations C100 C167 are set aside for the mine pattern plus a perimeter of empty cells where each memory location contains a cell cleared indicator and a mine indicator in the least two significant bits respectively Memory locations are also reserved for storing the win lose signal WINLOSE row and column indices RINDEX CINDEX blink and status signals BLINK STATUS the number of mines surrounding a cell NUMMINE and the signal that enables the number of mines to be displayed NUMEN Additional locations are reserved for various counters used internally to generate the output signals Pattern Generator We have developed a routine for generating a seemingly random mine sequence A
23. DEX 2 4 1 hex number to left Set X to zero Load B th element of X B th element of mine pattern Store number of mines in memory for this cell location ck ck ck ck ck ck ck ck ck ck ck ck ck ck ck ckckckckckckck Adjacent Mine Check Subroutine ck k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k k ko k adj_chk chk_out LDAA LSLA LSLA LSLA LSLA ADDA ADDA RTS RITEMP CITEMP 501 REF2 REF2 C000 SFF X 501 501 chk out Ckckckckckckckckckckckckckckckck ck ck ck ck ck ck ck ck ck ck ck KK Current Position Cleared CKCkckckckck ck ck ck ck ck ck ck posclr skippos skp2 LDAA LSLA RINDEX CINDEX 501 REF1 REF1 C000 FF X CLRMASK CLRMASK kippos 01 UMEN FF X X Zt D db UD NUMMIN1 500 STATUS skp2 501 STATUS Win Lose Subroutine Ckckckckck ckckckckckckckckckck ck ck ckck ck ck ck KKK 20 Shift RINDEX 274 1 hex number to left Set X to zero Check mine pattern to see if there s a mine Examine adjacent position for mine Increment mine counter if mine found nearby Shift RINDEX 2 4 1 hex number to left Set X to zero Load B th element of X B th element of mine pattern Check to see if current position has been cleared If not don t display number of adjacent mines If clear activate enable signal to display adj mines Load a zero into
24. Minesweeper Final Project Report December 12 2002 E155 Gigi Au and Daniel Vaughan Abstract Minesweeper is a game where the user is challenged to identify hidden mines and clear safe cells Since the existing version of the game is only available for a computer users who are bored of staring at the monitor may want to play the game using a different display This project prototypes minesweeper using a keypad an HC11 microcontroller a Spartan FPGA and a perforation board containing a grid of minefield LEDs six seven segment game status displays and win lose LEDs The user uses a keypad to navigate through the grid clear or flag mines or reset the game The FPGA decodes the keypress and sends it to the microcontroller which controls the game logic The microcontroller in turn sends data back to the FPGA which decodes the input signals and routes them to the LED grid and game status displays Introduction The game of minesweeper requires a user to navigate through a grid while systematically flagging mines and clearing safe cells The user wins by successfully flagging all mines within the grid The user loses by either flagging a cell that does not contain a mine or clearing a cell that does contain a mine This project involves implementing minesweeper using an M68HC 11 evaluation board EVB a Spartan xcs10 3pc84 FPGA and an external perforated board The EVB controls the game logic while the FPGA sends user input to
25. d a Reset signal is sent through Port C to tell the FPGA to reset all the displays and the LED grid to their initial states Flag Routine The flag routine uses the row and column indices to determine the referenced memory location that stores the mine status for each cell If the flagged cell is not a mine the program jumps to the lose routine and the game resets Otherwise the blink signal is set to 1 and the flag count is incremented to keep track of the number of correctly flagged mines If the flag count equals the total number of mines in the grid the user has completed the game and the program jumps to the win routine after which the game resets As long as the number of flagged mines is less than the number of total mines the flag count is stored in FLGCNT and the program returns to the start routine As mentioned above the flag status is not stored into memory for each grid location We should have added a few lines of code in this routine to store the flag status of each grid point to the associated cell Clear Routine The clear routine first uses the row and column indices to determine the referenced memory location that stores the mine status for each cell If the cleared cell is a mine the program jumps to the lose routine and the game resets Otherwise the user has cleared a safe cell and the status signal is set to 0 to turn off the respective LED in the grid that corresponds to the referenced memory l
26. e nextstate lt state S3 if rows nopress nextstate lt 50 else nextstate lt state default nextstate lt S0 endcase Output Logic assign columns state module slow_clock clk reset sclk bclk y input clk input reset output sclk output bclk output 10 0 y endmodule reg 19 0 q always posedge clk or posedge reset if reset q lt 20 b0 else if q 2051111 1111 1111 1111 1111 q lt 200 else lt 1 assign sclk q 6 q 6 assign bclk q 16 1 9116 assign y q 10 0 30 module minesweeper clk reset A B seg gridcol poller sel win lose input clk input reset input 7 0 A input 6 0 B output 6 0 seg output 5 0 poller sel endmodule output 4 0 gridcol output win lose wire 1 0 blinkstatus wire sclk C wire 59 0 L wire 10 0 wire 4 0 row in col in mine num sec ten sec minutes wire 4 0 loc wire 4 0 q wire 5 0 Spee sel wire en slow clock slow_clock2 clk reset sclk bclk y input clk reset output sclk bclk y loc decoder loc decoder2 clk reset A loc blinkstatus Anput A output loc blinkstatus index decoder index_decoder2 clk reset A 7 2 B 6 2 row_in col_in mine_num Anput A B output row col mine blinkoff fsm blinkoff fsm2 clk reset loc blinkstatus L Anput loc blinkstatus reset sclk bclk output L gridpoller gridpoller2 sclk bclk reset L gridcol poller Anput sclk
27. es 10 s of seconds and seconds from the time decoder These six inputs are multiplexed using selector signals that are generated by slowing down the system clock The selected signal is then decoded and sent to the appropriate seven segment display 10 Results For the most part the game meets the original specifications the perforation board and game components behave correctly the FPGA interfaces correctly with the EVB and perforation board and the HC11 code is reliable except for the flag routine After loading the s19 file into the HC11 and running power to the FPGA the game is ready to operate Upon reset the LEDs all turn on and the game timer starts over Perforation Board The perforation board served as an excellent template for mounting the various displays and routing many of the wires Color coded wires were used to tie together common segments of the digital displays which greatly reduced the number of wires crossing between the board and the FPGA A similar scheme was used to illuminate the LED grid In retrospect a better planned wiring diagram would have eliminated much of the wire clutter Most importantly though the board and game components operated appropriately FPGA The FPGA also operates properly The keypress is successfully decoded and sent to the EVB The seven segment displays show the appropriate values of row and column index number of adjacent mines and game time The win and lose LEDs both functio
28. ess en input clk input reset input 3 0 rows input 3 0 columns input en output 2 0 keypress wire 7 0 A reg 2 0 keypress parameter UP 8 b1011_0111 parameter LEFT 8 b0111 1011 parameter DOWN 8 b1011 1011 parameter RIGHT 801101 1011 parameter CLEAR 8 b0111 1101 parameter FLAG 8 b1011 1101 parameter RESET 8 b1101 1101 assign columns 3 0 rows 3 0 always posedge clk or posedge reset if reset keypress lt 3 b0 else if en case A UP keypress lt 3 b010 LEFT keypress lt 3 b100 DOWN keypress lt 3 b101 RIGHT keypress lt 3 b001 CLEAR keypress lt 3 b011 FLAG keypress lt 39111 RESET keypress lt 39110 default keypress lt 3 b0 endcase else keypress lt 3 b0 endmodule module keyscanner clk reset rows columns input clk input reset input 3 0 rows output 3 0 columns reg 3 0 state reg 3 0 nextstate parameter nopress 4 bl 1 1 1 parameter SO 4750111 parameter S1 4 b1011 parameter S2 4 b1101 parameter 53 4 b1110 State Register 29 endmodule always posedge clk or posedge reset if reset state lt 50 else state lt nextstate Next State Logic always state or rows case state SO if rows nopress nextstate lt S1 else nextstate lt state SI if rows nopress nextstate S2 else nextstate lt state S2 if rows nopress nextstate S3 els
29. hts up on the game board to remind the user they ve just been blown to pieces after which the game should be reset Similarly in the win routine Win LED is illuminated for one second to indicate a successful mission after which the user resets the game FPGA Design Please refer to Appendix D for the FPGA block diagram and associated FSM digrams Introduction The FPGA will be divided into two primary sections One section will decode a keypad input into a specified format and send this information to the EVB The other section will input control signals from the EVB and use this information to update the LED grid and the 7 segment displays on the perforation board Section 1 Key decoder Upon receiving a row input from the keypad the key decoder will determine the corresponding column position and decode this information once the signal has been debounced The decoded keypress will then be sent directly to the EVB for processing Section 2 Display Multiplexer and Grid Poller After processing the keypress the EVB will send two bytes of data back to the FPGA containing information on how to control the grid and the various displays The first byte A as described in the Assembly Code section contains bits that specify which grid point to change RINDEX CINDEX and how to change it BLINK STATUS The second byte B contains a reset signal the number of adjacent mines and a corresponding enable signal and a two bit
30. kIL 48 L 37 amp bclkIL 36 L 25 amp belkIL 24 L 13 amp belkIL 12 L 1 amp beclkIL 0 nextstate lt S0 end endcase endmodule 33 module index decoder clk reset A B row in col in mine num input clk input reset input 5 0 A input 4 0 B output 4 0 row in col in mine num reg 4 0 row in col in mine num always posedge clk or posedge reset if reset begin col in lt 5 b0 row in lt 5 b0 mine num lt 5 b0 end else begin col in lt 2 b00 A 5 3 row in lt 2 b00 A 2 0 mine num lt B 0 B 4 1 end endmodule 34 module loc_decoder clk reset A loc blinkstatus input clk input reset input 7 0 A output 4 0 loc output 1 0 blinkstatus wire 2 0 row col reg 4 0 loc reg 1 0 blinkstatus assign col A 7 5 assign row A 4 2 always posedge clk or posedge reset if reset begin blinkstatus lt 2 b01 loc lt 5 b00001 end else begin blinkstatus lt A 1 0 loc lt row 1 6 col end endmodule module minute_decoder clk reset en ten_sec minutes input clk input reset input en input 4 0 ten_sec output 4 0 minutes reg 4 0 minutes always posedge clk or posedge reset if reset minutes lt 5 b0 else if en amp amp ten sec 5 b00101 case minutes 5 b00000 minutes lt 5 b00001 5 b00001 minutes lt 5 b00010 5 b00010 minutes lt 5 b00011 5 b00011 minutes l
31. n appropriately The grid of LEDs accurately displays the current game status LEDs can be turned on off or to a blinking state One unusual characteristic of the display that could not be accounted for is the tendency for the seconds timer to bleed onto the row index display This may have to do with the time multiplexing rate used to illuminate the 6 displays EVB Within the EVB the mine pattern is generated and stored in the proper memory locations Each of the EVB routines except for the flag routine behaves normally the navigation routines adjust user position appropriately the clear routine sends the correct status signal to the FPGA and outputs the appropriate number of adjacent mines plus an enable signal The win lose routines also function as planned The position check routine accurately determines whether the current position has been cleared and decides whether to display the number of adjacent mines The primary unresolved problem with the HC11 code lies in the flag routine By not storing the flag status of each grid point the BLINK signal that is sent to the FPGA remains high indefinitely following the first successful flag As mentioned before storing flag data in the memory location for each grid point could easily fix this issue 11 References 1 Franzon Paul D and David R Smith Verilog Styles for Synthesis of Digital Systems Upper Saddle River New Jersey Prentice Hall 2000 2 M6SHC11EVB E
32. nd causes every cell the user lands on to blink To fix this problem we could simply store a flagged bit in the memory location for each cell and use that value to adjust the blink signal appropriately Generation of 8 bit data B First all bits of PORTC are set to output mode The 8 bit output data B contains a reset command in the most significant bit the number of mines in the next four bits the enable signal needed to display the number of mines and the WINLOSE signal in the two least significant bits This data is sent through POR TC to the FPGA Reset Adj 3 0 AdjMineEnable WinLose 1 0 Determination of Keypress The FPGA sends data containing the keypress through PORTA to the EVB The 3 least significant bits of the data are examined to determine if the key pressed was reset flag clear or one of the navigation directions Depending on the keypress the program jumps to the respective routine In order to ensure that the HC11 only executes one routine each time a button is pressed we implemented a handshaking routine This block of code stores the current keypress in memory and keeps the output data the same as long as the user is holding down a button Once the user lets up on the button a zero is sent to the EVB The next keypress will then be evaluated appropriately Check for Reset If the reset button has been pressed the program jumps back to the pattern generation routine an
33. o one all LEDS on Set Blink command to off Set WIN LOSE command to off Set number of adjacent mines display to off Set flag counter to 0 Set adjacent mine counter to 0 Set initial keypress to 0 Set LOOPNUM to 0 Set number of mines to 0 Create perimeter of zeros around mine grid to simplify adjacent mine counting procedure Actual mine sequence stored in Row 1 5 111 5 116 Row 2 5 121 C126 Row 3 5 131 C136 Row 4 C141 5 146 Row 5 50151 0156 kCkckckckckckckckck ck ckckckckckckckckckckck ck ck ck ck ck ck ck ck ck ck ck KKK Start routine KKK KKK ck ck ckckckckckckckckckckckck ck ck ck ck ck ck ck ck ck ck ck ck ck KKK Ckckckckckckckckckckckckckckckck ck ckck ck ck ck ck ck ck ck ck KKK Current Position Cleared ck ck ck ck ck ck ck ck ck ck ck ck ck ck ck ck KKK KKK nav JSR posclr send data out through PORT B LDAA LSLA LSLA LSLA ADDA LSLA ADDA CINDEX RINDEX BLINK 16 check if current position has been cleared Generate an eight bit output with column index in 7 5 row index in 4 2 Blink in bit 1 and Status in bit 0 0222 0223 0224 0225 0226 0227 0228 0229 0230 0231 0232 0233 0234 0235 0236 0237 0238 0239 024 024 024 024 024 024 024 024 024 024 0250 0251 0252 0253 0254 0255 0256 0257 0258 0259 0260 0261 0262 0263 0264 0265 0266 0267 0268 026
34. ocation In addition a 1 is loaded into the second least significant bit recall that least significant bit contains mine status 0 or 1 to indicate that the cell has been uncovered This data is stored into memory To check for adjacent mines the clear routine first initializes a counter Y and then determines the current user position Because we have generated a perimeter of zeros around the grid we simply use one routine that checks for mines in each of the 8 adjacent grid locations At the end of this routine the number of adjacent mines is stored into the memory location for the current grid position Navigation Routine If a navigation button is pressed the program determines the direction in which to move the current position This is accomplished by changing the column or row index in accordance with the navigation direction The program also prohibits the row and column indices from exceeding the size of the grid In other words if the user position were along the leftmost column pressing the left navigation button would have no effect After the routine has determined the new position it adjusts the appropriate index and returns to the main program Win Lose Routines As described above flagging incorrectly or clearing a space containing a mine sends the program to the Lose routine Likewise correctly flagging all the mines sends the program to the Win routine In the lose routine a Lose LED lig
35. reset L output gridcol poller sec_decoder sec_decoder2 clk reset sec en Anput clk reset ten_sec_decoder ten_sec_decoder2 clk reset en ten_sec output seconds ten_sec minute_decoder minute_decoder2 clk reset en ten_sec minutes A minutes selector selector2 cIk reset y sel mux6 mux62 row_in col_in mine_num sec ten_sec minutes sel q Anput row col mine sec ten_sec minutes sel output q sevenseg sevenseg2 q seg Anput q output seg winlose winlose2 B 1 0 win lose B output w l 31 module blinkoff fsm clk reset loc blinkstatus L olinkoff_fsm blinkstatus loc reset clk bclk L input clk input reset input 4 0 loc input 1 0 blinkstatus output 59 0 L reg 59 0 L always posedge clk or posedge reset if reset L lt 60 b0 else if blinkstatus 2 b00 begin L 2 loc 1 lt 1 turn off LED L 2 loc 1 1 lt 0 end else if blinkstatus 2 b01 begin L 2 loc 1 lt 0 L 2 loc 1 1 lt 0 end else if blinkstatus 2 b10 begin L 2 loc 1 1 lt 1 blink L 2 loc 1 lt 0 end endmodule module gridpoller sclk bclk reset L gridcol poller input sclk input bclk input reset input 59 0 L output 4 0 gridcol output 5 0 poller reg 5 0 state reg 5 0 nextstate reg 4 0 gridcol parameter SO 6 b011111 parameter S1 6 b101111 parameter S2 6 b110111 parameter S3 6 b111011 parameter S4 6 b111101
36. schematic of the integrated system appears on the following page Row Display SCHEMATIC Sv VDD6 P A6 B6 S A 1 7 Segment EG Display F6 h G6 TT Column Display tees of Y VDD5 L A5 B5 C5 T 7 Segment 05 Pp LED Grid Display ES nd F5 AN G5 A AN of mines display VDD4 100 el T ohms L 7 Segment A e gt r4 gt gt Display F4 A G4 T7 47k H Ohm Sel 5 0 Gridcol 4 0 5V Minutes Display d VDD3 A3 B3 C3 2 7 Segment D3 T a Display F3 G3 FPGA T Keypad E 5 10s of sec T 3 display EVB Rows 3 0 VDD2 A2 _ B2 C2 7 Segment T Displa play F2 13 G2 DN Se 330 Displa ohms EL NNN Win 330 LED VDD1 A1 CER AA o ohms 126 B1 B Mur SU 2 Est L LED 7 Segment D1 T T Display Ey eypress 2 REN YEE A 7 0 lt ta PORTB VW B 7 0 lt PORTC NINO Microcontroller Design Logical control of minesweeper is conducted within the HC11 Microcontroller The breakdown of the H
37. t 5 b00100 5 b00100 minutes lt 5 b00101 5 b00101 minutes lt 5 b00110 5 b00110 minutes lt 5 b00111 5 b00111 minutes lt 5 b01000 5 b01000 minutes lt 5 b01001 5 b01001 minutes lt 5 b00000 default minutes lt 5 b00000 endcase endmodule 35 module mux6 d0 d1 d2 d3 d4 d5 sel q input 4 0 d0 d1 d2 d3 d4 d5 input 5 0 sel output 4 0 q parameter sel0 6 b011111 parameter sell 6 b101111 parameter sel2 6bl 10111 parameter sel3 65111011 parameter sel4 6bl 1 1 101 parameter sel5 6bl 11110 assign q sel sel0 dO 5 bzzzzz sel sell d1 5 bzzzzz sel sel2 d2 5 bzzzzz sel sel3 d3 5 bzzzzz s s el sel4 44 5 bzzzzz q q q q q sel sel5 d5 5 bzzzzz endmodule module sec decoder clk reset sec en input clk input reset output en output 4 0 sec reg 23 0 q reg 4 0 sec reg en always posedge clk or posedge reset if reset begin sec lt 5 bQ q lt 24 b0 en lt 0 end else if q 23 20 4 b1010 begin q lt 24 b0 en lt 1 end else begin q lt q 1 en lt 0 sec lt 1 b0 q 23 20 end endmodule 36 module selector clk reset y sel input clk input reset input 10 0 y output 5 0 sel reg 5 0 sel always posedge clk or posedge reset if reset sel lt 6 b111111 else if gt 1150 amp amp y lt 11 b001 0101
38. valuation Board User s Manual First Edition Motorola Inc 1986 Parts List Part Source Vendor Part Price Perforated Board MarVac 4700T 15 97 12 Appendix A Top Level Block Diagram display update display signals Perforation Board decoded keypress keypad input 13 0050 0051 0052 0053 0054 0055 0056 0057 0058 0059 0060 0061 0062 0063 0064 0065 0066 0067 0068 0069 1000 1004 1003 1007 100f c032 c033 c043 c034 c044 c045 c035 c036 c037 c038 c03a c039 c03b c03c c03e c046 c048 c049 c050 Appendix B HC11 Assembly Code mineswpr asm Minesweeper Game Authors Date Daniel Vaughan December 10 2002 how to update the LED grid based Code Layout Subsection dvaughan hmc edu and Gigi Au Control gwau hmc edu This file inputs a keypad command through Port A from the FPGA and determines upon the nature of the command Output is stored in two bytes and sent out through ports B and C Location Reserved Memory Locations Port Definitions Program 5 Pattern Generator Tnitialfzationssruesse eyes Start 323 5 wes Flag routine eie ds Clear routine Win Lose routine avigation routines 2 SS 2 a Port Definitions

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