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bdiGDB User Manual

1. n the number of bits 1 256 bx a data byte two hex digits W lt n gt wait for n decimal micro seconds T1 assert TRST TO release TRST R1 assert RESE RO release RESET CH lt n gt clock TCK n decimal times with TMS high CL lt n gt clock TCK n decimal times with TMS low The SCANINIT sequence replaces the standard TAP reset sequence used in the BDI firmware This standard TAP reset sequence asserts TRST for 1 ms and then toggles TCK 5 times with TMS high After this init sequence the scan chain should look like defined with SCANPRED and SCANSUCC Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 29 3 2 3 Part HOST The part HOST defines some host specific values IP ipaddress The IP address of the host ipaddress the IP address in the form XXX XXX XXX XXX Example IP 151 120 25 100 FILE filename The default name of the file that is loaded into RAM using the Telnet load command This name is used to access the file via TFTP If the filename starts with a this is replace with the path of the configuration file name filename the filename including the full path or for relative path Example FILE F gnu demo mips test elf FILE test elf FORMAT format offset The format of the image file and an optional load address offset If the im age is already stored in ROM on the target select ROM as the format The optional parameter offset is
2. the above erase list maybe replaces with ERASE OxBFC80000 O0x20000 4 erase 4 sectors Copyright 1997 2015 by ABATRON AG Switzerland FLASH WORKSPACE 0xA0001000 CHIPTYPE MIRRORX16 there is a MirrorBit flash in x16 mode CHIPSIZE 0x800000 the chip is Am29LV640MH BUSWIDTH 32 there are two chips building a 32 bit system FILE E temp dump512k bin FORMAT BIN OxBFC80000 ERASE OxBFC80000 ERASE OxBFCA0000 ERASE OxBFCCO0000 ERASE OxBFCEO0000 V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 33 Supported standard parallel NOR Flash Memories There are different flash algorithm supported Almost all currently available parallel NOR flash mem ories can be programmed with one of these algorithm The flash type selects the appropriate algo rithm and gives additional information about the used flash On our web site www abatron ch gt Debugger Support gt GNU Support gt Flash Support there is a PDF document available that shows the supported parallel NOR flash memories Some newer Spansion MirrorBit flashes cannot be programmed with the MIRRORX16 algorithm be cause of the used unlock address offset Use S29M32X16 for these flashes The AMD and AT49 algorithm are almost the same The only difference is that the AT49 algorithm does not check for the AMD status bit 5 Exceeded Timing Limits Only the AMD and AT49 algorithm support chip erase Block erase is only supported with the AT49
3. HALT lt cores gt force core s to debug mode lt cores gt core bit map BI lt addr gt lt mask gt set instruction breakpoint UCT lt id gt clear instruction breakpoint s BD R W lt addr gt lt mask gt set data breakpoint CD lt id gt clear data breakpoint s SELECT lt core gt change the current core TCSELECT lt thread gt change the current MT ASE thread INFO display information about the current core STATE display information about all cores TCINFO display information about the MT ASE threads LOAD lt offset gt lt file gt lt format gt load program file to target memory VERIFY lt offset gt lt file gt lt format gt verify a program file to target memory PROG lt offset gt lt file gt lt format gt program flash memory E lt format gt SREC or BIN or AOUT or ELF ERASE lt address gt lt mode gt erase a flash memory sector chip or block i lt mode gt CHIP BLOCK or SECTOR default is sector ERASE lt addr gt lt step gt lt count gt erase multiple flash sectors UNLOCK lt addr gt lt delay gt unlock a flash sector UNLOCK lt addr gt lt step gt lt count gt unlock multiple flash sectors FLASH lt type gt lt size gt lt bus gt change flash configuration Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d bd for GNU Debugger BDI3000 MIPS32 User Manual 44 DELAY lt ms gt HOST lt ip
4. Type of device BDM JTAG Interface Product name BDI3000 The signing authorities state that the above mentioned equipment meets the requirements for emission and immunity according to EMC Directive 89 336 EEC The evaluation procedure of conformity was assured according to the following standards IEC 61000 6 2 1999 mod EN61000 6 2 2001 IEC 61000 6 3 1996 mod EN61000 6 2 2001 This declaration of conformity is based on the test report no E1087 05 7a of Quinel Zug Swiss Testing Service accreditation no STS 037 Manufacturer ABATRON AG Lettenstrasse 9 CH 6343 Rotkreuz Authority VARS 2 Max Vock Ruedi Dummermuth Marketing Director Technical Director Rotkreuz 7 18 2007 Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 50 7 Warranty and Support Terms 7 1 Hardware ABATRON Switzerland warrants that the Hardware shall be free from defects in material and work manship for a period of 3 years following the date of purchase when used under normal conditions Failure in handling which leads to defects or any self made repair attempts are not covered under this warranty In the event of notification within the warranty period of defects in material or workman ship ABATRON will repair or replace the defective hardware The customer must contact the distrib utor or Abatron for a RMA number prior to returning 7 2 Software License Against
5. 2 151312 259 25 z 255 25 z dol sie bdi30 5 3 30000154 bdiGDB for MIPS32 1 30 00 01 s Del Ys ADS ADD 259255 AE 0 mytarget cfg The Mode LED should go off and you can try to connect to the BDI via Telnet telnet 151 120 25 102 Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 15 2 5 2 Configuration with a Windows host First make sure that the BDI is properly connected see Chapter 2 1 to 2 4 A To avoid data line conflicts the BDI3000 must be disconnected from the target system while programming the firmware for an other target CPU family im BDI3000 Update Setup f x m Connect BDI3000 Loader Channel SN 30000154 Port COM1 x MAC 000C01300001 Speed 115200 Version 1 00 Connect BDI3000 Firmware Loaded Version 1 00 Newest Version 1 00 Current Erase r Configuration BDI IP Address fi 51 120 25 102 Subnet Mask 255 255 255 0 Default Gateway 255 255 255 255 Config Host IP Address fi 51 120 25 112 Configuration file bdi3000 mytarget cfg we OE Writing setup data passed dialog box BDI3000 Update Setup Before you can use the BDI3000 together with the GNU debugger you must store the initial config uration parameters in the BDI3000 flash memory The following options allow you to do this Port Select the communication port where the BDI3000 is con
6. Config File bdi3000 mytarget cfg In case the subnet has changed reboot before trying to load the firmware LDR gt boot loader Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 18 Connect again via Telnet and program the firmware into the BDI flash telnet 151 120 25 102 LDR gt info BDI Firmware not loaded BDI CPLD ID 01285043 BDI CPLD UES ffffffff BDI MAC 00 Oc 01 30 00 01 BDI IP 151 120 25 102 BDI Subnet 255 255 255 0 BDI Gateway 255 255 255 255 Config IP 151 120 25 112 Config File bdi3000 mytarget cfg LDR gt fwload e temp b30r4kgd 100 erasing firmware flash passed programming firmware flash passed LDR gt info BDI Firmware 32 1 00 BDI CPLD ID 01285043 BDI CPLD UES ffffffff BDI MAC 00 Oc 01 30 00 01 BDI IP 151 120 25 102 BDI Subnet 255 255 255 0 BDI Gateway 255 255 255 255 Config IP 151 120 25 112 Config File bdi3000 mytarget cfg LDR gt To boot now into the firmware use LDR gt boot The Mode LED should go off and you can try to connect to the BDI again via Telnet telnet 151 120 25 102 Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 19 2 6 Testing the BDI3000 to host connection After the initial setup is done you can test the communication between the host and the BDI3000 There is no need for a target configuration
7. running on the target should also be possible Target System RS232 Connector 2 RXD 3 TXD N Ethernet 10 100 BASE T C The configuration parameter SIO is used to enable this serial I O routing The used framing parameters are 8 data 1 stop and not parity TARGET SIO f 9600 Enable SIO via TCP port 7 at 9600 baud Warning Once SIO is enabled connecting with the setup tool to update the firmware will fail In this case either disable SIO first or disconnect the BDI from the LAN while updating the firmware Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 40 3 3 6 Embedded Linux MMU Support The bdiGDB system supports debugging of Linux kernel code that is allocated in mapped kernel space kseg2 The MMU configuration parameter enables this mode of operation Before the BDI accesses mapped memory space it creates an appropriate TLB entry based on information found in the kernel user page tables A temporary TLB entry is only created if there is not already a matching one present In order to search the page tables the BDI needs to know the start addresses of it The configuration parameter PTBASE defines the address in unmapped kernel space where the BDI looks for the ad dresses of the page tables The first entry should point to the kernel page table swapper pg dir the second one can po
8. BDI3000 MIPS32 User Manual 41 Example of a kernel patch that adds BDI support diff ru linux org arch mips Kconfig debug linux arch mips Kconfig debug linux org arch mips Kconfig debug2005 11 14 19 58 12 000000000 0500 linux arch mips Kconfig debug2006 06 26 14 44 30 000000000 0400 38 6 38 12 better 32 MB RAM to avoid excessive linking time This is only useful for kernel hackers If unsure say N config BDI_SWITCH bool Abatron bdiGDB kernel module debugging support depends on DEBUG_KERNEL help Enables the Abatron bdiGDB debugger to debug kernel modules config GDB_CONSOLE bool Console output to GDB depends on KGDB diff ru linux org arch mips kernel head S linux arch mips kernel head s linux org arch mips kernel head S2005 11 14 19 58 17 000000000 0500 linux arch mips kernel head S2006 06 26 13 07 44 000000000 0400 153 6 153 16 set_saved_spsp t0 tl PTR_SUBUsp 4 SZREG init stack pointer ifdef CONFIG_BDI_SWITCH Setup the PTE pointers for the Abatron bdiGDB la t0 bdi_ptbase la tl swapper_pg_dir sw tl t0 addiu t0 4 la tl pad current sw tl t0 endif HER RR RR J start_kernel END kernel_entry 195 3 205 7 page invalid_pmd_table _PMD_ORDER endif page invalid_pte_table _PTE_ORDER ifdef CONFIG_BDI_SWITCH comm bdi_ptbase SZREG 2 SZREG BDI PTBASE sho
9. Clear Cause Register WCPO 16 0x00000003 Set kseg0 coherency WM32 0xB8000730 0x00000000 Disable Watchdog Timer i Init memory controller WM32 O0xB8000080 Ox1FCO0000 Memory Base Address Bank 0 Flash WM32 0OxB8000084 OxFFCO0000 Memory Base Mask Bank 0 Flash WM32 0xB8000088 0x04000000 Memory Base Address Bank 1 SRAM WM32 OxB800008C OxFFF00000 Memory Base Mask Bank 1 SRAM WM32 0xB8000200 0x00002884 Memory Control Bank 0 Flash 32bit WM32 0xB8000204 0x00002863 Memory Control Bank 1 SRAM i TARGET JTAGCLOCK 1 use 8 MHz JTAG clock CPUTYPE RC32300 the used target CPU type ENDIA LITTLE target is little endian WORKSPACE 0xA0000080 workspace in target RAM for fast download BREAKMODE SOFT SOFT or HARD HARD uses hardware breakpoints VECTOR CATCH catch unhandled exceptions 7 HOST IP 151 120 25 115 FILE E cygnus root usr demo mips vmlinus FORMAT ELF LOAD ANUAL load code MANUAL or AUTO after reset i FLASH WORKSPACE Oxa0000000 workspace in target RAM for fast programming algorithm CHIPTYPE AM2 9F Flash type AM29F AM29BX8 AM29BX16 T28BX8 I28BX16 CHIPSIZE 0x80000 The size of one flash chip in bytes e g AM29F040 0x80000 BUSWIDTH 32 The width of the flash memory bus in bits 8 16 32 FILE E cygnus root usr demo mips loop_le sss ERASE OxBFC00000 erase sector 0 i REGS DMM1 OxFF300000 DSU base address D OxB8000000 Memory mapped registers FILE E cygnus root usr demo mips reg32334
10. DB1100 gt md Oxbfc00000 bf c00000 10000155 00000000 00000000 00000000 U bf c00010 00000000 00000000 00000000 00000000 b c00020 00000000 00000000 00000000 00000000 b c00030 00000000 00000000 00000000 00000000 Note The DUMP command uses TFTP to write a binary image to a host file Writing via TFTP on a Linux Unix system is only possible if the file already exists and has public write access Use man tftpd to get more information about the TFTP server on your host Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 43 The Telnet commands MD lt address gt lt count gt display target memory as word 32bit MDH lt address gt lt count gt display target memory as half word l6bit MDB lt address gt lt count gt display target memory as byte 8bit DUMP lt addr gt lt size gt lt file gt dump target memory to a file MM lt addr gt lt value gt lt cnt gt modify word s 32bit in target memory MMH lt addr gt lt value gt lt cnt gt modify half word s 16bit in target memory MMB lt addr gt lt value gt lt cnt gt modify byte s 8bit in target memory MT lt addr gt lt
11. ENDIAN LITTLE JTAGCLOCK value With this value you select the JTAG clock frequency value The JTAG clock frequency in Hertz or an index value from the following table 0 32 MHz 3 8 MHz 1 16 MHz 4 5MHz 2 11 MHz 5 4 MHz Example JTAGCLOCK 1 JTAG clock is 16 MHz JTAGDELAY wait This entry defines a wait time in Run Test Idle state before a value is read or after a value was written via JTAG Useful when accessing slow mem ory with a fast JTAG clock Allows to optimize download performance wait number of 8 TCK s in Run Test ldle state Example JTAGDELAY 4 Wait for 32 TCK s BDIMODE mode param This parameter selects the BDI debugging mode The following modes are supported LOADONLY Loads and starts the application code No debugging via JTAG port AGENT The debug agent runs within the BDI There is no need for any debug software on the target This mode accepts a second parameter If RUN is entered as a second pa rameter the loaded application will be started immedi ately Example BDIMODE AGENT RUN RESET type time This parameter selects the type of reset the BDI applies to the target dur ing power up or when reset is entered via Telnet Default is HARD NONE No reset is applied JTAG Reset is forced via the EJTAG control register HARD Reset is applied via the EJTAG connector reset pin The time parameter defines the time in milliseconds the BDI assert the reset signal Example RESET JTAG Copyri
12. GDB Because the target agent runs within BDI no debug support has to be linked to your application There is also no need for any BDI specific changes in the application sources Your application must be fully linked because no dynamic loading is supported 3 3 1 Target setup Target initialization may be done at two places First with the BDI configuration file second within the application The setup in the configuration file must at least enable access to the target memory where the application will be loaded Disable the watchdog and setting the CPU clock rate should also be done with the BDI configuration file Application specific initializations like setting the timer rate are best located in the application startup sequence 3 3 2 Connecting to the target As soon as the target comes out of reset BDI initializes it and loads your application code If RUN is selected the application is immediately started otherwise only the target PC is set BDI now waits for GDB request from the debugger running on the host After starting the debugger it must be connected to the remote target This can be done with the fol lowing command at the GDB prompt gdb target remote bdi3000 2001 bdi3000 This stands for an IP address The HOST file must have an appropriate entry You may also use an IP address in the form XXX XXX XXX XXX 2001 This is the TCP port used to communicate with the BDI If not already suspended this stops the execution o
13. MT ASE Support The BDI has some basic support for the MIPS 34K Multithreading ASE MT ASE Via Telnet you can get information about the current state of the different VPEs and TCs The configuration for a MIPS 34K with two VPEs may look as follows TARGET JTAGCLOCK 0 use 16 MHz JTAG clock POWERUP 2000 power up delay WAKEUP 100 delay after releasing reset VPEO 0 CPUTYPE M34K the used target CPU type 0 ENDIAN BIG target is big endian 0 STARTUP RESET halt VPE at the reset vector 0 BREAKMODE SOFT SOFT or HARD HARD uses hardware breakpoints 0 STEPMODE JTAG JTAG HWBP or SWBP 0 SCANPRED 0 0 no device before 0 SCANSUCC 15 one device after VPE1 1 CPUTYPE M34K the used target CPU type 1 ENDIAN BIG target is big endian 1 STARTUP RUN don t halt VPE1 is not active out of reset 1 BREAKMODE SOFT SOFT or HARD HARD uses hardware breakpoints 1 STEPMODE JTAG JTAG HWBP or SWBP 1 SCANPRED 15 one device befor 1 SCANSUCC 0 9 no device after After halting the processor you can look at the current state VPEO gt reset run TARGET processing user reset request Core 0 ID code is 0x003400CD Core 0 IMP reg is 0x61414000 Core l ID code is 0x003410CD Core l IMP reg is 0x61414000 TARGE resetting target passed TARGE processing target startup TARGE processing target st
14. about the number of data lines connected to one flash chip For example enter 16 if you are using two AM29F 010 to build a 16bit flash memory bank with the width of the flash memory bus in bits 8 16 32 Example BUSWIDTH 32 The default name of the file that is programmed into flash using the Telnet prog command This name is used to access the file via TFTP If the file name starts with a this is replace with the path of the configuration file name This name may be overridden interactively at the Telnet interface filename the filename including the full path or for relative path Example FILE F gnu arm bootrom hex FILE bootrom hex The format of the file and an optional address offset The optional param eter offset is added to any load address read from the program file format SREC BIN AOUT or ELF Example FORMAT SREC FORMAT ELF 0x10000 If a workspace is defined the BDI uses a faster programming algorithm that runs out of RAM on the target system Otherwise the algorithm is pro cessed within the BDI The workspace is used for a 1kByte data buffer and to store the algorithm code There must be at least 2kBytes of RAM avail able for this purpose address the address of the RAM area Example WORKSPACE 0x00000000 Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 32 ERASE addr increment count mode wait The flash memory may be indiv
15. added to any load address read from the im age file format SREC BIN AOUT ELF or ROM Example FORMAT ELF FORMAT ELF 0x10000 LOAD mode In Agent mode this parameters defines if the code is loaded automatically after every reset mode AUTO MANUAL Example LOAD MANUAL START address The address where to start the program file If this value is not defined and the core is not in ROM the address is taken from the code file If this value is not defined and the core is already in ROM the PC will not be set before starting the target This means the program starts at the normal reset ad dress 0x00000000 address the address where to start the program file Example START 0x10000 DEBUGPORT port RECONNECT The TCP port GDB uses to access the target If the RECONNECT param eter is present an open TCP IP connection Telnet GDB will be closed if there is a connect request from the same host same IP address port the TCP port number default 2001 Example DEBUGPORT 2001 Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 30 PROMPT string This entry defines a new Telnet prompt The current prompt can also be changed via the Telnet interface Example PROMPT M4kK gt DUMP filename The default file name used for the Telnet DUMP command filename the filename including the full path Example DUMP dump bin TELNET mode By default the BDI sends echos for the received ch
16. algorithm If the algorithm does not support the selected mode sector erase is performed If the chip does not support the selected mode erasing will fail The erase command sequence is different only in the 6th write cycle Depending on the selected mode the following data is written in this cycle see also flash data sheets 0x10 for chip erase 0x30 for sector erase 0x50 for block erase To speed up programming of Intel Strata Flash and AMD MirrorBit Flash an additional algorithm is implemented that makes use of the write buffer The Strata algorithm needs a workspace otherwise the standard Intel algorithm is used Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 34 Note Some Intel flash chips e g 28F800C3 28F160C3 28F320C3 power up with all blocks in locked state In order to erase program those flash chips use the init list to unlock the appropriate blocks WM16 OxFFFOO000 0x0060 unlock block 0 WM16 OXFFFOOOOO 0x00DO0 WM16 OxFFF10000 0x0060 unlock block 1 WM16 OxFFF10000 0x00D0 WM16 OxFFFOO000 OxFFFF select read mod or use the Telnet unlock command UNLOCK lt addr gt lt delay gt addr This is the address of the sector block to unlock delay A delay time in milliseconds the BDI waits after sending the unlock com mand to the flash For example clearing all lock bits of an Intel J3 Strata flash takes up to 0 7 seconds If unlock is used
17. configuration parameters IP address of the BDI IP address of the host with the configuration file Name of the configuration file This file is accessed via TFTP Optional network parameters subnet mask default gateway Activating BOOTP The BDI can get the network configuration and the name of the configuration file also via BOOTP For this simple enter 0 0 0 0 as the BDI s IP address see following chapters If present the subnet mask and the default gateway router is taken from the BOOTP vendor specific field as defined in RFC 1533 With the Linux setup tool simply use the default parameters for the c option root LINUX_1 bdisetup bdisetup c p dev ttyS0O b57 The MAC address is derived from the serial number as follows MAC 00 0C 01 xx xx xx replace the xx xx xx with the 6 left digits of the serial number Example SN 33123407 gt gt 00 0C 01 33 12 34 Default IP 192 168 53 72 Before the BDI is configured the first time it has a default IP of 192 168 53 72 that allows an initial configuration via Ethernet Telnet or Setup Tools If your host is not able to connect to this default IP then the initial configuration has to be done via the serial connection Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 13 2 5 1 Configuration with a Linux Unix host The firmware update and the initial configuration of the BDI3000 is done with a comman
18. count gt lt loop gt memory test MC lt address gt lt count gt calculates a checksum over a memory range MV verifies the last calculated checksum RD lt name gt display general purpose or user defined register RDUMP lt file gt dump all user defined register to a file RDCPO lt number gt display CPO register RDFP display floating point registers DSP display DSP ASE registers RI lt nbr gt lt name gt value modify general purpose or user defined register RMCPO lt number gt lt value gt modify CPO register RMFP lt number gt lt hi gt _ lt lo gt modify floating point register TLB lt from gt lt to gt display TLB entry DTAG lt from gt lt to gt display data cache tag ITAG lt from gt lt to gt display instruction cache tag DFLUSH lt addr gt lt size flush data cache IFLUSH lt addr gt lt size invalidate instruction cache EXEC lt opcode gt execute an instruction RGPR lt regnum gt read from core GPR WGPR lt regnum gt lt value gt write to core GPR don t modify rl and r30 SYNC check for exceptions and restore debug PC RESET HAL RUN time reset the target system change startup mode BREAK SOFT HARD display or set current breakpoint mode GO lt pc gt set PC and start current core CONT lt cores gt start multiple cores lt cores gt core bit map WTI lt pc gt trace on instuction single step
19. file and no TFTP server is needed on the host e If not already done connect the BDI3000 system to the network e Power up the BDI3000 e Start a Telnet client on the host and connect to the BDI3000 the IP address you entered dur ing initial configuration e If everything is okay a sign on message like BDI Debugger for Embedded PowerPC and a list of the available commands should be displayed in the Telnet window 2 7 TFTP server for Windows The bdiGDB system uses TFTP to access the configuration file and to load the application program Because there is no TFTP server bundled with Windows Abatron provides a TFTP server application tftpsrv exe This WIN32 console application runs as normal user application not as a system ser vice Command line syntax tftpsrv p w dRootDirectory Without any parameter the server starts in read only mode This means only read access request from the client are granted This is the normal working mode The bdiGDB system needs only read access to the configuration and program files The parameter p enables protocol output to the console window Try it The parameter w enables write accesses to the host file system The parameter d allows to define a root directory tftpsrv p Starts the TFTP server and enables protocol output tftpsrv p w Starts the TFTP server enables protocol output and write accesses are allowed tftpsrv dC tftp Starts the TFTP server and allows only acce
20. gt PROMPT lt string gt CONFIG CONFIG lt file gt lt hostIP gt UPDATE HELP BOOT loader JTAG QUIT delay for a number of milliseconds change IP address of program file host defines a new prompt string display or update BDI configuration lt bdiIP gt lt gateway gt lt mask gt reload the configuration without a reboot display command list reboot the BDI and reload the configuration switch to JTAG command mode terminate the Telnet session The following commands allow to execute instructions on the target processor EXEC lt opcode gt RGPR lt regnum gt WGPR lt regnum gt lt value gt SYNC execute an instruction read from core GPR write to core GPR don t modify rl and r30 check for exceptions and restore debug PC At the end of a code sequence or after many say 1000 stuffed instruction a sync command should be executed This will set the debug PC back to a BDI defined start value Following a simple instruction sequence BDI gt rgpr 6 9 c44940 BDI gt exec 0x24061234 BDI gt rgpr 6 00001234 BDI gt exec 0x24c60005 BDI gt rgpr 6 00001239 BDI gt sync addiu r6 r0 0x1234 addiu r6 r6 4 Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 45 3 5 Multi Core Support The bdiGDB system supports concurrent debugging of up to 16 MIPS32 cores connec
21. gt ARM a new setup has to be done see chapter 2 5 During this process the target cable must be disconnected from the target system To avoid data line conflicts the BDI3000 must be disconnected from the target system while programming a new firmware for an other target CPU Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 7 TARGET A Connector Signals Pin Name Description EJTAG Debug Interrupt EJTAG 2 5 This output of the BDI3000 connects to the target DINT line RC32300 This output of the BDI3000 connects to the target DebugBoot line TRST EJTAG Test Reset This output of the BDI3000 resets the JTAG TAP controller on the target 3 5 GND System Ground TCK EJTAG Test Clock This output of the BDI3000 connects to the target TCK line EJTAG Test Mode Select This output of the BDI3000 connects to the target TMS line This open collector output of the BDI3000 is used to reset the target system EE TDI EJTAG Test Data In This output of the BDI3000 connects to the target TDI line 7 8 9 VIO Target 1 2 5 0V This is the target reference voltage It indicates that the target has power and it is also used to create the logic level reference for the input comparators It also controls the output logic levels to the target It is normally fed from Vdd I O on the target board EJTAG Test Data Out This input to the BDI3000 connects to the target TDO l
22. of reset The commands are used to get the target ready for loading the program file WGPR register value Write value to the selected general purpose register register the register number 0 31 value the value to write into the register Example WGPR 0 5 WREG name value Write value to the selected register memory by name name the case sensitive register name from the reg def file value the value to write to the register memory Example WREG pc Oxbfc00000 WCPO register value Write value to the selected Coprocessor 0 register register the register number 0 31 add Ox0n00 for Select n value the value to write into the register Example WCPO 13 0x00000000 Clear Cause Register RCPO register Read the selected Coprocessor 0 register register the register number 0 31 add Ox0n00 for Select n Example RCPO 16 Read ConfigO WM68 address value Write a byte 8bit to the selected memory place address the memory address value the value to write to the target memory Example WM8 OxFFFFFA21 0x04 SYPCR watchdog disable WM16 address value Write a half word 16bit to the selected memory place address the memory address value the value to write to the target memory Example WM16 0x02200200 0x0002 TBSCR WM32 address value Write a word 32bit to the selected memory place address the memory address value the value to write to the target memory Example WM32 0x02200000 0x01632440 SIUMCR RMB8 address value Read a byte 8bit f
23. to GDB By default only the standard registers are sent gpr s sr lo hi bad cause pc dummy fpr s The following names are use to select a register group STD The standard registers FPR The real floating point registers CPO Some CPO registers Example REGLIST STD FPR standard and FP registers Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 27 Daisy chained JTAG devices For MIPS targets the BDI can also handle systems with multiple devices connected to the JTAG scan chain In order to put the other devices into BYPASS mode and to count for the additional by pass registers the BDI needs some information about the scan chain layout Enter the number count and total instruction register irlen length of the devices present before the MIPS chip Pre decessor Enter the appropriate information also for the devices following the MIPS chip Succes sor SCANPRED count irlen bypass This value gives the BDI information about JTAG devices present before the MIPS chip in the JTAG scan chain count The number of preceding devices irlen The sum of the length of all preceding instruction regis ters IR bypass An optional hexadecimal bypass pattern Only neces sary if one of the additional JTAG devices needs a by pass instruction that is no all one s ffffff Example SCANPRED 1 8 one device with an IR length of 8 SCANPRED 1 5 12 use 10010 as bypa
24. when MMU is on If this line is present the BDI assumes that all addresses received from GDB and Tel net are virtual addresses If necessary the BDI creates appropriate TLB entries before accessing memory based on information found in the kernel or user page table Translation can be probed with the Telnet command PHYS For more information see also chapter Embedded Linux MMU Support Example MMU XLAT enable virtual addresses translation This parameter defines the memory address where the BDI looks for the two page table pointers If the additional 64BIT option is present the BDI assume 64 bit PTE s For more information see also chapter Embedded Linux MMU Support addr Address of the memory used to store the two page table pointers Example PTBASE 0x800002f0 When this line is present a TCP IP channel is routed to the BDI s RS232 connector The port parameter defines the TCP port used for this BDI to host communication You may choose any port except 0 and the default Telnet port 23 On the host open a Telnet session using this port Now you should see the UART output in this Telnet session You can use the normal Telnet connection to the BDI in parallel they work completely in dependent Also input to the UART is implemented port The TCP IP port used for the host communication baudrate The BDI supports 2400 115200 baud Example SIO 7 9600 TCP port for virtual IO This parameter defines what registers are sent
25. without any parameter all sectors in the erase list with the UNLOCK option are processed To clear all lock bits of an Intel J3 Strata flash use for example BDI gt unlock OxFFO00000 1000 To erase or unlock multiple continuous flash sectors blocks of the same size the following Telnet commands can be used ERASE lt addr gt lt step gt lt count gt UNLOCK lt addr gt lt step gt lt count gt addr This is the address of the first sector to erase or unlock step This value is added to the last used address in order to get to the next sec tor In other words this is the size of one sector in bytes count The number of sectors to erase or unlock The following example unlocks all 256 sectors of an Intel Strata flash 28F256K3 that is mapped to 0x00000000 In case there are two flash chips to get a 32bit system double the step parameter BDI gt unlock 0x00000000 0x20000 256 Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 35 3 2 5 Part REGS In order to make it easier to access target registers via the Telnet interface the BDI can read ina register definition file In this file the user defines a name for the register and how the BDI should access it e g as memory mapped memory mapped with offset The name of the register defi nition file and information for different registers type has to be defined in the configuration file The r
26. 3e10084 Thread SR 0x01000000 Thread LR r31 0x83e10148 Thread SP r29 Ox9d004fac VPE1 gt tcinfo TC VPE Act Hit SST PC Restart o o0 1 0 O 0x80000200 1 1 1 0 0 O0Ox83e10064 2 1 L 0 0 O0x83e10084 mor Ta ds 0 0x83e10084 4 1 1 0 0 0x83e10064 Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 AA for GNU Debugger BDI3000 MIPS32 User Manual 48 4 Specifications Operating Voltage Limiting Power Supply Current RS232 Interface Baud Rates Data Bits Parity Bits Stop Bits Network Interface BDM JTAG clock Supported target voltage Operating Temperature Storage Temperature Relative Humidity noncondensing Size Weight without cables Host Cable length RS232 Electromagnetic Compatibility Restriction of Hazardous Substances 5 VDC 0 25 V typ 500 mA max 1000 mA 9 600 19 200 38 400 57 600 115 200 8 none 1 10 100 BASE T up to 32 MHz 1 2 5 0 V 5 C 60 C 20 C 65 C lt 90 rF 160 x 85 x 35 mm 280 g 2 5m CE compliant RoHS 2002 95 EC compliant Specifications subject to change without notice Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 49 5 Environmental notice Disposal of the equipment must be carried out at a designated disposal site 6 Declaration of Conformity CE CE DECLARATION OF CONFORMITY This declaration is valid for following product
27. AR JTAG debug interface for GNU Debugger MIPs32 User Manual Manual Version 1 04 for BDI3000 abatr on 1997 2015 by Abatron AG d LA for GNU Debugger BDI3000 MIPS32 User Manual 2 1 introduction OR EE N 4 11 Bees RE AA EE AO ere 4 1 2 GAO EO EE AE ER IT OE ON 5 2 installation EE N EE EE NE 6 2 1 Connecting the BDI3000 to TardEl esse ES Ee EE ne RE Ee Ee NG Pe oe EE ES se ie nt 6 2 2 Connecting the BDI3000 to Power Supply i iis ee ee ee ee ee ee ee ee ee ee Re ee 8 24 Status LED SMODE 2 ie El EES DE EE N GE Ge ENG DE Ge DEU EED EE 9 2 4 Connecting the BDI3000 to Host sees ese see ee ee ee ee ee ee ee Re AA Re ee ee ee ee ee se ee ee ee 10 2 4 1 serial line GOMMUNIESHER sesse EE Ee ee BR N DS Re RE es EG Ge ee ee Gees Ek ed ig 10 2 4 2 Ethernet COMMUNICATION ss es De Se ER KERSE ve een de RR we ee EE 11 2 5 Installation of the Configuration Software ee esse ee ee RA AA Re ee ee ee ee ee ee ee ee 12 2 5 1 Configuration with a Linux Unix hOSE ese ee ee RR ee ee ee ee ee ee ee ee ee ee ee 13 2 5 2 Configuration with a Windows het iccccccesasicessacestineasesisnataesiusdiacentanetvonensuateninasanseds 15 2 5 3 Configuration via Telnet TFTP as iss sees se Se Denise nee ese es De honk BE ee ee 17 2 6 Testing the BDI3000 to host connectiON ee RR ee Ee ee ee ee ee RR be ee ee ee 19 2 7 TFTP server for WiNdOWS osse eis tees EE De Re DR EG SG ee RE ed GED EE Di Ge ee 19 3 USing diGDB N N EE cc OO EE ME
28. E EE i Aaii 20 3 1 Principle Of CUA ON HO EO N EA EN IE OE 20 3 2 Co ntiguration al EE N EE Ee 21 321 Hd MI EE EE aan EO EE N EE S 22 322 Part EARGET oes etse sei ei Ge Reg te eke Ge DE EE GES N Eed ese N ee Es De Ee 24 3 2 9 N de SE EE EO AR EE ON HET EE 29 AS AGE RE EE EE N EE EO EN 31 A2 5 Part REGS ia Ee ne ee os ee AR ee N ed ee 35 3 3 Debugging with GDB ie SEER EE ENE EG EER ek Re EE Se ee Ba ee EERS RE RE Es 37 AB 1 Taidel Sel DE EE Ee AE EL EE AE ee ee ee GE eek 37 3 3 2 Connecting to the IArOEL isi ske RR RE wed Si Oe RR se ek N RE EE We ER EE DA ER IE Ee 37 3 3 3 Breakpoint Handling ss EE EDE de Deedee EE GE EG Ee er Ge ee ee ES Ee Ee 38 See EED Ed nile lg ele elf oe lee N ER EE EE EO N NE N 38 3 3 5 Target serial VO via BO SEE ve ER EE ie Deo Ee ee EE gee ie 39 3 3 6 Embedded Linux MMU Suppor sesse ee ee se ee ee ee ee RA Ad ee ee ee ee ee ee Ge ee ee ee 40 Aa Telnet IMS ACG EER Re EE De ke Ge RS ES Rek bee De ek N ee Ged ee ER se 42 3 5 Multi Core SUBDOR sees Eise EE ER EE ee ee ae oe te er de ee ia eg lo es 45 3 5 1 MIPS 34K MT ASE SUPPO crcs eeste ees es Ged WEE ee ei ed ee Se ed Pe Es eb se 46 A Specificati NnS EE EE EE aidai a sdana aasad danaa iid aaa anini 48 5 Environmental NOUCG ssiaccnscscasssassisnnastanscsesasasancananaennnnsdsndannncdie senearnqntanaansnssidasnidacannenenisanienaasate 49 6 Declaration of Conformity CE isccceiscassseccecassncescesesneneasnenccesateccecenentewceesenstecnerseecnereaaesencannn
29. G breakpoint hardware is used Example BREAKMODE HARD STEPMODE mode This parameter defines how single step instruction step is implemented The alternate step modes HWBP or SWBP are useful when stepping in structions that causes a TLB miss exception Not all targets allow to use all step modes Some of them do not implement the EJTAG step mode e g RC32300 others support only one hardware instruction breakpoint JTAG This is the default mode The step feature of the EJTAG debug interface is used for single stepping HWBP In this mode one or two hardware breakpoints are used to implement single stepping SWBP In this mode one or two software breakpoints are used to implement single stepping Example STEPMODE HWBP VECTOR CATCH When this line is present the BDI catches all unhandled exceptions Catching exceptions is only possible if the vector table at Ox80000000 is writable Example VECTOR CATCH catch unhandled exception Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 26 WORKSPACE address MMU XLAT PTBASE addr 64BIT SIO port baudrate REGLIST list If a workspace is defined the BDI uses a faster download upload mode The workspace is used for a short code sequence There must be at least 64 bytes of RAM available for this purpose address the address of the RAM area Example WORKSPACE 0xA0000080 The BDI supports Linux kernel debugging
30. aracters and supports command history and line editing If it should not send echoes and let the Telnet client in line mode add this entry to the configuration file mode ECHO default NOECHO or LINE Example TELNET NOECHO use old line mode Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 31 3 2 4 Part FLASH The Telnet interface supports programming and erasing of flash memories The bdiGDB system has to know which type of flash is used how the chip s are connected to the CPU and which sectors to erase in case the ERASE command is entered without any parameter CHIPTYPE type CHIPSIZE size BUSWIDTH width FILE filename FORMAT format offset WORKSPACE address This parameter defines the type of flash used It is used to select the cor rect programming algorithm format AM29F AM29BX8 AM29BX16 I28BX8 I28BX16 AT49 AT49X8 AT49X16 STRATAX8 STRATAX16 MIRROR MIRRORX8 MIRRORX16 S29M64X8 S29M32X16 S29GLSX16 S29VSRX16 M58X32 AM29DX16 AM29DX32 Example CHIPTYPE AM29F The size of one flash chip in bytes e g AM29F010 0x20000 This value is used to calculate the starting address of the current flash memory bank size the size of one flash chip in bytes Example CHIPSIZE 0x80000 Enter the width of the memory bus that leads to the flash chips Do not en ter the width of the flash chip itself The parameter CHIPTYPE carries the information
31. artup passed VPEO gt halt 0 Debug Mode Core number Core state Debug entry cause JTAG break request Thread Debug VPE 0 0 Thread Debug TC QO 0 Thread PC 0x80101cac Thread SR 0x11004301 Thread LR r31 0x80103a40 Thread SP r29 0x80321 90 VPEO gt tcinfo TC VPE Act Hit SST PC Restart 0 0 1 0 0x80101cac 1 1 1 0 0 0Ox83e10060 2 1 1 0 0 0x83e10080 3 1 1 0 0 O0x83e10080 4 1 1 0 0 O0x83e10060 Copyright 1997 2015 by ABATRON AG Switzerland d LA for GNU Debugger BDI3000 MIPS32 User Manual 47 It is possible to switch to an other thread via it SST bit VPEO gt tcinfo TC VPE Act Hilt SST PC Restart 0 O 1 0 0x80101cac 1 1 1 0 0 0x83e10060 2 1 1 0 0 0x83e10080 3 1 iD 0 0 0x83e10080 4 1 1 0 0 0x83e10060 VPEO gt tcsel 3 Core number 0 Core state Debug Mode Debug entry cause JTAG break request Thread Debug VPE 1 0 Thread Debug TC 3 0 Thread PC 0x83e10080 Thread SR 0x01000000 Thread LR r31 0x83e10148 Thread SP r29 Ox9d004fac VPEO gt rm debug 0x100 VPEO gt tcinfo TC VPE Act Hit SST PC Restart 0 0 1 0 0x80101lcac 1 1 1 0 0 0x83e10060 2 1 1 0 0 0x83e10080 3 1 1 0 1 0Ox83e10080 4 1 1 0 0 0x83e10060 VPE0 gt go TARGET core 1 has entered debug mode VPEO gt select 1 Core number s d Core state Debug Mode Debug entry cause single step Thread Debug VPE 1 1 Thread Debug TC 3 3 Thread PC 0x8
32. ay damage it C Trademarks All trademarks are property of their respective holders Copyright 1997 2015 by ABATRON AG Switzerland V 1 04
33. cawins 49 7 Warranty and Support Teri isis aciccccccs ces censccacecccnnscccctncnesnzenecntecendacescucsenstcslensataincssantaeexesaacouens 50 d ie EE N OE EE EE N E ANERER E 50 T2 oa ER a R RE EAE as una eee E E E RE 50 7 3 Warranty and Disclaimer ese ee EK eg Di EN EN mena tenis monde EER AR HE Ee GR AE EE 50 NE ser of Be le od RE OE EE OE N EE 50 Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 3 7 Appendices A Troubleshooting ssicsnsstassccscasssswasssaancadanteswasiaasantananntwntiraindersanadensnesranaeainanenesiessaieasntutanatoinemaaease 51 B Maintenance RE N Ee N 52 C Trademarks Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 4 1 Introduction bdiGDB enhances the GNU debugger GDB with EJTAG debugging for MIPS32 based targets With the built in Ethernet interface you get a very fast code download speed No target communica tion channel e g serial line is wasted for debugging purposes Even better you can use fast Ether net debugging with target systems without network capability The host to BDI communication uses the standard GDB remote protocol An additional Telnet interface is available for special debug tasks e g force a hardware reset program flash memory The following figure shows how the BDI3000 interface is connected between the host and the target Target System EJTAG Int
34. ch it is connected The LED blinks when the BDI3000 is receiving or transmitting data When this LED light is ON 100Mb s mode is selected default When this LED light is OFF 10Mb s mode is selected Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 12 2 5 Installation of the Configuration Software On the enclosed diskette you will find the BDI configuration software and the firmware required for the BDI3000 For Windows users there is also a TFTP server included The following files are on the diskette b30r4kgd exe Windows Configuration program b30r4kgd xxx Firmware for the BDI3000 tftpsrv exe TFTP server for Windows WIN32 console application cfg Configuration files def Register definition files loop_le sss S record file with a short little endian endless loop mapped to OxBFC00000 loop_be sss S record file with a short big endian endless loop mapped to OxBFCO0000 bdisetup zip ZIP Archive with the Setup Tool sources for Linux UNIX hosts Overview of an installation configuration process e Create a new directory on your hard disk e Copy the entire contents of the enclosed diskette into this directory e Linux only extract the setup tool sources and build the setup tool e Use the setup tool or Telnet default IP to load update the BDI firmware Note A new BDI has no firmware loaded e Use the setup tool or Telnet default IP to load the initial
35. d line utility In the ZIP Archive bdisetup zip are all sources to build this utility More information about this utility can be found at the top in the bdisetup c source file There is also a make file included Starting the tool without any parameter displays information about the syntax and parameters A To avoid data line conflicts the BDI3000 must be disconnected from the target system while programming the firmware for an other target CPU family Following the steps to bring up a new BDI3000 1 Build the setup tool The setup tool is delivered only as source files This allows to build the tool on any Linux Unix host To build the tool simply start the make utility root LINUX_1 bdisetup make ee 02 c o bdisetup o bdisetup c cc 02 c o bdicnf o bdicnf c cc O02 0 o bdidll o bdidll c cc s bdisetup o bdicnf o bdidll o o bdisetup 2 Check the serial connection to the BDI With bdisetup v you may check the serial connection to the BDI The BDI will respond with infor mation about the current loaded firmware and network configuration Note Login as root otherwise you probably have no access to the serial port bdisetup v p dev ttyS0O b115 BDI Type BDI3000 SN 30000154 Loader V1 00 Firmware unknown MAC tEatteftstEstt ER IP Addr 255 255 255 259 Subnet z 2555255 255 255 Gateway 255 255 255 255 Host IP 3 255 255 255 255 Config LOVVVV VY VG De ES 3 Load Update the BDI f
36. def Based on the information in the configuration file the target is automatically initialized after every re set Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 6 2 Installation 2 1 Connecting the BDI3000 to Target The cables to the target system are designed for the IDT RC32300 Development Boards optional available Part 90070 and for EJTAG 2 5 compatible boards enclosed In case where the target system has the same connector layout the cable 14 pin or 24 pin can be directly connected A In order to ensure reliable operation of the BDI EMC runtimes etc the target cable length must not exceed 25 cm 10 ss 24 pin RC32300 23 1 TRST Target System ecoocoooooo 2 GROUND PLESE sisie je EG LLLLLLL i 4 1 13 2 optional 24 5 TDO 4 available 6 GROUND TTET P N 90070 7 TMS ad 14 pin EJTAG 8 SADUND 2 Key 44 Connector 45 GROUND 1 TRST 11 RESET 12 GROUND 3 TDI 14 GROUND 5 TDO TARGET A 6 GROUND 16 GROUND 1 7 TMS 8 GROUND 18 GROUND 9 TCK 20 GROUND 11 RESET 21 DBGBOOT 22 GROUND 13 DINT 23 VIO Target The green LED TRGT marked light up when target is powered up 14 VIO Target 24 GROUND For TARGET A connector signals see table on next page Warning Before you can use the BDI3000 with an other target processor type e g MIPS lt
37. eakpoint hardware integrated Normally the BDI con trols this hardware in response to Telnet commands BI BDx or when breakpoint mode HARD is selected Via the Telnet commands BI and BDx you cannot access all the features of the breakpoint hardware Therefore the BDI assumes that the user will control setup this breakpoint hardware as soon as an address in the range OxFF300000 OxFF3FFFFF is written to This way the debugger or the user via Telnet has full access to all features of this watchpoint breakpoint hardware A hardware breakpoint set via BI or BDx gives control back to the BDI 3 3 4 GDB monitor command The BDI supports the GDB V5 x monitor command Telnet commands are executed and the Telnet output is returned to GDB This way you can for example switch the BDI breakpoint mode from within your GDB session gdb target remote bdi3000 2001 Remote debugging using bdi3000 2001 Ox1l0b2 in start gdb mon break Breakpoint mode is SOFT gdb mon break hard gdb mon break Breakpoint mode is HARD gdb Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 39 3 3 5 Target serial VO via BDI A RS232 port of the target can be connected to the RS232 port of the BDI3000 This way it is possible to access the target s serial VO via a TCP IP channel For example you can connect a Telnet session to the appropriate BDI3000 port Connecting GDB to a GDB server stub
38. egister name type address offset number and size are defined in a separate register definition file This way you can create one register definition file for a specific target processor that can be used for all possible positions of the internal memory map You only have to change one entry in the configuration file An entry in the register definition file has the following syntax name type addr size name The name of the register max 12 characters type The register type GPR General purpose register CPO Coprocessor 0 register CP1 Coprocessor 1 control register MM Absolute direct memory mapped register DMM1 DMM4 Relative direct memory mapped register IMM1 IMM4 Indirect memory mapped register addr The address offset or number of the register size The size 8 16 32 of the register The following entries are supported in the REGS part of the configuration file FILE filename The name of the register definition file This name is used to access the file via TFTP The file is loaded once during BDI startup filename the filename including the full path Example FILE C bdi regs reg32334 def DMMnN base This defines the base address of direct memory mapped registers This base address is added to the individual offset of the register base the base address Example DMM1 0xB8000000 IMMn addr data This defines the addresses of the memory mapped address and data reg isters of indirect memory mapped registers The address o
39. erface UNIX PC Host GNU Debugger GDB Ethernet 10 100 BASE T 1 1 BDI3000 The BDI3000 is the main part of the bdiGDB system This small box implements the interface be tween the JTAG pins of the target CPU and a 10 100Base T Ethernet connector The firmware of the BDI3000 can be updated by the user with a simple Linux Windows configuration program or interac tively via Telnet TFTP The BDI3000 supports 1 2 5 0 Volts target systems Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 5 1 2 BDI Configuration As an initial setup the IP address of the BDI3000 the IP address of the host with the configuration file and the name of the configuration file is stored within the flash of the BDI3000 Every time the BDI3000 is powered on it reads the configuration file via TFTP Following an example of a typical configuration file bdiGDB configuration file for IDT79S334A board T r INIT Setup Internal Bus WM32 OxFFFFE200 OXAAB2AAAA CPU Port Width Register Flash 32bit WM32 OxFFFFE204 Ox3FFFFFFF CPU BTA Register WM32 0xB8000000 Ox3FFFFFFF BTA Register WM32 0xB8000004 0x00000007 Address Latch Timing Register F WCPO 12 0x10010000 Setup Status Register clear BEV WCPO T3 0x00000000
40. f a IMMn regis ter is first written to addr and then the register value is access using data as address addr the address of the Address register data the address of the Data register Example DMM1 0x04700000 Note The following register names are predefined pc lo hi sr accu accu0 accu1 accu2 accu3 Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 36 Example for a register definition RC32334 Entry in the configuration file REGS DMM1 OxFF300000 DSU base address DMM2 OxB8000000 Memory mapped registers FILE E cygnus root usr demo mips reg32334 def The register definition file name type addr size i i i CPO Registers r index CPO 0 random CPO 1 elo0 CPO 2 elol CPO 3 context CPO 4 pmask CPO 5 wired CPO 6 bad CPO 8 ehi CPO 10 7 count CPO 9 compare CPO ri status CPO 12 cause CPO 13 i DSU Registers i der DMM1 0x0000 ibs DMM1 0x0004 dbs DMM1 0x0008 pbs DMM1 0x000c Internal Registers i BUI Control Registers bta DMM2 0x0000 alt DMM2 0x0004 arb DMM2 0x0008 bec DMM2 0x0010 bea DMM2 0x0014 sysid DMM2 0x0018 Base Address and Mask Registers mba0 DMM2 0x0080 mlbm0O DMM2 0x0084 mbal DMM2 0x0088 mbm1 DMM2 0x008c Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 37 3 3 Debugging with
41. f application code and the target CPU changes to background debug mode Remember every time the application is suspended the target CPU is freezed During this time no hardware interrupts will be processed Note For convenience the GDB detach command triggers a target reset sequence in the BDI JAD sas gdb detach Wait until BDI has reseted the target and reloaded the image gdb target remote bdi3000 2001 Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 38 3 3 3 Breakpoint Handling GDB versions before V5 0 GDB inserts breakpoints by replacing code via simple memory read write commands There is no command like Set Breakpoint defined in the GDB remote protocol When breakpoint mode HARD is selected the BDI checks the memory write commands for such hidden Set Breakpoint actions If such a write is detected the write is not performed and the BDI sets an appropriate hardware break point The BDI assumes that this is a Set Breakpoint action when memory write length is 4 bytes and the pattern to write is a BREAK opcode GDB version V5 x GDB version 5 x uses the Z packet to set breakpoints watchpoints For software breakpoints the BDI replaces code with a SDBBP instruction When breakpoint mode HARD is selected the BDI sets an appropriate hardware breakpoint User controlled hardware breakpoints The MIPS processor has special watchpoint br
42. ght 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 25 POWERUP delay This parameter defines a delay in milliseconds the BDI waits after the tar get has been powered up until JTAG communications starts delay the power up start delay in milliseconds default 2 sec Example POWERUP 5000 start delay after power up WAKEUP time This entry in the init list allows to define a delay time in ms the BDI inserts between releasing the RESET line and starting communicating with the target This init list entry may be necessary if RESET is delayed on its way to the processors reset pin time the delay time in milliseconds Example WAKEUP 3000 insert 3sec wake up time STARTUP mode runtime This parameter selects the target startup mode HALT This default mode tries to forces the target to debug mode immediately out of reset STOP In this mode the BDI lets the target execute code for runtime milliseconds after reset This mode is useful when monitor code should initialize the target system RUN After reset the target executes code until stopped by the Telnet halt command Example STARTUP STOP 3000 let the CPU run for 3 seconds BREAKMODE mode This parameter defines how breakpoints are implemented The current mode can also be changed via the Telnet interface SOFT This is the normal mode Breakpoints are implemented by replacing code with a SDBBR instruction HARD In this mode the EJTA
43. greement shall be submitted to Swiss Law in the Court of Zug Switzerland to which both parties hereby assign com petence Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 51 Appendices A Troubleshooting Problem The firmware can not be loaded Possible reasons e The BDI is not correctly connected with the Host see chapter 2 e A wrong communication port is selected Com 1 Com 4 e The BDI is not powered up Problem No working with the target system loading firmware is okay Possible reasons e Wrong pin assignment BDM JTAG connector of the target system see chapter 2 e Target system initialization is not correctly enter an appropriate target initialization list e An incorrect IP address was entered BDI3000 configuration e BDM JTAG signals from the target system are not correctly short circuit break e The target system is damaged Problem Network processes do not function loading the firmware was successful Possible reasons e The BDI3000 is not connected or not correctly connected to the network LAN cable or media converter e An incorrect IP address was entered BDI3000 configuration Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 52 B Maintenance The BDI needs no special maintenance Clean the housing with a mild detergent only Solvents such as gasoline m
44. ht 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 10 2 4 Connecting the BDI3000 to Host 2 4 1 Serial line communication Serial line communication is only used for the initial configuration of the bdiGDB system The host is connected to the BDI through the serial interface COM1 COM4 The communication cable included between BDI and Host is a serial cable There is the same connector pinout for the BDI and for the Host side Refer to Figure below Target System 5 GROUND l BDIs000 RS232 Connector for PC host 2 RXD data from host 3 TXD data to host RS232 Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 11 2 4 2 Ethernet communication The BDI3000 has a built in 10 100 BASE T Ethernet interface see figure below Connect an UTP Unshielded Twisted Pair cable to the BD3000 Contact your network administrator if you have ques tions about the network Target System 10 100 BASE T 1 8 Connector 1 TD 2 TD 3 RD LED1 LED2 6 RD BDlsooo PC Unix Host Ethernet 10 100 BASE T CJ The following explains the meanings of the built in LED lights LED 1 Link Activity When this LED light is ON data link is successful between the UTP port green of the BDI3000 and the hub to whi
45. idually erased or unlocked via the Telnet interface In order to make erasing of multiple flash sectors easier you can enter an erase list All entries in the erase list will be processed if you enter ERASE at the Telnet prompt without any parameter This list is also used if you enter UNLOCK at the Telnet without any parameters With the in crement and count option you can erase multiple equal sized sectors with one entry in the erase list address Address of the flash sector block or chip to erase increment If present the address offset to the next flash sector count If present the number of equal sized sectors to erase mode BLOCK CHIP UNLOCK Without this optional parameter the BDI executes a sec tor erase If supported by the chip you can also specify a block or chip erase If UNLOCK is defined this entry is also part of the unlock list This unlock list is processed if the Telnet UNLOCK command is entered without any parameters Note Chip erase does not work for large chips because the BDI time outs after 3 minutes Use block erase wait The wait time in ms is only used for the unlock mode Af ter starting the flash unlock the BDI waits until it pro cesses the next entry Example ERASE Oxbfc40000 erase sector 4 of flash ERASE Oxbfc60000 erase sector 6 of flash ERASE Oxbfc10000 UNLOCK 100 unlock wait 100ms ERASE Oxbfc00000 0x10000 7 erase 7 sectors Example for the AMD DB1100 board
46. ine oO Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 8 2 2 Connecting the BDI3000 to Power Supply The BDI3000 needs to be supplied with the enclosed power supply from Abatron 5VDC A Before use check if the mains voltage is in accordance with the input voltage printed on power supply Make sure that while operating the power supply is not covered up and not situated near a heater or in direct sun light Dry location use only A For error free operation the power supply to the BDI3000 must be between 4 75V and 5 25V DC The maximal tolerable supply voltage is 5 25 VDC Any higher voltage or a wrong polarity might destroy the electronics ji casing connected to ground terminal The green LED BDI marked light up when 5V power is connected to the BDI3000 Please switch on the system in the following sequence e 1 gt external power supply e 2 target system Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 9 2 3 Status LED MODE The built in LED indicates the following BDI states MODE LED BDI STATES The BDI is ready for use the firmware is already loaded The output voltage from the power supply is too low BLINK The BDI loader mode is active an invalid firmware is loaded or loading firmware is active Copyrig
47. int to a pointer current pgd that itself points to the current user page table The second user page table is only searched if its address is not zero and there was no match in the first one The pointer structure is as follows PTBASE unmapped address gt PTE kernel pointer unmapped address PTE pointer pointer unmapped address gt PTE user pointer unmapped address In order to let the kernel update the pointers needed by the BDI you may add the following short code sequences to head S at the end of kernel_entry see also patch example on next page Setup the PTE pointers for the Abatron bdiGDB a li tO 0x800002f0 must match the bdiGDB config file la tl swapper_pg_dir sw t1 t0 addiu t0 4 la tl current_pgd or pgd_current sw tl EO just before jal init_arch nop END kernel_entry In the configuration file define TARGET MMU XLAT MMU support enabled PTBASE 0x800002f0 here are the page table pointers Note You are free to change the address of the array with the two pointers Select an address in unmapped kernel space kseg0 that is not actively used by any kernel code or data You may also manually setup the pointers via GDB or Telnet if you cannot change kernel code Break for example at start_kernel and write the appropriate values to PTBASE 0 and PTBASE 1 Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger
48. ion via Telnet TFTP The firmware update and the initial configuration of the BDI3000 can also be done interactively via a Telnet connection and a running TFTP server on the host with the firmware file In cases where it is not possible to connect to the default IP the initial setup has to be done via a serial connection N To avoid data line conflicts the BDI3000 must be disconnected from the target system while programming the firmware for an other target CPU family Following the steps to bring up a new BDI3000 or updating the firmware Connect to the BDI Loader via Telnet If a firmware is already running enter boot loader and reconnect via Telnet telnet 192 168 53 72 or telnet lt your BDI IP address gt Update the network parameters so it matches your needs LDR gt network BDI MAC 00 0c 01 30 00 01 BDI IP 192 168 53 72 BDI Subnet 255 255 255 0 BDI Gateway 255 255 255 255 Config IP T 255 2559 25906295 Config File LDR gt netip 151 120 25 102 LDR gt nethost 151 120 25 112 LDR gt netfile bdi3000 mytarget cfg LDR gt network BDI MAC 00 Oc 01 30 00 01 BDI IP 151 120 25 102 BDI Subnet 255 255 255 0 BDI Gateway 255 255 255 255 Config IP 5120225 712 Config File bdi3000 mytarget cfg LDR gt network save saving network configuration passed BDI MAC 00 Oc 01 30 00 01 BDI IP 1516120 25 102 BDI Subnet 255 255 255 0 BDI Gateway 255 255 255 255 Config IP o 51 120 25 012
49. irmware With bdisetup u the firmware is programmed into the BDI3000 flash memory This configures the BDI for the target you are using Based on the parameters a and t the tool selects the correct firm ware file If the firmware file is in the same directory as the setup tool there is no need to enter a d parameter bdisetup u p dev ttyS0O b115 aGDB tMIPS Connecting to BDI loader Programming firmware with b30r4kgd 100 Erasing firmware flash Erasing firmware flash passed Programming firmware flash Programming firmware flash passed Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 AA for GNU Debugger BDI3000 MIPS32 User Manual 14 4 Transmit the initial configuration parameters With bdisetup c the configuration parameters are written to the flash memory within the BDI The following parameters are used to configure the BDI BDI IP Address Subnet Mask Default Gateway Config Host IP Address Configuration file The IP address for the BDI3000 Ask your network administrator for as signing an IP address to this BDI3000 Every BDI3000 in your network needs a different IP address The subnet mask of the network where the BDI is connected to A subnet mask of 255 255 255 255 disables the gateway feature Ask your network administrator for the correct subnet mask If the BDI and the host are in the same subnet it is not necessary to enter a subnet mask Enter the IP address
50. nected during this setup session If you select Network make sure the Loader is already active Mode LED blinking If there is already a firmware loaded and run ning use the Telnet command boot loader to activate Loader Mode Speed Select the baudrate used to communicate with the BDI3000 loader during this setup session Connect Click on this button to establish a connection with the BDI3000 loader Once connected the BDI3000 remains in loader mode until it is restarted or this dialog box is closed Current Press this button to read back the current loaded BDI3000 firmware ver sion The current firmware version will be displayed Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 16 Erase Update BDI IP Address Subnet Mask Default Gateway Config Host IP Address Configuration file Transmit Note Press this button to erase the current loaded firmware This button is only active if there is a newer firmware version present in the execution directory of the bdiGDB setup software Press this button to write the new firmware into the BDI3000 flash memory Enter the IP address for the BDI3000 Use the following format XXX XXX XXX XXX g9 151 120 25 101 Ask your network administrator for assigning an IP address to this BDI3000 Every BDI3000 in your network needs a different IP address Enter the subnet mask of the network where the BDI is connec
51. of the default gateway Ask your network administra tor for the correct gateway IP address If the gateway feature is disabled you may enter 255 255 255 255 or any other value Enter the IP address of the host with the configuration file The configura tion file is automatically read by the BDI after every start up via TFTP If the host IP is 255 255 255 255 then the setup tool stores the configura tion read from the file into the BDI internal flash memory In this case no TFTP server is necessary Enter the full path and name of the configuration file This file is read by the setup tool or via TFTP Keep in mind that TFTP has it s own root direc tory usual tftpboot bdisetup c p dev ttySO0 b115 N gt 1151 120 25 102 N gt h151 120 25 112 N gt fe bdi3000 mytarget cfg Connecting to BDI loader Writing network configuration Configuration passed 5 Check configuration and exit loader mode The BDI is in loader mode when there is no valid firmware loaded or you connect to it with the setup tool While in loader mode the Mode LED is blinking The BDI will not respond to network requests while in loader mode To exit loader mode the bdisetup v s can be used You may also power off the BDI wait some time 1min and power on it again to exit loader mode bdisetup v p dev ttyS0O b115 s BDI Type Loader Firmware MAC IP Addr Subnet Gateway Host IP Config BDI300 V1 00 V1 00 00 Oc
52. parameter defines the effective page number size and ASID VPN SIZE ASID 19 1 4 8 The SIZE field decodes as follows 0 5 16KB 3 16MB 8 64KB 4 64MB 9 256KB 256MB AKB 2 AMB 7 1KB 1 1MB 6 The rpn parameter defines the real page number coherency and DVG bits ERPN RPN C DVG 4 20 2 3 3 The field ERPN extended real page number is used for physical address bits 35 32 The field positions are selected so the physical address becomes readable The following example clears the TLB and adds one entry to access ROM via address 0x00000000 INIT Setup TLB WTLB 0x00000500 OXO1FCOO17 Boot ROM 2 x 1MB uncached DVG Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 24 3 2 2 Part TARGET The part TARGET defines some target specific values CPUTYPE type MIPS16 This value gives the BDI information about the connected CPU The op tional parameter MIPS16 forces the BDI to use 16 bit software break points in any case If this parameter is not present the length parameter of the GDB ZO packet selects between 32 bit and 16 bit breakpoints type RC32300 AU1000 MAK MAKE M24K M34K M74K M1004K M1074K EJTAG20 iAptiv Example CPUTYPE M4KE ENDIAN format This entry defines the endiannes of the memory system format The endiannes of the target memory BIG default LITTLE Example
53. payment of a license fee the client receives a usage license for this software product which is not exclusive and cannot be transferred Copies The client is entitled to make copies according to the number of licenses purchased Copies exceeding this number are allowed for storage purposes as a replacement for defective storage mediums Update and Support The agreement includes free software maintenance update and support for one year from date of purchase After this period the client may purchase software maintenance for an additional year 7 3 Warranty and Disclaimer ABATRON AND ITS SUPPLIERS HEREBY DISCLAIMS AND EXCLUDES TO THE EXTENT PERMITTED BY APPLICABLE LAW ALL WARRANTIES EXPRESS OR IMPLIED INCLUDING WITHOUT LIMITATION ANY WARRANTIES OF MERCHANTABILITY FITNESS FORA PARTICULAR PURPOSE TITLE AND NON INFRINGEMENT 7 4 Limitation of Liability IN NO EVENT SHALL ABATRON OR ITS SUPPLIERS BE LIABLE TO YOU FOR ANY DAMAGES INCLUDING WITHOUT LIMITATION ANY SPECIAL INDIRECT INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THE HARDWARE AND OR SOFTWARE INCLUDING WITHOUT LIMITATION LOSS OF PROFITS BUSINESS DATA GOODWILL OR ANTICIPATED SAVINGS EVEN IF ADVISED OF THE POSSIBILITY OF THOSE DAMAGES The hardware and software product with all its parts copyrights and any other rights remain in pos session of ABATRON Any dispute which may arise in connection with the present a
54. rom the selected memory place address the memory address Example RM8 0x00000000 RM16 address value Read a half word 16bit from the selected memory place address the memory address Example RM16 0x00000000 RM32 address value Read a word 32bit from the selected memory place address the memory address Example RM32 0x00000000 Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 23 DELAY value Delay for the selected time value the delay time in milliseconds 1 30000 Example DELAY 500 delay for 0 5 seconds IVIC ways sets This entry invalidates the instruction cache way the number of ways in the IC sets the number of sets in the IC Example IVIC 2 256 Invalidate IC 2 way 256 sets IVDC ways sets This entry invalidates the data cache way the number of ways in the DC sets the number of sets in the DC Example IVDC 2 64 Invalidate DC 2 way 64 sets WTLB vpn rpn Adds an entry to the TLB array For parameter description see below vpn the virtual page number size and ASID rpn the real page number coherency and DVG bits Example WTLB 0x00000500 0x01FC0017 Boot ROM 2 x 1MB Adding entries to the TLB Sometimes it is necessary to setup the TLB before memory can be accessed This is because on a MIPS the MMU is always enabled The init list entry WTLB allows an initial setup of the TLB array The first WTLB entry clears also the whole TLB array The vpn
55. ss instruction SCANSUCC count irlen bypass This value gives the BDI information about JTAG devices present after the MIPS chip in the JTAG scan chain count The number of succeeding devices irlen The sum of the length of all succeeding instruction reg isters IR bypass An optional hexadecimal bypass pattern Only neces sary if one of the additional JTAG devices needs a by pass instruction that is no all one s ffffff Example SCANSUCC 2 12 two device with an IR length of 8 4 SCANSUCC 1 8 3c use 00111100 as bypass instr Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 28 Low level JTAG scan chain configuration Sometimes it is necessary to configure the test access port TAP of the target before the EJTAG debug interface is visible and accessible in the usual way The BDI supports this configuration in a very generic way via the SCANINIT configuration option It accepts a string that defines the JTAG sequence to execute The following example shows how to use these commands Configure Master TAP to make EJTAG TAP visible SCANINIT tl wl000 t0 w1000 toggle TRST SCANINIT 15 05 w1l00000 enter MIPS EJTAG mode T The following low level JTAG commands are supported in the string Use between commands I lt n gt lt b2b1b0 gt write IR bO is first scanned D lt n gt lt b2b1b0 gt write DR bO is first scanned
56. ss to files in C tftp and its subdirectories As file name use relative names For example bdi mpc750 cfg accesses C tftp bdi mpc750 cfg You may enter the TFTP server into the Startup group so the server is started every time you login Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 20 3 Using bdiGDB 3 1 Principle of operation The firmware within the BDI handles the GDB request and accesses the target memory or registers via the JTAG interface There is no need for any debug software on the target system After loading the code via TFTP debugging can begin at the very first assembler statement Whenever the BDI system is powered up the following sequence starts initial configuration valid no activate BDI3000 loader Get configuration file via TFTP Reset System and Power OFF Process target init list Process GDB requests Process Telnet commands Power OFF Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 AA for GNU Debugger BDI3000 MIPS32 User Manual 21 3 2 Configuration File The configuration file is automatically read by the BDI3000 after every power on The syntax of this file is as follows comment part name identifier parameterl parameter2 parameterN identifier parameterl parameter2 parameterN part name identifier parameterl parame
57. ted to Use the following format xxx Xxx xxXx xxxe g 255 255 255 0 A subnet mask of 255 255 255 255 disables the gateway feature Ask your network administrator for the correct subnet mask Enter the IP address of the default gateway Ask your network administra tor for the correct gateway IP address If the gateway feature is disabled you may enter 255 255 255 255 or any other value Enter the IP address of the host with the configuration file The configura tion file is automatically read by the BDI after every start up via TFTP If the host IP is 255 255 255 255 then the setup tool stores the configura tion read from the file into the BDI internal flash memory In this case no TFTP server is necessary Enter the full path and name of the configuration file This file is read by the setup tool or via TFTP Click on this button to store the configuration in the BDI3000 flash memory Using this setup tool via the Network channel is only possible if the BDI3000 is already in Loader mode Mode LED blinking To force Loader mode enter boot loader at the Telnet The setup tool tries first to establish a connection to the Loader via the IP address present in the BDI IP Address entry field If there is no connection established after a time out it tries to connect to the default IP 192 168 53 72 Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 17 2 5 3 Configurat
58. ted to the same JTAG scan chain For every core you can start its own GDB session The default port numbers used to attach the remote targets are 2001 2016 In the Telnet you switch between the cores with the command select lt 0 3 gt In the configuration file simply begin the line with the appropriate core number If there is no n in front of a line the BDI assumes core 0 The following example defines two cores on the scan chain TARGET common configurations JTAGCLOCK 8000000 use 8 MHz JTAG clock POWERUP 5000 power up delay WAKEUP 2000 delay after releasing reset configuration for core 0 0 CPUTYPE 4KE 0 SCANPRED 0 0 0 SCANSUCC 15 bypass second core 0 ENDIAN BIG target is big endian 0 BREAKMODE HWBP use hardware breakpoints configuration for core 1 1 CPUTYPE 4KE 1 SCANPRED 1 5 bypass first core 1 SCANSUCC 0 0 1 ENDIAN BIG target is big endian 1 BREAKMODE SOFT use software breakpoints Multi Core related Telnet commands SELECT lt core gt change the current core CONT lt cores gt start multiple cores lt cores gt core bit map HALT lt cores gt force core s to debug mode lt cores gt core bit map STATE display information about all cores Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 AA for GNU Debugger BDI3000 MIPS32 User Manual 46 3 5 1 MIPS 34K
59. ter2 parameterN identifier parameterl parameter2 parameterN etc comment Numeric parameters can be entered as decimal e g 700 or as hexadecimal 0x80000 Note for IDR RC32300 processors The debug boot function on IDT RC323000 processors does not work Therefore the EJTAG debug interface can not always get control over the processor if there is no valid code in the boot ROM If there is an empty boot flash the BDI may need multiple reset sequences until it gets control over the processor It is recommended to program at least a small endless loop into the boot flash On the distribution diskette you will find the appropriate S record files with this small loop code One for little endian and one for big endian systems Also the hardware breakpoint logic inside the RC32300 does not always work as expected It is highly recommended to use only BREAKMODE SOFT and STEPMODE SWBP In cases where it is abso lutely necessary to use hardware breakpoints debugging ROM code use the HWBP s very defen sive Do not set breakpoints following load store instructions or following a branch with a load store instruction in the branch delay slot This is especially important if the code is cached V 1 04 Copyright 1997 2015 by ABATRON AG Switzerland d LA for GNU Debugger BDI3000 MIPS32 User Manual 22 3 2 1 Part INIT The part INIT defines a list of commands which should be executed every time the target comes out
60. uld point to this endif Copyright 1997 2015 by ABATRON AG Switzerland V 1 04 d LA for GNU Debugger BDI3000 MIPS32 User Manual 42 3 4 Telnet Interface A Telnet server is integrated within the BDI The Telnet channel is used by the BDI to output error messages and other information Also some basic debug commands can be executed Telnet Debug features e Display and modify memory locations e Display and modify general and special purpose registers e Single step a code sequence e Set hardware breakpoints e Load a code file from any host e Start Stop program execution e Programming and Erasing Flash memory During debugging with GDB the Telnet is mainly used to reboot the target generate a hardware re set and reload the application code It may be also useful during the first installation of the bdiGDB system or in case of special debug needs Multiple commands separated by a semicolon can be entered on one line Example of a Telnet session DB1100 gt reset TARGET processing user reset request Core 0 ID code is 0x2020228F Core 0 IMP reg is 0x20404000 TARGET resetting target passed TARGET processing target startup TARGET processing target startup passed DB1100 gt info Core number 0 Core state Debug Mode Debug entry cause JTAG break request Current PC Oxbfc00000 Current SR 0x00400004 Current LR r31 0xff210000 Current SP r29 0x00000000

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