SAM9-L9260 development board Users Manual
Contents
1. 60 1 80 1111117 5000 5 9 19260 vootcns PUR SU y cas 1692 1 5 BNJ oMz ri 8 A 80 072 a 1007 our 16V T Tion tur COPYRIGHT lt C 2008 OLIHEX Ltd BN3 0M4 RZZ 5 piti BNDIOPO 1 st RB4 8 450 htlp uuu olimex con dev x a sean 190271 VEXT a 6NDIOP 7 a PUR_JACK 2 12 3 paza mal Oja Baza TN 122 Pore 181205 ni Peo 7 ier FARSER BATB4CT 3 30 3 3u pai im GNOCOREL 5VDC only z o UDDCORE2 GNDCORE2 5 ONOCORES ma Raa 7 1882 7 lt UDDCORE4 GNDCORE 4 I SkE6 BCA eorex 3 Icon gt A UNNCORF S GNACORFS 100 Ices uN SNDBU cs eh 01092. I I RS lt lt 325 PIP LLLSEE LRA LUV PMS XS lt EO So sss 97 RRR SES gt SESS am gt YS e S lt ct I cs v lt SPIO_ SPH HORI MEMORY MAP Address Memory Space 0x0000 0000 Internal Memories OxOFFF FFFF 0x1000 0000 EBI Chip Select 0 FFFF 0x2000 0000 64M on board SDRAM 0x23FFF FFFF EBI Chip Select 1 SDRAMC Ox2FFF FFFF 0x3000 0000 EBI Chip Select 2 Ox3FFF FFFF 0x4000 0000 Chip Select 3 NANDFlash Ox4FFF FFFF Controller 0x5000 0000 EBI Chip Select 4 Compact Flash EEFF Slot 0 0x6000 0000 EBI Chip Select 5 Compact Flash 0x6FFF FFFF Slot 1 0x7000 0000 EBI Chip Select 6 0x7FFF FFFF 0 8000 0000 EBI Chip Select 7 Ox8FFF FFFF 0x9000 0000 Undefined Abort OxEFFF FFFF OxF000 0000 Internal Peripherals OxFFFF FFFF 256M Bytes 256M Bytes 64M Bytes 192M Bytes 256M Bytes 512M Bytes NANDFlash 256M Bytes 256M Bytes 256M Bytes 256M Bytes 1 518M Bytes 256M Bytes oxFFFF 0x0000 0000 0x10 0000 0x10 8000 0x20 0000 0x20 1000 0x30 0000 0x30 1000 0x50 0000 0x50 4000 OxOFFF FFFF Peripheral Mapping OxF000 0000 OxFFFA 0000 OxFFFA 4000 OxFFFA 8000 OxFFFA C000 OxFFFB 0000 OxFFFB 4000 OxFFFB 8000 OxFFFB C000 OxFFFC 0000 OxFFFC 4000 OxFFFC 8000 OxFFFC C000 OxFFFD 0000 OxFFFD 4000 OxFFFD 8000
3. Jas 95555 loo sjo O EBmnnn j noss 0 0 7 agrze SOFTWARE development with SAM9 L9260 Overview The board comes with Linux preloaded in the NAND flash It s based on a custom built kernel and a Debian 4 0 userland To use it connect a null modem cable to the board and to a serial port on your computer start a terminal program e g HyperTerminal on Windows minicom on Unix systems and configure it to use a 115200 baud rate 8 data bist 1 stop bit and no parity and no flow control Then apply power to the board use a SVDC regulated power supply with at least 500mA output current and you should see the board start up messages The default root password is Restoring the default bootloader and kernel If for some reason you need to restore the default factory configuration of the board the procedure is as follows First install the ATMEL AT91 ISP package which comes on the disk Reboot the computer if needed and copy the NANDFLASH tcl file from the ATMEL directory on the CD to C Program Files ATMEL Corporation AT91 ISP v1 9 SAM BA v2 5 lib AT91SAM9260 Ek Remove the NANDF_E and DF_E jumpers on the SAM9 L9260 board and power it up Connect an USB cable to the USB_D connector on the board and wait for the board to be detected if necessary install the USB driver available in the atmel samba driver directory Close the NANDF_E jumper and run t
4. 1605 R38 5 200 Ti 4 887218 r 11 70 4 RLOUT TAT 1080 amp R20uT R2IN 1 655136 P 3 ess tm 8 Sf sca 6 tour 76 25 100nF ST of PHY_PDE PHY_PDCTAL 76 I 11 a PHY _IRG R25 Coe 03 30 PELO 4 1I PBUL 4 31 PAL _ETX2 PAL1_ETX3 PAL2_ETX PAL3_ETX1 PA46_ETXEN PAL9_ETXCK PA22_ETXER PAZB_ECRS PA29_ECOL PROCESSOR FEATURES SAM9 L9260 board use CPU AT91SAM9260 from Atmel with these features Incorporates the ARM926EJ S ARM Thumb Processor o DSP Instruction Extensions ARM Jazelle Technology for Java Acceleration External Bus Interface EBI o Supports SDRAM Static Memory ECC enabled NAND Flash and CompactFlash USB 2 0 Full Speed 12 Mbits per second Device Port o On chip Transceiver 2 432 byte Configurable Integrated DPRAM USB 2 0 Full Speed 12 Mbits per second Host Ethernet MAC 10 100 Base T o Media Independent Interface or Reduced Media Independent Interface 28 byte FIFOs and Dedicated DMA Channels for Receive and Transmit Bus Matrix o Six 32 bit layer Matrix o Boot Mode Select Option Remap Command Fully featured System Controller including o Reset Controller Shutdown Controller o Four 32 bit Battery Backup Registers for a Total of 16 Bytes o Clock Generator and Power Management Controller o Advanced Interrupt Controller and Debug Unit
5. OxFFFD C000 OxFFFE 0000 OxFFFE 4000 OxFFFF C000 Internal Memory Mapping Boot Memory 1 ROM Reserved SRAMO Reserved SRAM1 Reserved UHP Reserved TCO TC1 TC2 UDP MCI TWI USARTO USART1 USART2 SSC ISI EMAC SPIO SPI1 USART4 USART5 TC3 TC4 TCS ADC Reserved SYSC 32K Bytes 4K Bytes 4K Bytes 16K Bytes 16K Bytes 16K Bytes 16K Bytes 16K Bytes 16K Bytes 16K Bytes 16K Bytes 16K Bytes 16K Bytes 16K Bytes 16K Bytes 16K Bytes 16K Bytes 16K Bytes 16K Bytes 16K Bytes 16K Bytes 16K Bytes Notes 1 Can be ROM EBI_NCS0 or SRAM depending on BMS and REMAP System Controller Mapping 0xFFFF C000 OxFFFF E800 OxFFFF EA00 OxFFFF EC00 OxFFFF EE00 0xFFFF EF10 0xFFFF F000 0xFFFF F200 OxFFFF F400 OxFFFF F600 OxFFFF F800 OxFFFF FA00 OxFFFF FC00 OxFFFF FD00 OxFFFF FD10 OxFFFF FD20 OxFFFF FD30 OxFFFF FD40 OxFFFF FD50 OxFFFF FD60 P FFFF Reserved Ecc SDRAMC SMC MATRIX CCFG AIC DBGU PIOA PIOB PIOC Reserved PMC RSTC SHDC RTTC PITC WDTC GPBR Reserved 512 Bytes 512 Bytes 512 Bytes 512 Bytes 512 Bytes 512 Bytes 512 Bytes 512 bytes 512 bytes 256 Bytes 16 Bytes 16 Bytes 16 Bytes 16 Bytes 16 Bytes 16 Bytes POWER SUPPLY CIRCUIT The power supply for SAM
6. SAM9 L9260 development board Users Manual Petes Geen All boards produced by Olimex are ROHS compliant Rev A April 2008 Copyright c 2008 OLIMEX Ltd All rights reserved INTRODUCTION SAM9 L9260 is a low cost development platform with ARM9 microcontroller 64MB SDRAM and 512MB NAND Flash The board has Ethernet 100Mbit controller USB host USB device RS232 and a 40 pin extension port with all unused SAM9260 ports available for add on boards SAM9 L9260 has vast amounts of Flash and RAM and runs Linux WindowsCE and other RTOS natively There is an on board RTC clock with 3V Li battery backup BOARD FEATURES MCU AT91SAM9260 16 32 bit ARM9 180MHz operation standard JTAG connector with ARM 2x10 pin layout for programming debugging with ARM JTAG 64 MB SDRAM 512MB NAND Flash seen in Linux as silicon drive Ethernet 100Mbit connector USB host and USB device connectors RS232 interface and drivers SD MMC card connector one user button and one reset button one power and two status LEDs board voltage regulator 3 3V with up to 800mA current single power supply 5V DC required power supply filtering capacitor 18 432 Mhz crystal extension port PCB FR 4 1 5 mm 0 062 soldermask silkscreen component print Dimensions 100 x 80 mm 3 94 x 3 15 ELECTROSTATIC WARNING The SAM9 L9260 board is shipped in protective anti static packaging The board must not be subject to h
7. ESAS DADB TCLKO ERK2 Hiz Bat Eat 55 vce 24 NRST 25 bear TIJA RACK Da Fue sa A oan JARL a _P33 470 So e PA28 TIJA2 ECRS 222 38 2 252 wees ra sr z PA297SCK1 ECOL oz 02 vena Bs LASH E aT4SDBIS1D SU gz ot Dies pa S REN ae CS 10 tc S REN WRITE PROTECTED NORMALLY OPEN Pa 02 gros 17 _ 250 Ore PsosPt_ats0 TJ003 ER id BASN 187 pas mas BASN SPI14051 T 1063 7031 n 3 RSS OF 55 PB SPF seek HA 038 ce van Hee g PB3 Spl1 NPCSO TIOAS SOCKENS Car vesz SDELEEN ez oc28 028 142 028 HE a usss 073 PE5 RXC PC277027 5501 ussar 3 39 25 100F 6 20 Phoon 28 PB6 XC1 TOLKA 26 026 He 556 ussc2 12 42 4 ussaz 75 ae 2 m tases AE 26 1 css 0 Sst 2 ussa wa 2 pl aN PBI RXT2 PC232023 D LA 58 miska os pc22 0227 FAs 82 K4S561632C TE7L7S K4S521632F TE7L75 LAN ferrite bead gh PBLL RXDS S1_08 PC21 D21 EF 100 PB14 DRXE P220 070 8P11 NPCS3 ia AN RST Gur 76 30 AR 3 9 5P11 NPCS 1 10 x PBLS DI XE NCS i con 5 44 delete el dated Pim PBLE TKOFTCLK2 P218 0 8 SPI1 NPSL Su 7
8. kasusqa 1 O 20 84 PB17 TF TCLKA 017 027 SPIO_NPCS3 ae 8 23 8516 026 S01 NCS REN 4 pat 20 31 gt 8922 Sa PBLe RCO TOES PCLB NLAIT ROL use E885 3 2 ar Es 9 PB29 RKE ISL POI 4 NCS3ZNANICS ROZ ADLA 1I PCL4 111 PC13_RDYBSY PC14_NANDCS PC15 af gt Ls Zz Pr aarti arts 55 AE 9010 2 14 11 13 0 NANDCS PC15 2 13 Gann z 7 32 28 87 mon ga I esa cee SPIE NPSL u FR A E sos nee So pazsroebe sst_03 fea m RO I FXSD FXEN 1 58 5 PB24 DTRE SI D4 PCS NCSS CFCS1 T 0B0 ar a 35 RKD2 PHYAG2 5 2T RXDL PHYACS a PB26 RTS2 SL 0S PC7 TIOBA CECE2 RDO BHYALS 3 P6 TIOB2 CFCEL Jere 20 por VEDIET DCS A24 SPI1 NPESE EET FT TA 28 asa LEDen PB29 CTS1 SL I 2CA NZ3 SPI1 NPCS2 48 LED2 0UPLCX RXIU SRSD PCS_LPOK Eee SI PCA PADI CKO a 22 eo septeernrer RXC F PB317PCK1 SIH2K PCB ADO SCKS EDO TEST co eee a 330 asok 330 3 30 de 111 14 311 111 1 311 Peen TE PHR LED ARENA sp amp 5
9. o Periodic Interval Timer Watchdog Timer and Real time Timer Reset Controller RSTC o Based on a Power on Reset Cell Reset Source Identification and Reset Output Control Clock Generator CKGR o Selectable 32 768 Hz Low power Oscillator or Internal Low Power RC Oscillator on Battery Backup Power Supply Providing a Permanent Slow Clock to 20 MHz On chip Oscillator One up to 240 MHz PLL One up to 130 MHz PLL Power Management Controller PMC o Very Slow Clock Operating Mode Software Programmable Power Optimization Capabilities o Two Programmable External Clock Signals Advanced Interrupt Controller AIC o Individually Maskable Eight level Priority Vectored Interrupt Sources o Three External Interrupt Sources and One Fast Interrupt Source Spurious Interrupt Protected Debug Unit DBGU 2 wire UART and Support for Debug Communication Channel Programmable ICE Access Prevention Periodic Interval Timer PIT o 20 bit Interval Timer plus 12 bit Interval Counter Watchdog Timer WDT o Key protected Programmable Only Once Windowed 16 bit Counter Running at Slow Clock Real time Timer RTT o 32 bit Free running Backup Counter Running at Slow Clock with 16 bit Prescaler One 4 channel 10 bit Analog to Digital Converter Three 32 bit Parallel Input Output Controllers PIOA PIOB PIOC o 96 Programmable I O Lines Multiplexed with up to Two Peripheral I Os o Input Change Interrupt Capability on Each I O Line o
10. board weet http 192 168 0 xx hello chmod 777 hello hello Proba proba 0 1 Using JTAG to program the board A sample project is provided in the TEST BUTT directory that demonstrates how to write a project that runs directly on the core without the need of an operating system It was developed using IAR Embedded Workbench for ARM ver 4 42A with a Segger J Link JTAG adapter Common Questions Q When booting from the internal NAND flash the board seems to hang at INIT version 2 86 booting and or Activating swap done lines A When mounting the JFFS2 root filesystem the system performs a consistency check similar to fsck This almost blocks all access to the nand flash and the system appears to hang Please wait on a first boot of a new filesystem this could take up to 5 minutes and is normal Q There are messages Buffer I O error on device mtdblockO logical block request I O error dev mtdblockO sector during boot up Is there a problem on the board A These messages indicate incorrect OOB records in the part of the flash where the bootloader is stored and are due to the version of SAM BA which is used to write the various parts of the bootloader We consider the above messages as harmless Q Why use an older version of SAM BA with the OOB problem described above A Because the used u boot bootloader is unable to understand the correct new OOB layout This should be cor
11. port directly to the core Instructions may be inserted and executed by the core thus allowing SAM9260 memory to be programmed with code and executed step by step by the host software For more details refer to IEEE Standard 1149 1 1990 Standard Test Access Port and Boundary Scan Architecture and SAM9260 datasheets and users manual 2 4 6 8 10 42 14 46 48 20 Ping Signal Name Ping Signal Name 1 VCC 2 VCC 3 ICE_NTRST 4 GND 9 TCK 10 GND 11 RTCK 12 GND 19 NC 20 GND Standard 20 pin ARM JTAG connector for programming and debugging UEXT Signal Name PBO SPI1_MISO PB1 SPI1_MOSI PB2 SPI1_SPCk Ping 3 PB8 TXD2 4 PB9 RXD2 5 PA24 TWCK 8 9 10 PB3 SPI1_NPCS0 UEXT is a universal OLIMEX connector with 3 3V power supply and UART 2 and SPI interface Other device or modules with these interfaces can connected with UEXT For example MOD NRF24L MOD RFID125 MOD MP3 and many other are on the way SPI The Serial Peripheral Interface SPI circuit is a synchronous serial data link that provides communication with external devices in Master or Slave Mode It also enables communication between processors if an external processor is connected to the system I2C The Atmel Two wire Interface TWI interconnects components on a unique two wire bus made up of one clock line and one data line with speeds of up to 400 Kbits per second based on a byte o
12. 33K 3 30 Ae al ens 82 nc HH uss nse H 1843 Tra z ne tes uss aL Ma ms 22 9 KORXEOOUITT a 2 wes fas kl 8865 R papapa paarsora atsoncpae 100 Se S S 8 caceraves pas B 199 pas spa vostnccoe faz nF 100 SM TAKT6x3 8 PRZ SPIa SpcK par 5 ib 551 PA37SpI9_NPCS02HCDE3 68 D veo PA PTSZ7 C032 aR MECK gage 5 RT uss Fees ar P Z necpn va m 8 ch 5550 permban me A T 012 Soe PALB NCDR2 ETX2 aa om Aa coe H ecs 5555 Pati nCDe3 ETx3 A2 002 ma 002 coz RSS Fads PALZJETXE au numz nese 3 03 83 Raz 238 amp 100 28268 PP13 ETX1 AB NBSO Aa och Bee 05 0 i W Trea Pa mee ae Boe sata PALG ETAEN 025 ar 007 225 0 Bone 4 02 656 Nast gape PRI SvERXER 013 As 09 nes besa DALS ETACK 022 ALBA paro RST 3 3u PAG EBS PESA 20 Ali baat 24 LE PA217EFDI3 79 12 D012 0612 12 af ss gs be pag cit 5 a paz spek BEES PAZ4 TLCK ETAS Baa 0015 0645 oso s
13. 9 L9260 must be regulated 5VDC please apply exactly 5V as the same power line goes to USB hosts and if you apply over 5V you will damage the USB devices attached to the host The current consumption is typical 250mA with 180 MHz clock of SAM9260 and 90MHz clock of external bus For the RTC there is a battery backup power supply from a small 3V Li battery type CR2032 RESET CIRCUIT SAM9 L9260 reset circuit contains a 4 7k pull up resistor and RST button connected to GND CLOCK CIRCUIT Quartz crystal Q1 18 432Mhz is connected to SAM9 L9260 Xin and Xout pins Quartz crystal Q2 32768Hz is connected to SAM9 L9260 Xin32 and Xout32 pins JUMPER DESCRIPTION SMD jumper description 3 3V E This jumper connects the output of main 3 3V regulator VR1 3 3V RC1587 to the rest part of schematic It is useful to measure the current consumption Default state closed 3 3V This jumper 3 3V to 9260 microcontroller It is useful to measure the current consumption Default state closed 1 87 This jumper connects 1 8V to the SAM9260 microcontroller It is useful to measure the current consumption Default state closed BDS BounDary Scan Enable The BDS_E jumper is used to select the JTAG boundary scan when JTAGSEL pin asserted at a high level tied to VDDBU This pin integrates a permanent pull down resistor of about 15KQ to GNDBU When BDS_E is open JTAG functio
14. Individually Programmable Open drain Pull up Resistor and Synchronous Output High current Drive I O Lines Up to 16 mA Each Peripheral DMA Controller Channels PDC One Two slot MultiMedia Card Interface MCI o S DCard SDIO MultiMediaCard Compliant o Automatic Protocol Control and Fast Automatic Data Transfers with PDC One Synchronous Serial Controller SSC o Independent Clock and Frame Sync Signals for Each Receiver and Transmitter o 125 Analog Interface Support Time Division Multiplex Support o High speed Continuous Data Stream Capabilities with 32 bit Data Transfer Four Universal Synchronous Asynchronous Receiver Transmitters USART o Individual Baud Rate Generator IrDA Infrared Modulation Demodulation Manchester Encoding Decoding o Support for 1507816 TO T1 Smart Card Hardware Handshaking RS485 Support o Full Modem Signal Control on USARTO Two 2 wire UARTs Two Master Slave Serial Peripheral Interfaces SPI o 8 to 16 bit Programmable Data Length Four External Peripheral Chip Selects o Synchronous Communications Two Three channel 16 bit Timer Counters TC o Three External Clock Inputs Two Multi purpose I O Pins per Channel o Double PWM Generation Capture Waveform Mode Up Down Capability High Drive Capability on Outputs TIOAO TIOA1 TIOA2 One Two wire Interface TWI o Master Multi master and Slave Mode Operation o General Call Supported in Slave Mode IEEE 1149 1 JTAG Boundary Scan on Digital P
15. Linux 2 6 23 with patches available from http maxim org za The root filesystem is based on the NSLU2 debian filesystem available from http www cyrius com debian nslu2 The bootloader is based on the u boot 1 2 0 and at91bootstrap 2 3 packages provided by ATMEL at http www at91 com The cross compilers are available from various sources on the Internet namely http arm cirrus com All of the above packages are distributed under the GPL and or another free license e g BSD license ORDER CODE SAM9 L9260 assembled and tested no kit no soldering required How to order You can order to us directly or by any of our distributors Check our web www olimex com dev for more info Pete Geen boards produced by Olimex are RoHS compliant Revision history REV A create April 2008 Disclaimer 2008 Olimex Ltd All rights reserved Olimex logo and combinations thereof are registered trademarks of Olimex Ltd Other terms and product names may be trademarks of others The information in this document is provided in connection with Olimex products No license express or implied or otherwise to any intellectual property right is granted by this document or in connection with the sale of Olimex products Neither the whole nor any part of the information contained in or the product described in this document may be adapted or reproduced in any material from except with the prior written permission of t
16. UDDANA T Tere T SL Pour 160 iur Tieene mie ee I I Lu ape 10QuF 6 3U tant een 229 par ll 7 Li_bat_helder ST SE e gar tase ADUREFP 3 39 g een ac 8 ST Ai Don x GNDPLLBCGNDOSC3 oon 3 Fi Bam Seats Sr BL Tl TNBBLOSINAD JJJ x0Ur32 HDPA HONA DDP DDH I 5 180 OSCSEL some 192 a eee RA 195 PLLRCA crs OR TEN pci lI ipa en soue Fete EDUEN wo sHoN socke SDCLKEN NANDF_E NTRST_E CE SPEER ice nrest 74 s watt RADE 3 aen saprenn 51 3 nestas none NANOUE NANDOE l 42 g g x T ra zi g Tek nmoveroe 89 apa sn 8 cay 191 E Si ok 8 20 NUR2 HBS2 5FI0R 18 RE 1 20 10005 Sar ms NURBANLE CFLE 20 WE 152 ang 058 8 Ra AGS Nes1 socs 183 SDES Hmm ee o 20 0 Nese 123 5 ALE 1 304 RFE USE Nest AZ2 NANDCLE 3 3u oe 10075 MERB20 1st NANDALE 0276 Pe TDI THs TCK BTCK 100 JT AGSELJNTRST NAST 22 ens 225 22 13 44 HONA Pet 390 2 co 338 gt Aas 37 as 33k 33K
17. XT The BATerry EXTernal jumper defines the power source which supplied backup logic from VDDBU pin 47 BAT position Li battery type CR2032 plugged in BAT holder supplied VDDBU through backup VR3 1 8V MCP1700T 1802E MB voltage regulator EXT position The VDDBU is powered from main 1 8V voltage regulator VR2 1 8V 1 1117 Default state BAT EXT INTRC EXTCLK The INTRC EXTCLK jumper defines SAM9260 slow clock source INTRC position internal RC slow clock oscilator is selected EXTCLK position external 32768 crystal is used for SAM9260 slow clock Default state INTRC EXTCLK RXD1 DRXD The RXD1 DRXD jumper defines which pin RXD1 or DRXD is connected to RS232 driver ST3232 i e the board allows comunication with PC COM port through RXD1 or DRXD RXD1 position RXD1 function of SAM9260 pin 18 is tied to pin12 R1OUT of U6 ST3232 DRXD position DRXD function of SAM9260 pin 21 is tied to pin12 R1OUT of U6 ST3232 Default state RXD1 DRXD TXD1 DTXD The TXD1 DTXD jumper defines which pin TXD1 or DTXD is connected to RS232 driver ST3232 ie the board allows comunication with PC COM port through TXD1 or DTXD TXD1 position TXD1 function of SAM9260 pin 17 is tied to pin11 T1IN of U6 ST3232 DTXD position DTXD function of SAM9260 pin 22 is tied to pin11 T1IN of U6 ST3232 Default state TXD1 DTXD PHY_PDE PHY_PDCTRL PHY_PDE position The PHY chip U7 KS8721BL
18. enter to power down mode PHY_PDCTRL position The PHY chip power down mode is controled from SAM9260 PC1 pin58 OPEN position The PHY chip is always enabled Default state open PHY PDE PHY PDCTRL NANDF_E The NANDFlash_Enable allows PC14 NAND_CS pin of SAM9260 to controls CE pin of NAND FLASH memory U3 K9F4GO08UXM If the board has to boot from NAND flash the NANDF_E jumper must be closed Default state close NANDF_E DF E The DataFlash_Enable allows PC11 SPIO_NPCS1 of SAM9260 to controls CS pin of serial Data Flash memory U5 AT45DB161D SU If the board has to boot from Data Flash the DF_E jumper must be closed Default state open DF_E INPUT OUTPUT RS232_0 is used as the Linux console so you can connect with a terminal program and work at command prompt The cable between SAM9 L9260 and PC must be female female null modem type Terminal settings are 115200 8bits 1stop no parity no flow control User button named BUT connected to SAM9260 127 PC15 IRQ1 Status green LED with name STAT SAM9260 pin185 PA6 is connected to the system timer and blinks every second Power supply yellow LED with name PWR_LED indicates the state of SAM9260 It is linked to the CPU load and is on when the CPU is idle The LED PWR_5V red indicates 5V presence to the board EXTERNAL CONNECTOR DESCRIPTION TAG The JTAG connector allows software debugger to talk via a JTAG Joint Test Action Group
19. eu 1 rootdelay 10 and for booting from an NFS server at adress 192 168 0 75 U Boot gt setenv bootargs mem 64M console ttySO 115200 root deu nfsroot 192 168 0 75 nfsroot ip 192 168 0 222 192 168 0 75 Building a custom kernel The recommended build method is to use a cross compiler Building natively should also work but will be very time consuming At the moment of writing the current kernel version was 2 6 23 of which a tarball is provided You also need to apply the two patches in the linux directory the 2 6 23 rc3 at91 patch needs to be applied first It adds general support for at91 based boards to the kernel The sam9 19260 diff adds support for the Olimex SAM9 L9260 board and should be applied second After that you can build the default kernel by typing make ARCH arm CROSS COMPILE arm linux sam9 19260 defconfig make ARCH arm CROSS COMPILE arm linux ulmage After the compilation the kernel should be available at arch arm boot ulmage If the build process fails to detect the mkimage program it is available in the u boot archive The new kernel can be transferred to the board by various means e g use the board restoration process and change the kernel in there tftpboot ing the board etc Building the bootstrap binary Extract the sources from boot at91bootstrap 2 3 olimex_18 04 08 tgz to your working directory and issue the following commands substituting lt your compiler prefix gt with e g arm
20. he AT91SAM9260_demo_linux_NandFlash bat file from the sam9 19260 samba directory After a while the log file will be displayed and the system should be restored to the default state WARNING This procedure erases the whole NAND flash and the root filesystem will also be destroyed in the process Restoring the on board root filesystem Boot up the board with an alternate root filesystem e g a USB flash drive NFS exported filesystem and use the following command assuming that the rootjffs2 img file is available in sam9 19260 flash_eraseall j dev mtd1 sam9 19260 nandwrite a dev mtd1 rootjffs2 img You may get some errors about bad blocks not being erased this is normal and is related to the priciple of operation of NAND flashes After the process is completed reboot the board Running with another root filesystem You may choose to use another media for the root filesystem for various reasons more capacity faster access etc A complete root tree is archived in the root sam9 fs tgz file which can be extracted to an empty ext3 partition on an USB drive or to some exported via NFS directory Then you need to tell the kernel where to find the root this is accomplished by interrupting the u boot process at the Hit any key to stop autoboot prompt and setting the bootargs variable For example to boot from a USB flash drive the command is U Boot gt setenv bootargs mem 64M console ttySO 115200 root d
21. he copyright holder The product described in this document is subject to continuous development and improvements All particulars of the product and its use contained in this document are given by OLIMEX in good faith However all warranties implied or expressed including but not limited to implied warranties of merchantability or fitness for purpose are excluded This document is intended only to assist the reader in the use of the product OLIMEX Ltd shall not be liable for any loss or damage arising from the use of any information in this document or any error or omission in such information or any incorrect use of the product
22. igh electrostatic potentials General practices for working with static sensitive devices should be applied when working with this board BOARD USE REQUIREMENTS Cables 1 8 meter USB A B cable to connect with USB host Null modem RS232 female female to connect with PC COM port Hardware ARM JTAG ARM USB OCD or other compatible tool if you want to program this board with JTAG usually with Linux installed you can develop without the need for JTAG Software The CD contains Linux 2 6 complete with source and binary on CD BOARD LAYOUT ethernet ext usb host reset o3 61 271 z Beast 59 5 gt SCHEMATIC
23. ins Required Power Supplies 1 65V to 1 95V for VDDBU VDDCORE VDDPLL 1 65V to 3 6V for VDDIOP1 Peripheral I Os 3 0V to 3 6V for VDDIOPO and VDDANA Analog to digital Converter o Programmable 1 65V to 1 95V or 3 0V to 3 6V for VDDIOM Memory I Os AT91SAM9260 Block Diagram Sy MASTER SLAVE SLs A lt 5 DS S OL Sw LI O OES lt F D SS SS TST System JTAG Selection and Boundary Scan Controller EZ EAH Transc Transc FIQ IRQO IRQ2 10 100 Ethernet Image 926 5 Processor USB PRYD Interface FIFO FIFO PEKO POK wo XIN XOUT 6 layer Matrix OSCSEL XIN32 XOUT32 D0 D15 SHDN ATNBS2 NWR2 A WKUP Peripheral 22 channel EBI A2 A15 A18 A20 VDDBU Bridge Peripheral CompactFlash A16 BAO DMA NAND Flash A17 BA1 NCS0 VDDCORE NED STF NRST NWRO NWE NWR1 NBS1 NWR3 NBS3 SDCK SDCKE RAS CAS SDWE SDA10 NANDOE NANDWE A21 NANDALE A22 NANDCLE D16 D31 NWAIT A23 A24 NCS4 CFCS0 NCS5 CFCS1 A25 CFRNW CFCE1 CFCE2 NCS2 NCS6 NCS7 NCS3 NANDCS SDRAM Controller Static TCO TC 4 channel USB Memo USART1 ry USART2 TCI 10 bit ADC Device Controller USART3 TC2 TES USART4 ECC USART5 Controller TY vev TTT 11 11 T MEN M MUNE TE H H VW age NW SF Ss gt gt SKV VS VV IV VLP
24. linux make CROSS COMPILE lt your compiler prefix gt MEMORY nandflash at91sam9260ek defconfig make CROSS COMPILE lt your compiler prefix gt MEMORY nandflash If everything is correct the resulting binary file will be located in the binaries directory Building U Boot Extract the sources from boot u boot 1 2 0 atmel olimex_18_04_08 tgz and issue make CROSS_COMPILE lt your compiler prefix gt sam919260_config make CROSS COMPILE lt your compiler prefix gt WARNING Some compiler revisions seem to produce incorrect code and although the compilation succeedes the resultant u boot binary is not working it will either hang completely without any output or will restart when detecting the NAND flash The only revision that is known to work reliably is 3 4 3 while gcc 4 0 1 and 4 1 1 are known to be broken Cross compiling a simple hello world example Extract one of the provided cross compilers on your host system and add it to the PATH variable Use the cross compiler to build the example then transfer it to the board by e g USB flash drive http download etc Example commands the host system PATH PATH usr local arm 4 1 1 920t bin cat gt hello c include lt stdio h gt int main void unsigned int i printfCNYAnProba proba for i 0 1 lt 10 i printfCNAn Id i return 0 AD arm linux gcc o hello hello c cp hello htdocs the
25. n is selected rye Default state open J TCK RTCK Connects RTCK and TCK pins of SAM9260 Default state open KLS WPE Connects PC4 pin62 to Write Protection pin of SD MMC socket If WP function is not used WPE jumper has to be open and PC4 is available of EXT connector pin 20 Default state closed CPE Connects PC8 pin61 to Card Present pin of SD MMC socket If CP function is not used CPE jumper has to be open and PC8 is available of EXT connector pin 14 Default state closed NTRST_E When the NTRST_E jumper is closed connects NTRST pin 35 to JTAG connector pin3 Default state closed WP SFLASH E When the WriteProtect SerialFLASH Enable jumper is closed it allows to protect the boot code written to U5 AT45DB161D SU flash memory WW Default state open When the WriteProtect_NandFLASH_Enable jumper is closed user can t write in the NAND flash k Default state EV A2 L A2 H Connects Address2 A2 pin of U8 24LC256 memory default not mounted to logical O or logical 1 i e A2_L A2 H define the memory address of I2C bus Default state open PTH jumper description BMS LOW Boot Mode Sellect _ LOW jumper select the boot memory External memory or embedded ROM When BMS_LOW is closed BMS pin is logical 0 otherwise logical 1 REMAP 0 REMAP 1 Address 0x0000 0000 Rom EBI_NCSO SRAMO 4K Default state open BMS_LOW BAT E
26. rected in the new revisions Q The I O operations are slow when using the on board nand flash or USB flash drive A When doing a sequential read write e g one single large file flash memories can be fast When reading writing many small files the performance will be really low Q How to boot from the on board DataFlash A Make sure that NANDF_E jumper is not connected and DF_E jumer is connected If the dataflash has been correctly programmed the board should start up Q Is the SD MMC card supported A The SD MMC card is fully supported including detection of card insertion 1 and write lock Q What do the two LED s indicate A These two leds are driven by default by the linux LED driver The green one is connected to the system timer and blinks every second The second one orange is linked to the CPU load and is on when the CPU is idle Q The system time is lost after reset how to avoid that A Unfortunately the Linux AT91SAM9 RTC driver is not yet operational When it is completed you would just need a standard 3V battery at the socket at the back of the board Until then please set the date manually or use a network time synchronization utility as ntpdate Q What is the default IP address of the board A The board is configured to use DHCP to automatically detect it s address If a DHCP server is not available it will fallback to using 192 168 0 220 Acknowledgemens The kernel used is based on
27. riented transfer format It can be used with any Atmel two wire bus Serial EEPROM The TWI is programmable as a master or a slave with sequential or single byte access Multiple master capability is supported Arbitration of the bus is performed internally and puts the TWI in slave mode automatically if the bus arbitration is lost A configurable baud rate generator permits the output data rate to be adapted to a wide range of core clock frequencies UART The Universal Synchronous Asynchronous Receiver Transmitter USART provides one full duplex universal synchronous asynchronous serial link Data frame format is widely programmable data length parity number of stop bits to support a maximum of standards The receiver implements parity error framing error and overrun error detection The receiver timeout enables handling variable length frames and the transmitter timeguard facilitates communications with slow remote devices Multidrop communications are also supported through address bit handling in reception and transmission RS232 connector USB_D The USB Device Port UDP is compliant with the Universal Serial Bus USB V2 0 full speed device specification Each endpoint can be configured in one of several USB transfer types It can be associated with one or two banks of a dual port RAM used to store the current data payload If two banks are used one DPR bank is read or written by the processor while the other is read or wri
28. st addresses It can recognize the broadcast address of all ones copy all frames and act on an external address match signal Signal Name TD RD GND_LAN GND_LAN GND_LAN LED coo Usage Left 100MBits s Half Full duplex EXT Signal Name 3 3V OUT 2 3 3V OUT Signal Name PC15 NWAIT IRQ1 4 5V OUT PBO SPI1_MISO TIOA3 PC14 NCS3 NANDCS IRQ2 NAND Flash Chip select MCU out PB1 SPI1_MOSI TIOB3 PC13 FIQ NCS6 NAND Flash RDY BSY MCU in PB2 SPI1_SPCK TIOA4 PC10 A25 CFRNW CTS3 PB3 SPI1_NPCS0 TIOAS PC9 NCS5 CFCS1 TIOBO PB4 TXDO PC8 NCS4 CFCSO RTS3 PB5 RXD0 PC7 TIOB1 CFCE2 a 3 17 PB8 TXD2 18 PC6 TIOB2 CFCE1 19 PB9 RXD2 20 PC4 A23 SPI1_NPCS2 25 6 27 33 35 PB10 TXD3 ISI_D8 PB31 PCK1 ISI_MCK PB11 RXD3 ISI_D9 PB30 PCKO ISI_HSYNC PB16 TKO TCLK3 2 PB29 CTS1 ISI_VSYNC RS232_0 CTS MCU input PB17 TFO TCLK4 2 PB28 RTS1 ISI_PCK RS232_0 RTS MCU output 2 2 PB18 TDO0 TIOB4 PB27 CTSO ISI_D7 PB19 RDO0 TIOB5 PB26 RTSO ISI_D6 PB20 RKO ISI_DO 34 PB25 RI0 ISI_D5 0 2 4 6 2 4 8 0 2 PB21 RFO ISI_D1 36 PB24 DTRO ISI_D4 PB22 DSRO0 ISI_ D2 PB23 DCDO ISI_D3 This is provision for 40 pin external connector not mounted with all unused SAM9260 ports available for user applications and add on boards MECHANICAL DIMENSIONS N 10000000000000 so 6600000006 S
29. tten by the USB device peripheral This feature is mandatory for isochronous endpoints Thus the device maintains the maximum bandwidth 1M bytes s by working with endpoints with two banks of DPR Signal Name 5V input 3 4 USB_A Ping Signal Name USB host with 5V power line direct connected through 300mA resetable fuse to power jack The USB Host Port UHP interfaces the USB with the host application It handles Open HCI protocol Open Host Controller Interface as well as USB v2 0 Full speed and Low speed protocols The USB Host Port integrates a root hub and transceivers on downstream ports It provides several high speed half duplex serial communication ports at a baud rate of 12 Mbit s Up to 127 USB devices printer camera mouse keyboard disk etc and the USB hub can be connected to the USB host in the USB tiered star topology The USB Host Port controller is fully compliant with the Open HCI specification The standard OHCI USB stack driver can be easily ported to Atmel s architecture in the same way all existing class drivers run without hardware specialization LAN The EMAC module implements a 10 100 Ethernet MAC compatible with the IEEE 802 3 standard using an address checker statistics and control registers receive and transmit blocks and a DMA interface The address checker recognizes four specific 48 bit addresses and contains a 64 bit hash register for matching multicast and unica
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