Home

MCIMX53SMD Board Hardware User`s Guide

1. No Connect No Connect Display Data Ready 1 5V Power VLDO9 Display Horiz Synch
2. SH4 Shield Ground Shield Ground 60 Ground Display Rst Active Low 58 Display Vert Synch No Connect 56 Display Horiz Synch No Connect 54 Ground Display Power Down J 52 Display Data19 No Connect 50 Display Data18 3 2V Power 48 Ground 3 2V Power 6 0 2 M 5 9 46 Display Data17 3 2V Power lt 44 Display Data16 Display Data Clock 2 2 42 Ground No Connect E 40 SPDIF Data Transmit No Connect 8 38 SPDIF Data Clock No Connect 2 36 Ground Display Pixel Clock E 32 Display Data14 2 Clock a 2 30 Ground 2 Data 3 2 28 Display Data13 Connect 2 26 Display Data12 1 8V Power VLDO8 2 e 24 Ground No Connect 22 20 1 8V Power VLDO8 8 18 Ground 1 8V Power VLDO8
3. 2 lt Figure 11 3 Assembly Drawing Top MCIMX53SMD Board Hardware User s Guide Rev 0 79 th 8 BE AY da E LL 83 i3 3 1 3 1 Q4 pm ET 11 Ps iw 1 E E Om sto UM 223 Do pes 3 un LI BP 0 1 T ms 11 Figure 11 4 Assembly Drawing Bottom MCIMX53SMD Board Hardware User s Guide Rev 0 pe S Freescale Semiconductor 12 Schematics The schematics consist of 22 pages schematic pages be downloaded from the following Web page http www freescale com webapp sps site prod summary jsp code RDIMX53SABRETAB amp fpsp 1 amp tab Desi gn Tools Tab 13 Bill of Materials The Bill of Materials BOM used to manufacture the MCIMX53SMD board is presented in this section The capacitors and resistors used are considered as generic type components and do not include manufacturer names or part numbers The remaining parts have manufactures and part numbers provided for the primary part specified Second source vendors are not included The final section of the BOM includes the list of parts that are not populated on the MCIMX53SMD board at the time of manufacturing The BOM for MCIMX53SMD board can be downloaded from the following Web page http www freescale com weba
4. _ Figure 4 5 USB Connector 4 6 Mini HDMI Connector 25 The MCIMX53SMD board has one mini HDMI connector that can be used to connect the MCIMX53SMD board to HDMI display The mini HDMI connector is connected to HDMI transceiver 519022 RGB signals and SPDIF are connected with the i MX53 processor cable is supplied as part of the MCIMX53SMD board kit and can be inserted into the mini HDMI connector at the point shown in Figure 4 6 Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 23 Mini HDMI Connector J25 Figure 4 6 Mini HDMI Connector 4 7 Debug Connector J127 MCIMX53SMD board has one debug connector that can be used to connect the MCIMX53SMD board to the debug board It includes JTAG RS 232 and Ethernet It is easy to use to debug the board for SW engineer A debug board is supplied as part of the MCIMX53SMD board kit and can be inserted into the debug connector at the point shown in Figure 4 7 A standard Cat V Ethernet cable is attached to the debug board at the Ethernet The connector allows the Ethernet IC to auto configure the port for the correct connection to either a switch or directly to a host PCon a peer to peer network It is not necessary to use a crossover cable when connecting directly to another computer A Cat V Ethernet cable is supplied as part of the MCIMX53SMD board kit To connect a host PC to the MCIMX53SMD board to recei
5. 16 No Connect Display Backlight Return 14 5V Power x 12 Ground 5V Power o 10 No Connect Display Backlight Power 8 5V Power 5V Power 75 3 2V Power 2 S 1 4 5V Power 2 775V Power 1004 2 5V Power 1 8V Power VLDO8 SH2 Shield Ground Shield Ground Figure 6 14 Expansion Port J78 Table 6 14 Expansion Port J78 64 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor 178 PIN 113 Name i MX53 Pin Name ALT 1 ALT 3 26 CSIO_DAT12 CSIO_DAT12 GPIO5_30 28 650 DAT13 CSIO_DAT13 5 31 29 I2C2 SDA KEY ROW3 13 ASRC EXT CLK 31 2 2 SCL KEY COL3 4 12 32 51 0 14 CSIO DAT14 GPIO6 0 33 DISPO RESET EIM WAIT 5 0 WEIM DTACK B 34 CSIO DAT15 510 DAT15 GPIO6 18 35 510 PIXCLK CSIO PIXCLK 5 18 38 PCLOCK GPIO_7 GPIO1 7 EPITO can1 TXCAN 40 5200 TX GPIO_17 GPIO1 12 SDMA EXT EVENTO PMIC RDY 43 DISPO DCLK DIO DISP CLK 15 44 0 DAT16 510 DAT16 GPIO6 2 46 CSIO DAT17 510 DAT17 GPIO6 3 50 0 DAT18 CSIO DAT18 GPIO6 4 52 510 DAT19 CSIO DAT19 GPIO6 5 uart6 CTS 53 5 510 PWDN NANDF RBO GPIO6 10 56 CSIO VSYNCH 510 VSYNCH 5 21 58 CSIO_HSYNCH CSIO_MCLK GPIO5 19 ccm 510 MCLK
6. eere teda a eed 18 3 20 2 RESET BUOM e PE eats 5444 tens 18 3 21 User ntetface ete 18 3 22 LON Battery Connector 112 oot ett 18 3 23 Back Up Coin Cel Posts BTI etre t eta eret 18 4 MCIMX53SMD Board eene a uh a panqa 19 41 Wall 15V Power Jack 135 3 iic t etu m e tu S tu t 19 Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 3 4 2 SD Card Connector 113 2 19 4 3 Headphone Output Connector S130 ccccccccssssccecssecececssscececssesececssesececsessececseseececseeseescseseeesesssaeaes 20 44 Dual USB Host Jack 81 32 eR 21 4 5 USB Device Connector 34 AA 22 4 6 Connector 25 2 2 12 6002 0000000000000000000000000000000000000 Qa saa 23 4 7 Debug Connector 1127 eene ter eere ae eee evo ve eae ye a eoe egens 24 48 SATA Conhector J5 4 Zl dede 25 4 9 013 5 e i cabs ER E RR ERE ERR ER EE YE 26 410 LVDS Connector 028 129 ccs
7. Ground LVDS Clock Negative LVDS Clock Positive Ground Touch Panel 5V Supply Touch Panel 5V Supply Ground Ground LED 5V Supply 1UHEBEBHBEEHHHRE LED 5V Supply LED 5V Supply Touch 2 Clock Touch 2 Data Touch 12C Interrupt Touch Function Table 6 8 Freescale Semiconductor Figure 6 8 LVDS Connector J28 J29 LVDS Connector J28 J29 MCIMX53SMD Board Hardware User s Guide Rev 0 57 Command Ground 3 3V Power Clock Ground DataO Data1 Data2 No Connect No Connect No Connect No Connect Card Detect Write Protect Shield Ground Shield Ground Shield Ground Shield Ground Nie 3 4 5 6 7 8 9 Table 6 9 SD Card Connector J13 Figure 6 9 SD Card Connector J13 58 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor 3 3V Power 3 3V Power 4 No Connect GND No Connect GND GND 3 3V Power 1 8V Power 3 3V Power GND GND No Connect No Connect No Connect No Connect No Connect No Connect WLAN HOST WAKE WLAN PD WLAN SD DATO GND WLAN SD CLK GND WLAN SD DAT1 WLAN SD DAT2 WLAN SD CMD WLAN SD DAT3 No Connect 3 3V Power BT PCM OUT BT PCM IN BT PCM BCK BT PCM SYNC BT PCM MCK No Connect No Connect No
8. 1 8V Power 7 GND 8 3 3V Power 9 pe JTAG TCK 1 JTAG TRST TMS JTAG SRST GND RESET No Connect No Connect No Connect GND ENET Eth RXNO 4 ENET_LINKLED Figure 6 12 Debug Connector J127 No Connect ENET 100MLED No Connect No Connect Eth RXPO 5V Power Eth TXNO GND ENET Eth TXPO Table 6 12 Debug Connector J127 Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 GND Right Line Out GND Left Line Out Right Line In GND Left Line In No Connect GND No Connect VGA EDID Data 3 3V Power VGA EDID Clock SYS EJECT GND ON OFF Sleep Wake VGA VSYNC Dock Detect VGA HSYNC GND VGA GND 1 8V Power IOR 3 3V Power IOG 5V Power VGA GND GND IOB GND GND 15V Power USB Data 15V Power USB Data No Connect GND No Connect No Connect No Connect No Connect No Connect No Connect No Connect Table 6 13 VGA Dock J131 Figure 6 13 VGA Dock J131 62 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor Shield Ground Shield Ground
9. 43 5 6 EE 43 5 7 u oa dak da ob bass ba 43 58 u endete T ie a ea miu qas 43 5 9 LVDS Video Outputs S ke Bee tee 44 5 10 Expansion depue U P 45 5 11 Andi u ka ay kos 45 5 12 Ethernet Debug 46 5 132 USEPA CONDECION eeu tote diede etie en 47 5 14 M 47 5 15 Debug UART Serial Port Debug 48 5 16 Operations Debug Board tere ENA 48 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor 917 CMOS SOAS OF 40 k S tea bien teet eL rS 49 5 18 5 ae ad do aaa ea anda 49 6 18 1 49 6 18 2 COMPASS 74 9 01546 49 6 18 3 CAP TOUCH SENSON zuo ee Setter RR eb hn 49 6 18 4 14 0 Sensor uere tee i eie E ea Te pad ex
10. 50 5 19 3G Modem kenaa de a ette eb teda deti det a o ect mt eus 50 5 202 WIPFI BT Module s yy w i eee atre esed te e e pee at e ED 50 5 21 GPS Module ici ERR RETE ERU E PARERE RR EP 50 5622 ZI8B66 LE 50 6 Connector PI OUIS i u u apu te tete t 51 BoardjACCessoriess e desee dote ee i eit i is ute a iot det al iate et ea ee OSEE VE Rota 69 7 1 t i A E A mh sasaqa 69 8 Mechanical PCB Information lt lt lt lt lt lt 69 9 TBoard VerifiCatl Omics u rere d Rh Oe 71 JO Troubleshooting sree a aa ua 74 10 1 PMIENVoltage Rail Test Points etie 75 11 PCB COMPONENT Locations z u 76 12 81 13 Bill of Materials rtt hee Pe dn evens aq asua 81 14 FCC Statemierit y u uA tise ee eee An pe ibi ERE 81 Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 5 Figure 1 1 Figure 4 1 Figure 4 2 Figure 4 3 Figure 4 4 Figure 4 5 Figure 4 6 Figure 4 7 Figure 4 8 Figure 4 9 Figure 4 10 Figure 5 1 Figure 5 2 Figure 5 3 Figure 5 4 Figure 5 5 Figure 6 1 Figure
11. gt Fo e fo 55 i w 028 171 0122 5 3 4 i MX53 Internal Regulators The i MX53 Applications Processor contains two internal voltage regulators which can supply VDDA VDDAL VDD_DIG_PLL and VDD_ANA_PLL The power input for this pin is VDD_REG pin G18 On the MCIMX53SMD board this pin is connected to VBUCKPERI and is set to 2 5V The Digital PLL voltage regulator can be selected to supply VDD_DIG_PLL through an internal on die connection The VDD_DIG_PLL pin can also be connected to the VDDA and VDDAL pins through an external connection to allow the Digital PLL regulator to supply these rails as well The Digital PLL regulator is set to start at a reduced voltage value of 1 2V but is programmed by software to increase to 1 3V in the beginning of the boot process On the MCIMX53SMD board the VDD DIG PLL connection to VLDO2 is not populated by default so that VDD DIG PLL power is supplied by the internal regulator The VDDA supply pins are connected to VLDO10 through a shorting trace SH22 If the developer wishes to experiment with supplying VDDA from the internal regulator the trace between the two pads of SH22 can be cut The VDDAL supply pin is connected to VLDO6 through a shorting trace SH24 If the developer wishes to experiment with supplying VDDAL from the internal regulator the trace between the two pads of SH24 can be cut The Analog PLL voltage regulator
12. DEBUGG usb2 RXVALID 66 Dispo DAT2 DEBUG MODE 7 DEBUG7 usb2 RXACTIVE 68 DISPO DAT3 7 DEBUG EVENT BUS ERROR DEBUG usb2 RXERROR 70 biSPO DEBUG BUS RWB DEBUGO usb2 SIECLOCK 72 DISPO DATS 7 DEBUG MATCHED DMBUS DEBUGIO usb2 LINESTATEO 74 DISPO DATG 7 DEBUG RTBUFFER WRITE EMI DEBUGI1 usb2 LINESTATE1 DISPO DAT7 7 EVENT CHANNELO EMI DEBUGI2 usb2 VBUSVALID 78 DISPO DAT8 DEBUG EVENT CHANNEL1 DEBUG13 usb2 AVALID Legend AUDMUX4 ECSPI2 Table 6 15 Expansion Port Pin Mux Table continued 66 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor 178 PIN 113 Name i MX53 Pin ALT 1 ALT 2 ALT 3 79 DISPO POWER EN D24 GPIO3 24 uart3 TXD ecspi1 552 80 DISPO DISPO DAT9 GPIO4 30 pwm2 PWMO wdog2 WDOG B 81 DSIPO SER nCS D20 GPIO3 20 DIO PIN16 SER DISPO CS 82 DISPO 10 DISPO DAT10 04 31 84 DISPO DAT11 DISPO DAT11 GPIO5 5 85 DISPBO SER DIN 86 87 DISPBO SER DIO 88 DISPO DATI3 DISPO DATIS GPIOS 7 89 DISPBO SER 90 DISPO DISPO DATId GPIOS 8 o 91 DISPBO_SER_RS 92 ecspi2 551 94 96 9 100 102 meer foso maran eros umma c 104 AUDA TXD 105 uarti DCD 106 AUDA TXFS 107 DI PIN12 108 ecspi1 550 AUDA_RXD _ 109 CSIO D3 110 112 551 2 114 116 117 DISPO_RD
13. 4SV from HIROSE 3 17 Debug UART Connector on Debug Board UART1 of the i MX53 processor is connected to an RS 232 output to be used as a debug output for the developer The Transmit TX and Receive RX signals are sent through two 1 8V to 3 2V level shifters to convert the logic signal voltages to the correct values for the Sipex SP3232 RS 232 transceiver The CTS and RTS signals are not used on the MCIMX53SMD board The RS 232 transceiver receives its power from the external 3 3V LDO regulator If the output of the regulator is turned off for power savings measures debug output will be lost If the designer wishes to use the port as an Applications UART Port changes can be made in software to reconfigure the port A male to male gender changer can be used to properly convert the port To access the debug data output during development connect the Debug UART Connector to a suitable host computer and open a terminal emulation program that is Teraterm or HyperTerminal Proper settings for the terminal program are e BAUD RATE 115 200 DATA 8 bit PARITY e STOP BIT 1 bit e FLOW CONTROL None 3 18 JTAG Connector on the Debug board A standard 20 pin ARM JTAG connector is provided on the MCIMX53SMD board Logic signals to the JTAG connector are 1 8V signals A 1 8V reference signal is provided to pin one of the connectors so that the attached JTAG tool can automatically configure the logic signals for the right
14. 6 2 Figure 6 3 Figure 6 4 Figure 6 5 Figure 6 6 Figure 6 7 Figure 6 8 6 9 Figure 6 10 Figure 6 11 Figure 6 12 Figure 6 13 Figure 6 14 Figure 7 1 Figure 8 1 Figure 9 1 Figure 10 1 List of Figures MCIMX53SMD Board with Debug Card and a Display 9 DC Power Jack ie 19 SD 861 ois E e re e Ui e ose e 20 Headphone Connector ie tein en etes ein quat veste Een ge ae 21 Dual USB HOST Connector u n eee te EO ceo rece tap ian dia 22 05 l l Saa Greed eccl E ete vee clt et d Beute tens 23 Mini HDMI iier taie ect rie ve scr 24 Debug Conriector er repe eb eee ne eee Mae 25 SATA CORnector oe re vt e m e e t Pe a e ert 26 VGA BocleConhnector u ene S a eite eee OR ete i ERR Gaal 27 LVDS CONA 6140 P NE 28 MCIMX53SMD Board Block Diagram 4100000 29 Boot Switch SW26 W28 o e edt 39 Clock Source LOCations y y y l u l hee o A 40 Clock Source Locations 41 Watch Dog 42 Power Jack JSS 23 e ASS Sana ee 51 Micro B USB Connector J34 ertet eene
15. Connector 4 9 VGA Dock Connector J131 A VGA Dock connector 1131 is provided on the MCIMX53SMD board for future usage It includes VGA signal LINE IN OUT and USB The Dock location is shown in Figure 4 9 26 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor VGA Dock Connector J131 Figure 4 9 VGA Dock Connector 4 10 LVDS Connector J28 J29 The MCIMX53SMD board includes two 30 pin Hirose DF19G 30P 1H 56 connectors for using with the LVDS display Freescale has made available a cable and LVDS1 display HannStar HSD100PXN1 A00 C11 The LVDS connectors are located on the top and bottom side of the board in the location shown in Figure 4 10 Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 27 LDVS Connector J28 J29 Figure 4 10 LVDS Connector 5 MCIMX53SMD Board Architecture and Design This section is designed to provide the developer detailed information about the electrical design and practical considerations that went into the MCIMX53SMD board This section is organized to discuss each block in the high level block diagram of the MCIMX53SMD board shown in Figure 5 1 28 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor i MX53 SMD Block Diagram Rev 2 Date Sep 11 2010 00000000 Figure 5 1 MCIMX53SMD Board Block Diagram freescale Frees
16. DA9053 PMIC The DA9053 device is a small 7 x 7 mm 0 5 mm pitch 169 ball VFBGA that provides nearly all power supply functions for the MCIMX53SMD board The DA9053 PMIC enhances the functionality of the MCIMX53SMD board by providing the following features 14 Power Supply resources o 12 Low Drop Out LDO regulators One for internal PMIC purposes only LDOCORE One for charging optional back up cell 10 for platform needs o Four DC DC Buck Converters three with DVS One for the ARM Core supply VBUCKCORE One for the Peripheral Core supply VBUCKPRO One for the external SDRAM memory VBUCKMEM One for the internal cache memory VBUCKPERI o One White LED driver and boost converter Li ION battery charger Resistive touch screen interface MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor Expansion Port Card ID detect e Wall voltage supply with over voltage protection e One HS I2C interface e External LDO regulator enable 3 4 Max17085B DCDC and Charger The 17085 is an all in one notebook power solution that comprises of a multi cell battery charger dual fixed output Quick PWM step down controllers and dual keep alive linear regulators Onemulti cell battery charger Two DC DC Buck Converters o Oneforthe 3 3V supply o Oneforthe 5V supply Two Low Drop Out LDO regulators o Oneforthe 3 3V supply o One for the 5V supply 3 5 Mini HDMI Connector 125 The mini
17. Detection CD circuitry to detect whether or not a cable has been plugged into the connector The CD circuitry is not active for TV signal output so it would not be necessary to connect the feedback circuit in that case If any signal filtering or conditioning components are added to the Component Video traces the feedback pins should be connected after the additional components it means feedback pins should tap into to the connector side of the Component Video signals It is recommended to use a ferrite bead near the voltage input pins of the TVDAC module in order to reduce noise in the video module Besides VGA signal LINE IN OUT and USB are included in the VGA Dock Developers can make their own board for this Dock The MCIMX53SMD board uses the Dock connector ERF8 020 01 L D EM2 TR from SAMTEC Developers need to choose a suitable connector for their board 5 9 LVDS Video Output The i MX53 processor contains two separate LVDS modules that can be operated independently Each module provides five sets of differential pair signals four are used for data signal and one for clock signal The MCIMX53SMD board uses one of the two modules to provide an optional secondary display panel that can be used in conjunction with one of the other primary means of video output or as the sole video output if needed The MCIMX53SMD board makes use of three of the differential pair data pins and the clock pins These signals combined with a display enable pi
18. Driver Touch Screen Operation and Miscellaneous sub sections 5 2 1 SMD Power Rails Table 5 2 shows all the voltage supply rails used on the MCIMX53SMD board their voltages and the major subsystems they supply on the board Regulator Voltage Named Rails Powers VBUCKCORE 1 1V VBUCKCORE VDDGP VDDGP VBUCKPRO 1 3V VBUCKPRO VCC_1V3 VCC VBUCKMEM 1 5V VBUCKMEM DDR_1 5V NVCC_EMI_DRAM DDRQ_1 5V DDR3 SDRAM VBUCKMEM SW 1 5V VMEM_SW ALTERNATE FOR DDR_1 5V ALT DDR3 SDRAM LOGIC DDRQ_1 5V ALT DDR3 SDRAM CORE VBUCKPERI 2 5V VBUCKPERI VDD_REG VDD_REG_2V5 NVCC_XTAL NVCC_XTAL_2V5 ALTERNATE FOR LVDS_2V5 ALT LVDS MODULE SATA_PHY_2V5 ALT SATA MODULE VUSB_2V5 ALT USB MODULE 2 5V VBUCKPERI SW 2 5V VPERI_SW LVDS MODULE LVDS 2V5 SATA MODULE SATA_PHY_2V5 USB MODULE 2 5V VUSB_2V5 BOOST Current Source VLCD_BLT EXPANSION PORT VLDO1 1 3V VLDO1_1V3_RTC NVCC_SRTC NVCC_SRTC VLDO2 1 3V DIG_PLL_1V3 ALTERNATE FOR DIG_PLL GPS VLDO3 3 3V VLDO3 3V3 501 3V3 Debug 2 1 12 2 BOOT_SEL NVCC EIM MAIN NVCC_EIM_SEC NVCC_SD1 amp 2 NVCC_PATA NVCC_FEC NVCC_GPIO NVCC_KEYPAD VLDO4 2 775V VIOHI_2V775 LCD_3V2 NVCC_LCD1 ALT NVCC_LCD2 EXPANSION PORT LCD Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 31 VLDO5 1 3V VLDO5 1V3SATA 1V3 SATA MODULE 1 3V VLDO6 1 3V VLDO6 1V3 VDDAL 1V3 VDDAL VLDO7 2 75V VLDO7_2V75 TVDAC_2V75 VGA
19. EIM_D31 GPIO3_31 uart3 RTS CSIO D2 co 2 l Legend AUDMUXA ECSPI2 Table 6 15 Expansion Port Pin Mux Table continued Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 67 178 113 ALT 4 ALT 5 ALT 6 ALT 7 79 DISPO POWER EN ecspi2 SS2 uart1 DTR 80 DISPO 019 CHANNEL2 14 usb2 VSTATUSO 81 SER 5 82 DISPO DAT10 usb2 VSTATUS1 84 DISPO DAT11 usb2 VSTATUS2 85 DISPO SER MISO 2 USBOTG 86 DATI2 EVENT CHANNELS EMI DEBUGI7 usb2 VSTATUS3 87 DISPO SER MOSI DIO PIN13 88 DISPO 11177 LINESO DEBUGIS usb2 VSTATUSA 89 570 SER SCLK 90 DISPODATid DEBUG EVT 51 usb2 VSTATUSS 91 DISPO SER RS DIO PIN14 92 DISPO DATIS 7 DEBUG EVT CHN 52 EMI DEBUG2O usb2 VSTATUS 94 DISPO DAT16 usb2 VSTATUS7 96 DISPO DATI7 5 EXT EVENT1 DEBUG EVI LINESA DISPO DATI8 AUD4_RXFS 52 100 DISPO DAT9 0094 DEBUG EVT LINESG DEBUG24 WEIM CS3 102 DISPO DATZO DEBUG EVT 7 EMI DEBUG2S sata_phy TDI 104 DISPO 21 DEBUG BUS EMI DEBUG26 sata phy TDO 105 DISPO nCSO 11 PIN2 11 14 106 DISPO DAT22 DEBUG BUS sata phy TCK REN 107 DISPO nCS1 DIO 1 CS 108 DISPO DAT23 sata phy TMS 10
20. If the internal method is chosen by the software pin AA14 can be left floating If the external method is desired a 28 0K 1 0 resistor should be attached between pin AA14 and ground It is recommended to add this resistor routinely to give software the option of choosing between the two methods It is also recommended to place 49 9 1960 resistor as the voltage input pin of U14 NVCC_LVDS_BG to filter the power used in measuring the Band Gap resistance 5 10 Expansion Port The function of the MCIMX53SMD board Expansion Port is to bring out many of the i MX53 pins that are otherwise unused on the MCIMX53SMD board The overriding design considerations for this port were to be able to support HDMI functionality through a daughter card primary while also being able to support an existing LCD daughter card secondary In meeting these considerations the Expansion Port was also constrained to meet a general power signal format adopted across all recent i MX development board designs primarily for safety and equipment damage consideration For these reasons there may be some functionalities of the i MX53 chip that are not accessible on the MCIMX53SMD board For developers who are interested in designing custom daughter cards to be used with the MCIMX53SMD board the following capabilities are available from the Expansion Port Note that many pins are muxed so that not all features are available at the same time TwoSerial Peripheral Interfa
21. MODULE TV DCA CMOS Camera VLDO8 1 8V VLDO8_1V8 NVCC_RESET NVCC_JTAG NVCC_CKIH NVCC_NANDF NVCC CSI VDD ANA PLL BOOT SEL Accelerometer De bug VLDO9 1 5V VLDO9 1V5 CMOS Camera VLDO10 1 3V VLDO10 1V3 VDDA 1V3 VDDAL DCDC 3V3 3 3V DCDC 3V3 BB SATA 3V3 FEC 3V3 3V3 WiFi ETHERNET AUDIO IO SIGNALS USB 3 3V SD CARD SD1 eMMC EXPANSION PORT SATA LVDSO amp 1 VGA Dock HDMI KEY PAD GPS ZigBee 3G Modem eCompass Light Sensor TPM Accelerometer Debug WiFi DCDC_5V 5V DCDC_5V DCDC_5V_BB V_SPKR SATA AUDIO LVDSO amp 1 VGA Dock HDMI EXPANSION PORT Debug KEY PAD DCDC 1V8 1 8V DCDC 1V8 VGA Dock 32 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor 1V8 WiFi EXPANSION PORT CMOS Camera WiFi DCDC 15V 15V DCDC 15V VGA Dock Table 5 2 MCIMX53SMD Board Power Supply Rails 5 2 2 Backlight LED Driver The Dialog PMIC provides a Boost circuit that controls an external MOSFET Q8 The PMIC is capable of driving three independent strings of up to five white LEDs each with approximately 24V and maximum of 50 mA The MCIMX53SMD board does not have a direct connection for white backlight LEDs however it supplies a connection to the Expansion Port that can be used to support an attached LCD Daughter Card The Expansion Port uses the LED1 IN LED2 IN and LED3 IN ports o
22. Rev 0 Freescale Semiconductor ASRC Asynchronous sample rate converter The i MX53 processor includes the following interfaces to external devices NOTE Not all the interfaces are available simultaneously depending 1 0 multiplexer configuration e Hard disk drives PATA up to U DMA mode 5 100 MByte s SATAII 1 5 Gbps Displays Five interfaces Total rate of all interfaces is up to 180 Mpixels s 24 bpp Up to two interfaces may be active as once Two parallel 24 bit display ports The primary port is up to 165 Mpix s for example UXGA at 60 Hz LVDS serial ports One dual channel port up to 165 Mpix s or two independent single channel ports up to 85 MP s for example WXGA at 60 Hz each o TV out VGA port up to 150 Mpix s for example 1080 60 e Camera sensors Two parallel 20 bit camera ports Primary up to 180 MHz peak clock frequency and secondary up to 120 MHz peak clock frequency e Expansion cards o Four SD MMC card ports Three supporting 416 Mbps 8 bit interface and one enhanced port supporting 832 Mbps 8 bit eMMC 4 4 e USB o HS USB 2 0 OTG up to 480 Mbps with integrated HS USB PHY Three USB 2 0 480 Mbps hosts High speed host with integrated on chip high speed PHY Two high speed hosts for external HS FS transceivers through ULPI serial support IC USB e Miscellaneous interfaces o One wire OWIRE port o Three 125 551 97 ports supporting up to 1 4 Mbps each connected t
23. ee eee iore edat ee e voco 52 USB HOST Conn ctor 131 132 ic ade t ee te pe eut en ER ree tut tn AR te duet 52 Headphone Connector 1130 u cccceccessccessssceceessscececssececeesseeececsessecscessececesecsesseseescsesseeseseaaeees 53 CMOS Camera Connector 112 u k 04 6 ete vene A 54 HDMI Mini Connector 125 rte et c e e eti epe Su vos 55 SATA Connector 15 c i vei a eee erar cu eds 56 LVDS Corinector 128 J29 uu d etu re ten t tu eu 57 SD Card Connector 13 ERE 2 58 Mini PCle for WiFi BT Connector 115 0 0 0 0 200 00 59 Mini PCle for 3G Connector 118 60 Debug Connector 273 etam atap tatum eerte es eua 61 VGA Dock E AE Ee 01 sete vara ere LR MM DE ru 62 Expansion Port 178 555 o eei de uie e un da A 64 eee tet ttt ee aet amauta ayapa a 69 MCIMX53SMD Board 70 Ethernet Loopback Cable cece cee 400 eds 74 Regulator Output Capacitor Positions 75 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor Figure 11 1 Major Component Highlights 77 Figure
24. from debug port attacks by regulating or blocking the access to the system debug features Secure real time clock SRTC Tamper resistant RTC with dedicated power domain and mechanism to detect voltage and clock glitches Real time integrity checker version 3 RTICv3 RTIC type 1 enhanced with SHA 256 engine SAHARAV4 Lite Cryptographic accelerator that includes true random number generator TRNG Security controller version 2 SCCv2 Improved SCC with AES engine secure nonsecure RAM and support for multiple keys as well as TZ non TZ separation Central Security Unit CSU Enhancement for the IIM IC Identification Module CSU is configured during boot and by eFUSEs and determines the security level operation mode as well as the TrustZone TZ policy Advanced High Assurance BOOT A HAB HAB with the next embedded enhancements SHA 256 2046 bit RSA key version control mechanism warm boot CSU and TZ initialization 3 2 DDR3 DRAM Memory The MCIMX53SMD board uses four 2 Gigabit DDR3 SDRAM ICs manufactured by Micron for a total onboard RAM memory of 1 GB The SDRAM data width for each IC is 16 bits The chips are arranged in pairs and they are controlled by the two chip select pins to form 32 bit words for the i MX53 CPU The On Die Termination ODT functionality has been implemented on the board In addition the board provides the ability to separate the I O Voltage Supply from the main SDRAM Voltage Supply if desired 3 3 Dialog
25. included on the schematic and on the board were not specifically designed for testing but were placed on the board for developers who wanted to make wire connections to specific pins that might not be available without the test pads One basic troubleshooting technique available to developers is to measure the voltage rail outputs on all the rails coming from the PMIC The subsection on PMIC voltage rails presents a diagram with points that can be used by the developer take measurements A second basic troubleshooting technique would be to measure the clock frequencies to ensure that the clock is running correctly The crystals and oscillators are located in the design section under the i MX53 processor Aside from actual hardware difficulties Table 10 1 presents some other issues that may help the developer solve technical difficulties Symptoms Possible Problem Action No 15V power to the Attached power supply is not Use the power supply that came 74 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor MCIMX53SMD board no RED LED within the 14 5V 15 5V range with the MCIMX53SMD board kit light F2 fuse has blown Use a multimeter to check whether the part is open If yes replace the fuse with a new 3A 0603 surface mount fuse No debug information on the Incorrect serial cable used for Verify that serial cable is correct host Computer terminal window example null modem cable Table 1
26. its compact and power dissipation efficient QFN package it can be used in a variety of applications With a BTL configuration this Audio Power Amplifier can deliver 1W per channel of continuous RMS output power into an 80 load at 5V An externally controlled pin can be configured to reduce the supply current to less than 10 nA per channel The device also features an internal thermal shutdown protection The gain of each channel can be configured by external gain setting resistors 5 12 Ethernet Debug Board The Ethernet subsystem of the MCIMX53SMD board is provided by the SMSC LAN8720 Ethernet Transceiver U17 The Ethernet Transceiver or PHY receives standard RMII Ethernet signals from the Fast Ethernet Controller FEC of the i MX53 processor The processor takes care of all Ethernet protocols at the MAC layer and higher layers The PHY is responsible only for the Link Layer formatting The PHY receives a 50 MHz clock signal from the oscillator X1 On initial versions of the i MX53 silicon this clock signal was shared with the SATA module of the i MX53 processor On current versions of the MCIMX53SMD board the 50 MHz clock 46 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor signal is only sent to the Ethernet PHY The two control traces from the i MX53 processor to the Ethernet PHY are an active low interrupt trace FEC_nINT and an active low reset line FEC_nRST When the PHY comes out of reset it is internally p
27. or resources in more specific designs Figure 1 1 shows an MCIMX53SMD board with a debug card and a display Figure 1 1 MCIMX53SMD Board with a Debug Card and a Display The different components of the MCIMX53SMD board are listed in Table 1 1 Component Description Processor Freescale Applications Processor MCIMX535DVV1B MCIMX535DVV1C DRAM memory Micron 8 GB DDR3 SDRAM MT41J128M16HA 125 PMIC Dialog Semiconductor DA9053 DCDC charger Maxim MAX17085B Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 9 10 Mass storage One SD MMC SDIO card connector 8 32 GB SSD SATA 4 MB SPI NOR Flash 8 GB eMMC Video output 40 pin VGA Dock 19 pin Mini HDMI connector Two 30 pin LVDS connectors USB Two high speed HS USB 2 0 Standard A host connectors Micro B OTG connectors Audio connectors 3 5 mm Stereo Headphone output Mono Microphone input on board Two 1W at 80 speakers Power connectors 15V connector Debug connectors 9 pin D Sub Debug UART connector RJ 45 connector for 10 100 Base T 20 pin Standard ARM JTAG connector Peripheral WiFi BT card GPS module ZigBee 5M pixel camera sensor Sensor eCOMPASS Accelerometer Light sensor Expansion header 120 pin header populated to support the optional WVGA and WQVGA LCD display daughter cards orderab
28. performance It receives power from the VLDO8 1 8V voltage regulator and can be shut by GPIO OSC_CKIH1_EN The location of the crystal is also shown in Figure 5 3 Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 39 The 32 768 kHz crystal 023 is the clock source used by the i MX53 processor for the Secure Real Time Clock module It receives power from the NVCC_SRTC pin which is connected to the 1501 1 3V voltage regulator The 32 768 kHz clock signal is not sent anywhere else on the MCIMX53SMD board The location of the crystal is also shown in Figure 5 3 C80 um C83 336 R1912 C109 125 7 113 cas xj 9 4 010 D em e 2 L C301 106 lt The clock source for the Ethernet PHY is 50 MHz Oscillator X1 with an enable and is shown Figure 5 4 The oscillator was originally placed to support both the SATA module and the Ethernet PHY It is no longer used for the SATA module and only supplies a clock signal to the Ethernet PHY It is powered by the DCDC_3V3 power rail and by default and can be shut by GPIO SATA_CLK_GPEN 40 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor 698 6105 102 93 6 C339 lt er 38 11 cazar no Ciber 14 mU cio 2 R544 Gof 2311065
29. power Figure 4 1 DC Power Jack 4 2 SD Card Connector J13 The MCIMX53SMD board has one 4 bit SD MMC connector that can be used for memory or for third party SDIO type cards such as WiFi or Bluetooth The SD Card Connector J13 connects a 4 bit parallel data bus to the SD1 port of the i MX53 processor The SD Card Connector receives power from DCDC_3V3 The board can be modified to support booting from this connector See the Boot Mode Operations and Selections section to learn how to modify the board The SD Card Connector is not spring loaded so pushing the card into the slot will not initiate an action to disengage the SD Card The SD Card is inserted facing up at the location shown in Figure 4 2 Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 19 SD Connector J13 Figure 4 2 SD Connector 4 3 Headphone Output Connector J130 Any set of ear buds or headphones with a standard 3 5 mm stereo jack can be connected to the Audio Output jack at the point shown in Figure 4 3 Ear buds are not supplied with the MCIMX53SMD board kit 20 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor Headphone Connector J130 ie Figure 4 3 Headphone Connector 4 4 Dual USB Host Jack J31 J32 The MCIMX53SMD board has two USB Host only connectors that can be used to support USB devices e Any single high power USB device Any combination
30. preprogrammed sequence The sequence is determined primarily by the order in Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 29 which power must be supplied to the i MX53 processor Once the core operations of the processor are fully powered other power rails can be turned ON The first voltage regulator to power ON is always VLDO1 This regulator supplies a maximum of 40 mA current at 1 3V and powers ON only the Secure RTC module of the i MX53 processor This turns ON the RTC Clock 32 768 kHz and Watch Dog features If a system reset is triggered or the MCIMX53SMD board is placed into the standby mode VLDO1 will remain powered ON VLDO1 will turn OFF only if all power is removed from the MCIMX53SMD board or if a software command is sent to the PMIC to turn OFF VLDO1 In case the developer attaches an optional coin cell 311 the coin cell will provide the necessary power to keep VLDO1 operating The power sequence requirements for the i MX53 processor as specified in the i MX53 data sheet are as follows NVCC SRTC POW VLDO1 VCC VDDA VDDGP in any order NVCC CKIH VDD REG in any order All other supplies in any order Iw mig NOTE In case the internal regulator is used for VDDA generation the VDD REG should be powered up together with VCC and VDDGP before other supplies If the internal regulator is not used to generate VDDA as on the MCIMX53SMD board the VDD REG is independent and has no power u
31. slot J5 When the user confirms that the card is present the processor will attempt to read the current SD card settings and manufacturing information on the SD card If the processor can read this information the test passes Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 73 The only special equipment required to complete the bank of OBDS tests is the Ethernet loopback cable This can be purchased online single plug Ethernet Lookback Cable or it can be created by the developer by cutting one end of an unneeded Ethernet cable and connecting pin 1 wire to pin 3 wire and connecting pin 2 wire to pin 6 wire All other wires remain unconnected The four wires used will be solid Green solid Orange Green White stripe and Orange White stripe The solid colors are connected together and the striped colors are connected together While the solid colors will always be connected to pins 2 and 6 the specific pin a color is attached to depends on the plug used They same is true for the striped wires connected to pins 1 and 3 Figure 9 1 shows a diagram of an Ethernet loopback cable 12345678 Figure 9 1 Ethernet Loopback Cable 10 Troubleshooting The MCIMX53SMD board does not have specific troubleshooting features designed into the board The board has proven robust during the initial test and development periods and should provide years of good service to the developer if treated with due caution The test pads that are
32. 0 1 Problem Resolution Table 10 1 PMIC Voltage Rail Test Points To assist the developer in determining whether the PMIC voltage rails are outputting the correct voltage levels Figures 10 1 shows the output capacitor on each regulator output with the ground pin colored yellow and the power pin colored red Tables 10 1 shows the expected voltage value for each capacitor 21 4 E it 5 res E ts 026 La 14727 R417 Li ad ath 2 Figure 10 1 Regulator Output Capacitor Positions Top Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 75 11 PCB Component Locations C199 VLDO2 1 3V C214 VLDO9 1 5V C216 VLDO10 1 3V C213 VLDO8 1 8V C211 VLDO7 2 75 194 VLDO3 3 3V C203 VLDO4 2 775V C210 VLDO6 1 3V C207 VLDO5 1 3V C196 VLDO1 1 3V C218 VDDCORE 2 5V C221 VBUCKPERI 2 5V C224 VBUCKMEM 1 5V C230 VBUCKPRO 1 3V C228 VBUCKCORE 1 1V Table 10 2 Output Capacitors and Values Top To help the developer in locating the major components on the MCIMX53SMD board locations of the components have been highlighted and annotated in the following figures Figure 11 1 Figure 11 2 Major Component Highlights Top Major Component Highlights Bottom The assembly drawings for all component locations are available for easy reference while working on the MCIMX53SMD board Graphical rep
33. 1 i MX53 Applications Processor ccccssssssncccececsesssnsansececeeseseaaeacsececeessausanaeeecessesesusansececessesssnsanseceeeess 12 32 DDR3 DRAM Memory lt tete laete totes eo 14 3 3 Dialog DADUS 3 einen aie eee pe eade 14 3 4 17085 DCDC arid Charger noie 15 2 52 25 6 re et d e es xe DR 15 36 SDCard Shot esta I dirt tu 15 3 SAIACOonnector 15 cert ret e e usa 15 28 15 3 9 LVDSVideo Output J28 29 15 3 10 Ethernet on Debug Board orerar aeaa 16 3 11 Dual USB Host Connector 31 2 2 16 3 12 Micro B USB Device Connector 34 16 3 13 Audio Input Output 1 1130 6011 16 314 25 85 o trt oe V RR a ERR ER RN en 16 3 15 Mini PCle Connector 015 218 y rr rr t ht RR DR ERR EE EE ERR e Re ERE 16 3 16 GMOS Sensor Connector JIZ rra irte a esas A 17 3 17 Debug UART Connector on Debug 17 3 18 JTAG Connector on the Debug 17 3 19 Expatision Header 478 5 oi tt t tt 17 3 20 FUM UON BUTTONS S y ua pete PE e Peter er p tet 18 3 20 1 POWER Button cit eee
34. 1 5V Power VLDO9 k Backlight Brightness Adj 1 5V Power VLDO9 E 2 o Display Vert Synch Display Write 1 2 0 s 1 1 9 Display Data23 Disp Chip Sel1 Act Low Display Data22 Disp Chip SelO Act Low amp Display Data21 Ground S Display Data20 Touch Screen X Neg E Display Data19 Touch Screen X Pos gt Display Data18 Touch Screen Y Neg P e Display Data17 Touch Screen Y Positive gt Display Data16 Ground gt 2 Display Data15 IIS Reset Display Data14 Display Data13 8 3 Display Data12 Ps Display Data11 Display Data10 iL Display Data09 5 Display Data08 Display Data07 E Display Data06 e Display Data05 6 2 6 1 Display Data04 Display Data03 Display Data02 Display 01 J Display Data00 Shield Ground Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 63
35. 11 2 Major Component Highlights 0 78 Figure 113 Assembly Drawing 79 Figure 11 4 Assembly Drawing 80 Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 7 Table 1 1 Table 2 1 Table 5 1 Table 5 2 Table 5 3 Table 5 4 Table 5 5A Table 5 5B Table 5 6 Table 5 7 Table 6 1 Table 6 2 Table 6 3 Table 6 4 Table 6 5 Table 6 6 Table 6 7 Table 6 8 Table 6 9 Table 6 10 Table 6 11 Table 6 12 Table 6 13 Table 6 14 Table 6 15 Table 6 15 Table 6 15 Table 6 15 Table 8 1 Table 10 1 Table 10 2 List of Tables MCIMX53SMD Board Components 10 Fist of ACKONYIMNS a he tet pie tenth nitet ct ipee Tta etr 11 Regulator Timing Sequence 10 30 MCIMX53SMD Board Power Supply Rails 33 Module Voltage Supplies uu u U S uu Das a asa Qha i i Aa 35 BOOT MODE PiN Settings 2 a ne aaa aede 36 BOOT CRG WOM 6 4 OEA 36 BOOT CFG Word pi ul Susu uhun 484 36 DDR3 SDRAM Chip Organization 42 Terminal S
36. 25 Table 6 7 SATA Connector 15 Figure 6 7 SATA Connector J5 Table 6 8 LVDS Connector 128 129 Figure 6 8 LVDS Connector 128 129 Table 6 9 SD Card Connector J13 Figure 6 9 SD Card Connector 113 Table 6 10 for WiFi BT Connector J15 Figure 6 10 Mini PCle for WiFi BT Connector J15 Table 6 11 Mini PCle for 3G Connector 118 Figure 6 11 Mini PCle for 3G 118 Table 6 12 Debug Connector J127 Figure 6 12 Debug Connector J127 Table 6 13 Dock J131 Figure 6 13 VGA Dock J131 Table 6 14 Expansion Port J78 Figure 6 14 Expansion Port J78 Table 6 15 Expansion Port Pin Mux Table Positive Terminal Negative Terminal Ground Terminal Table 6 1 Power Jack J35 Figure 6 1 Power Jack J35 Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 51 5V Power Data Negative Data Positive No Connect ID Ground Chassis Ground Chassis Ground Chassis Ground Chassis Ground Chassis Ground Chassis Ground Figure 6 2 USB Connector J34 Table 6 2 Micro B USB Connector 134 USB 5V Power USB Data Negative USB Data Positive USB Ground Shield Ground Shield Ground J L Table 6 3 USB HOST Connector J31 J32 ALL DIMS IN MM Figure 6 3 USB HOST Conne
37. 59 CSIO RSTB NANDF WP B GPIO6 9 62 DISPO DATO DISPO DATO 60104 21 63 GPIO O CLKO GPIO 0 GPIO1 0 KEY COL5 SS 1 64 DISPO DAT1 DISPO DAT1 60104 22 66 DISPO DAT2 DISPO DAT2 GPIOA 23 68 DISPO DAT3 DISPO DAT3 4 24 70 DISPO 1014 DISPO 19014 4 25 72 DISPO DAT5 DISPO DAT5 4 26 74 DISPO DAT6 DISPO DAT6 4 27 76 DISPO DAT7 DISPO DAT7 4 28 78 DISPO 1018 DISPO 19018 4 29 pwm1 PWMO wdog1 WDOG B Legend Freescale Semiconductor Table 6 15 ECSPI2 Expansion Port Pin Mux Table MCIMX53SMD Board Hardware User s Guide Rev 0 65 178 113 ALT 4 ALT 5 ALT 6 ALT 7 26 CSI0_DAT12 tpiu TRACES 28 CSIO DATI3 tpiu TRACE10 29 I2C2 SDA usb1 LINESTATEO 31 12 2 SCL usb1 SIECLOCK 32 CSI0_DAT14 tpiu TRACE11 DISPO 34 CSIO_DAT15 DEBUG_PC9 tpiu TRACE12 5 CSI PIXCIK DeBUG_PcO EMI_DEBUG29 38 PCLOCK ccm PLL2_BYP SPDIF_TX JTAG_ACT 43 DISPODCIK DEBUG CORE STATEO usb1 AVALID 44 CSIO DATI6 TRACE13 46 CSIO 17 TRACE14 50 510 DAT18 DEBUGZ7 tpiu TRACE15 52 CSI0_DAT19 usb2 BISTOK 53 SCSO PWON 12122 usblvsTATUS3 56 CSIO VSYNCH 7 DEBUG PC3 7 DEBUG32 TRACEO pep PC p 58 5 0 HSYNCH DEBUG PC1 59 CSIO_RSTB Ps VSTATUS2 62 DiSPO DATO 0806 CORE RUN DEBUGS usb2 TXREADY 63 csu TD 64 DISPO DATI 7 DEBUG EVENT CHAN SEL
38. 6 bit ECC 16 bit NOR Flash All WEIMv2 pins are muxed on other interfaces data with pins I O muxing logic selects WEIMv2 port as primary muxing at system boot 16 bit SRAM cellular RAM o Samsung One NANDTM and managed NAND including eMMC up to rev 4 4 in muxed I O mode i MX53 processor system is built around the following system on chip SoC interfaces e 64 bit AMBA AXI v1 0 bus Used by ARM platform multimedia accelerators such as VPU IPU GPU3D GPU2D and the external memory controller EXTMC operating at 200 MHz e 32 bit AMBA AHB 2 0 bus Used by the rest of the bus master peripherals operating at 133 MHz e 32 bit IP bus Peripheral bus used for control and slow data traffic of the most system peripheral devices operating at 66 MHz The i MX53 processor makes use of dedicated hardware accelerators to achieve state of the art multimedia performance The use of hardware accelerators provides both high performance and low power consumption while freeing up the CPU core for other tasks The i MX53 processor incorporates the following hardware accelerators e VPU version 3 Video processing unit e GPU3D 3D graphics processing unit OpenGL ES 2 0 version 3 33 Htri s 200 5 and 800 Mpix s z plane performance 256 KB RAM memory e GPU2D 2D graphics accelerator OpenVG 1 1 version 1 200 Mpix s performance e version Image processing unit 12 MCIMX53SMD Board Hardware User s Guide
39. 9 DISPO WR 110 DISPO VSYNCH DEBUG CORE STATE3 DEBUG3 usb1 IDDIG 112 src TESTER ACK 114 DISPO HSYNCH DEBUG CORE STATE2 DEBUG2 usb1 ENDSSN 116 DISPO DRDY DEBUG CORE DEBUGI 1 BVALID 117 DISPO RD DIO PIN12 DISP1_DAT20 USBH1_PWR Legend AUDMUX4 ECSPI2 Table 6 15 Expansion Port Pin Mux Table continued 68 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor 7 Board Accessories 7 1 Debug Card A debug card having a RS 232 a JTAG and an Ethernet is provided for developer in the board kit The developer can connect the debug card with the main board to develop the system Figure 7 1 shows the debug card available in the MCIMX53SMD board The schematics and layout of the debug card can be found on the http www freescale com imxsabre Web page Figure 7 1 Debug Card 8 Mechanical PCB Information The overall dimensions of the MCIMX53SMD board are shown in Figure 8 1 Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 69 909000900090 221411212 Miimi Le 166mm 200 Figure 8 1 MCIMX53SMD Board Dimensions The MCIMX53SMD board PCB was made by using the standard 8 layer technology The material used was FR 4 Hi Temp The board stack up is as follows Top Layer Ground 1 Layer Signal 1 Lay
40. Connect BT ACTIVE BT RESET BT HOST WAKE BT UART CTS BT UART RTS BT UART RXD BT UART TXD GND WLAN ACTIVE GND BT PRIORITY GND Table 6 10 Mini PCle for WiFi BT Connector 115 Figure 6 10 Mini PCle for WiFi BT Connector J15 Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 59 Modem Wake Up No Connect 3 3V Power No Connect GND No Connect No Connect GND SIM Power Test Point SIM IO Test Point SIM CLK GND SIM RESET Test Point SIM VPP Test Point GND GND Modem Disable No Connect Modem Reset No Connect 3 3V Power GND GND GND No Connect No Connect No Connect No Connect No Connect GND GND No Connect USB Data GND USB Data GND GND No Connect WWAN LED No Connect No Connect No Connect No Connect No Connect No Connect No Connect Table 6 11 60 GND 3 3V Power Mini PCle for 3G Connector J18 MCIMX53SMD Board Hardware User s Guide Rev 0 Figure 6 11 Mini PCle for 3G Connector J18 Freescale Semiconductor 90 RS232 TXD 1 GND 2 GND 3 TDI 4 RS232 RXD 5 JTAG 6
41. D Card Module 2 1 65V 3 6V 3 3V NVCC PATA Parallel ATA 1 65V 3 6V 3 3V NVCC LCD 1 LCD Module 1 65V 3 1V 2 775 NVCC LCD 2 NVCC CSI Camera Sensor Interface 1 65V 3 6V 1 8V NVCC FEC Fast Ethernet Controller 1 65V 3 6V 3 3V Match Ethernet PHY NVCC GPIO General Purpose 1 1 65V 3 6V 3 3V NVCC JTAG JTAG Module 1 65V 3 1V 1 8V NVCC KEYPAD Keypad Port 1 65V 3 6V 3 3V Match Audio CODEC NVCC CKIH Clock Amplifier Circuit 1 65V 1 95V 1 8V NVCC XTAL 24MHz Crystal Supply 2 25V 2 75V 2 5V NVCC SRTC POW Secure Real Time Clock 1 1V 1 3V 1 3V NVCC LVDS Low Voltage Differential Signaling 2 375V 2 625V 2 5V NVCC LVDS BG LVDS Band Gap 2 375V 2 625V 2 5V Table 5 3 Module Voltage Supplies The MCIMX53SMD board has a number of unpopulated pull up resistors This is a result of the initial design being conservative and the addition of external pull up resistors to supplement internal i MX53 pull up supply voltage Subsequent MCIMX53SMD board usage has shown these pull ups to be unnecessary so they are unpopulated 5 3 2 Boot Mode Operations and Selections The i MX53 processor can be directed to boot from Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 35 e The logic levels 24 different pins that designated for boot mode configurations Internal eFUSE settings e Aserial downloader USB UART There are two dedicated BOOT MODE pins in the i MX53 processor that speci
42. Figure 5 5 VLDO8_1V 4 VLDO3 3V3 T 0 0K JTAG nSRST gt lt 19 22 23 7 gt nRESET lt gt GND VLDOB 1V8 n Figure 5 5 Watch Dog Timer Reset Trigger 5 4 DDR3 SDRAM Memory The MCIMX53SMD board has four 128MX16 DDR3 SDRAM chips for a total of 1 GB RAM memory The chips are organized in two different arrays differentiated by the chip selects storing either the upper 16 bits or the lower 16 bits of a 32 bit word This organization is shown in Table 5 6 Chip Select 0 Chip Select 1 Lower 16 bits 15 0 U3 04 Upper 16 bits 31 16 U5 U6 Table 5 6 DDR3 SDRAM Chip Organization In this organization there are 21 traces that connect to all four DDR3 chips and the i MX53 processor 14 Address 3 Bank Address 3 Control and Reset These are the most critical traces since they will see the most loading The remaining traces are connected to two DDR3 chips and the processor and will only see one active DDR3 chip at a time Note that the two clock traces are tied with the data traces SDCLK for the lower 16 bits SDCLK 1 for the upper 16 bits This limits the clock traces to only one active DDR3 chip at a time In the physical layout the DDR3 chips are placed to minimize routing of the address traces The two chip select 0 chips are placed on top and the two chip select 1 chips are placed on the bottom side directly below the chips with the same data traces The data t
43. HDMI connector is used as HDMI output of MCIMX53SMD board The power source for the HDMI Bridge 5119022 is DCDC_3V3_BB and the power source for mini HDMI connector is DCDC_5V_BB 3 6 SD Card Slot J13 The SD Card slot is a 5 in 1 SD MMC connector that acts as memory media slot The power source for the SD Card Slot is the auxiliary DCDC buck DCDC_3V3_BB The SD Card slot can be configured as the boot source with an alternate boot option setting It can also be configured for either SD or MMC card operation see the Boot Mode Operations and Selections section The SD Card Slot supports full 4 bit parallel data transfers and can support SDIO cards such as WiFi and BT designed to fit in a standard SD card slot 3 7 SATA Connector J5 The SATA connector provides a means to connect an external SSD SATA drive to the MCIMX53SMD board Power for the SATA drive needs to be supplied by SATA_5V and SATA_3V3 The developer can use boot configure to boot the SATA drive 3 8 VGA Dock J131 A Dock with VGA signal is on the MCIMX53SMD board VGA is the output that comes directly from the i MX53 processor with minimum external components required Power for the TVE module of the i MX53 processor is supplied by VLDO7 of the PMIC and is set to 2 75V If VGA output is not desired the PMIC can be programmed to turn off VLDO7 to conserve power The VGA output supports a variety of video formats up to 150 Megapixels per second Level shifters are required
44. ICs A more detailed explanation of these Logic Voltage Inputs is presented in the Peripheral Module Logic Voltage Levels subsection The information for voltage levels and other chip specific details come from the i MX53 data sheet which is updated time to time The i MX53 processor initializes out of reset according to its preprogrammed ROM code After initial wakeup it attempts to read the logic levels on 26 different pins Depending on which pins are high low the processor selects one of the allowed boot options to begin the boot process This is further explained in the Boot Mode Operations and Selections subsection The clock signals required by the i MX53 processor and the rest of the MCIMX53SMD board are further explained in the Clock Signals subsection The i MX53 processor has the ability to supply a limited amount of filtered power for internal purposes using an internal voltage regulator The operation of this regulator is explained further in the i MX53 Internal Regulator subsection The Processor also has an internal Watch Dog Timer WDOG circuit that can be used to reset the Processor in the event it stops functioning correctly The supported circuitry is explained further in the Watch Dog Time subsection 34 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor 5 3 1 Peripheral Module Logic Voltage Levels By convention pins used on the i MX53 processor to set module logic voltage levels begin with NVCC_ This inf
45. MCIMX53SMD Board Hardware User s Guide IMX53SMDHUG Rev 0 9 2011 2 freescale How to Reach Us Home Page www freescale com E mail support freescale com USA Europe or Locations Not Listed Freescale Semiconductor Technical Information Center CH370 1300 N Alma School Road Chandler Arizona 85224 1 800 521 6274 or 1 480 768 2130 support freescale com Europe Middle East and Africa Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen Germany 44 1296 380 456 English 46 8 52200080 English 49 89 92103 559 German 33 1 69 35 48 48 French support freescale com Japan Freescale Semiconductor Japan Ltd Headquarters ARCO Tower 15F 1 8 1 Shimo Meguro Meguro ku Tokyo 153 0064 Japan 0120 191014 or 81 3 5437 9125 support japan freescale com Asia Pacific Freescale Semiconductor Hong Kong Ltd Technical Information Center 2 Dai King Street Tai Po Industrial Estate Tai Po N T Hong Kong 800 2666 8080 support asia freescale com For Literature Requests Only Freescale Semiconductor Literature Distribution Center P O Box 5405 Denver Colorado 80217 1 800 441 2447 or 303 675 2140 Fax 303 675 2150 LDCForFreescaleSemiconductor hibbertgroup com Document Number IMX53SMDHUG Rev 0 9 2011 Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products Ther
46. Negative GND CEC EDID Clock EDID Data No Connect 5V Power Hot Plug Detect Shield Ground Shield Ground Figure 6 6 HDMI Mini Connector J25 Shield Ground Shield Ground Table 6 6 HDMI Mini Connector J25 Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 55 Ground Transmit Data Positive Transmit Data Negative Ground Receive Data Negative Receive Data Positive Ground 3 3V Power 3 3V Power 3 3V Power Ground Ground Ground 5V Power 5V Power 5V Power Ground No Connect Ground No Connect No Connect No Connect Table 6 7 SATA Connector J5 Figure 6 7 56 MCIMX53SMD Board Hardware User s Guide Rev 0 oepnT 23 ma rm 7 rm 7 m Co Cc SATA Connector 5 Freescale Semiconductor Backlight Enable 3 3V Power 3 3V Power 3 3V Power LED Brightness Adjust EDID 2 Clock EDID I2C Data LVDS Transmit 0 Negative LVDS Transmit 0 Positive 30 E 1 2 5 1 E 6 7 e 8 9 Ground LVDS Transmit 1 Negative LVDS Transmit 1 Positive Ground LVDS Transmit 2 Negative LVDS Transmit 2 Positive
47. OST and other for USB OTG The USB OTG connected to the MCIMX53SMD board signals with micro B USB connector directly For the USB HOST it is connected with a USB HUB USB2514 from SMSC The SMSC 4 Port HUB is low power OEM configurable MTT hub controller IC with four downstream ports for embedded USB solutions The 4 port hub is fully compliant with the USB2 0 Specification and will attach to an upstream port as a Full Speed Hub or as a Full High Speed Hub The 4 Port Hub supports Low Speed Full Speed and High Speed if operating as a High Speed Hub downstream devices on all the enabled downstream ports Two of four USB ports Port1 and Port4 are dedicated to USB HOST Connector Port2 is dedicated to 3G Modem on the MCIMX53SMD board and Port3 is for VGA Dock connector The MCIMX53SMD board uses a USB power switch for Port1 and Port4 Each one can provide 500 mA current and over current interrupt will occur when high current happened Meanwhile we use the same chip for USB OTG 5 14 SATA The internal SATA PHY of the i MX53 processor provides the two differential pair data signals necessary for SATA operations No external transceiver is required Each of the four data lines pass through a 0 01 uF capacitor for decoupling These capacitors are placed as close to the SATA connector as possible The Processor SATA module receives 2 5V power from VBUCKPERI for the PHY portion of the module and 1 3V power from VLDO5_1V3 for the controller portion
48. The MCIMX53SMD board uses two single direction level shifters 040 U41 to convert the UART Transmit and Receive signal to a 3 3V logic signal The level shifted signals are sent to a low cost RS232 transceiver which reformats the signals to the correct voltages and drives the signals The resulting cable ready signals are then connected to the RS232 Debug connector No RTS or CTS signals are sent from the processor to the Debug connector since these signals are commonly ignored by most applications The required terminal settings to receive debug information during the boot cycle are shown in Table 5 7 Data Rate 115 200 Baud Data bits 8 Parity None Stop bits 1 Flow Control None Table 5 7 Terminal Setting Parameters If the developer wishes to use the Debug UART connector in software as an Applications Connector the MCIMX53SMD board can support this using a Null Modem Adapter The adapters are readily available from most cable and electronics stores at a low cost 5 16 JTAG Operations Debug Board The i MX53 processor accepts five JTAG signals from an attached debugging device on dedicated pins A sixth pin on the processor accepts a HW board configured input specific to the MCIMX53SMD board The five JTAG signals used by the processor are e TAP Clock 5 TAP Machine State JTAG_TDI TAP Data In JTAG_TDO TAP Data Out e JTAG_nTRST Reset Request Active Low The TAP Clo
49. ate a hardware shutdown In the Power On state holding the power button down for more than 5 seconds will result in the PMIC initiating a shutdown to the Standby power condition This will also be the result from the Power Off state as the PMIC will transition into the Power On state and will still see the POWER button as held down 3 20 2 RESET Button Pressing the RESET button in the Power state will force the i MX53 processor to immediately turn off and reinitiate a boot cycle from the Processor Power Off state The RESET button has no effect on the PMIC or the voltage rails Pressing the RESET button when the MCIMX53SMD board is powered off will have no effect 3 21 User Interface LED Indicators There are eight LED status indicators located next to the micro SD card connector These LEDs have the following functions e 15V The 15V status LED 029 is Red LED connected directly to the 15V power rail This LED indicates that 15V wall power is being properly supplied to the MCIMX53SMD board e CMOS Run Charger Now This status LED 027 is a Red LED gated by the D30 W4 GPIO pin with two functions One of these functions is for CMOS running status the other is dedicated to the status of charger e USER Debug Charger Done This LED 032 is a Green LED gated by the PATA_DATA1 L3 GPIO pin with two functions One of these functions is for User debug the other is dedicated to the status of cha
50. cale Confidential Proprietary 5 1 Dual LDO DCDC and Charger The MCIMX53SMD board uses the MAX17085B chip as main power chip The MAX17085B chip provides two LDOs 3 3V and 5V two DCDCs 3 3V and 5V and multi cell Li Ion charger The MCIMX53SMD board provides a three cell Li Ion battery as main power source A 15V power from an external wall power supply is connected to the MCIMX53SMD board at connector J35 The 15V supply is provided from the connector to the MAX 17085B chip through the current protection fuse F2 The MAX17085B LDOs are always turned ON when power is attached When the ON OFF key is pressed the high signal makes the MAX17085B chip to output two DCDCs 3 3V and 5V and then power ON the PMIC MAX17085B DCDCs have enough current and they are the main source of power for the whole system The MAX17085B chip also has charger function When wall adapter is plugged in 2A max charge current is fed to the battery 5 2 Dialog DA9053 PMIC The Dialog PMIC provides all regulated power to the i MX53 processor The PMIC is located in the middle of the MCIMX53SMD board near to the MAX17085B chip and i MX53 processor From this location power is supplied to the rest of the board When the POWER button is pressed for the first time the MAX17085B chip outputs DCDC 3V3 and DCDC 5 and feeds to the PMIC PMIC senses the Active Low signal on the nONKEY pin by RC delay circuit and begins to power ON all voltage rails in
51. can be selected to supply VDD ANA PLL through an internal on die connection The Analog PLL is set to supply a voltage of 1 8V On the MCIMX53SMD board the VDD ANA PLL connection to VLDO8 is not populated by default so that VDD ANA PLL is supplied by the internal regulator NOTE Developers should note that during the boot process VDD DIG takes 310 ms to change from 1 2V to 1 3V During this time the i MX53 core will not run at full speed maximum processor loading rather it will operate in the reduced power mode with some limitations The limitations of the reduced power mode are discussed in the i MX53 data sheet It is expected that during the first 310 ms processor loading will not be an issue Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 41 5 3 5 Watch Dog Timer The i MX53 processor has an internal Watch Dog Timer circuit On the MCIMX53SMD board the WDOG output is assigned to GPIO_9 The WDOG is an active low signal The Dialog PMIC does not have a specific pin to accept a Watch Dog signal to force a processor reset Therefore the WDOG signal is modified by hardware components on the MCIMX53SMD board and applied to the Processor Reset pin POR_B pin C19 It allows the processor to reset the WDOG signal and then come out of reset The buffer IC is also in a tri state condition when the WDOG signal is normally high thus allowing the push button reset circuitry to work The Watch Dog circuitry is shown in
52. ces SPI CSPI eCSDPI2 Two 125 551 97 Ports AUDMUXA AUDMUX5 e Two Inter Integrated Circuits 12 I2C1 2 2 e 2UARTs UART4 UART5 e SPDIF Audio e USB ULPI Port USBH2 e 24 bit Data and display control signals Resistive Touch Screen Interface In addition to the Data Signal traces to support the above functionality the following power sources are also included on the Expansion Port 5V_MAIN 5V DCDC_5V e LCD_3V3 3 3V DCDC 3V3 e VIOHI 2V775 2 775 VLDO4 VLDO8_1V8 1 8V VLDO8 e VLDO9 1V5 1 5V VLDO9 e VLCD BLT Current Source PMIC LED Driver Note that VLDOO9 is only used by the Expansion Port on the MCIMX53SMD board The developer is free to reprogram the LDO regulator on the PMIC for desired voltage with these limitations e Voltage 1 25V 3 6V e Current 100 mA A suitable connector to be used with Expansion Port J13 is one developed by Samtec QTH 060 XX L D A where XX determines the height of the connector See the Connector Pin Outs section to know about the available pin mux options 5 11 Audio The main Audio CODEC used on the MCIMX53SMD board is the Freescale SGTL5000 Low Power Stereo Codec with Headphone Amp The i MX53 processor provides digital sound information from the AUDMUX module Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 45 channel 5 port through 125 communications protocol The Audio CODEC also receives command instructions from the 2 channel 2 bus and rece
53. ck signal is provided by the attached debugging device that serves as a reference for data exchange between the debugging device and the processor The TAP Machine State is a logical signal provided by the debugging device to let the processor or target know which state to enter next As per JTAG specifications there are two states one of which can be selected with a high signal and other with a low signal The TAP Data In and TAP Data Out signals are used only for data transfer The Active Low Reset Request is initiated by the debugging device and it resets the TAP JTAG module within the processor This enables the debugging device to reset the internal processor JTAG module if required without affecting rest of the processor The system JTAG reset signal provided by the attached debugging device does not go to the JTAG module of the processor but goes to the external processor reset circuitry This will reset the entire i MX53 processor but not the power rails The JTAG MOD pin used by the JTAG module of the i MX53 processor determines what portion of the i MX53 processor is connected to the JTAG debugging device In the pull down mode default on the MCIMX53SMD board all the i MX53 TAPs SJC SDMA ARM are connected to the debugging device in a daisy chain connection If the JTAG MOD pin is pulled high then the attached debugging device can only access the SJC TAP 48 MCIMX53SMD Board Hardware User s Guide Rev 0 Free
54. connector J131 In addition to the three video signals Horizontal and Vertical Synchronization signals I2C Data and Clock and a 5V reference signal are connected to Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 43 the VGA Dock video data signals referenced to 2 75V TVDAC_2V75 while all other signals referenced to 5V The synchronization signals leave the i MX53 processor referenced to 3 3V but go through a pair of one way level shifters 012 U13 to meet the VGA standard required 5V reference Similarly the 2 channel 2 signals leave the processor referenced to 3 3V but go through a bi directional level shifter U14 to also get referenced to 5V See the VGA Dock Connector J131 section for actual pin out of J131 connector The Component Video signals are terminated to ground each with a 750 resistor to meet cabling requirements A separate VGA ground plane has been created to minimize noise on the video signals by necking through small trace The voltage reference signal for the TVDAC module is provided by placing a 1 05 1 0 resistor at pin Y18 The constant current source provided by the TVDAC module generates the exact voltage reference required by the VGA standard A 0 1 pF capacitor should be connected to pin AA19 to reduce noise on the voltage reference sense point Each of the Component Video output traces should be connected to their respective feedback pins This enables the Cable
55. ctor J31 32 52 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor Right channel Left Channel Tip Analog Ground Ring Plug Sense 6 Figure 6 4 Headphone Connector 1130 Table 6 4 Headphone Connector J130 Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 53 GND GND No Connect 1 8V Power Data Pull up to 1 8V Clock 9 CMOS Reset 510 2 75V Power No Connect CSIO_VSYNC GND CSIO_HSYNC No Connect CMOS Power Down No Connect CSIO_DAT19 GND CSIO DAT18 No Connect CSIO DAT17 No Connect CSIO DAT16 GND 510 DAT15 No Connect CSIO DAT14 No Connect 510 DAT13 GND CSIO DAT12 5 0 MCLK No Connect 1 5V Power No Connect 1 8V Power GND GND GND GND GND GND Shield Ground Table 6 5 54 Shield Ground CMOS Camera Connector J12 Figure 6 5 MCIMX53SMD Board Hardware User s Guide Rev 0 I 1 1 3l CMOS Camera Connector J12 Freescale Semiconductor GND HDMI Data2 Positive HDMI Data2 Negative GND HDMI Data1 Positive HDMI Data1 Negative GND HDMI DataO Positive HDMI DataO Negative GND HDMI Clock Positive HDMI Clock
56. cur on MMC card operation and is recommended for all designs In addition for 50072 performance all SD signals should have equal length 5 7 HDMI The MCIMX53SMD board has a mini HDMI that can playback 1080p The MCIMX53SMD board uses Sil9022 from Silicon Image as bridge on board The i MX53 processor controls 19022 through the I2C port IPU parallel interface and SPDIF are connected with 519022 The 19022 HDMI transmitter supports the High Definition Multimedia Interface HDMI Specification on a wide range of mobile products High definition camcorders digital still cameras and personal mobile devices connect directly to a large installed base of HDMI TVs and DVI PC monitors by using the flexible audio and video interfaces provided by this ultra low power solution S PDIF or 12S inputs enable a pure digital audio connection to virtually any system audio processor or codec This transmitter is the next generation of its family and is an enhanced replacement for the Sil9022 Sil9022 device with lower power and enhanced features 5119022 transmitter supports High bandwidth Digital Content Protection HDCP for devices that require secure content delivery 5 8 VGA Video Output The TV Encoder module of the i MX53 processor provides three component video output signals that can be used as either a TV signal or a VGA signal to a connected monitor The MCIMX53SMD board configures these signals for being used as a VGA output through
57. e are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document Freescale Semiconductor reserves the right to make changes without further notice to any products herein Freescale Semiconductor makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation consequential or incidental damages Typical parameters that may be provided in Freescale Semiconductor data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating parameters including Typicals must be validated for each customer application by customer s technical experts Freescale Semiconductor does not convey any license under its patent rights nor the rights of others Freescale Semiconductor products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur Should Buyer purchase o
58. er GND Power 1 Layer GND Power 2 Layer Signal 2 Layer Ground 2 Layer Bottom Layer y V V V V V Vy V The stack up information provided by the PCB Fabrication Facility is as shown in Table 8 1 Widths and thickness are shown mils 1 mils equals to 0 0254 millimeters Impedances are shown The material used in calculating this stack up was 370HR 70 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor Single End Trace Differential Pair Traces lt lt S 8 Slo 5 5o Slo Ye c o Ye Z 9 5 Z 55 5 5 556 5 5 x o so e o 5 oO A S E SE 1 20 Plating Prepreg 4 00 Core Prepreg _ 3 00 Prepreg 4 00 Core 5 00 Prepreg 1 20 Plating 62 28 Total Thickness Table 8 1 Board Stack Up Information 9 Board Verification The On Board Diagnostic Scan OBDS tool used by the factory acceptance test tools can be downloaded from the http www freescale com imxsabre Web page To access the OBDS tool a serial cable and a host PC running a terminal program such as TerraTerminal or HyperTerminal will be required After connecting the host terminal to the MCIMX53SMD board press the power button on the board Before U BOOT completes the Autoboot countdown within 3 second
59. es match the test was successful MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor 4 USBH1 Enumeration Test Any USB device is plugged into the upper HOST connector the lower port is connected to the USBOTG module After confirming that a USB device is plugged in the i MX53 processor will read the device enumeration data and print it out on the terminal window If the processor cannot read the enumeration information the test has failed 5 Secure Real Time Clock Test The i MX53 processor checks to make sure the RTC clock is counting If the clock is counting the test passes 6 PMIC Device ID Test The i MX53 processor attempts to communicate with the PMIC using the attached I2C channel If the two devices communicate the test passes 7 SATA Test The processor attempts to communicate with an attached SATA device If the processor detects the internal 50 MHz clock signal and is able to communicate with the attached SATA device the test passes 8 12C Test The processor attempts to communicate with one of the I2C devices on the MCIMX53SMD board If communications is done successfully the test passes 9 GPIO Test The processor drives the USER LED light controlled by PATA DA 1 pin L3 alternately to high and low If the user light is blinking the test passes 10 FEC Ethernet Test The processor drives a data packet out of the Ethernet Jack into the loopback cable and then receives the test packet back I
60. et IC is powered 3 3V supply from DCDC 3V3 BB The output of the Ethernet PHY is connected to the debug board 3 11 Dual USB Host Connector J31 J32 The USB module of the i MX53 processor provides a high speed USB PHY that is connected to USB HUB USB2514 Two of the USB ports are dedicated to USB HOST Both jacks receive 5V power from DCDC 5V through a power monitor that can be controlled by software 3 12 Micro B USB Device Connector J34 The micro USB connector is connected to the USB OTG PHY on the i MX53 processer and supports full OTG function 3 13 Audio Input Output P1 J130 CON1 Analog audio input and output are provided by Freescale s Low Power Stereo Codec SGTL5000 The audio codec is connected to the i MX53 processor through four wire 125 communications utilizing the AUDMUX5 port of the processor The audio codec s Headphone Amp provides up to 58 mW output to 160 headphones at a typical SNR of 98 dB and THD N of 86 dB Typical power consumption is 11 6 mW In addition the audio codec can perform several enhancements to the output including virtual surround added bass and three different types of equalization The Microphone Input module of the Stereo Codec is also used while the microphone is applied on the MCIMX53SMD board A Headphone Jack J130 and Speaker Connector CON1 are on the MCIMX53SMD board A 3 5 mm Headphone with plug in detect is supported Two speakers with 80 impedance rating and 1W po
61. etting Parameters u u u S u 48 Power Jack JSS trt 51 5 1 4 u t 52 5 5 1821320 u 52 Headphone 1130 2 5 ten 53 CMOS Camera Connector J12 ccccccccecssscccesssececseseeecsesaececeesaececsesseeecsesaeeecsesaeeeceesaeeeeseaeeeeseaaes 54 HDMI Mini Connector 25 rtr iet m ee meet ht 55 SATA Connector 15 cett tete te et e tete 56 WOS Connector 128 29 7 iet iret biete 57 SD Card Connector 113 irr e ee pute 58 Mini PCle for WiFi BT Connector 115 0 0 0 0100 59 Mini PCle for 3G Connector 118 60 Debug Connector 1127 Z uet 61 VGA DOC IIIS Man ites 62 Expansion POr 78 iic d etu ir te t tu 64 Expansion Port Pin Mux Table 65 Expansion Port Pin Mux Table continued nnn 66 Expans
62. f the PMIC When designing a circuit to use the Backlight LED driver it is important to connect the cathode negative end of the LED string directly to the LED IN port of the PMIC The PMIC controls the supply voltage to the Backlight LEDs by ensuring that the voltage sensed on the LED IN port is above a threshold voltage of 0 7V If more than one LED IN ports are used the lowest port must be above the threshold value If the designer connects the cathode end of the Backlight LED string to GROUND the boost circuit will not work The MOSFET used in the boost circuit should have a low ON resistance value for best efficiency The MOSTFET chosen for the MCIMX53SMD board on semiconductor NTLJF4156NT1G also contains a necessary diode used in the boost circuitry This helps reduce the number of components 5 2 3 Touch Screen Operation The Dialog PMIC contains an autonomous Touch Screen Interface that measures the XY positions from a standard four WIRE resistive touch panel An analog to digital converter ADC channel will detect the presence of a pen touch on the panel and that will trigger a series of voltage measurements on each of the four touch panel wires X X Y and Y by the ADC in a pre selected sequence The resulting voltage readings are then reported to the i MX53 processor for conversion to a panel X Y position through the I2C communications link To ensure the Touch Screen Interface wakes up autonomously with a pen stroke it is
63. f the received packet matches the sent packet the test passes 11 I2S Audio Test The processor gives a tone to the Audio CODEC If the tone can be heard through both speakers of the attached headphones the test passes After the user requests the test to be run the user is prompted to insert a headphone set into jack 118 When the headphones are connected the user presses the y key to confirm the headphones are attached A sound is played The test will then prompt you to replay the tone if needed If the tone is no longer needed the test will ask the user if the tone was heard 12 LVDS Display Test If this test is selected an image will be displayed on the attached LVDS panel Once the image is displayed the test will prompt the user to confirm whether or not the image is seen If the image is seen the test passes 13 VGA Video Test If this test is selected a video will be displayed on the attached video monitor Once the video is displayed the test will prompt the user to confirm whether or not the video is seen If the video is seen the test passes 14 HDMI Test If this test is selected an image will be displayed on the attached video monitor Once the image is displayed the test will prompt the user to confirm whether or not the image is seen If the image is seen the test passes 15 MMC SD Card Test If the user selects this test to be run the user will be prompted to insert an MMC SD card into the full size SD card
64. fy where the processor should find its boot information Table 5 4 shows the settings of BOOT MODE pins for each of these methods Developers should remember that these two pins are tied to the NVCC RESET modules and therefore on the MCIMX53SMD board they use a 1 8V logic level unlike the Boot Configuration pins that use a 3 3V logic level The default boot selection for the MCIMX53SMD board is 00 Boot from hardware settings The settings of the BOOT MODE pins can be changed by using the optional DIP switches SW28 3 and SW28 4 It is less likely that developers want to boot the processor from eFUSEs as eFUSEs may get damaged during the boot process Developers can use the serial downloader method to boot the processor by turning both the DIP switches to ON BOOT MODE1 BOOT MODEO Boot Selection 0 0 Boot from hardware settings 0 1 Reserved 1 0 Boot from eFUSE settings 1 1 Use serial downloader Table 5 4 BOOT MODE Pin Settings If hardware settings are used to boot the processor then i MX53 pins are sampled at the beginning of the boot process These pins are explained in Table 5 5A and Table 5 5B along with their default setting on the MCIMX53SMD board Note that three bits in the BOOT CFG words do not have corresponding pins to read The MCIMX53SMD board supports four types of boot sources SPI NOR SD Card eSDHC1 eMMC4 4 eSDHC3 and SSD SATA So we only keep the relative configure pins for the boot so
65. i ERREUR EU sas Ges ea aku S 27 MCIMX53SMD Board Architecture and Design 28 5 1 DCDC and Charger tete eoim sit cos gie raa eerie uu s 29 5 22 Dialog DA9053 PMIC rn teet ete th I be d ev det aie dte ed et be IU 29 5 2 1 SMD Power Rails a n a n eter eee sape SERE aada e aKa Aiaia eitia 31 5 2 2 Backlight LED 33 5 2 3 Touch Screen Operation erar er I ERRORIS REGII esa ul aa 33 5 2 4 8 gt E 33 5 3 10053 Applications ProGeSSOM 2 adde dela ed u R 34 5 3 1 Peripheral Module Logic Voltage Levels 35 5 3 2 Boot Mode Operations and Selections 35 5 3 3 COCK 516 MAIS 39 5 3 4 i MX53 Internal 2 41 5 3 5 Watch Dog 42 5 4 DDR3 SDRAMI Me fyYi ry 2 42 5 5 SD Card ConnectOol zoo e e ETHER E ERES LI ER REOR TERR ERRARE ER ERE
66. ion IC Reduced Media Independent Interface RTC Real Time Clock SDRAM Synchronous Dynamic Random Access Memory SD Secure Digital SPI Serial Peripheral Interface SSI Synchronous Serial Interface ULPI UTMI Low Pin Interface USB Universal Serial Bus UTMI Universal Transceiver Macrocell Interface WDOG Watch Dog WLAN Wireless LAN Table 2 1 List of Acronyms Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 11 3 Specifications 3 1 i MX53 Applications Processor The i MX53 processor is based on ARM Cortex A8 Platform which has the following features e MMU 1 Instruction and L1 Data Cache e Unified L2 cache Target frequency of the core including Neon VFPv3 and 11 Cache is 1 1 2 GHz target frequency of the MCIMX53SMD platform is 1 GHz Neon coprocessor SIMD Media Processing Architecture and Vector Floating Point VFP Lite coprocessor supporting VFPv3 e TrustZone The memory system of the processor consists of the following components e Level 1 Cache o Instruction 32 Kbyte o Data 32 Kbyte e Level 2 Cache o Unified instruction and data 256 Kbyte e Level 2 internal memory o Boot ROM including HAB 64 Kbyte o Internal multimedia shared fast access RAM 128 Kbyte Secure non secure RAM 16 Kbyte e External memory interfaces o 16 32 bit DDR2 800 LV DDR2 800 or DDR3 800 up to 2 Gbyte o 32bit LPDDR2 o 8 16 bit NAND SLC MLC Flash up to 66 MHz 4 8 14 1
67. ion Port Pin Mux Table continued a a 67 Expansion Port Pin Mux Table continued a 68 Board Stack Up 71 Problem Resolution Table ie ee het etre de 75 Output Capacitors and Values 76 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor 1 Introduction MCIMX53SMD Board Hardware User s Guide is a user manual that describes the design and usage of the MCIMX53SMD board which is a printed circuit board PCB based on Freescale Semiconductor s i MX53 Applications Processor AP This guide specifies the basic architecture of the MCIMX53SMD board and explains the design and purpose of each component of the board It also tells how developers can use the MCIMX53SMD board in their various development works 1 1 MCIMX53SMD Board Overview The MCIMX53SMD board is i MX53 platform that provides many widely used features of the i MX53 Applications Processor in a tablet package Being a complete development platform the MCIMX53SMD board has a design structure that is almost similar to the more complex i MX53 platforms This helps developers to port code developed on the MCIMX53SMD board to other boards with minimal effort Developers can use the MCIMX53SMD board to test the features of the i MX53 Applications Processor before investing a large amount of money
68. it 1 3 byte 24 bit BOOT CFG3 5 4 Port Select 00 I2C1 eCSPI1 01 12C2 eCSPI2 10 12C3 CSPI 11 Reserved BOOT CFG3 3 2 Chip Select SPI Only 00 CSO 01 651 10 652 11 53 Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 37 SD eSD BOOT_CFG1 4 Fast Boot BOOT CFG2 5 Bus Width BOOT CFG3 5 4 Port Select MMC eMMC BOOT CFG1 4 Fast Boot BOOT CFG2 7 5 Bus Width BOOT CFG3 5 4 Port Select BOOT CFG3 3 DLL Override 0 Regular 1 Fast Boot 0 1 bit 1 4 bit 00 eSDHC1 01 eSDHC2 10 eSDHC3 11 eSDHC4 0 Regular Boot 1 Fast Boot 000 1 bit 001 4 bit 010 8 bit 011 Reserved 100 Reserved 101 4 bit DDR MMC 4 4 110 8 bit DDR MMC 4 4 111 Reserved 00 eSDHC1 01 eSDHC2 10 eSDHC3 4 4 11 eSDHCA 0 Use Default ROM 1 Use eFUSE DLL Override 38 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor When the MCIMX53SMD board was originally designed several of the pins were selectable by the two 8 position DIP Switch SW26 SW28 After initial testing of the MCIMX53SMD board the optimum BOOT_CFG settings for flexibility and ease of use were determined These are the default settings on the board which set the 4 eSDHC3 as the default boot source As the developer becomes more familiar with the board and wishes to experiment more the nex
69. ives 24 MHz clock input signal from GPIO of the i MX53 processor These seven connections with the processor are the only required signals The Audio CODEC provides a Left and Right Stereo output signal capable of providing a 160 set of headphones earbuds with up to 58 mW of power The Audio CODEC is also capable of receiving a single microphone channel and converting the information to a digital format and transmitting it back to the processor The CODEC also generates the necessary microphone bias voltage to allow proper condenser operation The MCIMX53SMD board was designed to be used with a range of microphone options including the mono microphone earbud sets commonly used with cellular phones For this reason the microphone bias voltage is connected to the microphone input signal on the MCIMX53SMD board rather than connecting the bias voltage signal to a separate channel on the Microphone Jack J6 and allowing a higher end microphone to connect the bias source closer to the connector In addition the right channel audio output of the Audio CODEC can be sent to the Microphone Jack The MCIMX53SMD board does not come with this feature by default but the developer can easily populate the 122 footprint with a ferrite bead or a 00 jumper The MCIMX53SMD board is also designed with a cable detect feature on both the Headphone and Microphone Jacks One option would be to use an audio connector with an internal flag that would make or break de
70. le User interface buttons Power Reset Vol and Vol buttons Electrode touch keypad Indicators Six status LEDs for example external power WiFi and debug Li ION battery connector 5 pin header for Li ION battery Coin cell Connection point for 2 pin coin cell required in RTC operation PCB 200 mm x 166 mm 8 layer board Table 1 1 MCIMX53SMD Board Components MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor 1 2 MCIMX53SMD Board Kit Contents The MCIMX53SMD board comes with the following items e MCIMX53SMD main board e MCIMX53SMD debug board e Power supply 100 240V input 15V output e 3 cell Li ion Battery and Charger will be available in 2011 HDMI to HDMI cable e Quick Start guide e DVD MCIMX53SMD i MX53 Getting Started 2 List of Acronyms The acronyms used in this document are listed in Table 2 1 Acronym Used For AC97 Audio Codec 97 CMC Common Mode Choke CODEC Compression Decompression DDR Double Data Rate DNP Do Not Populate HDMI High Definition Multimedia Interface 2 Inter Integrated Circuit 125 Integrated Interchip Sound IC Integrated Circuit IDE Integrated Debug Environment LAN Local Area Network QSB Quick Start Board LCD Liquid Crystal Display LPDDR2 Low Power DDR2 MMC Multi Media Card PMIC Power Management Compan
71. n a contrast pin two separate channels of I2C communications an interrupt pin and power supplies SV and 3 3V will provide the necessary signals to support many of the LVDS display panels currently available in the market The connector used is a 30 pin connector that meets the LVDS standards for connectors Hirose DF19G 30P 1H 56 In the MCIMX53SMD board development work with LVDS panels was done with the Hannstar HSD100PXN1 00 11 display If the developer wishes to use a different LVDS display a custom cable would most likely be required to ensure that the plug on the cable end which is connected to the display was of the right type and to re order the signals to match the ordering on the display For using with other displays signals are referenced to the following voltages e LVDS Data Clock 2 5V LVDS 2V5 Display Control 3 3V VLDO3 3V3 2C channel 2 3 3V VLDO3 3V3 2C channel 3 3 3V VLDO3 3V3 Isolation resistors on the I2C channel 2 traces provide a means of isolating the LVDS connector from other functions on the board if the LVDS connector is interfering with I2C communication In addition the empty pads can also serve as attachment points for hand soldered wires if the developer wishes to run different signals to this connector 44 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor The i MX53 processor has an internal method and an external method to measure Band Gap resistance
72. n 802 15 4 Standard 2006 compliant radio that operates in the 2 4 GHz ISM frequency band The transceiver includes a low noise amplifier 1 mW nominal output power amplifier PA internal voltage controlled oscillator VCO integrated Tx Rx switch on board power supply regulation and full spread spectrum encoding and decoding The i MX53 processor controls ZigBee through CSPI and I2C 6 Connector Pin Outs This section describes the signals going to each of the 14 types of connectors used on the MCIMX53SMD board Although this information is available on the schematic the footprint used in manufacturing the PCB is also included to provide a map to the actual signals on the board The image of the footprint provides its top view In addition to the pin tables and footprints there is also a pin mux table provided for the Expansion Port so that the developer can readily see the possible signals brought out through the Expansion Port These details are included in the following tables and figures Table 6 1 Power Jack 135 Figure 6 1 Power Jack J35 Table 6 2 USB Connector 134 Figure 6 2 USB Connector J34 Table 6 3 USB HOST Connector 131 132 Figure 6 3 USB HOST Connector J31 J32 Table 6 4 Headphone Connector J130 Figure 6 4 Headphone Connector J130 Table 6 5 6005 Camera Connector 112 Figure 6 5 CMOS Camera Connector J12 Table 6 6 HDMI Mini Connector J25 Figure 6 6 HDMI Mini Connector 1
73. necessary to supply a 1 8V reference voltage to the TSIREF GPIO 7 pin of the PMIC It is recommended that one of the high PSSR Regulators of the PMIC be used to supply this voltage VLDO6 VLDO9 are possible sources for supplying this reference voltage 5 2 4 Miscellaneous It will automatically charge using the programmed charging settings whenever wall power is supplied to the MCIMX53SMD board When the battery voltage reaches the programmed level charging will stop Battery discharge will not begin until wall power is removed from the board and if a Li ION battery is attached the main battery discharges to the battery cut off level There are two port ID traces connected from the Expansion Port header to two of the ADC pins of the PMIC Each unique Daughter Card designed by Freescale has a different resistor value attached to the two ID traces on the Daughter Card It is possible to use this voltage divider identification system to determine at boot time if a daughter card is attached and if so which specific daughter card it is Over Voltage protection is sensed by the DCIN B4 pin of the PMIC The voltage sensed by this pin must be between 4 5V and 5 5V If the voltage meets this threshold value the voltage seen at DCIN is blocked from the Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 33 DCIN_SEL B3 and the P Channel MOSFET turns ON Otherwise DCIN_SEL remains high power is blocked from the re
74. o audio multiplexer AUDMUX providing four external ports Five UART RS232 ports up to 4 0 Mbps each One supports eight wire and the other four support four wire Two high speed enhanced CSPI ECSPI ports and one CSPI port Three I2C ports supporting 400 kbps Fast Ethernet controller IEEE1588 V1 compliant 10 100 Mbps Two controller area network FlexCAN interfaces 1 Mbps each Sony Philips Digital Interface SPDIF Rx and Tx Enhanced serial audio interface ESAI up to 1 4 Mbps each channel Key pad port KPP Two pulse width modulators PWM GPIO with interrupt capabilities Secure JTAG controller SJC 0 The system supports efficient smart power control and clocking e Supporting DVFS Dynamic Voltage and Frequency Scaling and DPTC Dynamic Process and Temperature Compensation techniques for low power modes Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 13 Power gating SRPG State Retention Power Gating for ARM core and Neon Support for various levels of system power modes Flexible clock gating control scheme On chip temperature monitor On chip oscillator amplifier supporting 32 768 kHZ external crystal On chip LDO voltage regulators for PLLs Security functions are enabled and accelerated by the following hardware ARM TrustZone including the TZ architecture separation of interrupts memory mapping and so on Secure JTAG controller SJC Protecting JTAC
75. o be sent to the processor The PMIC has several different options for Pull Up levels on each of its output pins In some cases VDDour is one option along with power supplied to both the VDD 101 14 and VDD 102 4 pins as Pull Up source The exact source of Pull Up power is determined by the registry settings of the PMIC and can be pre programmed at the factory as the designer wishes Some Pull Up registry settings apply to groups of pins so care must be taken in selecting the power source for a particular group of pins See the Dialog PMIC data sheet for more detailed information on registry settings For the MCIMX53SMD board VLDO3 3 3V is connected to VDD 101 primarily to ensure that the 3V3 EN signal sent to the external regulator is sufficient to turn ON the regulator Similarly 1208 1 8V is connected to VDD 1 2 to provide proper 12C TTL logic levels 5 3 i MX53 Applications Processor The i MX53 Applications Processor is physically located in the central portion of the MCIMX53SMD board The most critical components for placement after the processor are the DDR3 SDRAM ICs The remaining components and connectors are arranged around the periphery of the board in locations that minimize trace routing The i MX53 processor is a highly integrated system on chips with many modules controlled by the main ARM Cortex A8 core Most modules have Logic Voltage inputs that allow the designer to modify logic levels to suit the needs of connected
76. of USB devices though self powered hub not to exceed 500 mA current draw or e Any combination of USB devices through a powered hub Dual USB connectors are shown in Figure 4 4 Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 21 Dual USB HOST Connector 131 132 dE Figure 4 4 Dual USB HOST Connector 4 5 Micro B USB Device Connector J34 The MCIMX53SMD board has one micro B USB device connector that can be used to connect the MCIMX53SMD board to a USB Host computer The micro B connector is connected to the high speed HS USB 2 0 OTG module of the i MX53 processor When a 5V supply is provided to the micro B connector from the USB Host then the i MX53 processor will configure the OTG module for device mode This will prevent the lower USB Host port from operating correctly The 5V power provided by the attached USB Host is only used by the i MX53 processor for sensing that the host is present The MCIMX53SMD board will not draw power from the connected USB Host and will not operate without a 5V DC power source or charged Li ION battery The micro B connector is keyed and will not accept a micro A plug from a cable A micro B to USB A cable is supplied as part of the MCIMX53SMD board kit and can be inserted into the micro B USB connector at the point shown in Figure 4 5 22 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor Micro B USB Connector J34
77. of the module A 1910 1 resistor must be connected to the SATA_REXT pin C13 This resistor received a small constant current at the initialization of the SATA module to allow cable impedance calibration This resistor is not required after module initialization The i MX53 processor provides two pins to receive an external differential pair clock input to be used by the SATA module Testing of the i MX53 processor confirms that the internally generated clock signal is working properly Therefore the external clock components are not populated and the eFUSEs for the processor are configured for internal clock operation The SATA connector is suitable to be used with all SATA capable storage media devices including Hard Drives and Optical Media storage devices DVD CD We use SSD SATA on the MCIMX53SMD board by default It is possible to configure the MCIMX53SMD board to boot directly from a SATA device To enable the MCIMX53SMD board to boot from SATA the developer needs to set SW26 to 01010000 Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 47 5 15 Debug UART Serial Port Debug Board The i MX53 processor has five independent UART Ports UART1 5 By default the processor will boot using UART1 to output serial debugging information specifically on pins CSIO_DAT10 pin R5 and CSIO DAT11 pinT2 These two pins are outputted from the NVCC CSI module which is pulled up to 1 8V on the MCIMX53SMD board
78. on the Horizontal and Vertical Synchronization signals as well as the VGA I2C communications signals in order to meet VGA specifications Meanwhile Audio LINEIN and LINEOUT are supported on the Dock The Audio LINEIN and LINEOUT are from SGTL5000 on MCIMX53SMD board Another feature on Dock is USB 3 9 LVDS Video Output J28 29 The LVDS module of the i MX53 processor is connected to two 30 pin LVDS connectors Both connectors are pinned out on the MCIMX53SMD board though the i MX53 processor is capable of outputting to two separate LVDS displays The pin outs on the LVDS connector match the optional cable and 10 HannStar LVDS display Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 15 both be purchased from Freescale The single LVDS connector will support video formats up to 165 Megapixels per second The power source for the LVDS module is a switchable output of the VBUCKPERI DCDC converter This rail is shared with the SATA module and the USB module If these modules are not used the PMIC can be programmed to turn off power to these three modules without affecting the 2 5V supplies to other portions of the i MX53 processor 3 10 Ethernet on Debug Board The i MX53 processor Fast Ethernet Module outputs formatted signals to an external Ethernet PHY processor is capable of 10 100 Base T speeds The MCIMX53SMD board uses the SMSC LAN8720A Ethernet Transceiver in QFN 24 package The Ethern
79. on to Freescale s second generation capacitance detection engine Some of the major additions include an increased electrode count a hardware configurable 2 address an expanded filtering system with debounce and completely independent electrodes with built in auto configuration The total number of electrodes is 13 including 12 physical electrodes and one electrode for proximity detection Only four electrodes pad on the MCIMX53SMD board electrodes for HOME BACK SEARCH and ENTER Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 49 6 18 4 Light Sensor Light Sensor 15129023 is an integrated ambient and infrared light to digital converter with I2C SMBus Compatible Interface Its advanced self calibrated photodiode array emulates human eye response with excellent IR rejection The on chip ADC is capable of rejecting 50 Hz and 60 Hz flicker caused by artificial light sources The lux range select feature allows users to program the lux range for optimized counts lux For ambient light sensing an internal 16 bit ADC has been designed by using the charge balancing technique The nominal ADC conversion time is 90 ms however the user can adjust it between 11 us to 90 ms depending the oscillator frequency and ADC resolution 5 19 3G Modem The MCIMX53SMD board has a mini PCle interface that can be used by 3G modem The developer can use USB port to communicate with 3G modem No A D audio in
80. ormation about i MX53 processor is important for developers when they are developing projects based on i MX53 processor There are 25 such pins and practically speaking they supply the internal pull up voltages for pins designated for data output These 25 pins are explained in Table 5 3 Once a voltage level is selected for a particular module all pins within that module will use the same voltage level It is important for the developer not to try to use an external pull up to a different voltage level for individual pins Level shifters must be used if certain pins need to have different voltage levels to interface with external ICs If a different voltage level is used on an external pull up one or both of the affected power rails will most likely have a different voltage level than intended throughout the design On a newly designed board that shows unexpected voltage levels this may be the first thing to check Pin Name Module Allowed Values MCIMX53SMD board NVCC EMI DRAM 1 External Memory Interface 1 425V 1 9V 1 5V Match DDR3 Memory NVCC DRAM 2 NVCC DRAM 3 NVCC EMI DRAM 4 NVCC EMI DRAM 5 NVCC NANDF NAND Flash 1 65V 3 6V 1 8V NVCC EIM MAIN 1 External Interface Module 1 65V 3 6V 3 3V NVCC EIM MAIN 2 NVCC EIM SEC NVCC RESET Reset Logic Levels 1 65V 3 1V 1 8V Match PMIC NVCC SD1 SD Card Module 1 1 65V 3 6V 3 3V Match SD Cards NVCC SD2 S
81. ot J5 If the developer does not have one or more of the above items the test can easily be skipped when asked if the user would like to perform the test A complete cycle of tests covers 16 different aspects of the board When the last test is run the OBDS tool will print out a summary of the test results A failure in any one particular area would indicate that there is a hardware fault with the MCIMX53SMD board that should be addressed If the developer code does not function correctly even after successfully performing all the tests the problem is most likely with the code A more detailed description of the tests is as follows 72 1 2 3 MAC Address confirmation The i MX53 processor reads the MAC address programmed into the processor eFUSEs and prints it out on the terminal window The outputted address should match the MAC address label on the MCIMX53SMD board If they match the test was successful UART Test When the test is running the test expects different characters to be inputted from the keyboard of the host computer When a character is inputted the i MX53 processor takes the character and transmits it to the terminal window and then asks the user to verify if the character is correct by pressing the y key The user can exit the test by pressing the x key DDR Test The test writes predetermined data onto the DDR3 memory reads those memory blocks back out and then compares the two values for errors If the valu
82. p restrictions The power up timing sequence shown in Table 5 1 is the sequence programmed into the Dialog PMIC It is one way of providing power sequences to the i MX53 processor Designers are free to change the power timing sequence on their own board designs as long as the timing requirements are met Freescale has not formally tested other power up timing sequences Regulator Time Slot VBUCKPRO 19 mSEC VBUCKPERI 23 mSEC VLDO6 VLDO8 VLDO10 VBUCKCORE 27 mSEC VBUCKMEM 31 mSEC VBUCKPERI SW VLDO2 VLDOS VLDO4 35 mSEC VLDO7 VLDO3 64 mSEC VLDO9 Table 5 1 Regulator Timing Sequence The Dialog PMIC enters a SHUTDOWN STANDBY condition in three ways Byacommand from the i MX53 processor through I2C communications e By i MX53 processor action to hold the nONKEY KEEPACT pin low for at least five seconds e By hardware if the user holds down the POWER button for more than five seconds 30 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor All three actions result the Dialog PMIC powering down the voltage regulators reverse order of the power up sequence except for VLDO1 Subsequently pressing the POWER button will initiate the same power up sequence as shown in Table 5 1 The various power rails supplied by the PMIC are discussed in the SMD Power Rails subsection Other features of the Dialog PMIC implemented by the MCIMX53SMD board are discussed in the Backlight LED
83. pending on whether the connector barrel was inserted into the jack These connectors are available but are often more expensive and may have supply problems On the MCIMX53SMD board a four pin Audio Video style connector was chosen to implement the cable detect feature When a three connector cable is inserted into the connector the cable detect pin is shorted to the ground pin sending an active low signal back to the processor to indicate that a cable was inserted For this reason the ground pin on the Microphone and Headphone Jacks must be system ground and not a virtual audio ground Therefore the Audio CODEC was designed to use the AC Coupled audio mode which makes use of two 220 uF capacitors If the developer wishes to design a board that uses a flagged jack for cable detection or does not implement a cable detection scheme it would then be possible to use the Direct Drive feature of the Audio CODEC and eliminate the need for large capacitors The Audio CODEC can be reset by software through the I2C channel but there is no hardware reset pin on the CODEC Should 2 communications be lost between the Audio CODEC and the Processor it may be necessary to shut down DCDC 3V3 BB power to the MCIMX53SMD board and reinitialize the Audio CODEC by the power up sequence A power amplifier TS4984IQT and a 2 channel speaker are added to the MCIMX53SMD board TS49841QT amplifier has been designed for top class stereo audio applications Due to
84. pp sps site prod summary jsp code RDIMX53SABRETAB amp fpsp 1 amp tab Desi gn_Tools Tab 14 FCC Statement This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to part 15 of the FCC rules These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in commercial environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instruction manual may cause harmful interference to radio communications Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his her own expense Modifications not expressly approved by the manufacturer could void the user s authority to operate the equipment under FCC rules Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 81
85. r use Freescale Semiconductor products for any such unintended or unauthorized application Buyer shall indemnify and hold Freescale Semiconductor and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part Learn More For more information about Freescale products please visit www freescale com Freescale and the Freescale logo are trademarks of Freescale Semiconductor Inc Reg U S Pat amp Tm Off All other product or service names are the property of their respective owners ARM is the registered trademark of ARM Limited ARM Cortex A8 is a trademark of ARM Limited Freescale Semiconductor Inc 2011 All rights reserved 2 freescale Table of Contents 600 FIQUES EE 6 List of R 8 Te 1 Le a shm ks aha qu shunqu ae 9 1 1 MCIMX53SMD Board OVe Vi W n Dua 9 1 2 MCIMX53SMD Board Kit u s as a aqu uQ au ka aR uu 11 2 UBISTIOTACTONYIMS s aceti tette re teet iim t eti m bu te dine pte e EH PG RE 11 3 SpecifiCatioris tepore tuens ete te 12 3
86. races are not necessarily connected to the DDR3 chips in sequential order but for ease of routing are connected as best determined by the layout and other critical traces The i MX53 processor has the capability of remapping SDRAM word bit order based on chip select used so that words can be physically stored in memory in correct order If this is a feature the developer wishes to implement there is more information in the software reference manual The DDR VREF is created by a simple voltage divider using 4700 1 resistors and 0 1 uF capacitors for stability The relatively small value resistors provide enough current to maintain a steady mid point voltage The calibration resistors used by the four DDR3 chips and the processor 2400 1 resistors This resistor value is specified by the DDR3 specifications There is a 2000 resistor between each clock differential pair to 42 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor maintain the correct impedance between the two traces The DDR3 SDRAM should be rated for 1066 MHz or faster For skilled designers wishing to double the amount of DDR3 SDRAM available for being used with the i MX53 processor using eight x8 width DDR3 chips the following considerations should be weighed carefully before proceeding Four DDR3 chips on a chip select line will exceed the current supply capability of the VBUCKMEM power source An additional 1 5V power source would need to be added Also a
87. resentations of the assembly drawings are shown in the following figures Figure 11 3 Figure 11 4 Assembly Drawing Top Assembly Drawing Bottom MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor 9690000000 Lu 9299 Dn P tren 1 1 0 __ 617001 T II Dialog DA9053 PMIC 84520 Accelerometer RS232 UART Transceiver MAX17085B DCDC amp Charger U2 i MX53 Application Processor U20 U3 DDR3 SDRAM U80 U5 DDR3 SDRAM U24 U17 LAN8720 FEC U61 033 AT97SC3203S TPM DNP Freescale Semiconductor Figure 11 1 Major Component Highlights Top MCIMX53SMD Board Hardware User s Guide Rev 0 77 188 met 401 2 2 eo 7 JEX WE a IIIIIIIIIIIIIIIIII 5119022 HDMI USB2514 USB 1 0 4 GM22 GPS Module U9 SGTL5000 Audio Codec U63 U4 DDR3 SDRAM U18 U6 DDR3 SDRAM U32 019 eMMC U60 MC1323X ZigBee Figure 11 2 Major Component Highlights Bottom 78 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor Freescale Semiconductor 0 0 x Som E 8i 0 wt m m m z UE 2 7 5 We EN 0
88. rger e Status The 3G modem status LED 019 is an Orange LED gated 3G WWLAN pin e WiFi BT The WiFi Bt status LED 09 010 D9 is a Green LED and as WLAN Active status 010 is a Blue LED and as BT Active status 3 22 Li ION Battery Connector J12 The MCIMX53SMD board provides a footprint J12 that can be used to solder a five pin connector The board has a three cell Li ION battery of 40 Wh The developer can change it if needed and must follow the pin map of the connector 3 23 Back Up Coin Cell Posts BT1 For proper operation the coin cell posts should be soldered direction to the MCIMX53SMD board The DA9053 PMIC will charge the coin cell when Battery or Wall Power is available When Battery or Wall Power is removed the coin cell will provide power only to the RTC power rail VLDO1 supplying power to the i MX53 processor The length of time a coin cell can power the RTC subsystem may vary 18 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor 4 MCIMX53SMD Board Connectors The MCIMX53SMD board provides a number of connectors for a variety of inputs and outputs to and from the board The following subsections describe these connections in detail 4 1 Wall 15V Power Jack J35 The 15V at 3A AC to DC power supply that comes with the MCIMX53SMD board is plugged into the Power Jack J35 on the board as shown in Figure 4 1 To avoid damage to the board it is recommended not to use unofficial
89. rogrammed to establish communications with an attached Ethernet device and is ready to correctly format all communications being transmitted or received by the processor If communications become unreliable the processor can restart the PHY by forcing it into reset The PHY is connected to debug connector J127 through a magnetic device It has two pairs of differential traces for receive and transmit The differential pair traces are biased externally with 49 9 1 Q pull up resistors When initially connected to another Ethernet device the PHY will negotiate to determine if it is connected to a switch type device or another Ethernet end device and will reconfigure the Transmit and Receive inputs to correctly match the device attached This eliminates the need for cross over cables when directly connecting to another Ethernet end device The LED status indicators are driven by the PHY to show a connected link and activity on the link It is important to note that the LED control lines from the PHY also serve as PHY feature selection options At boot time the LED1 control pin determines whether the 1 2V internal regulator should be turned ON or OFF and the LED2 control pins determines whether the PHY accepts an external reference clock or internally generates the clock signal and outputs it to the processor for reference See the LAN8720 data sheet for more details 5 13 USB PHY Connections The i MX53 processor has two internal USB PHY one for USB H
90. s of pressing the power button press any key on the host computer This will stop the Ubuntu Kernel from continuing the boot process and allow the developer to access the code on the SD card On the host computer terminal window type the following two lines mmc read 0 708000 200 3e5 Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 71 go 70800000 This will begin the OBDS diagnostic tool The tool has 15 tests that it can perform They are as follows Sy OT ON OQ N P O MAC Address confirmation Debug UART Test DDR3 Test USBH1 Enumeration Test Upper Host Port Secure Real Time Clock Test Dialog PMIC ID Test SATA Test 2 Device Test GPIO Test Ethernet Test 12S Audio Test LVDS Display Test VGA Video Test HDMI Daughter Card Test 15 MMC SD Card Test The tests are straight forward and if a supporting piece of equipment is required the test will prompt you for it In order to complete all the tests you would need to have the following equipments SATA Test Attached SATA device required Ethernet Test The Ethernet loopback test plug as described below is required Headphone Test A set of earphones or speakers are required LVDS Test The optional LVDS display kit is required VGA Video Test Connection to a VGA monitor is required HDMI Test The optional HDMI card is required MMC SD Card Test A full size SD card is required in card sl
91. scale Semiconductor Three other common JTAG signals used by debugging devices Return Clock Data Enable Data Acknowledge are not used by the i MX53 processor and are either pulled up or pulled down by the MCIMX53SMD board On the MCIMX53SMD board the logic signals for JTAG are designed to 1 8V A 1 8V reference signal from VLDO8_1V8 is connected to pin 1 of the 20 pin JTAG connector to provide this logic level signal to the attached debugging device In addition a limited amount 0 5A of 3 3V power can be supplied to the debugging device for debugging devices that required power 5 17 CMOS Sensor The MCIMX53SMD board includes a 500 Megapixel CMOS Camera OV5642 by OmniVision The i MX53 processor can configure the OV5642 registers through I2C port and get the value from an 8 bit data interface The MCIMX53SMD board does not support AF function The developer can use another CMOS module but must follow the pin map of the connector The MCIMX53SMD board uses FX12B 40P 0 4SV from HIROSE 5 18 Sensors The MCIMX53SMD board has four sensors Accelerometer MMA8452 eCOMPASS MAG3112 CAP Touch Sensor MRP121 and Light Sensor 15129023 These four sensors are connected with three i MX53 2 ports Accelerometer is connected with 2 1 port eCOMPASS CAP Touch Sensor are connected with I2C2 port and Light Sensor is connected with 2 port 6 18 1 Accelerometer Accelerometer 8452 is an intelligen
92. st of the MCIMX53SMD board The TP L5 pin of the PMIC must be connected to ground When designing with a 0 5 mm pitch uBGA package there is limited space for vias and traces under the BGA To assist with layout Freescale has confirmed that all pins labeled NO CONNECT on the PMIC are no manner bonded out to the silicon Therefore for routing purposes it is possible to route the trace from an interior pin through one or more NO CONNECT pins or to place a via directly under a NO CONNECT pin without requiring a via in pad technique If the CAD Layout Engineer decides to place a via under NO CONNECT the should not be tented as trapped gases during the assembly process as this may cause the solder ball from the NO CONNECT pin to blow out into other pins and cause internal shorts under the BGA The I2C communications channel between the processor and the PMIC is channel 1 This channel is only shared with the accelerometer This channel operates at TTL logic level of 1 8V The NRESET F10 pin of the PMIC is directly connected to the Active Low POR B C19 pin of the i MX processor The PMIC will hold the processor in the RESET state until all the power rails are fully powered The NIRQ E10 pin of the PMIC is connected to the GPIO 16 C6 pin of the processor This pin is not a dedicated pin for an interrupt request but can be programmed in the software to inform the processor that the PMIC has information t
93. t low power and lower noise 3 x 3 x 1 mm capacitive micro machined accelerometer having 12 bits of resolution This accelerometer is packed with many flexible user programmable embedded functions that are available with two configurable interrupt pins MMA8452 has user selectable full scales of 2 4g 8g and it is capable of measuring accelerations with an Output Data Rate ODR of 400 Hz 200 Hz 100 Hz 50 Hz 12 5 Hz and 1 563 Hz These output data rates correspond to sample intervals from 2 5 ms to 640 ms The device can be configured to generate inertial wake up interrupt signals when a programmable acceleration threshold is crossed on any of the three sensed axes Acceleration and time thresholds of interrupt generators are programmable by the end user 6 18 2 eCOMPASS eCOMPASS MAG3112 is a small low power 3 axis digital magnetometer It works by measuring the strength of a magnetic field which is a combination of earth s magnetic field and the magnetic fields of the nearby objects including distortions The device can be used in conjunction with a 3 axis accelerometer to produce orientation independent accurate compass heading information It features a standard 2 serial interface output and smart embedded functions 6 18 3 CAP Touch Sensor CAP Touch Sensor MPR121 is the second generation sensor controller after the initial release of the MPRO3x series devices The MPR121 features increased internal intelligence in additi
94. t step for the developer is to write code for other device to initialize it as alternative boot source and pass the boot process to the new source Figures 5 2 shows the location of BOOT Switch The ON state indicates high Power logic level and the OFF state indicates low GND logic level SW26 SW28 Figure 5 2 Boot Switch SW26 SW28 5 3 3 Clock Signals The i MX53 processor uses three external clocks 1 and 073 The 24 MHz crystal Y1 is the main clock source for the processor The crystal is located on the bottom side of the board as shown in Figure 5 3 It is driven by its own 2 5V supply pin NVCC_XTAL Although the crystal frequency for the board is set to be 24 MHz the default BOOT_CFG2 2 pin that controls the frequency is left to auto detect In the case of 24 MHz the actual setting is not important If a clock oscillator is used it would be connected to the pin EXTAL AB11 and the pin XTAL AC11 would be left floating The 24 MHz clock signal can be outputted from any GPIO pin for being used in other locations On the MCIMX53SMD board the clock signal is outputted from the 0 pin and the net is labeled GPIO_O CLKO The clock signal is sent to the Audio Codec as the clock source for the audio sub system and it is also sent to the expansion port as an available clock signal for a custom designed card if needed The 22 5792MHz OSC Y3 is the clock source used by the i MX53 processor and Audio Codec for high
95. tegrated 130 nm CMOS single chip GPS receiver that combines the functionality of a single conversion GPS RF front end and GPS baseband processor A complete GPS receiver built with the AR1520A needs only a handful of external components such as SAW filter TCXO RTC crystal and few passive components keeping the overall bill of materials to a minimum Many peripherals controlled by CPU support that can be configured on any of the GPIO pins The device features multiple power islands 1 8 3V I O compatibility battery backup RTC on chip regulators and powerful GPS specific functions The i MX53 processor controls the GPS module through UART 5 22 ZigBee The MCIMX53SMD board uses 1323 as ZigBee function The MC1323x family is Freescale s low cost SoC platform for the IEEE 802 15 4 standard It incorporates a complete low power 2 4 GHz radio frequency transceiver with transmit receive switch an 8 bit 508 CPU and a functional set of MCU peripherals into 48 pin LGA package This family of products is targeted for wireless RF remote control and other cost sensitive 50 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor applications ranging from home TV and entertainment systems such as ZigBee BeeStack Consumer RF4CE to low cost low power IEEE 802 15 4 and ZigBee end nodes The MC1323x is a highly integrated solution with very low power consumption The MC1323x contains an RF transceiver which is a
96. terface is reserved for 3G modem The developer needs to have a 3G modem no 3G modem is provided with the MCIMX53SMD board kit 5 20 WiFi BT Module The MCIMX53SMD board also has another mini PCle interface that can be used by the WiFi BT module The WiFi BT module is designed by a Taiwan based company USI which has Atheros as one of its major chipset providers This is a half size mini card featured with steady stream of up to 150 Mbits s wireless networking and Bluetooth combo function to provide both technologies for enterprise and home wireless LAN and PAN access half size mini card is based on the Atheros AR6003 and AR3001 integrated circuits AR6003 supports 802 11a 11b 11g and multimode 11n WLAN implementations AR3001 provides a highly integrated complete Bluetooth system and it is compliant with latest Bluetooth V2 1 EDR specification A firmware based architecture can support latest industry standards in the security and quality of service QoS draft 802 11i and 802 11e WMMTM standards respectively Note that this PCle connector pin map is just mapped to Atheros WiFi BT module which uses a non standard mini PCle pin map No other mini PCle card should be connected to this slot The i MX53 processor controls WiFi part through SDIO port A 4 line UART and an 125 are connected with BT part 5 21 GPS Module The MCIMX53SMD board also has GPS module GM22 which uses AR1520A The AR1520A is a monolithic highly in
97. ttaching the address lines to eight DDR3 chips is a great amount of loading Premium PCB materials would be required to reduce losses Using eight DDR3 SDRAM chips in this manner has not been tried by Freescale and is not formally recommended 5 5 SD Card Connector The SD Card Connector 13 is directly connected to the eSDHC channel 1 module of the i MX53 processor This card socket will support up to a 4 bit data transfer from an SD card or a MMC card inserted into the socket The main power for the SD Card Socket is 3 3V from DCDC 3V3 BB The developer should note that the internal i MX53 processor eSDHC module is powered by a 3V3 source Therefore changing the voltage of the card socket on the MCIMX53SMD board is not recommended The SD1 Clock trace has 220 series termination resistor R412 This resistor is inserted to prevent a reflected signal from being sensed by the i M53 processor This has been found to occur on MMC card operation and is recommended for all designs In addition for 50 MHz performance all SD signals should have equal length 5 6 eMMC 4 4 One eMMCA 4 is directly connected to the eSDHC channel 3 of the i MX53 processor This port will support 8 bit data transfer from eMMC The main power for the eMMC is 3 3V from DCDC 3V3 BB The SD3 Clock trace has a 220 series termination resistor R146 This resistor is inserted to prevent a reflected signal from being sensed by the i M53 processor This has been found to oc
98. urce BOOT _ BOOT _ BOOT_ BOOT _ 8001 8001 8001 CFG2 5 CFG2 6 CFG2 7 CFG1 3 CFG1 4 CFG1 5 CFG1 6 PIN EIM_DAO EIM_EB1 EIM_EBO 18 19 20 21 Default 0 0 0 0 0 0 0 SW26 1 2 3 4 5 6 7 Table 5 5A Word1 BOOT _ BOOT __ BOOT_ BOOT _ CFG3 5 CFG3 4 CFG3 3 CFG2 2 PIN EIM_DA6 EIM_DA7 EIM_DA8 EIM_DA9 Default 0 0 1 1 SW28 1 2 3 4 Table 5 5 BOOT_CFG Word2 The four pins that determine where bootable code is stored are BOOT_CFG1 6 3 Depending on which boot source is selected some of these pins may have different meanings Those pins will show up as an X for logic level The specific logic levels and their meanings are as follows BOOT_CFG1 6 3 010 36 Boot Code Source Selection PATA SATA Boot MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor 011 Serial ROM I2C SPI Boot 1 0 SD MMC eSD eMMC Boot For each of the bootable source selections the remaining BOOT_CFG pins have different meanings The pins are meant to choose initialization settings required for each specific boot source The following paragraphs will specify those choices based on bootable source HD PATA SATA BOOT_CFG1 3 HD Type 0 1 5 Serial ROM BOOT CFG1 3 Serial ROM Select 0 12 1 SPI BOOT_CFG2 5 SPI Addressing 0 2 16 b
99. ve debugging information a Null Modem serial cable is required and supplied with the MCIMX53SMD board kit For newer generation computers that do not have a serial port a USB to Serial cable can be used There is no need for any special cabling to support debug information output The debug board contains a standard 20 pin ARM JTAG connector for advanced debugging with a third party emulator The header is configured to be used with 1 8V data signals The developer should exercise caution when selecting the appropriate debugging tools If an emulator set for 3 3V power and data is connected to the MCIMX53SMD board the i MX53 processor will be damaged 24 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor Debug Connector 1127 Figure 4 7 Debug Connector 4 8 SATA Connector J5 A SATA connector J15 is provided on the MCIMX53SMD board and is connected to the SATA module of the i MX53 processor The MCIMX53SMD board is capable of communicating with any standard SATA device SSD SATA in the MCIMX53SMD board kit It is possible to initiate a boot from an attached SATA device See the software reference manuals for instructions on how to configure the MCIMX53SMD board for SATA boot The SSD SATA is plugged into the MCIMX53SMD board at the location shown in Figure 4 8 Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 25 SATA Connector J5 Figure 4 8 SATA
100. voltage If the JTAG tool does not have an automatic logic voltage sense then make sure that the tool is configured for 1 8V logic JTAG tools that have been specifically tested with the MCIMX53SMD board are e CodeWarrior Freescale Commander Macraigor J Link Segger Codesourcery e J Link IAR 3 19 Expansion Header J78 A 120 pin Expansion Port Header is provided on the MCIMX53SMD board which can be used with many optionally expansion boards available from Freescale or with custom designed boards made be the developer The Expansion Port makes the following features of the i MX53 processor available for being used on a custom built expansion card e Two Inter Integrated Circuits 12C 12C1 12C2 e 24 bit data and display control signals e Resistive Touch Screen Interface e Various voltage rails Freescale Semiconductor MCIMX53SMD Board Hardware User s Guide Rev 0 17 3 20 Function Buttons The MCIMX53SMD board provides two user interface buttons which are discussed below 3 20 1 POWER Button In the Power Off state momentarily pressing the POWER button will begin the PMIC power up cycle The PMIC supplied voltage rails will come up in the proper sequence to power the i MX53 processor When the processor is fully powered the boot cycle will be initiated In the Power On state momentarily pressing the POWER button will send a signal to a GPIO port for user defined action but will not initi
101. wer rating are attached through a power amplifier TS49841QT 3 14 15V Power Connector J35 A 2 0 mm x 6 5 mm barrel connector is used which should fit standard DC Plugs with an inner dimension of 2 1 mm and an outer dimension of 5 5 mm If a secondary power supply is used it should not supply more than 15V power at 3A output If the PMIC senses too high voltage at the connector input it will turn off to protect the MCIMX53SMD board If a Wall Power Supply is connected to the MCIMX53SMD board the red 15V power LED indicator will light 3 15 Mini PCle Connector J15 18 Two mini PCle connectors are on the MCIMX53SMD board One for 3G modem the other is for WiFi BT The MCIMX53SMD board provides just a standard mini PCle slot for 3G Modem So the developers can use a 3G Modem of their choice For the WiFI BT module the MCIMX53SMD board uses the module based on the Atheros The module pin map is not compatible with the standard mini PCle Therefore care must be taken to plug the module to the right mini PCle slot 16 MCIMX53SMD Board Hardware User s Guide Rev 0 Freescale Semiconductor 3 16 CMOS Sensor Connector 12 The MCIMX53SMD board supports a 5 Megapixels CMOS Camera The CMOS module is based on the OmniVision chipset OV5642 Auto Focus AF function is not supported on the board The developer can choose another CMOS module on their project if the pin map is compatible The MCIMX53SMD board uses CMOS connector FX12B 40P 0

MCIMX53SMD Board Hardware User`s Guide

Contents

Download Pdf Manuals

Related Search

Related Contents