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conga-BM45 User's Guide

1. congatec does not offer virtual machine monitor VMM software All VMM software support questions and queries should be directed to the VMM software vendor and not congatec technical support 6 5 Thermal Management ACPI is responsible for allowing the operating system to play an important part in the system s thermal management This results in the operating system having the ability to take control of the operating environment by implementing cooling decisions according to the demands put on the CPU by the application The conga BM45 ACPI thermal solution offers three different cooling policies e Passive Cooling When the temperature in the thermal zone must be reduced the operating system can decrease the power consumption of the processor by throttling the processor clock One of the advantages of this cooling policy is that passive cooling devices in this case the processor do not produce any noise Use the passive cooling trip point setup node in the BIOS setup program to determine the temperature threshold that the operating system will use to start or stop the passive cooling procedure Copyright 2008 congatec AG BM45m11 38 103 pY congatec the rhythm of embedded computing Active Cooling During this cooling policy the operating system is turning the fan on off Although active cooling devices consume power and produce noise they also have the ability to cool the thermal zone without having to reduce the overall syst
2. setup program before the installation of the OS and it only functions in ACPI mode You can find more information about APIC in the IA 32 Intel Architecture Software Developer s Manual Volume 3 in chapter 8 o gt Note You must ensure that your operating system supports APIC mode in order to use it 6 2 Intel Matrix Storage Technology The ICH9M E provides support for Intel Matrix Storage Technology providing both AHCI and integrated RAID functionality 6 2 1 AHCI The ICH9M E provides hardware support for Advanced Host Controller Interface AHCI anew programming interface for SATA host controllers Platforms supporting AHCI may take advantage of performance features such as no master slave designation for SATA devices each device is treated as a master and hardware assisted native command queuing AHCI also provides usability enhancements such as Hot Plug Copyright 2008 congatec AG BM45m11 33 103 Ea congatec the rhythm of embedded computing 6 2 2 RAID The industry leading RAID capability provides high performance RAID 0 1 5 and 10 functionality on the 4 SATA ports of ICH9M E Software components include an Option ROM for pre boot configuration and boot functionality a Microsoft Windows compatible driver and a user interface for configuration and management of the RAID capability of ICH9M E For more information about RAID support on the conga BM45 refer to application note AN15_Configure_RAID_System pdf which
3. El Torito Format Specification 9 4 10 Keyboard Mouse Configuration Submenu Feature Options Description Bootup Num Lock Off Specifies the power on state of the Num lock feature on the numeric keypad of the keyboard On Typematic Rate Slow Specifies the rate at which the computer repeats a key that is held down Fast Slow sets a rate of under 8 times per second Fast sets a rate of over 20 times per second PS 2 Mouse Support Disabled Configure PS 2 mouse support Enabled Note PS 2 support for mouse or keyboard is only available if a Winbond W83627 Super I O or a SMSC SCH3114 Super I O has been Auto implemented on the carrier board Copyright 2008 congatec AG BM45m11 93 103 bed congatec the rhythm of embedded computing 9 4 11 Hardware Monitoring Submenu Feature Options Description H W Health Function Disabled Enable hardware health monitoring device and display the readings Enabled Board Temperature no option Current board temperature CPU Temperature no option Current processor die temperature Top DIMM Environment Temperature no option Environment temperature of the top side DIMM Bottom DIMM Environment Temperature no option Environment temperature of the bottom side DIMM CPU Fan Speed no option Current CPU FAN speed VcoreA no option Current Core A reading 3 3VSB no option Current 3 3V standby reading 5VSB no option Current 5V standby reading 12Vin no option Current 12
4. FAN_TACHOIN C77 Fan tachometer input I OD Requires a fan with a two pulse output PP_TPM C83 Physical Presence pin of Trusted Platform Module TPM Active high TPM chip has 3 3V Trusted Platform Module chip is optional an internal pull down This signal is used to indicate Physical Presence to the TPM Copyright 2008 congatec AG BM45m11 63 103 7 4 C D Connector Pinout Table 27 Connector C D Pinout Pin RowC Pin RowD Pin RowC Pin RowD C1 GND FIXED D1 GND FIXED c56 PEG_RX1 D56 PEG_TX1 C2 IDE_D7 D2 IDE_D5 C57 TYPE1 D57 TYPE2 C3 IDE_D6 D3 IDE_D10 C58 PEG RX2 D58 PEG_TX2 C4 IDE_D3 D4 IDE_D11 c59 PEG_RX2 D59 PEG_TX2 C5 IDE_D15 D5 IDE_D12 C60 _ GND FIXED D60 GND FIXED C6 IDE_D8 D6 IDE_D4 C61 PEG _RX3 D61 PEG_TX3 C7 IDE_D9 D7 IDE_DO c62 PEG_RX3 D62 PEG_TX3 C8 IDE_D2 D8 IDE_REQ c63 RSVD D63 DDPC_CTRLCLK c9 IDE_D13 D9 IDE_IOW C64 RSVD D64 DDPC_CTRLDATA C10 IDE_D1 D10 IDE_ACK c65 PEG_RX4 D65 PEG_TX4 C11 GND FIXED D11 GND FIXED c66 PEG_RX4 D66 PEG_TX4 C12 IDE_D14 D12 IDE_IRQ c67 FAN_PWMOUT D67 GND C13 IDE_IORDY D13 IDE_AO C68 PEG_RX5 D68 PEG_TX5 C14 _ IDE_lOR D14 IDE_A1 C69 _ PEG_RX5 D69 PEG_TX5 C15 PCI_PME D15 IDE_A2 C70 GND FIXED D70 GND FIXED C16 PCI_GNT2 D16 IDE_CS1 C71 PEG_RX6 D71 PEG_TX6 C17 PCI_REQ2 D17 IDE_CS3 C72 PEG
5. Watts Efficiency Watts VCC_12V 16 5 12 11 4 12 6 11 4 100 188 85 160 VCC_5V SBY 2 5 4 75 5 25 4 75 50 9 VCC_RTC 0 5 3 2 0 3 3 20 Rise Time The input voltages shall rise from 10 of nominal to 90 of nominal at a minimum rise time of 250V s The smooth turn on requires that during the 10 to 90 portion of the rise time the slope of the turn on waveform must be positive Copyright 2008 congatec AG BM45m11 15 103 Ea congatec the rhythm of embedded computing 1 6 Power Consumption The power consumption values listed in this document were measured under a controlled environment The hardware used includes a conga BM45 module conga CEVAL and conga Cdebug carrier boards CRT monitor SATA drive and USB keyboard When using the conga Cdebug the SATA drive was powered externally by an ATX power supply so that it does not influence the power consumption value that is measured for the module The USB keyboard was detached once the module was configured within the OS The module was first inserted into the conga Cdebug which was powered by a Direct Current DC power supply set to output 12V The current consumption value displayed by the DC power supply s readout is the value that is recorded as the power consumption measurement for Desktop Idle 100 Workload and Standby modes The power consumption of the conga Cdebug without module attached was measured and this value was later subtracted fro
6. 2 Block Diagram GPls GPOs 8x USB 2 0 Ghit Ethernet TPM Intel optional Gigabit Ethernet Phy 82567LM igh Definition Audio HDA I F BIOS Flash MEL eye RTC Processor ICH9M E GMCH CORE CORE 4 Intel Core 2 D Intel 82801IEM Intel GM45 ntel Core uo Celeron JMicron DDR3 SODIMM SATA to IDE Chip Socket top Fan DDR3 SODIMM Control Socket bottom Power Management and Control Signals Board Controller Atmel ATmega168 DMI Interface 1 System Bus 667 or 1066MHz Memory Bus 667 or 1066MHz Hardware Monitoring and Fan Control Circuitry me ve ie a SD ee a ee Ie Copyright 2008 congatec AG BM45m11 21 103 p congatec the rhythm of embedded computing 3 Heatspreader An important factor for each system integration is the thermal design The heatspreader acts as a thermal coupling device to the module It is a 3mm thick aluminum plate The heatspreader is thermally coupled to the CPU via a thermal gap filler and on some modules it may also be thermally coupled to other heat generating components with the use of additional thermal gap fillers Although the heatspreader is the thermal interface where most of the heat generated by the module is dissipated it is not to be considered as a heatsink It has been designed to be used as a thermal interface between the module and the application specific thermal solution The
7. 4 0 of this document pY congatec the rhythm of embedded computing 4 1 5 LPC Bus conga BM45 offers the LPC Low Pin Count bus through the use of the Intel 82801IEM ICH9M E There are many devices available for this Intel defined bus The LPC bus corresponds approximately to a serialized ISA bus yet with a significantly reduced number of signals Due to the software compatibility to the ISA bus I O extensions such as additional serial ports can be easily implemented on an application specific baseboard using this bus See section 8 2 1 for more information about the LPC Bus 4 1 6 I C Bus 400kHz The I C bus is implemented through the use of ATMEL ATmega168 microcontroller It provides a Fast Mode 400kHz max multi master 1 C Bus that has maximum 1 C bandwidth 4 1 7 PCI Express The conga BM45 offers 6x x1 PCI Express links via the Intel 82801IEM ICH9M E which can be configured to support PCI Express edge cards or ExpressCards One of the six x1 PCI Express links is utilized by the onboard Gigabit Ethernet interface therefore there are only 5x x1 PCI Express links available on the A B connector row Additionally these links can be statically configured as 5 x1 or 1 x4 plus 1 x1 AC_SYNC and AC_SDOUT can be used to switch PCI Express channels 0 3 between x1 and x4 mode If both signals are each pulled up using 1KQ resistors to 3 3V at the rising edge of PWROK then x4 mode is enabled for channels 0 3 Channel 4 remain
8. Options Description Plug amp Play O S No Specifies if manual configuration is desired Yes Set to NO for operating systems that do not meet the Plug and Play specification In this case the BIOS configures all devices in the system Select YES to let the operating system configure PnP devices that are not required for booting PCI Latency Timer 32 64 96 248 This option allows you to adjust the latency timer of all devices on the PCI bus Allocate IRQ to PCI VGA Yes Allow or restrict the BIOS from giving the VGA controller an IRQ resource No Allocate IRQ to SMBUS HC Yes Allow or restrict the BIOS from giving the SMBus controller an IRQ resource No gt PCI IRQ Resource Exclusion sub menu Opens PCI IRQ Resource Exclusion sub menu gt PCI Interrupt Routing sub menu Opens PCI Interrupt Routing sub menu PCI IRQ Resource Exclusion Submenu Feature Options Description IRQ xx Available Allow or restrict the BIOS from giving IRQ resource to PCI PNP devices Reserved Note Assigned IRQ resources are shaded and listed as Allocated PCI Interrupt Routing Submenu Feature Options Description PIRQ xx devices Auto Select fixed IRQ for PCI interrupt line or set to AUTO to let the BIOS and operating system route an IRQ 3 4 14 15 Note Only those IRQs that are free are listed ist Exclusive PCI IRQ None IRQs assigned manually above The selected IRQ will only be assigned to the PIRQ line it has been set to manual
9. PCI bus master grant output lines active low 0 3 3V PCI_GNT2 is a boot strap signal see caution statement below PCI_GNT3 D19 PCI bus master grant output lines active low 0 3 3V PCI_GNT3 is a boot strap signal see caution statement below DDPC_CTRLDATA D64 Digital Display port C Control Data line to set up HDMI DisplayPort 0 OD DDPC_CTRLDATA is a boot strap 3 3V signal see caution statement below Caution The signals listed in the table above are used as chipset configuration straps during system reset In this condition during reset they are inputs that are pulled to the correct state by either COM Express internally implemented resistors or chipset internally implemented resistors that are located on the module No external DC loads or external pull up or pull down resistors should change the configuration of the signals listed in the above table with the exception of AC_SYNC AC_SDOUT PEG_LANE_RV SDVO_I2C_DAT and DDPC_CTRLDATA External resistors may override the internal strap states and cause the COM Express module to malfunction and or cause irreparable damage to the module Copyright 2008 congatec AG BM45m11 66 103 les congatec the rhythm of embedded computing AC_SYNC and AC_SDOUT can be used to switch PCI Express channels 0 3 between x1 and x4 mode If both signals are each pulled up using 1KQ resistors to 3 3V at the rising edge of PWROK then x4 mode is enabled for channels 0 3 x1 mode is used by defa
10. PEG_TX11 D89 PEG_TX12 D91 PEG_TX12 D92 PEG_TX13 D94 PEG_TX13 D95 PEG_TX14 D98 PEG_TX14 D99 PEG_TX15 D101 PEG_TX15 D102 PEG_LANE_RV D54 PCI Express Graphics lane reversal input strap Pull low on the carrier board to reverse lane 1 05V PEG_LANE_RV is a boot order Be aware that the SDVO lines that share this interface do not necessarily reverse strap signal see note below order if this strap is low PEG _ENABLE D97 Strap to enable PCI Express x16 external graphics interface Pull low to disable internal 13 3V PU 10k 3 3V graphics and enable the x16 interface It is also possible to optionally use the PEG interface for connecting a x1 x2 x4 or x8 non graphic PCI Express device instead of using the x16 link for a PCI Express graphics device This will increase the available PCI Express links on top of those explained in section 4 1 7 These additional links cannot be linked together with each other or with the other PCI Express links found on the conga BM45 o gt Note Some signals have special functionality during the reset process They may bootstrap some basic important functions of the module For more Copyright 2008 congatec AG BM45m11 58 103 information refer to section 7 5 of this user s guide Table 21 SDVO Signal Descriptions les congatec the rhythm of embedded computing Pin Description PU PD Comment SDVOB_RED D52 Se
11. This setup node is only available if an external SMSC SCH3114 Super I O has been implemented on the carrier board Copyright 2008 congatec AG BM45m11 87 103 ia congatec the rhythm of embedded computing 9 4 6 1 SIO Winbond W83627 Configuration Feature Options Description Serial Port 1 2 Disabled Specifies the I O base address and IRQ of serial port 1 2 Configuration 3F8 IRQ4 2F8 IRQ3 3E8 IRQ4 2E8 IRQ3 Serial Port 2 Mode Normal Specifies the mode for serial port 2 IrDA ASK IR IR Duplex Mode Full Duplex Select IRDA full or half duplex function Half Duplex IR I O Pin Select SINB SOUTB Select receiver and transmit pins for IRDA mode IRRX RTX Parallel Port Address Disabled Specifies the I O base address used by the parallel port 378 278 3BC Parallel Port Mode Normal Specifies the parallel port mode Bi directional ECP EPP ECP amp EPP EPP Version 1 9 Specifies the EPP version 1 7 Parallel Port DMA DMAO Specifies the DMA channel for parallel port in ECP mode DMA1 DMA3 Parallel Port IRQ None Specifies the interrupt for the parallel port IRQS IRQ7 gt Note This setup menu is only available if an external Winbond W83627 Super I O has been implemented on the carrier board Copyright 2008 congatec AG BM45m11 88 103 les congatec the rhythm of embedded computing 9 4 6 2 SIO SMSC SCH3114 Configuration Feature Options Description Serial Port 1 2 3 4 Disabled Specifies the I O base address
12. removed or added to the system The Type Based boot menu is static and can only be changed by the user 1st 2nd 3rd Disabled This view is only available when in the default Type Based mode Boot Device Primary Master Primary Slave When in Device Based mode you will only see the devices that are currently connected to the Up to 12 boot devices can be prioritized if device Secondary Master system The default boot priority is Removables 1st ATAP CDROM 2nd Hard Disk 3rd BEV 4th based priority list control is selected If Type Based Secondary Slave BEV Boot Entry Vector e g Network or SCSI Option ROMs priority list control is enabled only 8 boot devices can Legacy Floppy be prioritized USB Hard disk USB CDROM USB Removable Dev Onboard LAN External LAN PCI Mass Storage PCI SCSI Card Any PCI BEV Device Third Master Third Slave PCI RAID Local BEV ROM Fourth Master Fourth Slave Copyright 2008 congatec AG BM45m11 96 103 les congatec the rhythm of embedded computing 9 5 2 Boot Settings Configuration Feature Options Description Quick Boot Disabled If Enabled some POST tasks will be skipped to speed up the BIOS boot process Enabled Quiet Boot Disabled Disabled displays normal POST diagnostic messages Enabled Enabled displays OEM logo instead of POST messages Note The default OEM logo is a dark screen Boot Display Clear Controls the end of POST boot di
13. 3 will be assigned bus number 4 instead of bus number 5 and Port 4 will be assigned bus number 5 Furthermore the respective PCI Express Root Port is hidden if the corresponding PCI Express Port is disabled Copyright 2008 congatec AG BM45m11 73 103 les congatec the rhythm of embedded computing 8 5 PCI Interrupt Routing Map Table 34 PCI Interrupt Routing Map PIRQ PCI BUS INT Line APIC Mode IRQ VGA HDA UHCIO UHCI1 UHCI2 UHCI3 EHCIO EHCI1 SMBus LAN A 16 x x B 17 C 18 x x x D 19 x E INTD 20 x F INTA 21 G INTB 22 x H INTC 23 x x Table 35 PCI Interrupt Routing Map continued PIRQ SATAO Native SATA1 PCI EX Root PCI EX Root PCI EX Root PCI EX Root PCI EX Root PCI EX Port0 PCI EX Port 1 PCI EX Port 2 PCI EX Port 3 PCI EX Port 4 Port 0 Port 1 Port 2 Port 3 Port 4 A gt Note 1 These interrupts are available for external devices slots via the C D connector rows Interrupt used by single function PCI Express devices INTA 3 Interrupt used by multifunction PCI Express devices INTB 4 Interrupt used by multifunction PCI Express devices INTC 5 Interrupt used by multifunction PCI Express devices INTD Copyright 2008 congatec AG BM45m11 74 103 les congatec the rhythm of embedded computing 8 6 PCI Bus Masters The conga BM45 supports 4 external PCI Bus Masters There are no limitations in c
14. 4 1 of this user s guide Reset Power Button Event 2 Disabled Selects the type of event that will be generated when timeout 2 is reached NMI ACPI Event Reset Power Button Event 3 Disabled Selects the type of event that will be generated when timeout 3 is reached NMI ACPI Event Reset Power Button Timeout 1 0 5sec Selects the timeout value for the first stage watchdog event 1sec 2sec 5sec 10sec 30sec 1min 2min Timeout 2 see above Selects the timeout value for the second stage watchdog event Timeout 3 see above Selects the timeout value for the third stage watchdog event Copyright 2008 congatec AG BM45m11 95 103 les congatec the rhythm of embedded computing 9 5 Boot Setup Select the Boot tab from the setup menu to enter the Boot setup screen In the upper part of the screen the Boot setup allows you to prioritize the available boot devices The lower part of this setup screen shows options related to the BIOS boot 9 5 1 Boot Device Priority Feature Options Description Boot Priority Selection Device Based Select between device and type based boot priority lists The Device Based boot priority list Type Based allows you to select from a list of currently detected devices only The Type Based boot priority list allows you to select device types even if a respective device is not yet present Moreover the Device Based boot priority list might change dynamically in cases when devices are physically
15. AG BM45m11 23 103 congatec the rhythm of embedded computing The conga BM45 is connected to the carrier board via two 220 pin connectors COM Express Type 2 pinout for a total of 440 pins connectivity These connectors are broken down into four rows The primary connector consists of rows A and B while the secondary connector consists of rows C and D top view In this view the connectors are seen through the module Copyright 2008 congatec AG BM45m11 24 103 4 1 4 1 1 4 1 2 Ea congatec the rhythm of embedded computing Primary Connector Rows A and B The following subsystems can be found on the primary connector rows A and B Serial ATA SATA Three Serial ATA connections are provided via the Intel 82801IEM ICH9M E SATA is an enhancement of the parallel ATA therefore offering higher performance As a result of this enhancement the traditional restrictions of parallel ATA are overcome with respect to speed and EMI SATA starts with a transfer rate of 150 Mbytes s and can be expanded up to 600 Mbytes s in order to accommodate future developments SATA is completely protocol and software compatible to parallel ATA If the conga BM45 does not support the PATA interface then four Serial ATA connections are available at connector rows A and B See section 6 2 for more information about the Serial ATA features on the conga BM45 USB 2 0 The conga BM45 offers six UHCI USB host controllers and two EHCI USB host
16. Core 2 Duo and Celeron processors have a thermal monitor feature that helps to control the processor temperature The integrated TCC Thermal Control Circuit activates if the processor silicon reaches its maximum operating temperature The activation temperature that the Intel Thermal Monitor uses to activate the TCC cannot be configured by the user nor is it software visible The Thermal Monitor can control the processor temperature through the use of two different methods defined as TM1 and TM2 TM1 method consists of the modulation starting and stopping of the processor clocks at a 50 duty cycle The TM2 method initiates an Enhanced Intel Speedstep transition to the lowest performance state once the processor silicon reaches the maximum operating temperature o gt Note The maximum operating temperature for Intel Core 2 Duo and Celeron processors is 100 C TM2 mode is used for Intel Core 2 Duo processors it is not supported by Intel Celeron processors Two modes are supported by the Thermal Monitor to activate the TCC They are called Automatic and On Demand No additional hardware software or handling routines are necessary when using Automatic Mode gt Note To ensure that the TCC is active for only short periods of time thus reducing the impact on processor performance to a minimum it is necessary to have a properly designed thermal solution The Intel Core 2 Duo and Celeron processor s respective datasheet c
17. Memory no option Displays the total amount of system memory Product Revision no option Displays the hardware revision of the board Serial Number no option Displays the serial number of the board BC Firmware Rev no option Displays the revision of the congatec board controller MAC Address no option Displays the MAC address of the onboard Ethernet controller Boot Counter no option Displays the number of boot ups max 16777215 Running Time no option Displays the time the board is running in hours max 65535 Copyright 2008 congatec AG BM45m11 77 103 lea congatec the rhythm of embedded computing 9 4 Advanced Setup Select the Advanced tab from the setup menu to enter the Advanced BIOS Setup screen The menu is used for setting advanced features Main Advanced Boot Security Power Exit ACPI Configuration PCI Configuration Graphics Configuration CPU Configuration Chipset Configuration I O Interface Configuration Clock Configuration IDE Configuration USB Configuration Keyboard Mouse Configuration Hardware Health Configuration Watchdog Configuration Copyright 2008 congatec AG BM45m11 78 103 les congatec the rhythm of embedded computing 9 4 1 ACPI Configuration Submenu Feature Options Description ACPI Aware O S No Set this value to allow the system to utilize the Intel ACPI Advanced Configuration and Power Interface Yes Set to NO for n
18. Note Some signals have special functionality during the reset process They may bootstrap some basic important functions of the module For more information refer to section 7 5 of this user s guide Table 8 LPC Signal Descriptions Description PU PD Comment LPC_AD 0 3 B4 B7 LPC multiplexed address command and data bus 1 0 3 3V LPC_FRAME B3 LPC frame indicates the start of an LPC cycle O 3 3V LPC_DRQJ 0 1 B8 B9 LPC serial DMA request 13 3V LPC_SERIRQ A50 LPC serial interrupt 1 0 3 3V PU 10k 3 3V LPC_CLK B10 LPC clock output 33MHz nominal 0 3 3V Copyright 2008 congatec AG BM45m11 47 103 les congatec the rhythm of embedded computing Table 9 USB Signal Descriptions Description Comment USBO A46 USB Port 0 data or D ie USB 2 0 compliant Backwards compatible to USB 1 1 USBO A45 USB Port 0 data or D VO USB 2 0 compliant Backwards compatible to USB 1 1 USB1 B46 USB Port 1 data or D VO USB 2 0 compliant Backwards compatible to USB 1 1 USB1 B45 USB Port 1 data or D I O USB 2 0 compliant Backwards compatible to USB 1 1 USB2 A43 USB Port 2 data or D I O USB 2 0 compliant Backwards compatible to USB 1 1 USB2 A42 USB Port 2 data or D VO USB 2 0 compliant Backwards compatible to USB 1 1 USB3 B43 USB Port 3 data or D I O USB 2 0 compliant Backwards compatible to USB 1 1 USB3 B42 USB Port 3 data or D I
19. O5V Output 5V signal level OD Open drain output P Power Input Output DDC Display Data Channel PCIE In compliance with PCI Express Base Specification Revision 1 0a SATA In compliance with Serial ATA specification Revision 1 0a REF Reference voltage output May be sourced from a module power plane PDS Pull down strap A module output pin that is either tied to GND or is not connected Used to signal module capabilities pinout type to the Carrier Board Copyright 2008 congatec AG BM45m11 43 103 pY congatec the rhythm of embedded computing 7 1 A B Connector Signal Descriptions Table 3 Intel High Definition Audio Link Signals Descriptions Description te Comment AC_RST A30___ Intel High Definition Audio Reset This signal is the master hardware reset to O 3 3V AC 97 codecs are not supported external codec s AC_SYNC A29 Intel High Definition Audio Sync This signal is a 48 kHz fixed rate sample O 3 3V AC 97 codecs are not supported sync to the codec s It is also used to encode the stream number AC_SYNC is a boot strap signal see note below AC_BITCLK A32 Intel High Definition Audio Bit Clock Output This signal is a 24 000MHz 13 3V AC 97 codecs are not supported serial data clock generated by the Intel High Definition Audio controller the O 3 3V Intel ICH9M E This signal has an Intel integrated pull down resistor so that AC_BIT_CLK doesn t float when an Intel High Definition A
20. Signals Descriptions 44 Table 4 Gigabit Ethernet Signal Descriptions ccccececeeeeeeeeeees 45 Table 5 Serial ATA Signal Descriptions ecceeeeeeeeeeeeeeeenttteeeeeeeeeeees 45 Table 6 PCI Express Signal Descriptions general purpose 46 Table 7 ExpressCard Support Pins Descriptions 0 0eeeee 47 Table 8 LPC Signal Descriptions ccccecccccecececeeeceeeeeeeeeeeeeeeeeeeeees 47 Table 9 USB Signal DeSCriptions 0 eeeeee esses eeeeeeeeteeeeeeeeeeeeeees 48 Table 10 CRT Signal Descriptions cccccccccccecceeeeeeeeeeeeeeeteeeeeeeeeees 49 Table 11 LVDS Signal Descriptions scicccccicicsssicdccencdinsdirssiereivnenneatbbaaicins 49 Table 12 TV Out Signal DeSCriptionS ccccccccccccceceeeeeeeeeeeeeeeeeeeteees 50 Table 143 Miscellaneous Signal Descriptions eeeeeeeeeeeeeeeeeeeeeee 50 Table 14 General Purpose I O Signal Descriptions cee 51 Table 15 Power and System Management Signal Descriptions 51 Table 16 Power and GND Signal Descriptions ccceeeeeeeeeeeeeeeeee 52 Table 17 Connector A B Pinout ccccccecccceeceeecceeeeeeeeeeeeeeeteeeeeeeeeees 52 Table 18 PCI Signal Descriptions ccccccccccccecceecceeeceeeeeeeeeeeteeeeeees 54 Table 19 IDE Signal Descriptions ccccccccceceecceeeeeeeceeeeeeeeeeeeeeeeeees 56 Table 20 PCI Express Signal Descriptions
21. VGA 640x480 XGA 1x24 008h SVGA 800x600 XGA 2x24 012h XGA 1024x768 SXGA 2x24 O0Ah SXGA 1280x1024 SXGA 2x24 018h UXGA 1600x1200 UXGA 2x24 00Ch Customized EDID 1 Customized EDID 2 Customized EDID 3 SDVO Local Flat Panel Disabled An SDVO local flat panel is a LVDS panel connected to an SDVO LVDS transmitter on one of the SDVO Type Auto ports VGA 1x18 002h VGA 1x18 013h SVGA 1x18 01Ah XGA 1x18 006h XGA 2x18 007h XGA 1x24 008h XGA 2x24 012h SXGA 2x24 O0Ah SXGA 2x24 018h UXGA 2x24 00Ch Customized EDID 1 Customized EDID 2 Customized EDID 3 Local Flat Panel Scaling Centering Select whether and how to scale the actual video mode resolution to the local flat panel resolution Expand Text Expand Graphics Expand Text amp Graphics Backlight Control Auto 0 25 50 75 100 Select local flat panel backlight control value If set to Auto the BIOS tries to read the backlight brightness value from the EPI data set Inhibit Backlight No Decide whether the backlight on signal should be activated when the panel is activated or whether it Permanent should remain inhibited permanently or until the end of BIOS POST Until End of POST Invert Backlight Control No Allow backlight control value inversion if required for the actual backlight hardware controller Yes PWM Backlight Control Disabled Enable Disable backlight PWM output of COM Express Enabled Copyright 200
22. a device that uses removable media such as the LS120 MO Magneto optical or lomega Zip drives If you want Floppy to boot from media on ARMD it is required that you emulate boot up from a floppy or hard disk drive This is essentially Hard disk drive necessary when trying to boot to DOS You can select the type of emulation used if you are booting such a device Copyright 2008 congatec AG BM45m11 91 103 9 4 9 ia congatec the rhythm of embedded computing USB Configuration Submenu Feature Options Description USB Functions Disabled Disable ICH9M E USB host controllers 2 USB Ports Enable UHCI host controller 0 4 USB Ports Enable UHCI host controller O 1 6 USB Ports Enable UHCI host controller O 1 2 8 USB Ports Enable UHCI host controller O 1 2 3 USB 2 0 Controller Enabled Enable the ICH9M E USB 2 0 EHCI host controller Disabled Legacy USB Support Disabled Legacy USB Support refers to the USB keyboard USB mouse and USB mass storage device support Enabled If this option is Disabled any attached USB device will not become available until a USB compatible operating system is booted Auto However legacy support for USB keyboard will be present during POST USB Legacy POST Always Enabled When this option is Enabled those USB devices can control the system even when there is no USB driver loaded AUTO disables legacy support if no USB devices are connected If set to Enabled USB legacy support is always availa
23. and high battery voltage The self discharge of the battery must also be considered when determining CMOS battery lifetime For more information about calculating CMOS battery lifetime refer to application note AN9_RTC_Battery_Lifetime pdf which can be found on the congatec AG website at www congatec com Copyright 2008 congatec AG BM45m11 19 103 Ea congatec the rhythm of embedded computing 1 8 Environmental Specifications Temperature Operation 0 to 60 C Storage 20 to 80 C Humidity Operation 10 to 90 Storage 5 to 95 Mono The above operating temperatures must be strictly adhered to at all times When using a heatspreader the maximum operating temperature refers to any measurable spot on the heatspreader s surface congatec AG strongly recommends that you use the appropriate congatec module heatspreader as a thermal interface between the module and your application specific cooling solution If for some reason it is not possible to use the appropriate congatec module heatspreader then it is the responsibility of the operator to ensure that all components found on the module operate within the component manufacturer s specified temperature range For more information about operating a congatec module without heatspreader contact congatec technical support Humidity specifications are for non condensing conditions Copyright 2008 congatec AG BM45m11 20 103 ia congatec the rhythm of embedded computing
24. can be found on the congatec AG website at www congatec com 6 3 Native vs Compatible IDE mode 6 3 1 Compatible Mode When operating in compatible mode SATA controller 1 needs two legacy IRQs 14 and 15 and is unable to share these IRQs with other devices This is a result of the fact that SATA controller 1 emulates the primary and secondary legacy IDE controllers SATA controller 2 does not support compatible mode 6 3 2 Native Mode Native mode allows the SATA controllers to operate as true PCI devices and therefore do not need dedicated legacy resources which means they can be configured anywhere within the system When either SATA controller 1 or 2 runs in native mode it only requires one PCI interrupt for both channels and also has the ability to share this interrupt with other devices in the system Setting Enhanced mode in the BIOS setup program will automatically enable Native mode as Native mode is a subset of Enhanced mode See section 9 4 8 for more information about this Running in native mode frees up interrupt resources IRQs 14 and 15 and decreases the chance that there may be a shortage of interrupts when installing devices gt Note If your operating system supports native mode then congatec AG recommends you enable it Copyright 2008 congatec AG BM45m11 34 103 Ea congatec the rhythm of embedded computing 6 4 Intel Processor Features 6 4 1 Thermal Monitor and Catastrophic Thermal Protection Intel
25. connector rows C and D 4 2 1 PCI Express Graphics PEG The conga BM45 supports the implementation of a x16 link for an external high performance PCI Express Graphics card It supports a theoretical bandwidth of up to 4GB s unidirectional Each lane of the PEG Port consists of a receive and transmit differential signal pair designated from PEG_RX0 to PEG_RX15 and correspondingly from PEG_TX0 to PEG_RX15 It s also possible to utilize a standardized Advanced Digital Display Card 2nd Generation ADD2 based on SDVO via the x16 PEG Port connector which can support a wide variety of display options like DVI LVDS TV Out and HDMI It is also possible to optionally use the PEG interface for connecting a x1 x2 x4 or x8 non graphic PCI Express device instead of using the x16 link for a PCI Express graphics device This will increase the available PCI Express links on top of those explained in section 4 1 7 These additional links cannot be linked together with each other or with the other PCI Express links found on the conga BM45 4 2 2 SDVO The pins of PEG Port are shared with the Serial Digital Video Ouput SDVO functionality and may be alternatively used for two third party SDVO compliant devices connected to channels B and C See section 7 5 of this document for more information about enabling SDVO peripherals Copyright 2008 congatec AG BM45m11 28 103 pY congatec the rhythm of embedded computing 4 2 3 HDMI The Intel GM45
26. controller provided by the Intel 82801IEM ICH9M E I O controller hub These controllers comply with USB standard 1 1 and 2 0 and offer a total of 8 USB ports via connector rows A and B Each port is capable of supporting USB 1 1 and 2 0 compliant devices For more information about how the USB host controllers are routed see section 6 7 o gt Note 4 1 3 4 1 4 Copyright 2008 congatec AG BM45m11 25 103 The USB controller is a PCI bus device The BIOS allocates the necessary system resources when configuring the PCI devices High Definition Audio HDA Interface The conga BM45 provides an interface that supports the connection of HDA audio codecs Gigabit Ethernet The conga BM45 is equipped with a Gigabit Ethernet Controller that is integrated within the Intel 82801IEM ICH9M E I O controller hub This controller is combined with an Intel 82567 Phy that is implemented through the use of the sixth x1 PCI Express link The Ethernet interface consists of 4 pairs of low voltage differential pair signals designated from GBEO_MD0 to GBEO_MD3 plus control signals for link activity indicators These signals can be used to connect to a 10 100 1000 BaseT RJ45 connector with integrated or external isolation magnetics on the carrier board The Gigabit Ethernet interface supports Intel Active Management Technology 4 0 Intel AMT For more information about Intel AMT see section 6 8 Intel Active Management Technology Intel AMT
27. detect PCIE Multiplexed with PEG_RX 3 DDPB_CTRLCLK D73 HDMI port B Control Clock 1 0 OD 3 3V This signal is multiplexed with SDVO_I2C_CK SDVO_CLK DDPB_CTRLDATA C73 HDMI port B Control Data 1 0 OD 3 3V This signal is multiplexed with SDVO_I2C_DAT SDVO_DATA DDPB_CTRLDATA is a boot strap signal see note below TMDS_C_CLK D74 HDMI Port C Clock output differential pair O PCIE TMDS_C_CLK D75 Multiplexed with PEG_TX 7 and PEG_TX 7 pair TMDS_C_DATAO D71 HDMI Port C Data0 output differential pair O PCIE TMDS_C_DATAO D72 Multiplexed with PEG_TX 6 and PEG_TX 6 TMDS_C_DATA1 D68 HDMI Port C Data1 output differential pair O PCIE TMDS_C_DATA1 D69 Multiplexed with PEG_TX 5 and PEG_TX 5 TMDS_C_DATA2 D65 HDMI Port C Data2 output differential pair O PCIE TMDS_C_DATA2 D66 Multiplexed with PEG_TX 4 and PEG_TX 4 TMDS_C_HPD C74 HDMI Port C Hot plug detect PCIE Multiplexed with PEG_RX 7 DDPC_CTRLCLK D63 HDMI port C Control Clock 1 0 OD 3 3V This signal is not supported by COM Express standard but is mandatory to support the HDMI interface on conga BM45 Therefore congatec has used the reserved RSVD pin D63 for this signal DDPC_CTRLDATA D64 HDMI port C Control Data 1 0 OD 3 3V This signal is not supported by COM Express standard but is mandatory to support the HDMI interface on conga BM45 Therefore congatec has used the reserved RSVD pin D64 for this signal DDPC_CTRLDATA is a boot
28. event Enabled If enabled wake is possible from all power down states including S5 Soft Off Resume On RTC Alarm Disabled Disable enable RTC to generate a wake event Enabled If enabled wake is possible from all power down states including S5 Soft Off RTC Alarm Date Days Everyday 01 31 Select the day of the month when the event should be generated System Time Hour Minute Second Select the system time when the event should be generated Power Button Mode On Off Specifies if the system enters suspend or soft off mode when the power button is pressed Suspend Exit Menu Select the Exit tab from the setup menu to enter the Exit setup screen You can display an Exit screen option by highlighting it using the lt Arrow gt keys Feature Description Save Changes and Exit Exit setup and reboot so the new system configuration parameters can take effect Discard Changes and Exit Exit setup without saving any changes made in the BIOS setup program Discard Changes Discard changes without exiting setup The option values presented when the computer was turned on are used Load CMOS Defaults Load the CMOS defaults of all the setup options Copyright 2008 congatec AG BM45m11 100 103 RY congatec 10 Additional BIOS Features The conga BM45 uses a congatec AMIBIOS that is stored in an onboard Flash Rom chip and can be updated using the congatec System Utility which is available in a DOS based command line Win32 command line Win32
29. modules e 100 CPU workload see note below e Windows XP Professional Standby Mode requires setup node Suspend Mode in the BIOS to be configured to S1 POS Power On Suspend e Suspend to RAM requires setup node Suspend Mode in BIOS to be configured to S3 STR suspend to RAM Supply power for S3 mode is 5V gt Note A software tool was used to stress the CPU to 100 workload Processor Information In the following power tables there is some additional information about the processors Intel offers processors that are considered to be low power consuming These processors can be identified by their voltage status Intel uses the following terms to describe these processors If none of these terms are used then the processor is not considered to be low power consuming LV Low voltage ULV Ultra low voltage When applicable the above mentioned terms will be added to the power tables to describe the processor For example Intel Core 2 Duo T9400 2 53GHz 6MB L2 cache LV 45nm Intel also describes the type of manufacturing process used for each processor The following term is used nm nanometer The manufacturing process description is included in the power tables as well See example below For information about the manufacturing process visit Intel s website Intel Core 2 Duo T9400 2 53GHz 6MB L2 cache LV 45nm Copyright 2008 congatec AG BM45m11 17 103 amp j congatec the rhythm of embedded
30. of serial port 1 2 3 4 Address 3F8 2F8 3E8 2E8 Serial Port 1 2 3 4 IRQ 3 Specifies the interrupt of serial port 1 2 3 4 4 10 11 Serial Port 2 Mode Normal Select serial port 2 mode IrDA ASK IR IR Duplex Mode Full Duplex Serial port 2 infrared duplex mode Half Duplex Receiver Polarity High Serial port 2 infrared receiver polarity Low Xmitter Polarity High Serial port 2 infrared transmitter polarity Low gt Note This setup menu is only available if an external SMSC SCH3114 Super I O has been implemented on the carrier board 9 4 7 Clock Configuration Feature Options Description Spread Spectrum Disabled Enable spread spectrum clock modulation to reduce EMI Enabled Copyright 2008 congatec AG BM45m11 89 103 9 4 8 IDE Configuration Submenu ia congatec the rhythm of embedded computing Options SATA Port 0 1 Disabled Compatible Enhanced Description Configure the IDE controller handling SATA ports 0 and 1 Disabled The controller and both ports are disabled Compatible The controller operates in legacy or compatible mode Enhanced The controller operates in enhanced or native mode Configure SATA Port 0 1 as IDE Further configure the IDE controller handling SATA ports 0 and 1 RAID Note This node only becomes available if SATA Port 0 1 is set to Enhanced AHCI SATA Port 0 1 Hotplug Disabled Enable or disable SATA device hotplug support This node and the hotplug feature only b
31. software PWR_OK B24 Power OK from main power supply A high value indicates that the power is good 13 3V Set by resistor divider to accept 3 3V SUS_STAT B18 Indicates imminent suspend operation used to notify LPC devices O 3 3VSB_ PU 10k 3 3VSB SUS_S3 A15 Indicates system is in Suspend to RAM state Active low output An inverted copy of SUS_S3 O 3 3VSB PU 10k 3 3VSB on the carrier board also known as PS_ON may be used to enable the non standby power on a typical ATX power supply SUS_S4 A18 __ Indicates system is in Suspend to Disk state Active low output O 3 3VSB PU 10k 3 3VSB_ Not supported SUS_S5 A24 Indicates system is in Soft Off state O 3 3VSB_ PU 10k 3 3VSB WAKEO B66 PCI Express wake up signal 13 3VSB PU 10k 3 3VSB WAKE 1 B67 General purpose wake up signal May be used to implement wake up on PS 2 keyboard or 13 3VSB PU 10k 3 3VSB mouse activity BATLOW A27 Battery low input This signal may be driven low by external circuitry to signal that the system 13 3VSB PU 8k2 3 3VSB battery is low or may be used to signal some other external power management event THRM B35 ___ Input from off module temp sensor indicating an over temp situation 13 3V PU 8k2 3 3V THERMTRIP A35 Active low output indicating that the CPU has entered thermal shutdown O 3 3V PU 10k 3 3V SMB_CK B13 System Management Bus bidirectional clock line Power sourced through 5V standby rail and I O 3 3VSB PU 2k2
32. strap signal see note below o gt Note Some signals have special functionality during the reset process They may bootstrap some basic important functions of the module For more information refer to section 7 5 of this user s guide Copyright 2008 congatec AG BM45m11 60 103 Table 23 DisplayPort DP Signal Descriptions congatec the rhythm of embedded computing B Signal Pin Description ke Comment DPB_LANE3 D61 DisplayPort B Lane3 output differential pair O PCIE DPB_LANE3 D62 Multiplexed with PEG_TX 3 and PEG_TX 3 pair DPB_LANE2 D58 DisplayPort B Lane2 output differential pair O PCIE DPB_LANE2 D59 Multiplexed with PEG_TX 2 and PEG_TX 2 pair DPB_LANE1 D55 DisplayPort B Lane output differential pair O PCIE DPB_LANE1 D56 Multiplexed with PEG_TX 1 and PEG_TX 1 pair DPB_LANEO D52 DisplayPort B LaneO output differential pair O PCIE DPB_LANEO D53 Multiplexed with PEG_TX 0 and PEG_TX 0 pair DPB_HPD C61 DisplayPort B Hot plug detect PCIE Multiplexed with PEG_RX 3 DPB_AUX C58 DisplayPort B Aux input differential pair PCIE DPB_AUX C59_ Multiplexed with PEG_RX 2 and PEG_RX 2 pair DDPB_CTRLDATA C73 Digital Display port B Control Data I O OD 3 3V This signal is multiplexed with SDVO_I2C_DAT SDVO_DATA This signal is not used on the DisplayPort interface but it must be used to enable
33. that should be used include the following COM Express Design Guide COM Express Specification The links to these documents can be found on the congatec AG website at www congatec com Disclaimer The information contained within this user s guide including but not limited to any product specification is subject to change without notice congatec AG provides no warranty with regard to this user s guide or any other information contained herein and hereby expressly disclaims any implied warranties of merchantability or fitness for any particular purpose with regard to any of the foregoing congatec AG assumes no liability for any damages incurred directly or indirectly from any technical or typographical errors or omissions contained herein or for discrepancies between the product and the user s guide In no event shall congatec AG be liable for any incidental consequential special or exemplary damages whether based on tort contract or otherwise arising out of or in connection with this user s guide or any other information contained herein or the use thereof Intended Audience This user s guide is intended for technically qualified personnel It is not intended for general audiences Copyright 2008 congatec AG BM45m11 3 103 p congatec the rhythm of embedded computing Symbols The following symbols are used in this user s guide Warning Warnings indicate conditions that if not observed can cause pers
34. the DisplayPort interface DDPB_CTRLDATA is a boot strap signal see note below DPC_LANE3 D74 DisplayPort C Lane3 output differential pair O PCIE DPC_LANE3 D75 Multiplexed with PEG_TX 7 and PEG_TX 7 pair DPC_LANE2 D71 DisplayPort C Lane2 output differential pair O PCIE DPC_LANE2 D72 Multiplexed with PEG_TX 6 and PEG_TX 6 pair DPC_LANE1 D68 DisplayPort C Lane output differential pair O PCIE DPC_LANE1 D69 Multiplexed with PEG_TX 5 and PEG_TX 5 pair DPC_LANE0O D65 DisplayPort C LaneO output differential pair O PCIE DPC_LANEO D66 Multiplexed with PEG_TX 4 and PEG_TX 4 pair DPC_HPD C74 _ DisplayPort C Hot plug detect PCIE Multiplexed with PEG_RX 7 DPC_AUX C71 DisplayPort C Aux input differential pair PCIE DPC_AUX C72 _ Multiplexed with PEG_RX 6 and PEG_RX 6 pair DDPC_CTRLDATA D64 Digital Display port C Control Data I O OD 3 3V This signal is not supported by COM Express standard but mandatory to support the DisplayPort interface on conga BM45 Therefore congatec has used the reserved RSVD pin D64 for this signal This signal is not used on the DisplayPort interface but it must be used to enable the DisplayPort interface DDPC_ CTRLDATA is a boot strap signal see note below DPD_LANE3 D88 DisplayPort D Lane3 output differential pair O PCIE Not supported DPD_LANE3 D89 Multiplexed with PEG_TX 11 and PEG_TX 11 pair DPD_LANE2 D85 DisplayPort D Lane2 output diff
35. written permission from American Megatrends Inc congatec AG has made every attempt to ensure that the information in this document is accurate yet the information contained within is supplied as is Trademarks Intel and Pentium are registered trademarks of Intel Corporation Expresscard is a registered trademark of Personal Computer Memory Card International Association PCMCIA COM Express is a registered trademark of PCI Industrial Computer Manufacturers Group PCI Express is a registered trademark of Peripheral Component Interconnect Special Interest Group PCI SIG I C is a registered trademark of Philips Corporation CompactFlash is a registered trademark of CompactFlash Association Winbond is a registered trademark of Winbond Electronics Corp AVR is a registered trademark of Atmel Corporation ETX is a registered trademark of Kontron AG AMICORES is a registered trademark of American Megatrends Inc Microsoft Windows Windows CE Windows XP and Windows Vista are registered trademarks of Microsoft Corporation VxWorks is a registered trademark of WindRiver conga congatec and XTX are registered trademark of congatec AG All product names and logos are property of their owners Copyright 2008 congatec AG BM45m11 5 103 Ea congatec the rhythm of embedded computing Warranty congatec AG makes no representation warranty or guaranty express or implied regarding the products except its standard form of limited war
36. x16 Graphics 57 Table 21 SDVO Signal Descriptions 2 ccccccccecccceceeeeceeeeeeeeeeeeeeeeeees 59 Table 22 HDMI Signal Descriptions i cccccccscscccccccccrsestcssceccneseerseeensessreens 60 Table 23 DisplayPort DP Signal Descriptions ccccecceeceeeeteees 61 Table 24 Module Type Definition Signal Description eee 63 Table 25 Power and GND Signal Descriptions ccceeeeeeeeeeeeeeeteee 63 Table 26 Miscellaneous Signal Descriptions eeeeeeeeeeeeeeeeeeeeneee 63 Table 27 Connector C D PimOut 2 cccccccccccceecceeceeeeeeeeeeeeeeeeeeeeeeetteees 64 Table 28 Boot Strap Signal Descriptions ee eeeeeeeeeeeeeeeeeeeneee 66 Table 29 Memory MAD sicsctetccsivciasttcoctestaveeinisccontanierrelawshonriectstesuveetiaies 68 Table 30 I O Address ASSIQNMONM cc cccc cccccceeceesessseecensseeeseessessenceee 69 Table 31 IRQ Lines in PIC mode ccccccccccccceeececeeeeeeeeeeeeeeeeeeeeeeetetes 71 Table 32 IRQ Lines in APIC MOdGC ecccceeeeseceeeeeeeeeeeeeeeeeeeeteeeeneeeee 72 Table 33 PCI Configuration Space Map cccccccceceeeeceeeeeeeeeeeeeeeeeees 73 Table 34 PCI Interrupt Routing Map ccccccccccccececeeeceeeceeeeeeeeeeeeeees 74 Table 35 PCI Interrupt Routing Map continued sesssseeseeeesserene eene 74 Copyright 2008 congatec AG BM45m11 11 103 congatec the rhythm of embedded computing ll 1 Spec
37. 103 les congatec the rhythm of embedded computing 8 2 1 LPC Bus On the conga BM45 the PCI Bus acts as the subtractive decoding agent All I O cycles that are not positively decoded are forwarded to the PCI Bus not the LPC Bus Only specified I O ranges are forwarded to the LPC Bus In the congatec Embedded BIOS the following I O address ranges are sent to the LPC Bus 280 2FF 3F8 3FF 3E8 3EF A00 AOF Parts of these ranges are not available if a Super I O is used on the carrier board If a Super I O is not implemented on the carrier board then these ranges are available for customer use If you require additional LPC Bus resources other than those mentioned above or more information about this subject contact congatec technical support for assistance Copyright 2008 congatec AG BM45m11 70 103 pY congatec the rhythm of embedded computing 8 3 Interrupt Request IRQ Lines Table 31 IRQ Lines in PIC mode PN EUET o Typical Interrupt Source Connected to Pin 0 No Counter 0 Not applicable 1 Keyboard Not applicable 2 Cascade Interrupt from Slave PIC Not applicable 3 Yes IRQ3 via SERIRQ or PCI BUS INTx 4 Yes IRQ4 via SERIRQ or PCI BUS INTx 5 Yes IRQ5 via SERIRQ or PCI BUS INTx 6 Yes IRQ6 via SERIRQ or PCI BUS INTx 7 Yes IRQ7 via SERIRQ or PCI BUS INTx 8 No Real time Clock Not applicable 9 Note 2 SCI Generic IRQ9 via SERIRQ or PCI BUS INTx 10 Yes IRQ10 vi
38. 3 3VSB main power rails SMB_DAT B14 System Management Bus bidirectional data line Power sourced through 5V standby rail and I O 3 3VSB PU 2k2 3 3VSB main power rails SMB_ALERT B15 System Management Bus Alert active low input can be used to generate an SMI System 13 3VSB PU 10k 3 3VSB Management Interrupt or to wake the system Power sourced through 5V standby rail and main power rails Copyright 2008 congatec AG BM45m11 51 103 les congatec the rhythm of embedded computing Table 16 Power and GND Signal Descriptions Description PU PD Comment VCC_12V A97 A99 Primary power input 12V nominal All available VCC_12V pins on the connector s P A101 A109 shall be used B101 B109 VCC_5V_SBY B84 B87 Standby power input 5 0V nominal If VCC5_SBY is used all available VCC_5V_SBY P pins on the connector s shall be used Only used for standby and suspend functions May be left unconnected if these functions are not used in the system design VCC_RTC A47 Real time clock circuit power input Nominally 3 0V P GND A1 A11 A21 A31 A41 Ground DC power and signal and AC signal return path P A51 A57 A66 A80 All available GND connector pins shall be used and tied to Carrier Board GND plane A90 A96 A100 A110 B1 B11 B21 B31 B41 B51 B60 B70 B80 B90 B100 B110 7 2 A B Connector Pinout Table 17 Connector A B Pinout GND FIXED GND FI
39. 5 Supply Voltage Standard POWeP sccscccccccssssscsesssssssssssseesesseeee 15 2 isplayPort DP lt caidoecent sectasnsintecendendnececsmuaseainatiinelcen alueunsadsues Socks 4 2 5 PG US set eent E a 29 1 5 1 Electrical CharacteristiCs eeeeeeseeeeeeeeeeeeeneeeeeeeeeeees 15 1 5 2 Rise TIME cene ie ie a a ig tae DE PATA riesenie eee ee 1 6 Power Consumption ccccccccceccececeeeceeeeeeeeeeeeeeeeeeeeeeeeeeeeeess 16 5 Additional Features cccceceeeeeeeeeeeeeeeeeeeeeeeeeeeeeeseeeeeeeeeees 30 1 6 1 Intel Core 2 Duo T9400 2 53GHz 6MB L2 cache 18 1 Watchdog csitarssadetvasuopadiadituauilonetiecetesatansstencetasinietannianctearsiettads 30 1 6 2 Intel Core 2 Duo P8400 2 26GHz 3MB L2 cache 18 gt panei ae ee 1 6 3 Intel Celeron Dual Core T3100 1 9GHz 1MB L2 cache 18 53 Embedded BIOS a0 1 6 4 Intel Celeron 575 2 0GHz 1MB L2 cache ccceeeesseeeees 19 531 Simplified Overview of BIOS Setup Data Backup 1 31 1 7 Supply Voltage Battery Power ccseeeessseeeeeeeeen ee eeeees 19 5 4 Securty Feat reS siiicar aiiai daaa indiani 32 i GOs Bakery POWET CGNs Ulm UO sessist aiiin 13 5 5 Suspend to RAM ssssssssesssesseeeseersrrrrrrrtrrrrrrrtrrrrrrrrrrrrrrrrrrrrrrrrennt 32 1 8 Environmental Specifications ccc eeeseeeeeeeeeeeeeeeeeeeeeeeees 20 56 congatec Battery Management Interface cccssssscsssssesesse
40. 7 4 1 7 aeS Oe aca A Seba tldan 26 6 44 Intel Virtualization Technology sssssrsrsrisrtssessessesserssee 38 4 1 8 Expr ssCatd M enire a S 26 65 Thermal Management ssssessserrirririrtsrsssssererenrentnnnnrnreesnsent 38 4 1 9 Graphics Output VGA CRT scsssssssssscssssseseceessenetsecesnneneeeeee 26 6 6 ACPI Suspend Modes and Resume Events ssssseeen 40 JAIO 0 evn eae pes ent rr ergi esos Wem NONE nT 27 67 USB 2 0 EHCI Host Controller Support sss sees reeeeessseen 41 4 1 11 TV OUN e E a 27 6 8 Intel Active Management Technology Intel AMT 4 0 42 4 1 12 Power Controls a E E RS 27 7 Signal Descriptions and Pinout Tables ccccccccceseceeeeees 43 Copyright 2008 congatec AG BM45m11 9 103 7 1 7 2 7 3 7 4 7 5 8 8 1 8 2 8 2 1 8 3 8 4 8 5 8 6 8 7 8 8 9 9 1 9 1 1 9 1 2 9 2 9 3 9 4 9 4 1 9 4 2 9 4 2 1 9 4 2 2 9 4 3 9 4 4 9 4 5 9 4 6 9 4 6 1 9 4 6 2 9 4 7 9 4 8 9 4 8 1 9 4 9 9 4 9 1 A B Connector Signal DescriptionS eeeeeeeeeeeeeeeeeeeeeeeeeeeea 44 A B Connector Pinout soscccctsivcares cactitverticartgasiestedenrairencettandaces 52 C D Connector Signal Descriptions seeeesseeeeeeeeeeeeeeeneeeee 54 C D Connector PINON ceciscuinistaccmuidniaitencclatiendsicacteadleulekcaeneice 64 Boot Strap Signals cic cceon dasctcnteteraaneadececeesateainisteastienectead neem cde 66 System RESOUNCES ici ccccsteicatnicentecatannsaisezourcdonnateen
41. 8 congatec AG BM45m11 42 103 E congatec the rhythm of embedded computing 7 Signal Descriptions and Pinout Tables The following section describes the signals found on COM Express Type II connectors used for congatec AG modules Table 2 describes the terminology used in this section for the Signal Description tables The PU PD column indicates if a COM Express module pull up or pull down resistor has been used if the field entry area in this column for the signal is empty then no pull up or pull down resistor has been implemented by congatec The symbol at the end of the signal name indicates that the active or asserted state occurs when the signal is at a low voltage level When is not present the signal is asserted when at a high voltage level o gt Note The Signal Description tables do not list internal pull ups or pull downs implemented by the chip vendors only pull ups or pull downs implemented by congatec are listed For information about the internal pull ups or pull downs implemented by the chip vendors refer to the respective chip s datasheet Table 2 Signal Tables Terminology Descriptions PU congatec implemented pull up resistor PD congatec implemented pull down resistor 1 0 3 3V Bi directional signal 3 3V tolerant 1 0 5V Bi directional signal 5V tolerant 13 3V Input 3 3V tolerant 15V Input 5V tolerant 1 0 3 3VSB Input 3 3V tolerant active in standby state 0 3 3V Output 3 3V signal level
42. 8 congatec AG BM45m11 83 103 RY congatec the rhythm of embedded computing Feature Options Description SDVO Port B Disabled Select the SDVO device connected to this SDVO port or configure the port as HDMI or Display Port Configuration HDMI Port DisplayPort SDVO DVI SDVO TV SDVO CRT SDVO LVDS SDVO DVI Analog SDVO Port C Disabled Select the SDVO device connected to this SDVO port or configure the port as HDMI or Display Port Configuration HDMI Port DisplayPort SDVO DVI SDVO TV SDVO CRT SDVO LVDS SDVO DVI Analog SDVO DVI Hotplug Disabled If set to Enabled the Windows XP 2000 graphics drivers will support hotplug and configuration mode Support Enabled persistence for DVI monitors connected to a DVI SDVO transmitter Hotplug support means that a DVI monitor connected while the Windows XP 2000 system is already running will automatically be detected and activated Configuration mode persistence means that e g a dual view DVI configuration will automatically be restored if both DVI monitors are connected again even if during an earlier boot only one DVI monitor had been connected and was active Display Mode Persistence Disabled Display mode persistence means that previous display device configurations can be remembered and Enabled restored by the system E g a dual view DVI configuration will automatically be restored if both DVI monitors are connected again even if during an earlier boot only one DVI monitor
43. 9 31 C48 PCI_C BEO D26 PCI bus byte enable lines active low 1 0 3 3V PCI_C BE1 C33 PCI_C BE2 C38 PCl_C BE3 C44 PCI_DEVSEL C36 PCI bus Device Select active low 1 0 3 3V PU 8k2 3 3V PCI_FRAME D36 PCI bus Frame control line active low 1 0 3 3V PU 8k2 3 3V PCI_IRDY C37 PCI bus Initiator Ready control line active low 1 0 3 3V PU 8k2 3 3V PCI_TRDY D35 PCI bus Target Ready control line active low 1 0 3 3V PU 8k2 3 3V PCIl_STOP D34 PCI bus STOP control line active low driven by cycle initiator 1 0 3 3V PU 8k2 3 3V PCI_PAR D32 PCI bus parity 1 0 3 3V PCI_PERR C34 Parity Error An external PCI device drives PERR when it receives data that has a parity error 1 0 3 3V_ PU 8k2 3 3V PCIl_REQO C22 PCI bus master request input lines active low 13 3V PU 8k2 3 3V PCI_REQ1 C19 PCI_REQ2 C17 PCIl_REQ3 D20 PCI_GNTO C20 PCI bus master grant output lines active low O 3 3V PCI_GNT 0 3 are PCI_GNT1 C18 boot strap signals PCI_GNT2 C16 see note below PCI_GNT3 D19 PCI_LRESET C23 PCI Reset output active low O 3 3V PCIl_LOCK C35 PCI Lock control line active low 1 0 3 3V PU 8k2 3 3V PCI_SERR D33 System Error SERR may be pulsed active by any PCI device that detects a system error condition I O 3 3V PU 8k2 3 3V PCI_PME C15 PCI Power Management Event PCI peripherals drive PME to wake system from low power states 13 3VSB 1 S5 Copyright 2008 congatec AG BM45m11 54 103 be cong
44. AG is certified to DIN EN ISO 9001 2008 standard M Zar INTERNATIONAL CERTIFICATION Technical Support congatec AG technicians and engineers are committed to providing the best possible technical support for our customers so that our products can be easily used and implemented We request that you first visit our website at www congatec com for the latest documentation utilities and drivers which have been made available to assist you If you still require assistance after visiting our website then contact our technical support department by email at support congatec com Copyright 2008 congatec AG BM45m11 7 103 Ea congatec the rhythm of embedded computing Lead Free Designs ROHS All congatec AG designs are created from lead free components and are completely ROHS compliant Electrostatic Sensitive Device A All congatec AG products are electrostatic sensitive devices and are packaged accordingly Do not open or handle a congatec AG product except at an electrostatic free workstation Additionally do not ship or store congatec AG products near strong electrostatic electromagnetic magnetic or radioactive fields unless the device is contained within its original manufacturer s packaging Be aware that failure to comply with these guidelines will void the congatec AG Limited Warranty conga BM45 Options Information The conga BM45 is currently available in four different variants This user s guide describes all of these opt
45. B56 PCIE_TX4 A55 PCI Express channel 4 Transmit Output differential pair O PCIE Supports PCI Express Base Specification Revision 1 1 PCIE_TX4 A56 PCIE_RX5 B52 PCI Express channel 5 Receive Input differential pair PCIE Not available Used by onboard Gigabit Ethernet PCIE_RX5 B53 PCIE_TX5 A52 PCI Express channel 5 Transmit Output differential pair O PCIE Not available Used by onboard Gigabit Ethernet PCIE_TX5 A53 PCIE_CLK_REF A88 PCI Express Reference Clock output for all PCI Express O PCIE PCIE_CLK_REF A89 and PCI Express Graphics Lanes o gt Note AC_SYNC and AC_SDOUT can be used to switch PCI Express channels 0 3 between x1 and x4 mode If both signals are each pulled up using 1KQ resistors to 3 3V at the rising edge of PWROK then x4 mode is enabled for channels 0 3 x1 mode is used by default if these resistors are not populated Channel 4 remains configured as x1 mode regardless of the configuration of channels 0 3 For more information refer to section 7 5 of this user s guide Copyright 2008 congatec AG BM45m11 46 103 les congatec the rhythm of embedded computing Table 7 ExpressCard Support Pins Descriptions Pin Description Comment EXCDO_CPPE A49 ExpressCard capable card request I 3 3V PU 10k 3 3V EXCD1_CPPE B48 EXCDO_PERST A48__ ExpressCard Reset 0 3 3V PU 10k 3 3V EXCDO_PERST is a boot strap EXCD1_PERST B47 signal see note below gt
46. D Master Password Note This option will be shaded if the hard drive does support the Security Mode Feature set but user failed to unlock the drive during BIOS POST Copyright 2008 congatec AG BM45m11 99 103 9 7 9 7 1 les congatec the rhythm of embedded computing Power Setup Select the Power tab from the setup menu to enter the Power Management setup screen Feature Options Description Power Management APM Disabled Set this option to allow or prevent chipset power management and APM Advanced Power Management Enabled Suspend Timeout Disabled Specifies the length of time of inactivity the system waits before it enters suspend mode 1 60 Min Video Power Down Mode Disabled Specifies the power state that the video subsystem enters when the BIOS places it in a power saving state after the Standby specified period of display inactivity has expired Suspend Hard Disk Power Down Mode Disabled Specifies the power state that the hard disk drives enter after the specified period of hard drive inactivity has expired Standby Suspend lt Device gt Ignore Determines whether the device activity is monitored by the power management timer or not Monitor Resume On Ring Disabled Disable enable RI signal GPE2 on pin 89 of X4 connector to generate a wake event Enabled If enabled wake is possible from all power down states including S5 Soft Off Resume On PME Disabled Disable enable PCI PME to generate a wake
47. DATA MODUL DISPLAY AND SYSTEM SOLUTIONS Specification conga BM45 Rev 1 1 Version July 2010 Data ModulAG www data modul com ies congatec the rhythm of embedded computing Revision History Revision Date dd mm yy Author Changes 0 1 17 12 08 GDA Preliminary release 0 2 29 01 09 GDA Added section 8 System Resources 1 0 21 01 10 GDA Official release Added processor variant featuring Intel Core 2 Duo Processor P8400 Updated information about the PCI Express Graphics PEG interface Added pin numbers to sections 7 Signal Descriptions and Pinout Tables Updated information throughout the user s guide for the HDMI and DisplayPort interfaces Updated section 8 System Resources and section 9 BIOS Setup Description 1 1 22 06 10 GDA Updated ISO certificate number Added processor variant featuring Intel Celeron Dual Core T3100 Removed references to Microsoft Windows CE 5 0 6 0 from section 1 2 Supported Operating Systems Microsoft Windows CE is not supported on the conga BM45 Updated block diagram in section 2 Copyright 2008 congatec AG BM45m11 2 103 RY congatec the rhythm of embedded computing Preface This user s guide provides information about the components features connectors and BIOS Setup menus available on the conga BM45 It is one of three documents that should be referred to when designing a COM Express application The other reference documents
48. Definition Audio Sync This signal is a 48 kHz fixed rate sample sync to O 3 3V the codec s It is also used to encode the stream number AC_SDOUT A33___ Intel High Definition Audio Serial Data Out This signal is the serial TDM data 0 3 3V output to the codec s This serial output is double pumped for a bit rate of 48 Mb s for Intel High Definition Audio EXCDO_PERST A48 ExpressCard Reset O 3 3V PU 10k 3 3V AC_SYNC EXCDO0O_PERST is a boot strap signal see caution statement below SPKR is a boot strap signal see caution statement below SPKR B32 Output for audio enunciator the speaker in PC AT systems 0 3 3V PEG_LANE_RV D54 PCI Express Graphics lane reversal input strap Pull low on the carrier board to 11 05V PEG_LANE_RV is a boot strap signal reverse lane order Be aware that the SDVO lines that share this interface do not see caution statement below necessarily reverse order if this strap is low SDVO_I2C_DAT C73 SDVO I C data line to set up SDVO HDMI DisplayPort peripherals VO SDVO_1I2C_DAT is a boot strap signal SDVO_DATA OD 2 5V see caution statement below DDPB_CTRLDATA PCI_GNTO C20 PCI bus master grant output lines active low O 3 3V PCI_GNTO is a boot strap signal see caution statement below PCI_GNT1 C18 PCI bus master grant output lines active low O 3 3V PCI_GNT 1 is a boot strap signal see caution statement below PCI_GNT2 C16
49. EG_RX13 D94 PEG_TX13 C40 PCI_AD19 D40 PCIAD22 C95 PEG_RX13 D95 PEG_TX13 C41 GND FIXED D41 GND FIXED C96 GND D96 GND C42 PCI_AD21 D42 PCI_AD24 C97 RSVD D97 PEG_ENABLE C43 PCI_AD23 D43 PCI_AD26 C98 PEG _RX14 D98 PEG_TX14 C44 PCI_C BE3 D44 PCIAD28 C99 PEG_RX14 D99 PEG_TX14 C45 PCI_AD25 D45 PCI_AD30 C100 GND FIXED D100 GND FIXED C46 PCI_AD27 D46 PCI_IRQC C101 PEG_RX15 D101 PEG_TX15 C47 PCI_AD29 D47 PCI_IRQD C102 PEG_RX15 D102 PEG_TX15 C48 PCI_AD31 D48 PCI_CLKRUN C103 GND D103 GND C49 PCI_IRQA D49 PCI_M66EN C104 VCC_12V D104 VCC_12V C50 PCI_IRQB D50 PCI_CLK C105 VCC_12V D105 VCC_12V C51 GND FIXED D51 GND FIXED C106 VCC_12V D106 VCC_12V C52 PEG_RX0 D52 PEG_TX0 C107 VCC_12V D107 VCC_12V C53 PEG_RX0 D53 PEG_TX0 C108 VCC_12V D108 VCC_12V C54 TYPEO D54 PEG_LANE_RV C109 VCC_12V D109 VCC_12V C55 PEG_RXi D55 PEG_TX1 C110 GND FIXED D110 GND FIXED o gt Note The signals marked with an asterisk symbol are not supported on the conga BM45 Copyright 2008 congatec AG BM45m11 65 103 les congatec the rhythm of embedded computing 7 5 Boot Strap Signals Table 28 Boot Strap Signal Descriptions PU PD Comment AC_SYNC is a boot strap signal see caution statement below AC_SDOUT is a boot strap signal see caution statement below Pin Description of Boot Strap Signal tke A29 Intel High
50. EXCDO_PERST B48 EXCD1_CPPE A103 VCC_12V B103 VCC_12V A49 EXCDO_CPPE B49 SYS_RESET A104 VCC_12V B104 VCC_12V A50 LPC_SERIRQ B50 CB_RESET A105 VCC_12V B105 VCC_12V A51 GND FIXED B51 GND FIXED A106 VCC_12V B106 VCC_12V A52 PCIE_TX5 B52 PCIE_RX5 A107 VCC_12V B107 VCC_12V A53 PCIE_TX5 B53 PCIE_RX5 A108 VCC_12V B108 VCC_12V A54 GPIO B54 GPO1 A109 VCC_12V B109 VCC_12V A55 PCIE_TX4 B55 PCIE_RX4 A110 GND FIXED B110 GND FIXED o gt Note congatec the rhythm of embedded computing The signals marked with an asterisk symbol are not supported on the conga BM45 PCIE_TX5 and PCIE_RX5 are used for the onboard Gigabit Ethernet and therefore are not available externally SATA3_TX SATA3_TX SATA3_RX and SATA3_RX are used for SATA to PATA conversion and therefore not available externally Copyright 2008 congatec AG BM45m11 53 103 7 3 C D Connector Signal Descriptions Table 18 PCI Signal Descriptions B congatec the rhythm of embedded computing Pin Description I O PU PD Comment PCI_ADf 0 2 4 C24 PCI bus multiplexed address and data lines 1 0 3 3V 6 8 10 12 C30 PCI_AD 1 3 D22 5 7 D25 PCI_AD 9 11 D27 13 15 D30 PCI_AD14 C32 PCI_AD 16 18 D37 20 22 D40 PCI_AD 17 19 C39 C40 PCI_AD 21 23 C42 C43 PCI_AD 24 26 D42 28 30 D45 PCI_AD 25 27 C45 2
51. Exclusion Submenu cceeeeeeeeeetees 81 PCI Interrupt Routing SubMenu 0 ccce cseecceeeeee tennessee 81 Graphics Configuration Submenu 82 CPU Configuration SUDMENU ce eeeeeeeeee eee eetttteeeeeeeeeeeeneee 85 Chipset Configuration SUDMENU ccc eeeetteeeeeeeteeeeeeee 86 I O Interface Configuration Submenu ceeeeeeeeeteeeees 87 SIO Winbond W83627 Configuration 88 SIO SMSC SCH3114 Configuration 89 Glock Cong uration ssiccssiicisencdin tvatsecanasecenieversgeasuccocacerenetaveeet 89 IDE Configuration SUBMENU 2 scccccciscesescseeeesseesssenncnnees 90 Primary Secondary IDE Master Slave Submenu 005 91 USB Configuration SUDMENU cee eeeeeeeeteeeeeeeeteeenaaeees 92 USB Mass Storage Device Configuration Submenu 93 9 4 10 9 4 11 9 4 12 9 5 1 9 5 2 9 6 1 9 6 2 9 6 2 1 9 6 2 2 9 7 9 7 1 10 10 1 10 2 10 2 1 10 3 10 4 11 RY congatec the rhythm of embedded computing Keyboard Mouse Configuration Submenu sessssssseeeeeeeee 93 Hardware Monitoring SUDMENU eee cent eeeeeeeeeeeneaeees 94 Watchdog Configuration Submenu ceeeeeseeeeeeeeeeteeeee 95 Boot SetUp aaaea aaa aana aa ii 96 Boot Device Priority scciecccsrseoretecensedetencstdaboiccieesteaiessedentedemmaveces 96 Boot Settings Configuration cecceeceeeeeeeeeeeeeeenteeeeeeeeeeeeeeee 97 Securty SCLUP cc
52. G BM45m11 18 103 Ea congatec the rhythm of embedded computing 1 6 4 Intel Celeron 575 2 0GHz 1MB L2 cache With 512MB memory installed conga BM45 Art No 013132 Intel Celeron 575 2 0GHz 1MB L2 cache 65nm Layout Rev BM45LX0 BIOS Rev BM45R004 Memory Size 1GB Operating System Windows XP Professional SP2 Power State Desktop Idle 100 workload Standby Suspend to Ram S3 5V Input Power Xen Lmrexe gt JU laa o ETE Mla T EEES A 1 0 A 12 W 12V 2 3 A 27 6 W 12V 1 1 A 13 2 W 12V 0 2 A 1 W 5V gt Note All recorded power consumption values are approximate and only valid for the controlled environment described earlier 100 workload refers to the CPU workload and not the maximum workload of the complete module Supply power for S3 mode is 5V while all other measured modes are supplied with 12V power Power consumption results will vary depending on the workload of other components such as graphics engine memory etc 1 7 Supply Voltage Battery Power 2 0V 3 5V DC e Typical 3V DC 1 7 1 CMOS Battery Power Consumption RTC 20 C Voltage Current Integrated in the Intel I O Controller Hub 82801IEM ICH9M E 3V DC 2 8 UA The CMOS battery power consumption value listed above should not be used to calculate CMOS battery lifetime You should measure the CMOS battery power consumption in your customer specific application in worst case conditions for example during high temperature
53. GUI and Linux version The BIOS displays a message during POST and on the main setup screen identifying the BIOS project name and a revision code The initial production BIOS is identified as BM45R1xx where BM45 is the congatec internal project name R is the identifier for a BIOS ROM file 1 is the so called feature number and xx is the major and minor revision number 10 1 Updating the BIOS BIOS updates are often used by OEMs to correct platform issues discovered after the board has been shipped or when new features are added to the BIOS For more information about Updating the BIOS refer to the user s guide for the congatec System Utility which is called CGUTLm1x pdf and can be found on the congatec AG website at www congatec com 10 2 BIOS Recovery The BIOS recovery scenario is recommended for situations when the normal flash update fails and the user can no longer boot back to an OS to restore the system The code that handles BIOS recovery resides in a section of the flash referred to as boot block For more information about BIOS Recovery refer to application note AN6_BIOS_Recovery pdf which can be found on the congatec AG website at www congatec com 10 2 1 BIOS Recovery via Storage Devices In order to make a BIOS recovery from a floppy disk CD ROM ISO9660 or USB floppy the BIOS file must be copied into the root directory of the storage device and renamed AMIBOOT ROM For more information about B
54. IDE_D5 D2 IDE_D6 C3 IDE_D7 C2 IDE_D8 C6 IDE_D9 C7 IDE_D10 D3 IDE_D11 D4 IDE_D12 D5 IDE_D13 c9 IDE_D14 C12 IDE_D15 C5 IDE_A 0 2 D13 D15 Address lines to IDE device O 3 3V IDE_lOW D9 I O write line to IDE device Data latched on trailing rising edge O 3 3V IDE_lOR C14 I O read line to IDE device O 3 3V IDE_REQ D8 IDE Device DMA Request It is asserted by the IDE device to request a data transfer 13 3V PD 5k1 IDE_ACK D10 IDE Device DMA Acknowledge O 3 3V IDE_CS1 D16 IDE Device Chip Select for 1FOh to 1FFh range O 3 3V IDE_CS3 D17 IDE Device Chip Select for 3FOh to 3FFh range O 3 3V IDE_IORDY C13 IDE device I O ready input Pulled low by the IDE device to extend the cycle 13 3V PU 4k7 3 3V IDE_RESET D18 Reset output to IDE device active low O 3 3V IDE_IRQ D12 Interrupt request from IDE device 3 3V PD 10k IDE_CBLID D77 Input from off module hardware indicating the type of IDE cable being used High indicates a 3 3V PD 1k 40 pin cable used for legacy IDE modes Low indicates that an 80 pin cable with interleaved grounds is used Such a cable is required for Ultra DMA 66 100 and 133 modes gt Note The PATA IDE interface is an option conga BM45 When this option is used Serial ATA channel 3 is not available Copyright 2008 congatec AG BM45m11 56 103 last congatec the rhythm of embedded computing Table 20 PCI Express Signal Descriptions x16 Graphics Pin Description I O
55. IOS Recovery via Storage Devices refer to application note AN6_BIOS_Recovery pdf which can be found on the congatec AG website at www congatec com t Copyright 2008 congatec AG BM45m11 101 103 ia congatec the rhythm of embedded computing 10 3 BIOS Security Features The BIOS provides both a supervisor and user password If you use both passwords the supervisor password must be set first The system can be configured so that all users must enter a password every time the system boots or when setup is executed The two passwords activate two different levels of security If you select password support you are prompted for a one to six character password Type the password on the keyboard The password does not appear on the screen when typed The supervisor password supervisor mode gives unrestricted access to view and change all the setup options The user password user mode gives restricted access to view and change setup options If only the supervisor password is set pressing lt Enter gt at the password prompt of the BIOS setup program allows the user restricted access to setup Setting the password check to Always restricts who can boot the system The password prompt will be displayed before the system attempts to load the operating system If only the supervisor password is set pressing lt Enter gt at the prompt allows the user to boot the system 10 4 Hard Disk Security Features Hard Disk Security uses the Sec
56. O LVDS LVDS_A0 A72 LVDS_A1 A73 LVDS_A1 A74 LVDS_A2 A75 LVDS_A2 A76 LVDS_A3 A78 LVDS_A3 A79 LVDS_A_CK A81 LVDS ChannelA differential clock OLVDS LVDS_A_CK A82 LVDS_BO B71 LVDS Channel B differential pairs OLVDS LVDS_BO B72 LVDS_Bi B73 LVDS_B1 B74 LVDS_B2 B75 LVDS_B2 B76 LVDS_B3 B77 LVDS_B3 B78 LVDS_B_CK B81 LVDS Channel B differential clock OLVDS LVDS_B_CK B82 LVDS_VDD_EN A77 LVDS panel power enable O 3 3V PD 10k LVDS_BKLT_EN B79 LVDS panel backlight enable O 3 3V LVDS_BKLT_CTRL B83 LVDS panel backlight brightness control O 3 3V LVDS_I2C_CK A83 DDC lines used for flat panel detection and control O 3 3V PU 2k2 3 3V LVDS_I2C_DAT A84 DDC lines used for flat panel detection and control 1 0 3 3V PU 2k2 3 3V Copyright 2008 congatec AG BM45m11 49 103 Table 12 TV Out Signal Descriptions les congatec the rhythm of embedded computing Signal Pin TV_DAC_A_ B97 Description TVDAC Channel A Output supports the following Composite video CVBS Component video Chrominance Pb analog signal S Video not used O Analog PD 150R Comment Analog output TV_DAC B B98 TVDAC Channel B Output supports the following Composite video not used Component video Luminance Y analog signal S Video Luminance analog signal O Analog PD 150R Analog output TV_DAC_C B99 TVDAC Channel C Output supports the following Composite video not used Component Chromina
57. O USB 2 0 compliant Backwards compatible to USB 1 1 USB4 A40 USB Port 4 data or D VO USB 2 0 compliant Backwards compatible to USB 1 1 USB4 A39 USB Port 4 data or D 1 0 USB 2 0 compliant Backwards compatible to USB 1 1 USB5 B40 USB Port 5 data or D I O USB 2 0 compliant Backwards compatible to USB 1 1 USB5 B39 USB Port 5 data or D I O USB 2 0 compliant Backwards compatible to USB 1 1 USB6 A37 USB Port 6 data or D ie USB 2 0 compliant Backwards compatible to USB 1 1 USB6 A36 USB Port 6 data or D I O USB 2 0 compliant Backwards compatible to USB 1 1 USB7 B37 USB Port 7 data or D I O USB 2 0 compliant Backwards compatible to USB 1 1 USB7 B36 USB Port 7 data or D I O USB 2 0 compliant Backwards compatible to USB 1 1 USB_0_1_OC B44 USB over current sense USB ports 0 and 1 A pull up for this line shall l PU 10k Do not pull this line high on the carrier board be present on the module An open drain driver from a USB current 3 3VSB 3 3VSB monitor on the carrier board may drive this line low USB_2_ 3 OC A44 USB over current sense USB ports 2 and 3 A pull up for this line shall l PU 10k Do not pull this line high on the carrier board be present on the module An open drain driver from a USB current 3 3VSB 3 3VSB monitor on the carrier board may drive this line low USB_4 5 OC B38 USB over current sense USB ports 4 and 5 A pull up for this line shall l PU 10k Do not pull this line high o
58. PU PD Comment PEG_RX0 C52 PCI Express Graphics Receive Input differential pairs Some of these lines are multiplexed PCIE PEG_RX0 C53 with SDVO lines PEG_RX1 c55 Note Can also be used as PCI Express Receive Input differential pairs 16 through 31 known PEG RX1 c56 as PCIE_RX 16 31 and PEG _RX2 C58 PEG RX2 C59 PEG _RX3 C61 PEG RX3 C62 PEG _RX4 c65 PEG_RX4 C66 PEG_RX5 c68 PEG_RX5 c69 PEG_RX6 C71 PEG_RX6 C72 PEG_RX7 C74 PEG_RX7 C75 PEG_RX8 C78 PEG _ RX8 C79 PEG _RX9 C81 PEG _RX9 C82 PEG _RX10 C85 PEG _RX10 C86 PEG_RX11 C88 PEG_RX11 C89 PEG _RX12 c91 PEG_RX12 C92 PEG _RX13 C94 PEG _RX13 C95 PEG _RX14 C98 PEG _ RX14 c99 PEG_RX15 C101 PEG_RX15 C102 Copyright 2008 congatec AG BM45m11 57 103 K congatec the rhythm of embedded computing Pin Description 1 0 PU PD Comment PEG_TX0 D52 PCI Express Graphics Transmit Output differential pairs Some of these lines are multiplexed O PCIE PEG_TX0 D53 with SDVO lines PEG TX1 D55 Note Can also be used as PCI Express Transmit Output differential pairs 16 through 31 PEG _TX1 D56 known as PCIE_TX 16 31 and PEG_TX2 D58 PEG_TX2 D57 PEG_TX3 D61 PEG_TX3 D62 PEG_TX4 D65 PEG_TX4 D66 PEG_TX5 D68 PEG_TX5 D69 PEG_TX6 D71 PEG_TX6 D72 PEG_TX7 D74 PEG_TX7 D75 PEG_TX8 D78 PEG_TX8 D79 PEG_TX9 D81 PEG_TX9 D82 PEG_TX10 D85 PEG_TX10 D86 PEG_TX11 D88
59. S is set to YES in setup Copyright 2008 congatec AG BM45m11 68 103 8 2 I O Address Assignment les congatec the rhythm of embedded computing The I O address assignment of the conga BM45 module is functionally identical with a standard PC AT The most important addresses and the ones that differ from the standard PC AT configuration are listed in the table below Table 30 I O Address Assignment I O Address hex Size PNET E19 Description 0000 OOFF 256 bytes No Motherboard resources 0170 0177 8 bytes No Secondary IDE channel 01F0 01F7 8 bytes No Primary IDE channels 0376 1 byte No Secondary IDE channel command port 0377 1 byte No Secondary IDE channel status port 03B0 03DF 16 bytes No Video system 03F6 1 byte No Primary IDE channel command port 03F7 1 byte No Primary IDE channel status port 04D0 04D1 2 bytes No Motherboard resources 0500 053F 64 bytes No Motherboard resources 0800 087F 128 bytes No Motherboard resources OA00 0A7F 128 bytes No Motherboard resources OCF8 OCFB 4 bytes No PCI configuration address register OCFC OCFF 4 bytes No PCI configuration data register O0DOO FFFF See note PCI PCI Express bus gt Note The BIOS assigns PCI and PCI Express I O resources from FFFOh downwards Non PnP PCI PCI Express compliant devices must not consume I O resources in that area Copyright 2008 congatec AG BM45m11 69
60. SATA3_TX A77 LVDS_VDD_EN B77 LVDS_B3 A23 SATA2_TX B23 SATA3_TX A78 LVDS_A3 B78 LVDS_B3 A24 SUS_S5 B24 PWR_OK A79 LVDS_A3 B79 LVDS_BKLT_EN A25 SATA2_RX B25 SATA3_RX A80 GND FIXED B80 GND FIXED A26 SATA2_RX B26 SATA3_RX A81 LVDS_A_CK B81 LVDS_B_CK A27 BATLOW B27 WDT A82 LVDS_A_CK B82 LVDS_B_CKk A28 ATA_ACT B28 AC_SDIN2 A83 LVDS_I2C_CK B83 LVDS_BKLT_CTRL A29 AC_SYNC B29 AC_SDIN1 A84 LVDS_I2C_DAT B84 VCC_5V_SBY A30 AC_RST B30 AC_SDINO A85 GPI3 B85 VCC_5V_SBY A31 GND FIXED B31 GND FIXED A86 KBD_RST B86 VCC_5V_SBY A32 AC_BITCLK B32 SPKR A87 KBD_A20GATE B87 VCC_5V_SBY A33 AC_SDOUT B33 I2C_CK A88 PCIEOQ_CK_REF B88 RSVD A34 BIOS_DISABLE B34 I2C_DAT A89 PCIEOQ_CK_REF B89 VGA_RED A35 THRMTRIP B35 THRM A90 GND FIXED B90 GND FIXED A36 USB6 B36 USB7 A91 RSVD B91 VGA_GRN A37 USB6 B37 USB7 A92 RSVD B92 VGA_BLU A38 USB_6_7_OC B38 USB 4 5 OC A93 GPOO B93 VGA_HSYNC A39 USB4 B39 USB5 A94 RSVD B94 VGA_VSYNC A40 USB4 B40 USB5 A95 RSVD B95 VGA_I2C_CK A41 GND FIXED B41 GND FIXED A96 GND B96 VGA_I2C_DAT A42 USB2 B42 USB3 A97 VCC_12V B97 TV_DAC_A A43 USB2 B43 USB3 A98 VCC_12V B98 TV_DAC_B A44 USB 2 3 OC B44 USB_0_1 OC A99 VCC_12V B99 TV_DAC_C A45 USBO B45 USB1 A100 GND FIXED B100 GND FIXED A46 USBO B46 USB1 A101 VCC_12V B101 VCC_12V A47 VCC_RTC B47 EXCD1_PERST A102 VCC_12V B102 VCC_12V A48
61. V in reading VRTC no option Current VRTC reading Copyright 2008 congatec AG BM45m11 94 103 ia congatec the rhythm of embedded computing 9 4 12 Watchdog Configuration Submenu Feature Options Description POST Watchdog Disabled Select the timeout value for the POST watchdog 30sec 1min The watchdog is only active during the power on self test of the system and provides a facility to prevent errors during boot 2min up by performing a reset 5min 10min 30min Stop the Watchdog for No Select whether the POST watchdog should be stopped during the popup boot selection menu or while waiting for setup User Interaction Yes password insertion Runtime Watchdog Disabled Selects the operating mode of the runtime watchdog One time trigger This watchdog will be initialized just before the operating system starts booting Single Event If set to One time trigger the watchdog will be disabled after the first trigger Repeated Event If set to Single event every stage will be executed only once then the watchdog will be disabled If set to Repeated event the last stage will be executed repeatedly until a reset occurs Delay see Post Watchdog Select the delay time before the runtime watchdog becomes active This ensures that an operating system has enough time to load Event 1 NMI Selects the type of event that will be generated when timeout 1 is reached For more information about ACPI Event see ACPI Event section 9
62. XED A2 GBE0_MDI3 B2 GBE0_ACT A3 GBE0_MDI3 B3 LPC_FRAME A4 GBEO_LINK100 B4 LPC_ADO A5 GBE0_LINK1000 B5 LPC AD1 PCIE_TX4 PCIE_RX4 A57 GND B57 GPO2 A58 PCIE_TX3 B58 PCIE_RX3 A59 PCIE_TX3 B59 PCIE_RX3 A60 GND FIXED B60 GND FIXED A6 GBE0_MDI2 B6 LPC_AD2 A61 PCIE_TX2 B61 PCIE_RX2 A7 GBE0_MDI2 B7 LPC_AD3 A62 PCIE_TX2 B62 PCIE_RX2 A8 GBE0_LINK B8 LPC_DRQO A63 GPI1 GPO3 A9 _ GBEO_MDI1 B9 LPC_DRQ1 A64 PCIE_TX1 B64 PCIE_RX1 A10 GBE0_MDI1 B10 LPC_CLK A65 PCIE_TX1 B65 PCIE_RX1 A11 GND FIXED B11 GND FIXED A66 GND B66 WAKEO A12_ GBEO_MDIO B12 _ PWRBTN A67 GPI2 B67 _ WAKE1 A13 GBE0_MDIO B13 SMB_CK A68 PCIE_TX0 B68 PCIE_RX0 A14 GBE0_CTREF B14 SMB_DAT A69 PCIE_TXO0 B69 PCIE_RX0 A15 SUS_S3 B15 SMB_ALERT A70 GND FIXED B70 GND FIXED A16 SATA0_TX B16 SATA1_TX A71 LVDS_A0 B71 LVDS_BO A17_ SATAO_TX B17 SATA1_TX A72 LVDS_A0 B72 LVDS_B0 A18 SUS_S4 B18 SUS_STAT A73 LVDS_A1 B73 LVDS_B1 A19 SATA0_RX B19 SATA1_RX A74 LVDS_A1 B74 LVDS_B1 A20 SATA0_RX B20 SATA1_RX A75 LVDS_A2 B75 LVDS_B2 Copyright 2008 congatec AG BM45m11 52 103 Pin RowA Pin RowB Pin RowA Pin RowB A21 GND FIXED B21 GND FIXED A76 LVDS_A2 B76 LVDS_B2 A22 SATA2_TX B22
63. Y congatec the rhythm of embedded computing Table 14 General Purpose I O Signal Descriptions Description Comment GPO 0 A93 General purpose output pins O 3 3VSB PU 10k 3 3VSB GPO 1 B54 General purpose output pins O 3 3VSB PU 10k 3 3VSB GPO 2 B57 General purpose output pins O 3 3VSB PU 10k 3 3VSB GPO 3 B63 General purpose output pins O 3 3VSB PU 10k 3 3VSB GPI 0 A54 General purpose input pins Pulled high internally on the module 3 3VSB PU 10k 3 3VSB GPI 1 A63 General purpose input pins Pulled high internally on the module 3 3VSB PU 10k 3 3VSB GPI 2 A67 General purpose input pins Pulled high internally on the module 13 3VSB PU 10k 3 3VSB GPI 3 A85 General purpose input pins Pulled high internally on the module 13 3VSB PU 10k 3 3VSB Table 15 Power and System Management Signal Descriptions Pin Description Comment PWRBTN B12 Power button to bring system out of S5 soft off active on rising edge 13 3VSB PU 10k 3 3VSB SYS_RESET B49 Reset button input Active low input Edge triggered 13 3VSB PU 10k 3 3VSB System will not be held in hardware reset while this input is kept low CB_RESET B50 Reset output from module to Carrier Board Active low Issued by module chipset and may result O 3 3V PD 100k from alow SYS_RESET input a low PWR_OK input a VCC_12V power input that falls below the minimum specification a watchdog timeout or may be initiated by the module
64. _RX6 D72 PEG_TX6 C18 PCI_GNT1 D18 IDE_RESET C73 SDVO_DATA D73 SVDO_CLK C19 PCI_LREQ1 D19 PCI_GNT3 C74 PEG_RX7 D74 PEG_TX7 C20 PCI_GNTO D20 PCI_REQ3 C75 PEG_RX7 D75 PEG_TX7 C21 GND FIXED D21 GND FIXED C76 GND D76 GND C22 PCI_REQO D22 PCI_AD1 C77 FAN_TACHOIN D77 IDE_CBLID C23 PCI_RESET D23 PCI_AD3 C78 PEG_RX8 D78 PEG_TX8 C24 PCI_ADO D24 PCI_AD5 C79 PEG_RX8 D79 PEG_TX8 C25 PCI_AD2 D25 PCI_AD7 c80 GND FIXED D80 GND FIXED C26 PCI_AD4 D26 PCI_C BE0O C81 PEG _RX9 D81 PEG_TX9 C27 PCI_AD6 D27 PCI_AD9 C82 PEG_RX9 D82 PEG_TX9 C28 PCI_AD8 D28 PCI_AD11 C83 PP_TPM D83 RSVD C29 PCI_AD10 D29 PCI_AD13 C84 GND D84 GND C30 PCI_AD12 D30 PCI_AD15 C85 PEG_RX10 D85 PEG_TX10 C31 GND FIXED D31 GND FIXED C86 PEG_RX10 D86 PEG_TX10 C32 PCI_AD14 D32 PCI_PAR C87 GND D87 GND C33 PCI_C BE1 D33 PCISERR C88 PEG _RX11 D88 PEG_TX11 C34 PCI_PERR D34 PCI_STOP C89 PEG_RX11 D89 PEG_TX11 C35 PCI_LOCK D35 PCITRDY C90 GND FIXED D90 GND FIXED C36 PCI_DEVSEL D36 PCI_FRAME c91 PEG_RX12 D91 PEG_TX12 C37 PCI_IRDY D37 PCI_AD16 C92 PEG_RX12 D92 PEG_TX12 Copyright 2008 congatec AG BM45m11 congatec the rhythm of embedded computing 64 103 les congatec the rhythm of embedded computing Pin RowC Pin RowD Pin RowC Pin RowD C38 PCI_C BE2 D38 PCI_AD18 c93 GND D93 GND C39 PCI_AD17 D39 PCIAD20 C94 P
65. a SERIRQ or PCI BUS INTx 11 Yes IRQ11 via SERIRQ or PCI BUS INTx 12 Yes IRQ12 via SERIRQ or PCI BUS INTx 13 No Math processor Not applicable 14 Note 1 IDE Controller 0 IDEO Generic IRQ14 or PCI BUS INTx 15 Note 1 IDE Controller 1 IDE1 Generic IRQ15 or PCI BUS INTx In PIC mode the PCI bus interrupt lines can be routed to any free IRQ gt Note 1 If the SATA configuration in BIOS setup is set to enhanced mode for all SATA ports serial ATA native mode operation IRQ14 and 15 are free for PCI LPC bus 2 In ACPI mode IRQ9 is used for the SCI System Control Interrupt The SCI can be shared with a PCI interrupt line Copyright 2008 congatec AG BM45m11 71 103 les congatec the rhythm of embedded computing Table 32 IRQ Lines in APIC mode Available Typical Interrupt Source Connected to Pin Function 0 No Counter 0 Not applicable 1 No Keyboard Not applicable 2 No Cascade Interrupt from Slave PIC Not applicable 3 Yes IRQ3 via SERIRQ 4 Yes IRQ4 via SERIRQ 5 Yes IRQ5 via SERIRQ 6 Yes IRQ6 via SERIRQ 7 Yes IRQ7 via SERIRQ 8 No Real time Clock Not applicable 9 Note 2 Generic IRQ9 via SERIRQ option for SCI 10 Yes IRQ10 via SERIRQ 11 Yes IRQ11 via SERIRQ 12 Yes IRQ12 via SERIRQ 13 No Math processor Not applicable 14 Note 1 IDE Controller 0 IDEO Generic IRQ14 15 Note 1 IDE Controller 1 IDE1 Generic IRQ15 16 No PIRQA Integrated VGA Contr
66. ack CMOS Data from Flash to verify write procedure has been completed Processing time for these events Maximum 2 seconds Typical lt 1 second BIOS waits for either lt F F2 or lt F2 gt key to be pressed System Reset Once the automatic reset has been triggered the congatec module can be powered off and removed from the carrier Launch Setup board without losing CMOS settings lt gt x congatec Embedded BIOS enhancements Boot to OS lt gt C standard AMI BIOS processes The above diagram provides an overview of how the BIOS Setup Data is backed up on congatec modules OEM default values mentioned above refer to customer specific CMOS settings created using the congatec System Utility tool Copyright 2008 congatec AG BM45m11 31 103 lea congatec the rhythm of embedded computing Once the BIOS Setup Program has been entered and the settings have been changed the user saves the settings and exits the BIOS Setup Program using the F10 key feature After the F10 function has been evoked the CMOS Data is stored in a dedicated non volatile CMOS Data Backup area located in the BIOS Flash Memory chip as well as RTC The CMOS Data is written to and read back from the CMOS Data Backup area and verified Once verified the F10 Save and Exit function continues to perform some minor processing tasks and finally reaches an automatic reset point which instructs the module to reboot After the Automatic Reset has b
67. air PCIE SDVO_TVCLKIN C53 Multiplexed with PEG_RX 0 and PEG_RX 0 SDVO_FLDSTALL C58 Serial Digital Video Field Stall input differential pair PCIE SDVO_FLDSTALL C59 Multiplexed with PEG_RX 2 and PEG_RX 2 SDVO_I2C_CK D73 SDVO I C clock line to set up SDVO peripherals O 2 5V SDVO_CLK SDVO_I2C_DAT C73 SDVO I C data line to set up SDVO peripherals I O SDVO_I2C_DAT is a boot SDVO_DATA OD 2 5V strap signal see note below gt Note Some signals have special functionality during the reset process They may bootstrap some basic important functions of the module For more information refer to section 7 5 of this user s guide Copyright 2008 congatec AG BM45m11 59 103 Table 22 HDMI Signal Descriptions congatec the rhythm of embedded computing B Signal Pin Description He PU PD Comment TMDS_B_CLK D61 HDMI Port B Clock output differential pair O PCIE TMDS_B_CLK D62 Multiplexed with PEG_TX 3 and PEG_TX 3 pair TMDS_B_DATAO D58 HDMI Port B DataO output differential pair O PCIE TMDS_B_DATAO D59 Multiplexed with PEG_TX 2 and PEG_TX 2 TMDS_B_DATA1 D55 HDMI Port B Data output differential pair O PCIE TMDS_B_DATA1 D56 Multiplexed with PEG_TX 1 and PEG_TX 1 TMDS_B_DATA2 D52 HDMI Port B Data2 output differential pair O PCIE TMDS_B_DATA2 D53 Multiplexed with PEG_TX 0 and PEG_TX O TMDS_B_HPD C61 HDMI Port B Hot plug
68. air SATA Supports Serial ATA specification Revision 1 0a SATAO_RX A20 SATAO_TX A16 Serial ATA channel 0 Transmit Output differential pair O SATA Supports Serial ATA specification Revision 1 0a SATAO_TX A17 SATA1_RX B19 Serial ATA channel 1 Receive Input differential pair SATA Supports Serial ATA specification Revision 1 0a SATA1_RX B20 SATA1_TX B16 Serial ATA channel 1 Transmit Output differential pair O SATA Supports Serial ATA specification Revision 1 0a SATA1_TX B17 SATA2_RX A25 Serial ATA channel 2 Receive Input differential pair SATA Supports Serial ATA specification Revision 1 0a SATA2_RX A26 SATA2_TX A22 Serial ATA channel 2 Transmit Output differential pair O SATA Supports Serial ATA specification Revision 1 0a SATA2_TX A23 SATA3_RX B25 Serial ATA channel 3 Receive Input differential pair SATA Supports Serial ATA specification Revision 1 0a Serial ATA SATA3_RX B26 channel 3 is used for SATA to PATA conversion and therefore not available SATA3_TX B22 Serial ATA channel 3 Transmit Output differential pair O SATA Supports Serial ATA specification Revision 1 0a Serial ATA SATA3_TX B23 channel 3 is used for SATA to PATA conversion and therefore not available ATA_ACT A28 ATA parallel and serial or SAS activity indicator active low OC 3 3V Copyright 2008 congatec AG BM45m11 45 103 les congatec the rhythm of embedded compu
69. an provide you with more information about this subject THERMTRIP signal is used by Intel s Core 2 Duo and Celeron processors for catastrophic thermal protection If the processor s silicon reaches a temperature of approximately 125 C then the processor signal THERMTRIP will go active and the system will automatically shut down to prevent any damage to the processor as a result of overheating The THERMTRIP signal activation is completely independent from processor activity and therefore does not produce any bus cycles gt Note In order for THERMTRIP to be able to automatically switch off the system it is necessary to use an ATX style power supply Copyright 2008 congatec AG BM45m11 35 103 pY congatec the rhythm of embedded computing 6 4 2 Processor Performance Control Intel Core 2 Duo processors run at different voltage frequency states performance states which is referred to as Enhanced Intel SpeedStep technology EIST Operating systems that support performance control take advantage of microprocessors that use several different performance states in order to efficiently operate the processor when it s not being fully utilized The operating system will determine the necessary performance state that the processor should run at so that the optimal balance between performance and power consumption can be achieved during runtime The Windows family of operating systems links its processor performance control po
70. application specific thermal solution may use heatsinks with fans and or heat pipes which can be attached to the heatspreader Some thermal solutions may also require that the heatspreader is attached directly to the systems chassis therefore using the whole chassis as a heat dissipater ten There are 4 mounting holes on the heatspreader designed to attach the heatspreader to the module These mounting holes must be used to ensure that all components that are required to make contact with heatspreader do so Failure to utilize the these mounting holes will result in improper contact between these components and heatspreader thereby reducing heat dissipation efficiency Attention must be given to the mounting solution used to mount the heatspreader and module into the system chassis Do not use a threaded heatspreader together with threaded carrier board standoffs The combination of the two threads may be staggered which could lead to stripping or cross threading of the threads in either the standoffs of the heatspreader or carrier board Copyright 2008 congatec AG BM45m11 22 103 lea congatec the rhythm of embedded computing 3 1 Heatspreader Dimensions M2 5xllmm threaded standoff for threaded version or 2 7xllmm nonthreaded standoff for bore hole version Bottom side view A gt Note All measurements are in millimeters Torque specification for heatspreader screws is 0 5 Nm Copyright 2008 congatec
71. atec the rhythm of embedded computing Description 0 PU PD Comment PCI_CLKRUN D48 Bidirectional pin used to support PCI clock run protocol for mobile systems 1 0 3 3V PU 10k 3 3V PCI_IRQA C49 PCI interrupt request lines 13 3V PU 8k2 3 3V PCI_IRQB C50 PCI_IRQC D46 PCI_IRQD D47 PCI_CLK D50 PCI 33MHz clock output O 3 3V PCI_M66EN D49 Module input signal indicates whether an off module PCI device is capable of 66MHz operation l Not connected Pulled to GND by Carrier Board device or by Slot Card if the devices are NOT capable of 66MHz operation If the module is not capable of supporting 66MHz PCI operation this input may be a no connect on the module If the module is capable of supporting 66MHz PCI operation and if this input is held low by the Carrier Board the module PCI interface shall operate at 33MHz o gt Note Some signals have special functionality during the reset process They may bootstrap some basic important functions of the module For more information refer to section 7 5 of this user s guide The PCI interface is specified to be 5V tolerant with 3 3V signaling Copyright 2008 congatec AG BM45m11 55 103 Table 19 IDE Signal Descriptions les congatec the rhythm of embedded computing Pin Description Comment IDE_DO D7 Bidirectional data to from IDE device 0 3 3V IDE_D7 PD 10k IDE_D1 C10 IDE_D2 C8 IDE_D3 C4 IDE_D4 D6
72. ble at least during BIOS POST regardless of the main legacy USB support Disabled setting This ensures that the BIOS setup can always be entered and modified using a USB keyboard Setting this node and the main node Legacy USB Support both to Disabled completely disables BIOS legacy USB support This decreases BIOS boot time but also disables BIOS setup access using a USB keyboard USB Keyboard Legacy Disabled Enable Disable USB keyboard legacy support Support Enabled NOTE This option has to be used with caution If the system is equipped with USB keyboard only then the user cannot enter setup to enable the option back USB Mouse Legacy Support Disabled Enable Disable USB mouse legacy support Enabled USB Storage Device Support Disabled Enable Disable USB mass storage device support Enabled Port 64 60 Emulation Disabled Enable Disable the Port 6h 64h trapping option Port 60h 64h trapping allows the BIOS to provide full PS 2 based legacy Enabled support for USB keyboard and mouse It provides the PS 2 functionality such as keyboard lock password setting scan code selection etc to USB keyboards USB 2 0 Controller Mode FullSpeed Configures the USB 2 0 host controller in HiSpeed 480Mbps or Full Speed 12Mbps HiSpeed BIOS EHCI Hand Off Disabled Enable workaround for OSes without EHCI hand off support Enabled USB Beep Message Disabled Enable Disable the beep during USB device enumeration Enabled USB Stick De
73. c AG BM45m11 90 103 9 4 8 1 ia congatec the rhythm of embedded computing Primary Secondary IDE Master Slave Submenu Feature Options Description Device Hard Disk Displays the type of drive detected The grayed out items below are the IDE disk drive parameters taken from the firmware of ATAPI CDROM the IDE disk Vendor no option Manufacturer of the device Size no option Total size of the device LBA Mode supported not supported Shows whether the device supports Logical Block Addressing Block Mode number of sectors Block mode boosts IDE performance by increasing the amount of data transferred Only 512 byte of data can be transferred per interrupt if block mode is not used Block mode allows transfers of up to 64 kB per interrupt PIO Mode 0 1 2734 IDE PIO mode programs timing cycles between the IDE drive and the programmable IDE controller If PIO mode increases the cycle time decreases Async DMA no option This indicates the highest Asynchronous DMA Mode that is supported Ultra DMA no option This indicates the highest Synchronous DMA Mode that is supported S M A R T no option Self Monitoring Analysis and Reporting Technology protocol used by IDE drives of some manufacturers to predict drive failures Type Not Installed Sets the type of device that the BIOS attempts to boot from after the POST has completed Auto Not Installed prevents the BIOS from searching for an IDE disk CD DVD Auto a
74. cation e Battery System Design Guide e conga SBMC User s Guide Copyright 2008 congatec AG BM45m11 32 103 p congatec the rhythm of embedded computing 6 conga Tech Notes The conga BM45 has some technological features that require additional explanation The following section will give the reader a better understanding of some of these features This information will also help to gain a better understanding of the information found in the System Resources section of this user s guide as well as some of the setup nodes found in the BIOS Setup Program description section 6 1 Comparison of I O APIC to 8259 PIC Interrupt mode I O APIC Advanced Programmable Interrupt controller mode deals with interrupts differently than the 8259 PIC The method of interrupt transmission used by APIC mode is implemented by transmitting interrupts through the system bus and they are handled without the requirement of the processor to perform an interrupt acknowledge cycle Another difference between I O APIC and 8259 PIC is the way the interrupt numbers are prioritized Unlike the 8259 PIC the I O APIC interrupt priority is independent of the actual interrupt number A major advantage of the I O APIC found in the chipset of the conga BM45 is that it s able to provide more interrupts a total of 24 to be exact It must be mentioned that the APIC is not supported by all operating systems In order to utilize the APIC mode it must be enabled in the BIOS
75. ccccccceecccecececececceeceeeceeeceeeccesceeeceeceeeeseeseaees 98 Security Settings wade tntrscnaseencemieniienerenonmeneteatenangiiaietnactuaattiaeued 98 Hard Disk Security veitesinscctdet cerateacetence decal hdad Suede tt ecamitansdiabidencts 99 Hard Disk Security User PaSSword 2 eeeeeeeeeeeeeeeeeeees 99 Hard Disk Security Master Password 0 eeeeeeeeees 99 Power Setup cccccccccccceeceeeceeeceeeceeeceeeeeeeceeeeeeeeeeeeeeeeeeeeeeteenss 100 Exit M nu cecccee cece ecee cence eee eeee aka Aarand 100 Additional BIOS Features eeceeccceeeeeeeeeseeeeeeeeeeeeeeeeenaaaes 101 Updating the BIOS ccceecceee cece eeee cece eeeeeeeeeeeeeeeeeeeeeeeeeeees 101 BIOS RECOV GI sacha cascaded cap st ese tsaisdeaat idea il ce Seams stteatieabiades 101 BIOS Recovery via Storage Devices 0 00 eee eeeeeeteeeeeeeeeeeeee 101 BIOS Security Features austen ccieetiertecieee aiiclemeteeedas 102 Hard Disk Security Features 0 0seeeeeeeeeeeeeeeeeeeeneeeee 102 Industry Specifications siseccccenrsecstsstecesestectepcccenracsieduateaeal 103 10 103 Copyright 2008 congatec AG BM45m11 pY congatec the rhythm of embedded computing List of Tables Table 1 Feature SUMMAary casceice sects diva tee catetexevea ce haynncteeentaecatcbienreiierdaces 12 Table 2 Signal Tables Terminology Descriptions e seeeeeeeeeeeeee 43 Table 3 Intel High Definition Audio Link
76. ces are zero when the socket is not engaged in the open position There are clear indicator marks located on the actuation mechanism that identify the lock closed and unlock open positions of the cover as well as the actuation direction see picture below These marks remain visible after the processor is inserted into the socket Locked closed on Unlocked open A Electrostatic Sensitive Device The conga BM45 is an electrostatic sensitive device Do not handle the conga BM45 or processor except at an electrostatic free workstation Failure to do so may cause damage to the module and or processor and void the manufacturer s warranty Copyright 2008 congatec AG BM45m11 14 103 1 5 1 5 1 1 5 2 Ea congatec the rhythm of embedded computing Supply Voltage Standard Power 12V DC 5 The dynamic range shall not exceed the static range 12 60V Absolute Maximum Dynamic Range 12V AE E T E Nominal Static Range 11 40V Absolute Minimum Electrical Characteristics Power supply pins on the module s connectors limit the amount of input power The following table provides an overview of the limitations for pinout Type 2 dual connector 440 pins Power Rail Module Pin Current Nominal Input Input Range Derated Input Max Input Ripple Max Module Input Power Assumed Max Load Capability Amps Volts Volts Volts 10Hz to 20MHz w derated input Conversion Power mV
77. channel LVDS interface support 1 x 18 bpp OR 1 x 24 bpp Type 1 only compatible with VESA LVDS color mapping Dual channel LVDS interface support 2 x 18 bpp OR 2 x 24 bpp panel support Supports both conventional FPDI and non conventional LDI color mappings Automatic Panel Detection via EPI Embedded Panel Interface based on VESA EDID 1 3 Resolutions 640x480 up to 1600x1200 UXGA HDMI Single TMDS Link only support for RGB video support for CEA modes 480i p 576i p 720p 1080i p and PC modes via dot clock and HDMI repeater support Hardware acceleration for MPEG2 VLD iDCT H W motion compensation DisplayPort DP Supports two DisplayPorts multiplexed with the PCI Express Graphics interface 1 62 Gb s and 2 7 Gb s 1 2 4 data lanes 8B10B coding Hot Plug detect support HDCP support AUX Output 2 x Intel compliant SDVO ports serial DVO 200MPixel sec each shared with PEG x16 pins Supports external DVI TV and LVDS transmitter TV Out Integrated TV encoder supports HDTV 420p 720p and 1080i supports component and S video e 3x Serial ATA supports RAID 0 1 5 10 4x Serial ATA if SATA to PATA chip is not used e 5x x1 PCI Express Links optionally one additional x1 x2 x4 x8 link if x16 link is not used e PCI Express Graphics x16 shared with SDVO DisplayPort HDMI 8x USB 2 0 EHCI PCI Bus Rev 2 3 1x EIDE UDMA 66 100 LPC Bus lC Bus Fast Mode 400 kHz multimaster Based o
78. chipset on the conga BM45 supports integrated HDMI which is multiplexed onto the PCI Express Graphics PEG interface The Intel GM45 provides two ports capable of supporting HDMI This integrated HDMI solution saves BOM cost compared to HDMI over SDVO See section 7 5 of this document for more information about enabling HDMI peripherals o gt Note The standard variant of conga BM45 does not support Intel HD Audio on either of the HDMI ports For more information about this subject contact congatec technical support For more information about implementing a HDMI interface on COM Express carrier boards refer to application note AN17_HDMI_DP_Implementation pdf which can be found on the congatec website 4 2 4 DisplayPort DP The conga BM45 offers two DP ports each capable of supporting link speeds of 1 62 Gbps and 2 7 Gbps on 1 2 or 4 data lanes The DP is multiplexed onto the PCI Express Graphics PEG interface The DisplayPort specification is a VESA standard aimed at consolidating internal and external connection methods to reduce device complexity supporting key cross industry applications and providing performance scalability to enable the next generation of displays The Intel GM45 chipset can support a maximum of 2 DP ports simultaneously o gt Note The standard variant of conga BM45 does not support Intel HD Audio on either of the DP ports For more information about this subject contact congatec technical support For mo
79. computing 1 6 1 Intel Core 2 Duo T9400 2 53GHz 6MB L2 cache With 1GB memory installed conga BM45 Art No 013130 Intel Core 2 Duo T9400 2 53GHz 6MB L2 cache 45nm Layout Rev BM45LX0 BIOS Rev BM45R004 Memory Size 1GB Operating System Windows XP Professional SP2 Power State Desktop Idle 100 workload Standby Suspend to Ram S3 5V Input Power LIET A EERTE r TESES 0 8 A 9 6 W 12V 3 5 A 42 7 W 12V 1 1 A 13 2 W 12V 0 2 A 1 W 5V 1 6 2 Intel Core 2 Duo P8400 2 26GHz 3MB L2 cache With 1GB memory installed conga BM45 Art No 013140 Intel Core 2 Duo P8400 2 26GHz 3MB L2 cache 45nm Layout Rev BM45LX0 BIOS Rev BM45R004 Memory Size 1GB Operating System Windows XP Professional SP2 Power State Desktop Idle 100 workload Standby Suspend to Ram S3 5V Input Power AGEE E UGEET Maan ELEELE 0 9 A 10 8 W 12V 3 0 A 36 W 12V 0 9 A 10 8 W 12V 0 2 A 1 W 5V 1 6 3 Intel Celeron Dual Core T3100 1 9GHz 1MB L2 cache With 1GB memory installed conga BM45 Art No 013135 Intel Dual Core T3100 1 9GHz 1MB L2 cache 45nm Layout Rev BM45LB0 BIOS Rev BM45R111 Memory Size 1GB Operating System Windows XP Professional SP2 Power State Desktop Idle 100 workload Standby Suspend to Ram S3 5V Input Power ZIERT A ESE T T E CESA 1 0 A 12 0 W 12V 2 7 A 32 4 W 12V 0 9 A 10 8 W 12V 0 2 A 1 W 5V Copyright 2008 congatec A
80. congatec AG BM45m11 86 103 9 4 6 ied congatec the rhythm of embedded computing Feature Options Description VO None Number of I O addresses to reserve for each enabled but empty PCI Express slot 4K 8K 16K Memory None Amount of memory to reserve for each enabled but empty PCI Express slot 1MB 32MB 128MB Prefetchable Memory None Amount of prefetchable memory to reserve for each enabled but empty PCI Express slot 1MB 32MB 128MB PCIE Port 0 IOxAPIC Enable Disabled Enable support for IOAPIC behind PCI Express port Enabled PCIE Port 11IOxAPIC Enable Disabled Enable support for IOAPIC behind PCI Express port Enabled PCIE Port 2 IOxAPIC Enable Disabled Enable support for IOAPIC behind PCI Express port Enabled PCIE Port 3 OxAPIC Enable Disabled Enable support for IOAPIC behind PCI Express port Enabled PCIE Port 4 lOxAPIC Enable Disabled Enable support for IOAPIC behind PCI Express port Enabled I O Interface Configuration Submenu Feature Options Description HDA Controller Enabled Enable onboard Intel High Definition Audio controller Disabled Onboard Ethernet Controller Disabled Enable or disable the onboard Ethernet controller Enabled gt SIO Winbond W83627 Configuration sub menu Opens submenu Note This setup node is only available if an external Winbond W83627 Super I O has been implemented on the carrier board gt SIO SMSC SCH3114 Configuration sub menu Opens submenu Note
81. critical but orderly OS shutdown or Restart restart can be performed see note below gt Note In ACPI mode it is not possible for a Watchdog ACPI Event handler to directly restart or shutdown the OS For this reason the congatec BIOS will do one of the following For Shutdown An over temperature notification is executed This causes the OS to shut down in an orderly fashion For Restart An ACPI fatal error is reported to the OS It depends on your particular OS as to how this reported fatal error will be handled when the Restart function is selected If you are using Windows XP 2000 there is a setting that can be enabled to ensure that the OS will perform a restart when a fatal error is detected After a very brief blue screen the system will restart You can enable this setting buy going to the System Properties dialog box and choosing the Advanced tab Once there choose the Settings Copyright 2008 congatec AG BM45m11 79 103 RY congatec the rhythm of embedded computing button for the Startup and Recovery section This will open the Startup and Recovery dialog box In this dialog box under System failure there are three check boxes that define what Windows will do when a fatal error has been detected In order to ensure that the system restarts after a Watchdog ACPI Event that is set to Restart you must make sure that the check box for the selection Automatically restart ha
82. dby voltage on the 5V_SB pins On congatec modules the standby voltage is continuously monitored after the system is turned off If within 30 seconds the standby voltage is no longer detected then this is considered an AC power loss condition If the standby voltage remains stable for 30 seconds then it is assumed that the system was switched off properly 2 Inexpensive ATX power supplies often have problems with short AC power sags When using these ATX power supplies it is possible that the system turns off but does not switch back on even when the PS_ON signal is asserted correctly by the module In this case the internal circuitry of the ATX power supply has become confused Usually another AC power off on cycle is necessary to recover from this situation 3 Unlike other module designs available in the embedded market a CMOS battery is not required by congatec modules to support the Power Loss Control feature Copyright 2008 congatec AG BM45m11 97 103 9 6 9 6 1 Security Setup Ea congatec the rhythm of embedded computing Select the Security tab from the setup menu to enter the Security setup screen Security Settings Feature Options Description Supervisor Password Installed Reports if there is a supervisor password set Not Installed User Password Installed Reports if there is a user password set Not Installed Change Supervisor Password enter password Specifies the supervisor pass
83. e or disable the ICH9M E high precision event timer HPET This timer can be used for precise multimedia or Enabled real time application timing Special software support is required HPET Memory Address FED00000h Set the high precision event timer memory base address FED01000h FEDO2000h FED03000h IOAPIC Disabled Enable Disable ICH9M E IOAPIC function Enabled APIC ACPI SCI IRQ Disabled If set to Disabled IRQ9 is used for the SCI Enabled If set to Enabled IRQ20 is used for the SCI POST Code Output PCI Select whether port 80h 84h BIOS POST code output should be routed to the PCI bus or the LPC bus LPC Active State Power Disabled Enable or disable PCI Express LOs and L1 link power states Management Enabled PCIE Port 0 Auto Enable or disable PCI Express port Enabled Disabled PCIE Port 1 Auto Enable or disable PCI Express port Enabled Disabled PCIE Port 2 Auto Enable or disable PCI Express port Enabled Disabled PCIE Port 3 Auto Enable or disable PCI Express port Enabled Disabled PCIE Port 4 Auto Enable or disable PCI Express port Enabled Disabled PCIE High Priority Port Disabled Enable PCI Express high priority port for isochronous data transfers Port 0 Port 1 Port 2 Port 3 Port 4 Reserve PCIE Hotplug No Reserve I O and memory resources for empty PCI Express slots Setting a PCI Express port to Enabled and Resources Yes reserving resources is required for ExpressCard hotplug support on the respective port Copyright 2008
84. ecome available if SATA Port Enabled 0 1 is set to Enhanced and Configure SATA Port 0 1 as is set to RAID or AHCI SATA Port 2 3 optional Disabled Enable or disable the IDE controller handling SATA ports 2 and 3 PATA Port Enabled Note A SATA to PATA converter is optionally connected to SATA port 3 This SATA to PATA converter offers support for one parallel ATA device PATA Detection Time Out s 0 1 2 3 5 10 15 30 Select how long the BIOS should try to detect a PATA drive behind the SATA to PATA converter connected to SATA port 3 optional gt Primary IDE Master sub menu Reports type of connected IDE device gt Secondary IDE Master sub menu Reports type of connected IDE device gt Third IDE Master sub menu Reports type of connected IDE device gt Fourth IDE Master sub menu Reports type of connected IDE device Hard Disk Write Protect Disabled If enabled protects the hard drive from being erased Enabled Disabled allows the hard drive to be used normally Read write and erase functions can be performed to the disk IDE Detect Time Out s 0 5 10 30 35 Set this option to stop the BIOS from searching for IDE devices within the specified number of seconds Basically this allows you to fine tune the settings to allow for faster boot times Adjust this setting until a suitable timing can be found that will allow for all IDE disk drives that are attached to be detected Copyright 2008 congate
85. eeee 39 2 Bl ck UG UN siisii iiiaio 21 6 Conga Tech Notes sccccccccsccsssccsessssssssssessesessesseseesessssssssssssseseee 33 3 Heatspreade r ecir E E a eE 22 6 1 Comparison of I O APIC to 8259 PIC Interrupt mode 33 6 2 Intel Matrix Storage Technology cceceeceeeeeeeeteeeeeeeteeeeee 33 A j a epee ae aes 23 6 2 1 AHCI DOO 33 4 Connector Subsystems Rows A B C D ccccecceeeeeeeeeeeees 24 6 22 AAO E aa ae e EEE AEE ES 34 4 1 Primary Connector Rows A and B 25 6 3 Native vs Compatible IDE mode 00 00eeeeeeeeeeeeeeeeeee 34 4 1 1 Serial ATA SATA ie scocessessroed xssdeaeoetsatravndtiacvnesteseeventshitles 25 6 3 1 Compatible MOde ccccccccceccceeeceeeceeeeeeeeeeceeeceeeeeeeeeeeteeess 34 4 1 2 12 7 2 0 ene ener E ete ee Vere NENT AA 25 6 3 2 Native Mode ssssssssssssssssessscessnenessscesnsreseeesnaiiesenenaaninecenensaenes 34 4 1 3 High Definition Audio HDA INCCP PACE cccccccccccccccccccccececcececce 25 6 4 Intel Processor Features a sgeeabteceheindes penbdaseegeaiteas 35 4 1 4 Gigabit Ethernet ss sassdeissaxiasndisontesncsacsrtaccestadantaianeansaunianpiteanrnads 25 6 4 1 Thermal Monitor and Catastrophic Thermal Protection 35 4 1 5 El EE eee eeaee E ee 26 6 4 2 Processor Performance Control ss srsetrsesrsserssrrrrererseeereree 36 4 1 6 I2CV BUS 4OOKHZ cccccccccccccccccccccececccceccccceccececececesccccscecteceeses 26 6 4 3 Intel 64 paun eee E A 3
86. een triggered the congatec module can be powered off and if need be removed from the baseboard without losing the new CMOS settings 5 4 Security Features The conga BM45 can be equipped optionally with a Trusted Platform Module TPM 1 2 This TPM 1 2 includes coprocessors to calculate efficient hash and RSA algorithms with key lengths up to 2 048 bits as well as a real random number generator Security sensitive applications like gaming and e commerce will benefit also with improved authentication integrity and confidence levels 5 5 Suspend to Ram The Suspend to RAM feature is available on the conga BM45 5 6 congatec Battery Management Interface In order to facilitate the development of battery powered mobile systems based on embedded modules congatec AG has defined an interface for the exchange of data between a CPU module using an ACPI operating system and a Smart Battery system Asystem developed according to the congatec Battery Management Interface Specification can provide the battery management functions supported by an ACPI capable operating system e g charge state of the battery information about the battery alarms events for certain battery states without the need for any additional modifications to the system BIOS The conga BM45 BIOS fully supports this interface For more information about this subject visit the congatec website and view the following documents congatec Battery Management Interface Specifi
87. em performance Use the active cooling trip point setup node in the BIOS setup program to determine the temperature threshold that the operating system will use to start the active cooling device It is stopped again when the temperature goes below the threshold 5 C hysteresis e Critical Trip Point If the temperature in the thermal zone reaches a critical point then the operating system will perform a system shut down in an orderly fashion in order to ensure that there is no damage done to the system as result of high temperatures Use the critical trip point setup node in the BIOS setup program to determine the temperature threshold that the operating system will use to shut down the system gt Note The end user must determine the cooling preferences for the system by using the setup nodes in the BIOS setup program to establish the appropriate trip points If passive cooling is activated and the processor temperature is above the trip point the processor clock is throttled according to the formula below AP TC1 T T TC2 T T AP is the performance delta e T is the target temperature critical trip point e The two coefficients TC1 and TC2 and the sampling period TSP are hardware dependent constants These constants are set to fixed values for the conga BM45 e TC1 1 e TC2 5 TSP 5 seconds See section 12 of the ACPI Specification 2 0 C for more information about passive cooling Copyright 2008 con
88. erential pair O PCIE Not supported DPD_LANE2 D86__ Multiplexed with PEG_TX 10 and PEG_TX 10 pair DPD_LANE1 D81 DisplayPort D Lane output differential pair O PCIE Not supported DPD_LANE1 D82__ Multiplexed with PEG_TX 9 and PEG_TX 9 pair DPD_LANEO D78 DisplayPort D LaneO output differential pair O PCIE Not supported DPD_LANEO D79__ Multiplexed with PEG_TX 8 and PEG_TX 8 pair Copyright 2008 congatec AG BM45m11 61 103 Pin Description la congatec the rhythm of embedded computing PU PD Comment DPD_HPD C88 DisplayPort D Hot plug detect PCIE Not supported Multiplexed with PEG_RX 11 DPD_AUX C85 DisplayPort D Aux input differential pair PCIE Not supported DPD_AUX c86 Multiplexed with PEG_RX 10 and PEG_RX 10 pair o gt Note Some signals have special functionality during the reset process They may bootstrap some basic important functions of the module For more information refer to section 7 5 of this user s guide Copyright 2008 congatec AG BM45m11 62 103 les congatec the rhythm of embedded computing Table 24 Module Type Definition Signal Description Pin Description Comment TYPEO C54 The TYPE pins indicate to the Carrier Board the Pin out Type that is implemented on the module The pins are tied on PDS TYPE 0 2 signals are TYPE1 C57 the module to either ground GND or are no connects NC For Pinout Type 1 these pins are do
89. etiaintentbatawiniae 68 System Memory MAP icc cissienccsiccessnsicnernete Mmermiduteceerienandiaae 68 VO Address ASSIQNMOMN xccccccscasisscasencetnesesstasestcnesneaeasedccnedeentes 69 LPG BUS vscieariskccvtbatackcecisiscantacdidaxshanadeutaneneieateeants aeireeanskeeatcctet 70 Interrupt Request IRQ LIn S ccccccccccccceccssneeeescececennecneees 71 PCI Configuration Space Map ccccccccececeeeeeeeeeeeeeeeeeeeeeees 73 PCI Interrupt Routing Map ccccccecccececeeeceeeeeeeeeeeeeeeeeeeeeess 74 PCI Bus Masters i ciiccciassadatentiorintatinsstecintneteaneduaiatrantaresaneiaaseces 75 FO BUS eonan a E E errr err cere ee 75 SMBUS ee je ise teteoeceeeateten aucoamcetsbastenitarnah a nE 75 BIOS Setup Description sssseeeeeeeeeeeeeeeeeeriirrrnssnsrrrnnnnnssssene 76 Entering the BIOS Setup Program s eccceeeeeeeeeeeeeeeeees 76 Boot Selection POPUD cccccceecceeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeenees 76 Manufacturer Default Settings ccccecessesseceeeeeeeenteeeeeeee 76 Setup Menu and Navigation eceeceeeeceeeeeeeeeeeenneeeeeeeeeeees 76 Main Setup Screen ccccccccccccececeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeees 77 Advanced Setup cccecceeccceeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeees 78 ACPI Configuration SUDMENU ee eeeeeeeeeeeeeeeeeeeeeaaaeees 79 PCI Configuration Submenu 2 cceeeeeeeseeeeneeeeeeeeeeeeeeees 81 PCI IRQ Resource
90. fault Emulation Auto Select default USB stick emulation type Auto selects floppy or hard disk emulation based on the storage size of the USB stick Hard Disk but the emulation type can be manually reconfigured for each device using the Mass Storage Device Configuration sub menu USB Mass Storage Reset 10 Sec Number of seconds the legacy USB support BIOS routine waits for the USB mass storage device after the start unit command Delay 20 Sec 30 Sec 40 Sec gt USB Mass Storage Device sub menu Configuration Copyright 2008 congatec AG Opens sub menu BM45m11 92 103 les congatec the rhythm of embedded computing 9 4 9 1 USB Mass Storage Device Configuration Submenu Feature Options Description Emulation Type Auto Every USB MSD that is enumerated by the BIOS will have an emulation type setup option This option specifies the type of emulation Floppy the BIOS has to provide for the device Forced FDD Note The device s formatted type and the emulation type provided by the BIOS must match for the device to boot properly Hard Disk Select AUTO to let the BIOS auto detect the current formatted media CDROM If Floppy is selected then the device will be emulated as a floppy drive Forced FDD allows a hard disk image to be connected as a floppy image Works only for drives formatted with FAT12 FAT16 or FAT32 Hard Disk allows the device to be emulated as hard disk CDROM assumes the CD ROM is formatted as bootable media specified by the
91. following registry entries Add this key HKEY_LOCAL_MACHINE SYSTEM CurrentControlSet Services usb Under this key add the following value USBBIOSx DWORD 00000000 Note that Windows XP disables USB wakeup from S3 so this entry has to be added to re enable it Configure USB keyboard mouse to be able to wake up the system In Device Manager look for the keyboard mouse devices Go to the Power Management tab and check Allow this device to bring the computer out of standby Note When the standby state is set to S3 in the ACPI setup menu the power management tab for USB keyboard mouse devices only becomes available after adding the above registry entry and rebooting to allow the registry changes to take affect RTC Alarm Activate and configure Resume On RTC Alarm in the Power setup menu Watchdog Power Button Event o gt Note Wakes unconditionally from S1 S5 The above list has been verified using a Windows XP SP2 ACPI enabled installation When using Windows XP Standby mode is either an S1 state or S3 state depending on what has been selected in the ACPI Configuration Menu in the BIOS setup program For more information about this see section 9 4 1 of this document BM45m11 40 103 Copyright 2008 congatec AG py congatec the rhythm of embedded computing 6 7 USB 2 0 EHCI Host Controller Support The 8 available USB ports are shared between 2 EHCI host controller and the 6 UHCI host controllers Within
92. gatec AG BM45m11 39 103 pY congatec the rhythm of embedded computing 6 6 ACPI Suspend Modes and Resume Events conga BM45 supports the S1 POS Power On Suspend state and S3 STR Suspend to RAM For more information about S3 wake events see section 9 4 1 ACPI Configuration Submenu S4 Suspend to Disk is not supported by the BIOS S4_BIOS but it is supported by the following operating systems S4_OS Hibernate e Win2K and WinXP This table lists the Wake Events that resume the system from both S1 or S3 unless otherwise stated in the Conditions Remarks column Wake Event Power Button Conditions Remarks Wakes unconditionally from S1 S5 Onboard LAN Event Device driver must be configured for Wake On LAN support SMBALERT Wakes unconditionally from S1 S5 PCI Express WAKE Wakes unconditionally from S1 S3 PME Activate the wake up capabilities of a PCI device using Windows Device Manager configuration options for this device OR set Resume On PME to Enabled in the Power setup menu USB Mouse Keyboard Event When Standby mode is set to S1 no special action must be taken for a USB Mouse Keyboard Event to be used as a Wake Event When Standby mode is set to S3 the following must be done for a USB Mouse Keyboard Event to be used as a Wake Event USB Hardware must be powered by standby power source Set USB Device Wakeup from S3 S4 to ENABLED in the ACPI setup menu Under Windows XP add
93. had been connected and active TV Standard VBIOS Default Select TV standard that should be supported TV connection type is automatically detected by the Video NTSC BIOS PAL SECAM SMPTE240M ITU R television SMPTE295M SMPTE296M EIA 770 2 EIA 770 3 TV Sub Type Options depend on selected TV standard Select sub type for selected TV standard Copyright 2008 congatec AG BM45m11 84 103 CPU Configuration Submenu Description Displays the processor manufacturer brand frequency and cache sizes E congatec the rhythm of embedded computing Select the revision of the multi processor support interface that should be offered by the BIOS Set back to 1 1 in case problems occur with older non ACPI operating systems When enabled the processor will limit the maximum CPUID input value to 03h when queried even if the processor supports a higher CPUID input value When disabled the processor will return the actual maximum CPUID input value of the processor when queried Limiting the CPUID input value may be required for older operating systems that cannot handle the extra CPUID information returned when using the full CPUID input value Enable or disable support for Intel hardware virtualization technology Enable or disable the hardware support for data execution prevention Feature Options Processor Info Block No option MPS Revision 1 1 1 4 Max CPUID Value Limit Disabled Enabled Intel Virtualization Tech D
94. he module using onboard voltage regulators A carrier board designer should be aware of the following important information when designing a power supply for a conga BM45 application It has also been noticed that on some occasions problems occur when using a 12V power supply that produces non monotonic voltage when powered up The problem is that some internal circuits on the module e g clock generator chips will generate their own reset signals when the supply voltage exceeds a certain voltage threshold A voltage dip after passing this threshold may lead to these circuits becoming confused resulting in a malfunction It must be mentioned that this problem is quite rare but has been observed in some mobile power supply applications The best way to ensure that this problem is not encountered is to observe the power supply rise waveform through the use of an oscilloscope to determine if the rise is indeed monotonic and does not have any dips This should be done during the power supply qualification phase therefore ensuring that the above mentioned problem doesn t arise in the application For more information about this issue visit www formfactors org and view page 25 figure 7 of the document ATX12V Power Supply Design Guide V2 2 4 1 13 Power Management APM 1 2 compliant ACPI 2 0 compliant with battery support Also supports Suspend to RAM S3 4 2 Secondary Connector Rows C and D The following subsystems can be found on the secondary
95. hroughput The COM computer on module integrates all the core components and is mounted onto an application specific carrier board COM modules are a legacy free design no Super I O PS 2 keyboard and mouse and provide most of the functional requirements for any application These functions include but are not limited to a rich complement of contemporary high bandwidth serial interfaces such as PCI Express Serial ATA USB 2 0 and Gigabit Ethernet The Type 2 pinout provides the ability to offer 32 bit PCI Parallel ATA and LPC options thereby expanding the range of potential peripherals The robust thermal and mechanical concept combined with extended power management capabilities is perfectly suited for all applications Carrier board designers can utilize as little or as many of the I O interfaces as deemed necessary The carrier board can therefore provide all the interface connectors required to attach the system to the application specific peripherals This versatility allows the designer to create a dense and optimized package which results in a more reliable product while simplifying system integration Most importantly COM Express modules are scalable which means once an application has been created there is the ability to diversify the product range through the use of different performance class or form factor size modules Simply unplug one module and replace it with another no redesign is necessary Certification mga congatec
96. ibility Mode 64 bit operating system and 32 bit applications This mode requires all device drivers to be 64 bit The operating system will see the 64 bit extensions but the 32 bit application will not Existing 32 bit applications do not need to be recompiled and may or may not benefit from the 64 bit extensions The application will likely need to be re certified by the vendor to run on the new 64 bit extended operating system 64 bit Mode 64 bit operating system and 64 bit applications This usage requires 64 bit device drivers It also requires applications to be modified for 64 bit operation and then recompiled and validated Intel 64 provides support for 64 bit flat virtual address space 64 bit pointers 64 bit wide general purpose registers 64 bit integer support Up to one Terabyte TB of platform address space You can find more information about Intel 64 Technology at http developer intel com technology intel64 index htm o gt Note congatec does not intend to offer BSPs for 64 bit operating systems Contact congatec technical support if you plan to use a 64 bit operating system on the conga BM45 Copyright 2008 congatec AG BM45m11 37 103 pY congatec the rhythm of embedded computing 6 4 4 Intel Virtualization Technology Virtualization solutions enhanced by Intel VT will allow a Core 2 Duo platform to run multiple operating systems and applications in independent partitions When using virtualizatio
97. ifications 1 1 Table 1 Form Factor Processor Memory Chipset Audio Ethernet Graphics Options Peripheral Interfaces gt Note Feature List Feature Summary Based on COM Express standard pinout Type 2 Basic size 95 x 125mm Intel Core 2 Duo T9400 2 53GHz with 6 MByte L2 cache Socketed Micro FCPGA478 Intel Core 2 Duo P8400 2 26GHz with 3 MByte L2 cache Socketed Micro FCPGA478 Intel Celeron Dual Core T3100 1 9GHz with 1 MByte L2 cache Socketed Micro F CPGA478 Intel Celeron 575 2 0GHz with 1 MByte L2 cache Socketed Micro FCPGA478 2 sockets SO DIMM DDR3 1067MHz up to 8 GByte Sockets located top and bottom side of module Graphics and Memory Controller Hub GMCH Intel GM45 Intel I O Controller Hub 82801IEM ICH9M E HDA High Definition Audio digital audio interface with support for multiple codecs Gigabit Ethernet Integrated within the Intel I O Controller Hub 82801IEM ICH9M E Intel 82567LM Phy with AMT 4 0 support Mobile Intel Graphics Media Accelerator 4500MHD graphics core speeds up to 533 MHz improved graphics and 3D rendering performance Intel Dynamic Video Memory Technology Intel DVMT 5 0 OpenGL 2 0 and DirectX10 support Two independent pipelines for full dual view support e CRT Interface 300 MHz RAMDAC Resolutions up to 2048x1536 70Hz QXGA e Flat panel Interface integrated 2x25 112MHz single dual channel LVDS Transmitter Single
98. ions Below you will find an order table showing the different configurations that are currently offered by congatec AG Check the table for the Part no Order no that applies to your product This will tell you what options described in this user s guide are available on your particular module 013130 013140 013132 013135 Processor Intel Core 2 Duo T9400 2 53GHz Intel Core 2 Duo P8400 2 26GHz Intel Celeron 575 2 0GHz Intel Celeron Dual Core T3100 1 9GHz Socketed Micro FCPGA478 Socketed Micro FCPGA478 Socketed Micro FCPGA478 Socketed Micro FCPGA478 L2 Cache 6 MByte 3MB 1 MByte 1 MByte FSB 1066MHz 1066MHz 667MHz 800MHz DisplayPort DP Yes Yes Yes Yes HDMI Yes Yes Yes Yes Processor TDP 35 W 25 W 31 W 35 W Copyright 2008 congatec AG BM45m11 8 103 ies congatec the rhythm of embedded computing Contents 1 Specificatl ONS ss ies ake secession sore 12 4 1 13 Power IMAM AGS GUN sicditireascctectuctendoud siactetacotan suttomcadedibens 28 4 2 Secondary Connector Rows C and D seese 28 1 1 Feat rs Listesi iiirianne nie A 12 1 2 Supported Operating Systems 13 4 2 1 PCI Express Graphics PEG i igsccsices lt teccsceen csceachecntsdbassvandacted 28 f a is 4 2 2 SDV Oarra E A E TE RRS 28 1 3 Mechanical Dimensions cccccceceeeceeeeeeeeeeeeeeeeeeeeseeeeeeteess 13 423 HDMI 29 14 Socketed Variant of conga BM45 sccccccccccssscccsssssessesssssssssssssse 44 em ea care EEE E Geers smivineeuaminaneinuenaxien 1
99. isabled Enabled Execute Disable Bit Disabled Capability Enabled Intel SpeedStep Tech Disabled Enabled Disabled No SpeedStep default CPU speed Enabled CPU speed is controlled by the operating system Note This option is not available for Celeron M CPUs Boot CPU Speed On AC Minimum Maximum Set boot CPU speed when powered by AC ACPI OS may still change the speed if SpeedStep is enabled Boot CPU Speed On Battery Minimum Maximum Set boot CPU speed when powered by battery ACPI OS may still change the speed if SpeedStep is enabled Intel C State Tech Disabled Enabled Enable support for standard CPU idle states C2 C3 and C4 Max C State C1 C2 C3 C4 C6 Set the maximum C state that may be used when C State Tech is set to enabled Enhanced C States Disabled Enabled Copyright 2008 congatec AG Enable support for enhanced C states BM45m11 85 103 les congatec the rhythm of embedded computing 9 4 5 Chipset Configuration Submenu Feature Options Description Memory Hole Disabled Enable or disable the memory hole between 15MB and 16MB If enabled accesses to this range are forwarded to 15MB 16MB the LPC PCI bus DIMM Thermal Control Disabled Select DRAM module environment temperature at which to start memory bandwidth limitation This should help to 40 50 60 70 80 85 90 C control DIMM temperature High Precision Event Timer Disabled Enabl
100. le if a hard disk user password is Boot Yes installed see section 9 6 2 Hard Disk Security BIOS Update amp Write Disabled Only visible if a supervisor password is installed If enabled the BIOS update and modification utilities will ask for the supervisor Protection Enabled password before allowing any write accesses to the BIOS flash ROM chip END Key Loads CMOS Yes If set to Yes the user can force the loading of CMOS defaults by pressing the END key during POST Defaults No Copyright 2008 congatec AG BM45m11 98 103 ia congatec the rhythm of embedded computing 9 6 2 Hard Disk Security This feature enables the users to set reset or disable passwords for each hard drive in Setup without rebooting If the user enables password support a power cycle must occur for the hard drive to lock using the new password Both user and master password can be set independently however the drive will only lock if a user password is installed 9 6 2 1 Hard Disk Security User Password Feature Options Description Primary Secondary Master Slave enter password Set or clear the user password for the hard disk HDD User Password Note This option will be shaded if the hard drive does support the Security Mode Feature set but user failed to unlock the drive during BIOS POST 9 6 2 2 Hard Disk Security Master Password Feature Options Description Primary Secondary Master Slave enter password Set or clear the master password for the hard disk HD
101. licy to the power scheme setting found in the control panel option applet o gt Note If the Home Office or Always On power scheme is selected when using Windows operating systems then the processor will always run at the highest performance state For more information about this subject see chapter 8 of the ACPI Specification Revision 2 0c which can be found at www acpi info Also visit Microsoft s website and search for the document called Windows Native Processor Performance Control Celeron processors do not support Enhanced Intel SpeedStep technology They always run at a fixed frequency Copyright 2008 congatec AG BM45m11 36 103 pY congatec the rhythm of embedded computing 6 4 3 Intel 64 The formerly known Intel Extended Memory 64 Technology is an enhancement to Intel s IA 32 architecture Intel 64 is only available on Core 2 Duo processors and is designed to run newly written 64 bit code and access more than 4GB of memory Processors with Intel 64 architecture support 64 bit capable operating systems from Microsoft Red Hat and SuSE Processors running in legacy mode remain fully compatible with today s existing 32 bit applications and operating systems Platforms with Intel 64 can be run in three basic ways 1 Legacy Mode 32 bit operating system and 32 bit applications In this mode no software changes are required however the benefits of Intel 64 are not utilized Compat
102. llows the BIOS to auto detect the IDE disk drive type ARMD CD DVD specifies that an IDE CD DVD drive is attached The BIOS will not attempt to search for other types of IDE disk drives ARMD specifies an ATAPI Removable Media Device This includes but is not limited to ZIP and LS 120 LBA Large Mode Disabled Set to AUTO to let the BIOS auto detect LBA mode control Auto Set to Disabled to prevent the BIOS from using LBA mode Block Disabled Set to AUTO to let the BIOS auto detect device support for multi sector transfer The data transfer to and from the device will Multi Sector Transfer Auto occur multiple the number of sectors see above sectors at a time Set to Disabled to prevent the BIOS from using block mode The data transfer to and from the device will occur one sector at a time PIO Mode Auto Set to AUTO to let the BIOS auto detect the supported PIO mode 0 1 2 3 4 DMA Mode Auto Set to AUTO to let the BIOS auto detect the supported DMA mode Disabled SWDMA Single Word DMA SWDMA 1 2 MWDMA Multi Word DMA MWDMAQO 1 2 UDMA Ultra DMA UDMAQO 1 2 3 4 5 6 S M A R T Auto Set to AUTO to let the BIOS auto detect hard disk drive support Disabled Set to Disabled to prevent the BIOS from using SMART feature Enabled Set to Enabled to allow the BIOS to use SMART feature on supported hard disk drives 32Bit Data Transfer Disabled Enable Disable 32 bit data transfers on supported hard disk drives Enabled ARMD Emulation Type Auto ARMD is
103. ly PIRQs set to AUTO will not be assigned this IRQ 2nd Exclusive PCI IRQ None IRQs assigned manually above The selected IRQ will only be assigned to the PIRQ line it has been set to manually PIRQs set to AUTO will not be assigned this IRQ Copyright 2008 congatec AG BM45m11 81 103 pY congatec the rhythm of embedded computing 9 4 3 Graphics Configuration Submenu Feature Options Description Primary Video Device IGD Select primary video adapter to be used during boot up PCI IGD IGD Internal Graphics Device PCI PEG PEG PCI Express x16 Graphics Port Device PEG IGD PCI Standard PCI Express or PCI Graphics Device PEG PCI PClExpress Graphics Auto Choose the configuration of the x16 PEG port Port Enable PEG Always Select Enable PEG Always if Primary Video Device is set to IGD and a x16 PEG card should still be used as secondary graphics card under the target OS Internal Graphics Mode Disabled This option allows you to disable the internal VGA controller or enable it with up to 256MB initial frame Select Enabled 32MB buffer size Enabled 64MB Enabled 128MB DVMT Memory 128MB Amount of DRAM the DVMT graphics driver can allocate 256MB Maximum DVMT Boot Display Device Auto Select the display device s used for boot up CRT only LFP Local Flat Panel LVDS TV only SDVO only Note Auto feature only works with a DDC compatible CRT monitor SDVO stands for all kinds of true CRT SDVO SDVO transmitters as well as f
104. m the overall power consumption value measured when the module and all peripherals were connected All recorded values are approximate The conga Cdebug does not provide 5V Standby power therefore S3 mode was measured using the conga CEVAL powered by an ATX power supply with a multimeter attached to the 5V Standby power line The 5V Standby power consumption of the conga CEVAL without module attached and all peripherals connected was first measured and the resulting value was later subtracted from the overall S3 power consumption value measured when the module was attached All S3 recorded values are approximate Each module was measured while running Windows XP Professional with SP2 service pack 2 and the Power Scheme was set to Portable Laptop This setting ensures that Core 2 Duo processor runs in LFM lowest frequency mode with minimal core voltage during desktop idle Celeron processors do not support this feature and therefore always run at the same core voltage even during desktop idle Each module was tested while using a Micron DDR3 PC3 1066 1GB memory module Using different sizes of RAM as well as two memory modules will cause slight variances in the measured results Copyright 2008 congatec AG BM45m11 16 103 pY congatec the rhythm of embedded computing Power consumption values were recorded during the following stages Windows XP Professional SP2 e Desktop Idle 1000MHz for 667 MHz FSB or 800MHz for 533MHz FSB
105. n t care X available on all modules TYPE2 D57 TYPE2 TYPE1 TYPEO following the Type 2 5 Pinout standard X X X Pinout Type 1 The conga BM45 is based NC NC NC Pinout Type 2 on the COM Express Type NC NC GND Pinout Type 3 no IDE 2 pinout therefore these NC GND NC Pinout Type 4 no PCI pins are not connected NC GND GND Pinout Type 5 no IDE no PCI The Carrier Board should implement combinatorial logic that monitors the module TYPE pins and keeps power off e g deactivates the ATX_ON signal for an ATX power supply if an incompatible module pin out type is detected The Carrier Board logic may also implement a fault indicator such as an LED Table 25 Power and GND Signal Descriptions Signal Pin Description e PU PD Comment VCC_12V C104 C109 Primary power input 12V nominal All available VCC_12V pins on the connector s shall be used P D104 D109 GND C1 C11 C21 C31 Ground DC power and signal and AC signal return path P C41 C51 C60 C70 All available GND connector pins shall be used and tied to carrier board GND plane C76 C80 C84 C87 C90 C93 C96 C100 C103 C110 D1 D11 D21 D31 D41 D51 D60 D67 D70 D76 D80 D84 D87 D90 D93 D96 D100 D103 D110 Table 26 Miscellaneous Signal Descriptions Description PU PD Comment FAN_PWMOUT C67 Fan speed control Uses the Pulse Width Modulation PWM technique to control the O OD fan s RPM
106. n AMIBIOS8 1MByte Flash BIOS with congatec Embedded BIOS features LOCA EEC CUGA ACPI 3 0 compliant with battery support Also supports Suspend to RAM S3 Some of the features mentioned in the above Feature Summary are optional Check the article number of your module and compare it to the option information list on page 8 of this user s guide to determine what options are available on your particular module Copyright 2008 congatec AG BM45m11 12 103 1 2 1 3 Supported Operating Systems The conga BM45 supports the following operating systems e Microsoft Windows Vista e Linux e Microsoft Windows XP 2000 e QNX e Microsoft Windows XP Embedded Mechanical Dimensions 95 0 mm x 125 0 mm 3 74 x 4 92 i congatec the rhythm of embedded computing Height approximately 18 or 21mm including heatspreader depending on the carrier board connector that is used If the 5mm height carrier board connector is used then approximate overall height is 18mm If the 8mm height carrier board connector is used then approximate overall height is 21mm Heatspreader Carrier Board PCB Copyright 2008 congatec AG BM45m11 13 103 Em congatec the rhythm of embedded computing 1 4 Socketed Variant of conga BM45 The conga BM45 is equipped with a Micro FCPGA socket This socket has 478 contacts and mates with a Micro FCPGA package that has a maximum of 478 pins The insertion and extraction for
107. n capabilities one computer system can function as multiple virtual systems With processor and I O enhancements to Intel s various platforms Intel Virtualization Technology can improve the performance and robustness of today s software only virtual machine solutions Intel VT is a multi generational series of extensions to Intel processor and platform architecture that provides a new hardware foundation for virtualization establishing a common infrastructure for all classes of Intel based systems The broad availability of Intel VT makes it possible to create entirely new applications for virtualization in servers clients as well as embedded systems thus providing new ways to improve system reliability manageability security and real time quality of service The success of any new hardware architecture is highly dependent on the system software that puts its new features to use In the case of virtualization technology that support comes from the virtual machine monitor VMM a layer of software that controls the underlying physical platform resources sharing them between multiple guest operating systems Intel VT is already incorporated into most commercial and open source VMMs including those from VMware Microsoft XenSource Parallels Virtual Iron Jaluna and TenAsys You can find more information about Intel Virtualization Technology at http developer intel com technology virtualization index htm gt Note
108. n the carrier board be present on the module An open drain driver from a USB current 3 3VSB 3 3VSB monitor on the carrier board may drive this line low USB_6_7_OC A38 USB over current sense USB ports 6 and 7 A pull up for this line shall l PU 10k Do not pull this line high on the carrier board be present on the module An open drain driver from a USB current 3 3VSB 3 3VSB monitor on the carrier board may drive this line low Copyright 2008 congatec AG BM45m11 48 103 les congatec the rhythm of embedded computing Table 10 CRT Signal Descriptions Pin Description Comment VGA_RED B89 __ Red for monitor Analog DAC output designed to drive a 37 5 Ohm equivalent load O Analog PD 150R Analog output VGA_GRN B91 Green for monitor Analog DAC output designed to drive a 37 5 Ohm equivalent load O Analog PD 150R Analog output VGA_BLU B92 __ Blue for monitor Analog DAC output designed to drive a 37 5 Ohm equivalent load O Analog PD 150R Analog output VGA_HSYNC_ B93___ Horizontal sync output to VGA monitor O 3 3V VGA_VSYNC_ B94 __ Vertical sync output to VGA monitor O 3 3V VGA_I2C_CK B95 DDC clock line 1 C port dedicated to identify VGA monitor capabilities 1 0 5V PU 2k2 3 3V VGA_I2C_DAT B96__ DDC data line 1 0 5V PU 2k2 3 3V Table 11 LVDS Signal Descriptions Pin Description Comment LVDS_A0 A71 LVDS Channel A differential pairs
109. nce Pr analog signal S Video Chrominance analog signal O Analog PD 150R Analog output Table 13 Miscellaneous Signal Descriptions Description Ife PU PD Comment I2C_CK B33 General purpose I C port clock output input 1 0 3 3V_ PU 4k7 3 3V I2C_DAT B34 General purpose 1 C port data I O line 1 0 3 3V_ PU 4k7 3 3V SPKR B32 Output for audio enunciator the speaker in PC AT systems O 3 3V SPEAKER is a boot strap signal see note below BIOS_DISABLE A34 Module BIOS disable input Pull low to disable module BIOS Used to allow off module 1 3 3V PU 10k 3 3V BIOS implementations WDT B27 Output indicating that a watchdog time out event has occurred O 3 3V_ PU 10k 3 3V KBD_RST A86 Input to module from optional external keyboard controller that can force a reset l PU 10k 3 3V Pulled high on the module This is a legacy artifact of the PC AT KBD_A20GATE A87 Input to module from optional external keyboard controller that can be used to l PU 10k 3 3V control the CPU A20 gate line The A20GATE restricts the memory access to the bottom megabyte and is a legacy artifact of the PC AT Pulled low on the module A gt Note Some signals have special functionality during the reset process They may bootstrap some basic important functions of the module For more information refer to section 7 5 of this user s guide Copyright 2008 congatec AG BM45m11 50 103 p
110. nt their misuse Without this protection it would be possible for viruses or malicious programs to set a password on a drive thereby blocking the user from accessing the data Copyright 2008 congatec AG BM45m11 102 103 N congatec the rhythm of embedded computing 11 Industry Specifications The list below provides links to industry specifications that apply to congatec AG modules Specification Link Low Pin Count Interface Specification Revision 1 0 LPC Universal Serial Bus USB Specification Revision 2 0 PCI Specification Revision 2 2 Serial ATA Specification Revision 1 0a PICMG COM Express Module Base Specification PCI Express Base Specification Revision 2 0 Copyright 2008 congatec AG http developer intel com design chipsets industry lIpc htm http www usb org home http www pcisig com specifications http www serialata org http www picmg org http www pcisig com specifications BM45m11 103 103 DATA MODUL DISPLAY AND SYSTEM SOLUTIONS Data Modul Headquarters Munich Landsberger Str 322 D 80687 Munich Germany Tel 49 89 56017 0 Sales Office Duesseldorf Fritz Vomfelde Str 8 D 40547 Duesseldorf Germany Tel 49 211 52709 0 Sales Office Hamburg Borsteler Chaussee 51 D 22453 Hamburg Germany Tel 49 40 42947377 0 Data Modul France S A R L Bat B Hall 204 1 3 Rue des Campanules 77185 Lognes France Tel 33 1 60378100 Data Modul Italia S r l Regus Cen
111. oller PCI Express Root Port 0 PCI Express Root Port 4 UHCI Host Controller 3 17 No PIRQB PCI Express Root Port 1 18 No PIRQC EHCI Host Controller 1 PCI Express Root Port 2 UHCI Host Controller 2 SMBus Controller 19 No PIRQD PCI Express Root Port 3 UHCI Host Controller 1 Serial ATA Host Controller 1 Serial ATA Host Controller 0 in enhanced native mode 20 Yes PIRQE PCI Bus INTD onboard Gigabit LAN Controller option for SCI 21 Yes PIRQF PCI Bus INTA 22 Yes PIRQG PCI Bus INTB Intel High Definition Audio Controller 23 Yes PIRQH PCI Bus INTC UHCI Host Controller 0 EHCI Host Controller 0 In APIC mode the PCI bus interrupt lines are connected with IRQ 20 21 22 and 23 gt Note 1 If the SATA configuration is set to enhanced mode in BIOS setup for all SATA ports serial ATA native mode operation IRQ14 and 15 are free for PCI LPC bus 2 In ACPI mode IRQ9 is used for the SCI System Control Interrupt The SCI can be shared with a PCI interrupt line Copyright 2008 congatec AG BM45m11 72 103 pY congatec the rhythm of embedded computing 8 4 PCI Configuration Space Map Table 33 PCI Configuration Space Map Bus Number hex Device Number hex Function Number hex PCI Interrupt Routing Description 00h 00h 00h N A Host Bridge 00h Oth 00h Internal PCI Express Graphics Root Port 00h 02h 00h Internal VGA Graphics 00h 02h O
112. om course of performance course of dealing or usage of trade congatec AG shall in no event be liable to the end user for collateral or consequential damages of any kind congatec AG shall not otherwise be liable for loss damage or expense directly or indirectly arising from the use of the product or from any other cause The sole and exclusive remedy against congatec AG whether a claim sound in contract warranty tort or any other legal theory shall be repair or replacement of the product only COM Express Concept COM Express is an open industry standard defined specifically for COMs computer on modules It s creation provides the ability to make a smooth transition from legacy parallel interfaces to the newest technologies based on serial buses available today COM Express modules are available in following form factors e Compact 95mm x 95mm e Basic 125mm x 95mm Extended 155mm x 110mm Copyright 2008 congatec AG BM45m11 6 103 ies congatec the rhythm of embedded computing The COM Express specification 1 0 defines five different pinout types Types Connector Rows PCI Express Lanes PCI IDE Channels LAN ports Type 1 A B Up to 6 1 Type 2 A B C D Up to 22 32 bit 1 1 Type 3 A B C D Up to 22 32 bit 3 Type 4 A B C D Up to 32 1 1 Type 5 A B C D Up to 32 3 congatec AG modules utilize the Type 2 pinout definition They are equipped with two high performance connectors that ensure stable data t
113. on ACPI aware operating system like DOS and Windows NT Set to YES if your OS complies with the ACPI specification e g Windows 2000 XP ACPI Version Features ACPI v1 0 ACPI version supported by the BIOS ACPI code and tables ACPI v2 0 ACPI v3 0 System Off Mode G3 Mech Off Select the actual power down mode when the system performs a shutdown with a congatec battery system connected S5 Soft Off Note This node is only visible when the system is connected to a congatec battery system ACPI APIC support Enabled Set to enable to include the APIC support table to ACPI Disabled Suspend mode S1 POS Select the state used for ACPI system suspend S3 STR Repost Video on S3 Resume No Determines whether to invoke VGA BIOS post on S3 resume required by some OS to re initialize graphics Yes USB Device Wakeup From S3 S4 Disabled Enable or disable USB device wakeup from S3 and S4 state Enabled Active Cooling Trip Point Disabled Specifies the temperature threshold at which the ACPI aware OS turns the fan on off 50 60 70 80 90 C Passive Cooling Trip Point Disabled Specifies the temperature threshold at which the ACPI aware OS starts stops CPU clock throttling 50 60 70 80 90 C Critical Trip Point Disabled 80 85 90 Specifies the temperature threshold at which the ACPI aware OS performs a critical shutdown 95 100 105 110 C Watchdog ACPI Event Shutdown Select the event that is initiated by the watchdog ACPI event When the watchdog times out a
114. onal injury Caution Cautions warn the user about how to prevent damage to hardware or loss of data o gt Note Notes call attention to important information that should be observed Terminology Term Description GB Gigabyte 1 073 741 824 bytes GHz Gigahertz one billion hertz kB Kilobyte 1024 bytes MB Megabyte 1 048 576 bytes Mbit Megabit 1 048 576 bits kHz Kilohertz one thousand hertz MHz Megahertz one million hertz TDP Thermal Design Power PCle PCI Express SATA Serial ATA PATA Parallel ATA T O M Top of memory max DRAM installed HDA High Definition Audio I F Interface N C Not connected N A Not available TBD To be determined Copyright 2008 congatec AG BM45m11 4 103 lea congatec the rhythm of embedded computing Copyright Notice Copyright 2008 congatec AG All rights reserved All text pictures and graphics are protected by copyrights No copying is permitted without written permission from congatec AG Some of the information found in this user s guide has been extracted WITH EXPRESS PERMISSION from the following COPYRIGHTED American Megatrends Inc documents AMIBIOS8_HDD_Security pdf e AMIBIOS8 Flash Recovery Whitepaper pdf e AMIBIOS8_SerialRedirection pdf e AMIBIOS8 Setup User s Guide The above mentioned documents are Copyright 2005 American Megatrends Inc All rights reserved All text pictures and graphics are protected by copyrights No copying is permitted without
115. onnecting bus master PCI devices o gt Note If there are two devices connected to the same PCI REQ GNT pair and they are transferring data at the same time then the latency time of these shared PCI devices can not be guaranteed 8 7 C Bus There are no onboard resources connected to the I C bus Address 16h is reserved for congatec Battery Management solutions 8 8 SM Bus System Management SM bus signals are connected to the Intel I O Controller Hub 82801GHM ICH9M E and the SM bus is not intended to be used by off board non system management devices For more information about this subject contact congatec technical support Copyright 2008 congatec AG BM45m11 75 103 A congatec the rhythm of embedded computing 9 BIOS Setup Description The following section describes the BIOS setup program The BIOS setup program can be used to view and change the BIOS settings for the module Only experienced users should change the default BIOS settings 9 1 Entering the BIOS Setup Program The BIOS setup program can be accessed by pressing the lt DEL gt key during POST 9 1 1 Boot Selection Popup The BIOS offers the possibility to access a Boot Selection Popup menu by pressing the lt F11 gt key during POST If this option is used a message will be displayed during POST stating that the Boot Selection Popup menu has been selected and the menu itself will be displayed immediately after POST thereby allowing the operator to choo
116. or graphic outputs using the SDVO signals like HDMI and Display Port LFP only CRT LFP Boot Display Preference LFP SDVO B SDVO C Select order in which devices are checked and enabled as boot display devices in case a combination LFP SDVO C SDVO B of LFP and SDVO devices is present The preference selection is only used if Boot Display Device SDVO B SDVO C LFP selection is set to Auto or if SDVO is part of the selection and more than one SDVO device is present SDVO C SDVO B LFP Always Try Auto Panel No If set to Yes the BIOS will first look for an EDID data set in an external EEPROM to configure the Local Detect Yes Flat Panel or the SDVO Local Flat Panel Only if no external EDID data set can be found the data set selected under Local Flat Panel Type or SDVO Local Flat Panel Type will be used as fallback data set Copyright 2008 congatec AG BM45m11 82 103 Ea congatec the rhythm of embedded computing Feature Options Description Local Flat Panel Type Auto Select a predefined LFP type or choose Auto to let the BIOS automatically detect and configure the VGA 1x18 002h attached LVDS panel VGA 1x18 013h Auto detection is performed by reading an EDID data set via the video I C bus SVGA 1x18 01Ah The number in brackets specifies the congatec internal number of the respective panel data set XGA 1x18 006h Note Customized EDID utilizes an OEM defined EDID data set stored in the BIOS flash device XGA 2x18 007h
117. ranty Limited Warranty congatec AG may in its sole discretion modify its Limited Warranty at any time and from time to time Beginning on the date of shipment to its direct customer and continuing for the published warranty period congatec AG represents that the products are new and warrants that each product failing to function properly under normal use due to a defect in materials or workmanship or due to non conformance to the agreed upon specifications will be repaired or exchanged at congatec AG s option and expense Customer will obtain a Return Material Authorization RMA number from congatec AG prior to returning the non conforming product freight prepaid congatec AG will pay for transporting the repaired or exchanged product to the customer Repaired replaced or exchanged product will be warranted for the repair warranty period in effect as of the date the repaired exchanged or replaced product is shipped by congatec AG or the remainder of the original warranty whichever is longer This Limited Warranty extends to congatec AG s direct customer only and is not assignable or transferable Except as set forth in writing in the Limited Warranty congatec AG makes no performance representations warranties or guarantees either express or implied oral or written with respect to the products including without limitation any implied warranty a of merchantability b of fitness for a particular purpose or c arising fr
118. re information about implementing a DisplayPort interface on COM Express carrier boards refer to application note AN17_HDMI_DP_Implementation pdf which can be found on the congatec website 4 2 5 PCI Bus The PCI bus complies with PCI specification Rev 2 3 and provides a 32bit parallel PCI bus that is capable of operating at 33MHz gt Note The PCI interface is specified to be 5V tolerant with 3 3V signaling 4 2 6 IDE PATA The conga BM45 supports an IDE channel that is capable of UDMA 100 operation This channel is implemented by converting SATA Port 3 to an IDE channel using JMicron s single chip solution for serial and parallel ATA translation The IDE interface supports the connection of only one device at any given moment Copyright 2008 congatec AG BM45m11 29 103 R congatec the rhythm of embedded computing 5 Additional Features 5 1 Watchdog The conga BM45 is equipped with a multi stage watchdog solution that is triggered by software The COM Express Specification does not provide support for external hardware triggering of the Watchdog which means the conga BM45 does not support external hardware triggering For more information about the Watchdog feature see the BIOS setup description section 9 4 13 of this document and application note AN3_Watchdog pdf on the congatec AG website at www congatec com 5 2 Onboard Microcontroller The conga BM45 is equipped with an ATMEL Atmega168 microcontroller Thi
119. rial Digital Video B red output differential pair O PCIE SDVOB_RED D53 Multiplexed with PEG_TX 0 and PEG_TX 0 pair SDVOB_GRN D55 Serial Digital Video B green output differential pair O PCIE SDVOB_GRN D56 Multiplexed with PEG_TX 1 and PEG_TX 1 SDVOB_BLU D58 Serial Digital Video B blue output differential pair O PCIE SDVOB_BLU D59 Multiplexed with PEG_TX 2 and PEG_TX 2 SDVOB_CK D61 Serial Digital Video B clock output differential pair O PCIE SDVOB_CK D62__ Multiplexed with PEG_TX 3 and PEG_TX 3 SDVOB_INT C55 Serial Digital Video B interrupt input differential pair PCIE SDVOB_INT C56 Multiplexed with PEG_RX 1 and PEG_RX 1 SDVOC_RED D65 Serial Digital Video C red output differential pair O PCIE SDVOC_RED D66 Multiplexed with PEG_TX 4 and PEG_TX 4 SDVOC_GRN D68 Serial Digital Video C green output differential pair O PCIE SDVOC_GRN D69__ Multiplexed with PEG_TX 5 and PEG_TX 5 SDVOC_BLU D71 Serial Digital Video C blue output differential pair O PCIE SDVOC_BLU D72 Multiplexed with PEG_TX 6 and PEG_TX 6 SDVOC_CK D74 Serial Digital Video C clock output differential pair O PCIE SDVOC_CK D75__ Multiplexed with PEG_TX 7 and PEG_TX 7 SDVOC_INT C68 Serial Digital Video C interrupt input differential pair PCIE SDVOC_INT C69 __ Multiplexed with PEG_RX 5 and PEG_RX 5 SDVO_TVCLKIN C52 Serial Digital Video TVOUT synchronization clock input differential p
120. s the conga BM45 module is capable of generating its own power on reset According to the COM Express Specification PWR_OK is a 3 3V signal The conga BM45 provides support for controlling AT X style power supplies When not using an ATX power supply then the conga BM45 s pins SUS_S3 PS_ON 5V_SB and PWRBTN should be left unconnected SUS_S3 PS_ON The SUS_S3 PS_ON pin A15 on the A B connector signal is an active low output that can be used to turn on the main outputs of an ATX style power supply In order to accomplish this the signal must be inverted with an inverter transistor that is supplied by standby voltage and is located on the carrier board PWRBTN When using ATX style power supplies PWRBTN pin B12 on the A B connector is used to connect to a momentary contact active low debounced push button input while the other terminal on the push button must be connected to ground This signal is internally pulled up to 3V_SB using a 10k resistor When PWRBTNz is asserted it indicates that an operator wants to turn the power on or off The response to this signal from the system may vary as a result of modifications made in BIOS settings or by system software Power Supply Implementation Guidelines 12 volt input power is the sole operational power source for the conga BM45 The remaining necessary voltages are internally generated on Copyright 2008 congatec AG BM45m11 27 103 ia congatec the rhythm of embedded computing t
121. s been checked If this option is not selected then Windows will remain at a blue screen after a Watchdog ACPI Event that has been configured for Restart has been generated Below is a Windows screen shot showing the proper configuration Win XP 2000 Watchdog ACPI Event restart configuration Startup and Recovery System Restore Automatic Updates Remote cS System startup General Computer Name Hardware Advanced Default operating system You must be logged on as an Administrator to make most of these changes Microsoft Windows XP Professional noexecute optin ffastdete sad Performance Time to display list of operating systems 30 seconds Visual effects processor scheduling memory usage and virtual memory Time to display recovery options when needed 30 S seconds Settings To edit the startup options file manually click Edit User Profiles System Failure Desktop settings related to your logon is srr boned E SLI tices Send an administrative alert Automatically restart Startup and Recovery Write debugging information System startup system failure and debugging information r Small memory dump 64 KB Settings Small dump directory oSystemRoot Minidump Environment variables Error Reporting Copyright 2008 congatec AG BM45m11 80 103 9 4 2 9 4 2 1 9 4 2 2 last congatec the rhythm of embedded computing PCI Configuration Submenu
122. s configured as a x1 link The PCI Express interface is based on the PCI Express Specification 1 0a 4 1 8 ExpressCard The conga BM45 supports the implementation of ExpressCards which requires the dedication of one USB port and one PCI Express link for each ExpressCard used 4 1 9 Graphics Output VGA CRT The conga BM45 graphics are driven by an Intel Graphics Media Accelerator 4500MHD engine which is incorporated into the Intel GM45 chipset found on the conga BM45 This graphic engine offers significantly higher performance than previous Intel graphics engines found on other Intel chipsets Copyright 2008 congatec AG BM45m11 26 103 pY congatec the rhythm of embedded computing 4 1 10 LCD The Intel GM45 chipset found on the conga BM45 offers an integrated dual channel LVDS interface There are two LVDS transmitter channels Channel A and Channel B in the LVDS interface Channel A and Channel B consist of 4 data pairs and a clock pair each 4 1 11 TV Out TV Out support is integrated into the Intel GM45 chipset This integrated encoder converts RGB data into various analog television standards NTSC PAL and formats composite S Video and provides it via the TV Out port 4 1 12 Power Control PWR_OK Power OK from main power supply A high value indicates that the power is good Using this input is optional Through the use of an internal monitor on the 12V 5 input voltage and or the internal power supplie
123. s onboard microcontroller plays an important role for most of the congatec BIOS features It fully isolates some of the embedded features such as system monitoring or the I C bus from the x86 core architecture which results in higher embedded feature performance and more reliability even when the x86 processor is in a low power mode 5 3 Embedded BIOS The conga BM45 is equipped with congatec Embedded BIOS and has the following features ACPI Power Management e OEM Splash Screen e ACPI Battery Support e Flat Panel Auto Detection and Backlight Control e Supports Customer Specific CMOS Defaults e BIOS Setup Data Backup see section 5 3 1 e Multistage Watchdog e Exclusive PCI Interrupts e User Data Storage e Fast Mode I C Bus e Manufacturing Data and Board Information Copyright 2008 congatec AG BM45m11 30 103 lea congatec the rhythm of embedded computing 5 3 1 Simplified Overview of BIOS Setup Data Backup Is CMOS Data in RTC valid Entering Setup User changes OEM default image present Save and Exit lt F10 gt key Load OEM CMOS Defaults Load Manufacturer CMOS Defaults Store CMOS Data to RTC Halt on Errors Default BIOS Message Store CMOS Data to Flash Warning message is displayed User requests to enter setup using the lt Del gt key Is CMOS Data o Backup Image present and valid Yes Write CMOS Data Backup Image from Flash to RTC Error Message is displayed Read b
124. se the boot device to be used 9 1 2 Manufacturer Default Settings Pressing the lt End gt key repeatedly immediately after power is initiated will result in the manufacturer default settings being loaded for that boot sequence and only that boot sequence This is helpful when a previous BIOS setting is no longer desired If you want to change the BIOS settings or save the manufacturer default settings then you must enter the BIOS setup program and use the Save and Exit function This feature is enabled by default and only works with a PS 2 keyboard it is not available when using a USB keyboard See setup node in the BIOS Setup Description section 9 6 1 Security Settings 9 2 Setup Menu and Navigation The congatec BIOS setup screen is composed of the menu bar and two main frames The menu bar is shown below o gt Note Entries in the option column that are displayed in bold print indicate BIOS default values Main Advanced Boot Security Power Exit Copyright 2008 congatec AG BM45m11 76 103 i congatec the rhythm of embedded computing The left frame displays all the options that can be configured in the selected menu Grayed out options cannot be configured Only the blue options can be configured When an option is selected it is highlighted in white The right frame displays the key legend Above the key legend is an area reserved for text messages These text messages explain the options and the possible impac
125. splay handling if Quiet Boot is enabled If set to Maintain the BIOS will maintain the current display contents Maintain and graphics video mode used for POST display If set to Clear the BIOS will clear the screen and switch to VGA text mode at end of POST Automatic Boot List Disabled Retry Enabled Add On ROM Force BIOS Set display mode for Option ROM Display Mode Keep current Halt On Error Disabled Determines whether the BIOS halts and displays an error message if an error occurs If set to Enabled the BIOS waits for user input Enabled Hit DEL Message Disabled Allows Prevents the BIOS to display the Hit Del to enter Setup message Display Enabled Interrupt 19 Capture Disabled Allows Prevents the option ROMs such as network controllers from trapping the boot strap interrupt 19 Enabled PXE Boot to LAN Disabled Disable Enable PXE boot to LAN Enabled Note When set to Enabled the system has to be rebooted in order for the Intel Boot Agent device to be available in the Boot Device Menu Power Loss Control Remain Off Specifies the mode of operation if an AC power loss occurs see note below Turn On Remain Off keeps the power off until the power button is pressed Last State Turn On restores power to the computer Last State restores the previous power state before power loss occurred Note Only works with an ATX type power supply gt Note 1 The term AC power loss stands for the state when the module looses the stan
126. t Ethernet Pin Description tke PU PD Comment GBEO_MDIO A13 Gigabit Ethernet Controller 0 Media Dependent Interface Differential Pairs 0 1 2 3 The MDI can operate 1 O Analog Twisted pair GBEO_MDIO A12__ in 1000 100 and 10Mbit sec modes Some pairs are unused in some modes according to the following signals for GBEO_MDI1 A10 1000 100 10 external CEE MDS fe MDI 0 B1_DA TX TX ney eee GBEO MDI2 A6 MDI 1 B1_DB RX RX GBEO_MDI3 A3 MDI 2 B1_DC GBE0_MDI3 A2 MDI 3 B1_DD GBE0_ACT B2 Gigabit Ethernet Controller 0 activity indicator active low OD GBEO_LINK A8 Gigabit Ethernet Controller 0 link indicator active low O 3 3VSB GBEO_LINK100 A4 Gigabit Ethernet Controller 0 100Mbit sec link indicator active low OD GBEO_LINK1000 A5 Gigabit Ethernet Controller 0 1000Mbit sec link indicator active low OD GBEO_CTREF A14 Reference voltage for Carrier Board Ethernet channel 0 magnetics center tap The reference voltage is REF Reference determined by the requirements of the module PHY and may be as low as OV and as high as 3 3V The voltage on reference voltage output shall be current limited on the module In the case in which the reference is shorted conga BM45 is to ground the current shall be limited to 250mA or less 1 8V Table 5 Serial ATA Signal Descriptions Pin Description Comment SATAO_RX A19 Serial ATA channel 0 Receive Input differential p
127. ter Senigallia Via Senigallia 18 2 20161 Milano Italy Tel 39 02 64672 509 Data Modul Iberia S L c Adolfo P rez Esquivel 3 Edificio Las Americas III Oficiana 40 28230 Parque Empresarial Madrid Las Rozas Spain Tel 34 916 366 458 Data Modul Ltd UK 3 Brindley Place Birmingham B 12JB United Kingdom Tel 44 121 698 8641 Data Modul Inc USA 275 Marcus Blvd Unit K Hauppauge NY 11788 USA Tel 631 951 0800 www data modul com embedded data modul com
128. th N A VGA Graphics 00h 19h 00h Internal Onboard Gigabit LAN Controller 00h 1Ah 00h Internal UHCI Host Controller 3 00h 1Ah 07h Internal EHCI Host Controller 1 00h 1Bh 00h Internal Intel High Definition Audio Controller 00h see Note 1Ch 00h Internal PCI Express Root Port 0 00h see Note 1Ch 01h Internal PCI Express Root Port 1 00h see Note 1Ch 02h Internal PCI Express Root Port 2 00h see Note 1Ch 03h Internal PCI Express Root Port 3 00h see Note 1Ch 04h Internal PCI Express Root Port 4 00h 1Dh 00h Internal UHCI Host Controller 0 00h 1Dh Oth Internal UHCI Host Controller 1 00h 1Dh 02h Internal UHCI Host Controller 2 00h 1Dh 07h Internal EHCI Host Controller 0 00h 1Eh 00h Internal PCI to PCI Bridge 00h 1Fh 00h N A PCI to LPC Bridge 00h 1Fh 02h Internal Serial ATA Controller 0 00h 1Fh 03h Internal SMBus Host Controller 00h 1Fh 05h Internal Serial ATA Controller 1 Oth 04h xxh INTA INTD PCI Bus Slot 1 01h 05h xxh INTA INTD PCI Bus Slot 2 Oth 06h xxh INTA INTD PCI Bus Slot 3 Oth 07h xxh INTA INTD PCI Bus Slot 4 02h 00h xxh Internal PCI Express Port 0 03h see Note 00h xxh Internal PCI Express Port 1 04h see Note 00h xxh Internal PCI Express Port 2 05h see Note 00h xxh Internal PCI Express Port 3 06h see Note 00h Xxh Internal PCI Express Port 4 o gt Note The given bus numbers only apply if all PCI Express Ports are enabled in the BIOS setup If for example PCI Express Port 2 is disabled then PCI Express Port
129. the EHC functionality there is a port routing logic that executes the mixing between the two different types of host controllers EHCI and UHCI This means that when a USB device is connected the routing logic determines who owns the port If the device is not USB 2 0 compliant or if the software drivers for EHCI support are not installed then the UHCI controller owns the ports Routing Diagram a ma na nana ma na na na nann na Port 0 Port 1 Port 2 Port 3 Port 4 Port 5 Port 6 Port 7 Port 8 Port9 Port10 Port 11 Ports 8 11 Not supported on the conga BM45 Copyright 2008 congatec AG BM45m11 41 103 pY congatec the rhythm of embedded computing 6 8 Intel Active Management Technology Intel AMT 4 0 The conga BM45 supports Intel Active Management Technology 4 0 Intel AMT with both wired and wireless LAN support via a Controller Link interface from the Intel GM45 to the Intel I O Controller Hub 82801IEM ICH9M E for extended manageability functionality An Intel AMT engine integrated within the Intel GM45 chipset combines hardware and software solutions to provide e Remote Asset Management e Remote Diagnosis and Repair e Remote Agent Presence e Wireless OOB Management e Circuit Breaker Network Isolation e Mobile Power Management Policies e 3rd Party Non Volatile Storage gt Note For more information about Intel Active Management Technology Intel AMT 4 0 visit the Intel website Copyright 200
130. ting Table 6 PCI Express Signal Descriptions general purpose Signal Pin Description 1 0 PU PD Comment PCIE_RX0 B68 PCI Express channel 0 Receive Input differential pair PCIE Supports PCI Express Base Specification Revision 1 1 PCIE_RX0 B69 PCIE_TX0 A68 PCI Express channel 0 Transmit Output differential pair O PCIE Supports PCI Express Base Specification Revision 1 1 PCIE_TX0 A69 PCIE_RX1 B64 PCI Express channel 1 Receive Input differential pair PCIE Supports PCI Express Base Specification Revision 1 1 PCIE_RX1 B65 PCIE_TX1 A64 PCI Express channel 1 Transmit Output differential pair O PCIE Supports PCI Express Base Specification Revision 1 1 PCIE_TX1 A65 PCIE_RX2 B61 PCI Express channel 2 Receive Input differential pair PCIE Supports PCI Express Base Specification Revision 1 1 PCIE_RX2 B62 PCIE_TX2 A61 PCI Express channel 2 Transmit Output differential pair O PCIE Supports PCI Express Base Specification Revision 1 1 PCIE_TX2 A62 PCIE_RX3 B58 PCI Express channel 3 Receive Input differential pair PCIE Supports PCI Express Base Specification Revision 1 1 PCIE_RX3 B59 PCIE_TX3 A58 PCI Express channel 3 Transmit Output differential pair O PCIE Supports PCI Express Base Specification Revision 1 1 PCIE_TX3 A59 PCIE_RX4 B55 PCI Express channel 4 Receive Input differential pair PCIE Supports PCI Express Base Specification Revision 1 1 PCIE_RX4
131. ts when changing the selected option in the left frame The setup program uses a key based navigation system Most of the keys can be used at any time while in setup The table below explains the supported keys Key Description lt Left Right Select a setup menu e g Main Boot Exit t Up Down Select a setup item or sub menu Plus Minus Change the field value of a particular setup item Tab Select setup fields e g in date and time F1 Display General Help screen F2 F3 Change Colors of setup screen F7 Discard Changes F9 Load optimal default settings F10 Save changes and exit setup ESC Discard changes and exit setup ENTER Display options of a particular setup item or enter submenu 9 3 Main Setup Screen When you first enter the BIOS setup you will enter the Main setup screen You can always return to the Main setup screen by selecting the Main tab The Main screen reports BIOS processor memory and board information and is for configuring the system date and time Feature Options Description System Time Hour Minute Second Specifies the current system time Note The time is in 24 hour format System Date Day of week month day year Specifies the current system date Note The date is in month day year format BIOS ID no option Displays the BIOS ID Processor no option Displays the processor type CPU Frequency no option Displays CPU frequency System
132. udio codec or no codec is connected but the signals are temporarily configured as AC 97 AC_SDOUT A33_ Intel High Definition Audio Serial Data Out This signal is the serial TDM data O 3 3V AC 97 codecs are not supported output to the codec s This serial output is double pumped for a bit rate of 48 AC_SDOUT is a boot strap signal see note Mb s for Intel High Definition Audio below AC_SDIN 2 0 B28 Intel High Definition Audio Serial Data In 0 These signals are serial TDM 13 3V AC 97 codecs are not supported B30 data inputs from the three codecs The serial input is single pumped for a bit rate of 24 Mb s for Intel High Definition Audio p gt Note Some signals have special functionality during the reset process They may bootstrap some basic important functions of the module AC_SYNC and AC_SDOUT can be used to switch PCI Express channels 0 3 between x1 and x4 mode If both signals are each pulled up using 1KQ resistors to 3 3V at the rising edge of PWROK then x4 mode is enabled for channels 0 3 x1 mode is used by default if these resistors are not populated Channel 4 remains configured as x1 mode regardless of the configuration of channels 0 3 For more information refer to section 7 5 of this user s guide Copyright 2008 congatec AG BM45m11 44 103 les congatec the rhythm of embedded computing Table 4 Gigabit Ethernet Signal Descriptions Gigabi
133. ult if these resistors are not populated Channel 4 remains configured as x1 mode regardless of the configuration of channels 0 3 SDVO_I2C_DAT DDPB_CTRLDATA can be pulled up using 2 2KQ resistor to 3 3V in order to set up SDVO HDMI DisplayPort peripherals PEG_LANE_RV can be pulled low to activate lane reversal mode DDPC_CTRLDATA can be pulled up using 2 2KQ resistor to 3 3V in order to set up HDMI DisplayPort gt Note For more information about implementing a HDMI or DisplayPort interface on COM Express carrier boards refer to application note AN17_ HDMI_DP_Implementation pdf which can be found on the congatec website Copyright 2008 congatec AG BM45m11 67 103 bad congatec the rhythm of embedded computing 8 System Resources 8 1 System Memory Map Table 29 Memory Map Address Range decimal Address Range hex Description TOM 384kB TOM N A 384kB ACPI reclaim MPS and NVS area TOM 128MB 384kB TOM 384kB N A 32MB up to 128MB VGA frame buffer 1024kB TOM 128MB 384kB 100000 N A N A Extended memory 869kB 1024kB E0000 FFFFF 128kB Runtime BIOS 832kB 869kB D0000 DFFFF 64kB Upper memory 640kB 832kB A0000 CFFFF 192kB Video memory and BIOS 639kB 640kB 9FC00 9FFFF 1kB Extended BIOS data 0 639kB 00000 9FC00 512kB Conventional memory gt Note T O M Top of memory max DRAM installed Only if ACPI Aware O
134. urity Mode feature commands defined in the ATA specification This functionality allows users to protect data using drive level passwords The passwords are kept within the drive so data is protected even if the drive is moved to another computer system The BIOS provides the ability to lock and unlock drives using the security password A locked drive will be detected by the system but no data can be accessed Accessing data on a locked drive requires the proper password to unlock the disk The BIOS enables users to enable disable hard disk security for each hard drive in setup A master password is available if the user can not remember the user password Both passwords can be set independently however the drive will only lock if a user password is installed The max length of the passwords is 32 bytes During POST each hard drive is checked for security mode feature support In case the drive supports the feature and it is locked the BIOS prompts the user for the user password If the user does not enter the correct user password within five attempts the user is notified that the drive is locked and POST continues as normal If the user enters the correct password the drive is unlocked until the next reboot In order to ensure that the ATA security features are not compromised by viruses or malicious programs when the drive is typically unlocked the BIOS disables the ATA security features at the end of POST to preve
135. word User Access Level No Access Sets BIOS setup utility access rights for user level View Only Limited Full Access Boot Selection Popup Menu Anybody Select who can access the boot selection popup menu when setup passwords are installed Access Setup User Setup Supervisor No Access Change User Password enter password Specifies the user password Password Check Setup Setup Check password while invoking setup Always Always Check password also on each boot Boot Sector Virus Protection Disabled Select Enabled to enable boot sector protection Enabled The BIOS displays a warning when any program or virus issues a Disk Format command or attempts to write to the boot sector of the hard disk drive If enabled the following appears when a write is attempted to the boot sector You may have to type N several times to prevent the boot sector write Boot Sector Write Possible VIRUS Continue Y N The following appears after any attempt to format any cylinder head or sector of any hard disk drive via the BIOS INT13 hard disk drive service Format Possible VIRUS Continue Y N HDD Security Freeze Lock Disabled If enabled the BIOS will send the Security Freeze Lock command to each attached hard disk supporting the security Enabled command set This will prevent anybody from setting or changing a hard disk password after POST Ask HDD Password on Every No Select whether the hard disk unlock password must be entered on each boot Only applicab

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