Texas Instruments SLOU106 User's Manual
Contents
1. THS4140 EVM Figures are not drawn to scale Using the THS4140 EVM 2 3 2 4 Testing the EVM Setup 1 Turn on the dc power supply 2 Verify that both the 5 V current meter 1 and the 5 V current meter 2 currents are below 20 mA Caution Currents above 20 mA indicate a possible short or a wrong resistor value on the PCB Do not proceed until this situation is corrected 3 Turn on the function generator 4 Verify the oscilloscope is showing two 1 MHz sine waves with amplitude of 0 125 V The dc offset of the signal must be below 50 mV Note Vout and Vour should be 180 degrees out of phase The internal attenuation of the scope should be set to 6 dB for a gain of one Otherwise the output will show a gain of one half due to the voltage division occurring at the 50 O termination resistor Use Figure 3 as a reference for the input and output signals Figure 2 3 Driver 1 Output Signal Tek 250MS s 1933 Acqs EDEMENRONENE pepe T E Ie e EN mun NM A 230mv C3 Pk Pk 920mVv C2 Pk Pk 227mV SUN n TGS eee eee ee ree Lam 300mV 17 17 20 2 4 Using the THS4140 EVM 2 5 Power Down Verification This EVM is used to evaluate devices with and without the shutdown function Therefore this step is only applicable if the device has a shutdown function Please see the data sheet for power down verification 1 Insertthe jumper JU1 to power down the device The current consumpt2. and footprints that enable the user to experiment test and verify various operational amplifier circuit implementations The board measures 4 5 inches in length by 2 5 inches in width Initially this board is populated for a single ended input amplifier see Figure 1 2 for populated circuits The outputs Vo and Vo can be tested differentially or single ended Gain is set to one and can be changed by changing the ratios of the feedback and gain resistors see the device datasheet for recommended resistor values The user may populate various footprints on the evaluation module board to verify filter designs or perform other experiments Each input is terminated with a 50 O resistor to provide correct line impedance matching 1 2 Evaluation Module Features THS4140 high speed operational amplifier EVM features include B Voltage supply operation range 5 V to 15 V operation see the device data sheet B Single and differential input and output capability E Nominal 50 Q input and output termination resistors They can be configured according to the application requirement B VocM direct input control see schematic and the device data sheet B Vocm pin can be controlled via transformer center tap see schematic B Shutdown pin control JU1 if applicable to the device see the device data sheet E Input and output transformer footprints for changing single ended signals to differential signals B Footprint for high precision bala
3. coaxial cable can appear to be a reactive load to the amplifier By terminating a transmission line with its characteristic impedance the amplifiers load then appears to be purely resistive and reflections are absorbed at each end of the line Another advantage of using an output termination resistor is that capacitive loads are isolated from the amplifier output This isolation helps minimize the reduction in the amplifier s phase margin and improves the amplifier stability resulting in reduced peaking and settling times General High Speed Amplifier Design Considerations
4. is written to provide information about the evaluation module of the fully differential amplifier under test Additionally this document provides a good example of PCB design for high speed applications The user should keep in mind the following points The design of the high speed amplifier PCB is an elegant and sensitive process Therefore the user must approach the PCB design with care and awareness It is recommend that the user initially review the datasheet of the device under test It is also helpful to review the schematic and layout of the THS4140 EVM to determine the design techniques used in the evaluation board In addition it is recommended that the user review the application note Fully Differential Amplifiers literature number SLOA054B to gain more insight about differential amplifiers This application note reviews the differential amplifiers and presents calculations for various filters How to Use This Manual Chapter 1 Introduction and Description I Chapter 2 Using the THS4140 EVM Chapter 3 General High Speed Amplifier Design Considerations Head This First iii Related Documentation From Texas Instruments Information About Cautions and Warnings This book may contain cautions and warnings This is an example of a caution statement A caution statement describes a situation that could potentially damage your software or equipment This is an example of a warning statement A warning statem
5. 1B R3B 5V R10 NNN AA e TW C2 R7 RX2 RIA R3A RX7 Vcc nM CIA RZA Introduction and Description 1 7 THS4140 EVM Layout Figure 1 7 Top Layer Silkscreen TEXAS INSTRUMENTS THS4140 EVM REV B d ens Q as L egx ZJ C4 Cab e 1 JU3RL6 c2 IP Ti INPUT TRANSFORMER e 2 VIN INSERT JU2 TO SET T1 MIDPOINT UCC TEXAS INSTRUMENTS THS4140 EVM REV_B PE A PO e Ta gt zg A T s RPUL R3b THS4140 EVM Layout INSERT JU1 FOR DEVICE POWER DOWN OPEN JUL FOR DEVICE POWER UP TPt Fa POWER DOWN TEST POINT kssb A rh ae d TP2 TP2 Rej Nim UOUT TEST POINT er Pige T2 OUTPUT TRANSF ORMER CZ EE JU4 USE AS DIFF TEST POINT TP3 VOUT TEST POINT INSERT JU1 FOR DEVICE POWER DOWN TPl POWER DOWN TEST POINT TP2 UOUT TEST POINT T2 OUTPUT TRANSFORMER Ti INPUT TRANSFORMER JU4 USE AS DIFF TEST POINT TP3 VOUT TEST POINT J4 INSERT JU2 TO SET T1 MIDPOINT VOUT UOCM DIRECT INPUT Introduction and Description 1 7 THS4140 EVM Layout Figure 1 9 Internal Plane Layer 2 Ground Plane Figure 1 10 Internal Plane Layer 3 Voc Plane 1 8 Introduction and Description THS4140 EVM Layout Figure 1 11 Bottom Layer 4 Ground and Signal Introduction and Description 1 9 Introduction and Description Chapter
6. 2 Using the THS4140 EVM It is recommended that the user perform the following exercises to learn the usage of the EVM This practice helps the user learn about the various terminals on the EVM and their function In addition it suggests the components and equipment needed to operate the EVM Topic Page 2 1 Required Equipment 7 534 094 0 e prete a nee ayh eee 2 2 2 2 Power Supply Setup eem ELSE 2 2 23 Inputrandi OutpulSetup AREA 2 3 2 4 Testing the EVM Setup 7 5 ERE e 2 4 2 5 M POWenDOWNVerificationk ee a 2 5 2 6 Measuring the Frequency Response seseeeeeeese 2 5 2 f Butterworth Filter 7 emeret n rere sine e say ala stare 2 6 2 8 THS4140 EVM Bill of Materials seeeueeee 2 7 2 1 2 1 Required Equipment d d d d One double output dc power supply 5 V 100 mA output minimum Two dc current meters with resolution to 1 mA and capable of the maximum current the dc power supply can supply If available set the current limit on the dc power supply to 100 mA Note Some power supplies incorporate current meters which may be applicable to this test 50 Q source impedance function generator 1 MHz 10 Vpp sine wave Oscilloscope 50 MHz bandwidth minimum 50 Q input impedance 2 2 Power Supply Setup 1 2 Set the dc power supply to 5 V Make sure the dc power supply is turned off before proceeding to the next step Connect the positive
7. 35 TEXAS INSTRUMENTS THS4140 EVM User s Guide for High Speed Fully Differential Amplifier User s Guide February 2001 Mixed Signal Products SLOU106 IMPORTANT NOTICE Texas Instruments and its subsidiaries Tl reserve the right to make changes to their products or to discontinue any product or service without notice and advise customers to obtain the latest version of relevant information to verify before placing orders that information being relied on is current and complete All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment including those pertaining to warranty patent infringement and limitation of liability TI warrants performance of its products to the specifications applicable at the time of sale in accordance with T s standard warranty Testing and other quality control techniques are utilized to the extent Tl deems necessary to support this warranty Specific testing of all parameters of each device is not necessarily performed except those mandated by government requirements Customers are responsible for their applications using Tl components In order to minimize risks associated with the customer s applications adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards Tl assumes no liability for applications assistance or customer product design TI does not warrant or represent that any
8. THS4140 EVM Bill of Materials Table 2 1 THS4140 EVM Bill of Materials continued R10 RX3 Resistor 49 9 Q 1 1206 AE P49 9FTR ND RX6 R36aA High precision resistor 2 R36aB R36bA R36bB RPU1 Open o805 2 RPU2 RXO Resistor 24 9 Q 1 0805 Digi Key P24 9CTR ND TP1 TP2 Test point 2 TP 025 3 Farnell 240 345 TP3 TP4 TP5 Test point 2 TP 025 4 Farnell 240 333 TP6 TP7 u1 IC THS4140 Texas Instruments THS4140CDGN DGN 2 8 Using the THS4140 EVM Chapter 3 General High Speed Amplifier Design Considerations The THS4140 EVM layout has been designed for use with high speed signals and can be used as an example when designing PCBs incorporating the THS4140 Careful attention has been given to component selection grounding power supply bypassing and signal path layout Disregarding these basic design considerations could result in less than optimum performance of the THS4140 high speed operational amplifier Surface mount components were selected because of the extremely low lead inductance associated with this technology This helps minimize both stray inductance and capacitance Also because surface mount components are physically small the layout can be very compact Tantalum power supply bypass capacitors at the power input pads help supply currents needed for rapid large signal changes at the amplifier output The 0 1 uF power supply bypass capacitors were placed as close as possible to t
9. aa aaa aa anna wici 1 6 Top Layer Silkscreen uuuuaaaaaaaaaaaaa nawa nent teens 1 7 Top Layer 1 SIgnalS wa cese een nee ree dO ened de Rr e Ree 1 7 Internal Plane Layer 2 Ground Plane isusssssessssseeee 1 8 Internal Plane Layer 3 VCC Plane ssssssssssses ee 1 8 Bottom Layer 4 Ground and Signal Luuaaaaaaaa aa wawa zana wawa aaa ania iii 1 9 Power Supply Connection uuuuaaaaeaaaaa wawa waza aa wawa n 2 2 Signal Connections uuaaaaaaaaaa wawa teen E a eens 2 3 Driver 1 Output Signal sti se sri degram anaa eie ma die PA iiaa E D da hh 2 4 Multiple Feedback Filter Circuit 0 eee aaea 2 6 Galri vs PRASE ya conire roi ioa toraa i a oa a a ae Wr a e a e E 2 7 Tables 2 1 vi THS4140 EVM Bill of Materials sssssssseee RR II 2 7 Chapter 1 Introduction and Description The Texas Instruments THS4140 evaluation module EVM helps designers evaluate the performance of the THS4140 operational amplifier Also this EVM is a good example of high speed PCB design This document details the Texas Instruments THS4140 high speed operational amplifier evaluation module EVM It includes a list of EVM features a brief description of the module illustrated with a series of schematic diagrams EVM specifications details on connecting and using the EVM and a discussion of high speed amplifier design considerations This EVM enables the user to implement various circuit
10. ent describes a situation that could potentially cause harm to you The information in a caution or a warning is provided for your protection Please read each caution and warning carefully Related Documentation From Texas Instruments THS4140 data sheet literature number SLOS320 THS4140 application report literature number SLOA054A Fully Differential Amplifiers FCC Warning This equipment is intended for use in a laboratory test environment only It generates uses and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules which are designed to provide reasonable protection against radio frequency interference Operation of this equipment in other environments may cause interference with radio communications in which case the user at his own expense will be required to take whatever measures may be required to correct this interference Trademarks PowerPAD is a trademark of Texas Instruments Contents 1 Introduction and Description ssseeeeeeee III 1 1 Ti Description REPETIT 1 2 1 2 Evaluation Module Features uaaaaaaaaaaaa aaa zana aaa aaa en 1 2 1 38 THS4140 EVM Specifications uuaaaaaaaaaa wawa teens 1 3 1 4 Schematic of the Populated Circuit Default Configuration 242211 1 1 3 1 5 THS4140 EVM Schematic uuaaaaaaaaaaaa wawa aaa nn 1 4 1 6 Additional Sa
11. ents see the complete EVM schematic in Figure 1 2 Figure 2 4 Multiple Feedback Filter Circuit 1 dBm ac 787 Q 100 pF Voc 787 Q 732 Q 5V 100 Q e NNN e 2220F s an ANN 787 Q 5V 1000 I L VEE 100 pF 787 Q 2 6 Using the THS4140 EVM THS4140 EVM Bill of Materials Figure 2 5 Gain vs Phase Butterworth filter with multiple feedback frequency response 10 5 5 786 MHz 8 c LMARKE 1 eger i Phase 4 m 2 o I c 0 E O 2 Gain m 4 8 E VIN 1 dBm RL 200 Q Diff 10 Vcc 2115 0 1 1 10 100 500 f Frequency MHz 2 8 THS4140 EVM Bill of Materials Table 2 1 THS4140 EVM Bill of Materials C1 C4 Capacitor 0 1 uF ceramic 0805 4 Murata GRM40 X7R104K25 C5 C6 C7 C8 Capacitor 6 8 uF 35 V 20 7343 2 Sprague 293D685X9035D2T tantalum SM C1A C1B Open 0805 5 C2 C3A C3B J1 J2 3 SMT PCB MT SMA jack Amphenol 901 144 8RFX J4 J6 J7 J8 Banana jack 4 Newark 35F865 J9 JU1 JU2 2 pos jumper header 0 1 ctrs 2 pos 4 JUS JU4 0 025 sq pins jump JU1 JU2 Shorting jumpers header 0 1 2 ctrs 0 025 sq pins L1 L2 Inductor 0 22 uH SM 0805 Digi Key PCD1176CT ND Ria Rib Resistor 0 Q 1 0805 5 Digi Key PO 0ACT ND RX1 RX4 RX5 R2a R2b Open 0805 11 R5 R12 R13 R14 R15 RX2 RX7 RX8 RX9 Using the THS4140 EVM 2 7
12. he IC power input pins in order to minimize the return path impedance This improves high frequency bypassing and reduces harmonic distortion A proper ground plane on both sides of the PCB should be used with high speed circuit design This provides low inductive ground connections for return current paths In the area of the amplifier input pins however the ground plane should be removed to minimize stray capacitance and reduce ground plane noise coupling into these pins This is especially important for the inverting pin while the amplifier is operating in the noninverting mode Because the voltage at this pin swings directly with the noninverting input voltage any stray capacitance would allow currents to flow into the ground plane This could cause possible gain error and or oscillation Capacitance variations at the amplifier input pin of greater than 1 pF can significantly affect the response of the amplifier In general it is best to keep signal lines as short and as straight as possible Incorporation of microstrip or stripline techniques is also recommended when signal lines are greater than 1 inch in length These traces must be designed with a characteristic impedance of either 50 Q or 75 Q as required by the application Such a signal line must also be properly terminated with an appropriate resistor 3 1 3 2 Finally proper termination of all inputs and outputs must be incorporated into the layout Unterminated lines such as
13. ion dc current meters should drop to less than 1 5 mA Remember to dis count the current flow through the 10 kQ pullup resistor on the EVM when calculating the device current consumption in the shutdown mode 2 Turn off the power supply and disconnect the wiring 3 Turn off the function generator and disconnect the wiring 4 Basic operation of the operational amplifier and its EVM is complete 2 6 Measuring the Frequency Response This EVM is designed to easily interface with network analyzers Jumpers J3 and J4 facilitate the use and insertion of the differential probes at the input and output nodes It is important to consider the following steps to ensure optimal performance in terms of bandwidth phase margin gain and peaking 1 Connect the power supply according to the power supply set up section 2 2 2 Use proper load values Loads directly effect the performance of the differential operational amplifier the suggested value is 200 Q differentially 100 Q on each output node Caution Incorrect connections cause excessive current flow and may damage the device 3 Place the GND connection of the probe as close as possible to the output nodes Use the GND holes on the EVM The GND holes create a shorter route to the GND plane and output nodes 4 Place the probe at the input nodes set the power level of the network analyzer to the proper level information in the data sheet typically is produced at 20 dBm po
14. l in fully differential out signal path See the Texas Instruments February 2001 Analog Applications Journal for the information on the termination resistors Figure 1 4 Fully Differential In Fully Differential Out Utilizing Transformer R6b C4 lt eL V rs 502 cc Source RS T1 R1B Rs3b R4b R14 T2 R10 WAN ANN e GO zm EE AC R9 RIA R3a 9 R4a R15 R6 G Cc 2RC6 Vocm GND R6a ANN Note Utilizing the input and output transformers to create a fully differential signal input differential or single output and isolate the amplifier from the rest of the front end and back end circuits Introduction and Description 1 5 Additional Sample Schematics Figure 1 5 VICR Level Shifter R6B 402 Q RPU1 Voc RX3 C4 49 9 Q a L 50Q GC Source RX1 Rib R3b R4b Rx4 R10 e e e VIN 02 0Q 3742 02 02 4992 AC Rx0 R3a R4a Rx5 Rx6 2490 3740 e 02 02 4990 I L gel cf Voom Ee RPU2 R6a 402 Q Note See the Application section of the data sheet for the THS4140 for more information Figure 1 6 Butterworth Filter With Multiple Feedback Shifting the VICR within the specified range in the data sheet via RPU1 and RPU2 ifthe VICR is out of the specified range Note 1 6 Butterworth filter implemented with multiple feedback architecture R2B 1B RX3 ae e n 5 IN Voc RX1 R
15. license either express or implied is granted under any patent right copyright mask work right or other intellectual property right of TI covering or relating to any combination machine or process in which such products or services might be or are used TI s publication of information regarding any third party s products or services does not constitute TI s approval license warranty or endorsement thereof Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties conditions limitations and notices Representation or reproduction of this information with alteration voids all warranties provided for an associated TI product or Service is an unfair and deceptive business practice and TI is not responsible nor liable for any such use Resale of TI s products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service is an unfair and deceptive business practice and TI is not responsible nor liable for any such use Also see Standard Terms and Conditions of Sale for Semiconductor Products www ti com sc docs stdterms htm Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2001 Texas Instruments Incorporated About This Manual Preface This manual
16. mple Schematics uuuaaaaaaaaaaaaa aaa teens 1 5 1 7 THS4140 EVM Layout Luaaaaaawa wawa wa hme 1 7 2 Using the THS4140EVM eeeeeeeeeen Rn n nnnm n nmn 2 1 2 1 Required Equipment arrai arraste r EERIE EENEN EErEE EE enne 2 2 2 2 Power Supply Setup 2 eode esii wesi esed Gosi oda ne eee ai 2 2 2 3 Input and Output Setup ti sa gadai da a nania D aED ASE DA AEE 2 3 2 4 Testing the EVM Setup auaaaaa aaa aaa anawa aaa hn 2 4 2 5 Power Down Verification uuaaaaaaaaaaa aaa aaa nana e 2 5 2 6 Measuring the Frequency Response ssssssssssss seh 2 5 2 7 Butterworth Filler uuuuuaaaaaaaaaaa wawa aa aannkkaa i iA 2 6 2 8 THS4140EVMBillof Materials uuaaaaaaaaaaaaa wawa RII 2 7 3 General High Speed Amplifier Design Considerations 42 111 11 3 1 Figures Ld to dott ROD PN PP POND a a mL mL mi a a Lg d od ot ot oto FRWONMDH HH OO NO OI c1 Schematic of the Populated Circuit on the EVM Default Configuration 1 3 ScliematiC srera aska nishan efe pee RR were AG EE REGA A ERES UE Rea REA KE 1 4 Fully Differential In Fully Differential Out Without Transformer 1 5 Fully Differential In Fully Differential Out Utilizing Transformer 1 1 5 VICR Level Shifter uuuuauaaaaaaaaa wawa aa nana sehr 1 6 Butterworth Filter With Multiple Feedback uuuuaaaaaaaaa aa
17. nced feedback and gain resistors 0 0196 or better B Footprints for low pass filter implementation see application note SLOA054A B Footprints for antialiasing filter implementation see application note SLOA054A B Differential probe terminals on input and output nodes for differential probe insertion B Various GND and signal test points on the PCB Circuit schematic printed on the back of the EVM A good example of high speed amplifier PCB design and layout Introduction and Description THS4140 EVM Specifications 1 3 THS4140 EVM Specifications Supply voltage range Vcc 5V to 15 V see the device data sheet Supply current IGG 62 eee eee eee eee eee see the device data sheet Output drive lo Voc s 15 sess see the device data sheet For complete THS4140 amplifier IC specifications parameter measurement information and additional application information see the THS4140 data sheet TI literature number SLOS320 1 4 Schematic of the Populated Circuit Default Configuration For verification of jumper locations and other bypass components see the complete EVM schematic in Figure 1 2 Figure 1 1 Schematic of the Populated Circuit on the EVM Default Configuration R6B MN 402 Q RX3 L C4 49 9 Q L 50Q rad Source RX1 Rib R3b R4b yy4 Rx4 R10 T NN te Vin LOQ 00 3742 02 02 49 99 AC 2 Ria R3a R4a Rx5 Rx6 JU3 0Q 3742 02 0Q 49 9 QT L R
18. s to clarify the available configurations presented by the schematic of the EVM In addition the schematic of the default circuit has been added to depict the components mounted on the EVM when it is received by the customer This configuration correlates to the single input differential output signal Other sample circuits are presented to show how the user can implement other circuit configurations such as differential input differential output signal transformer utilization on the input and output terminals VICR level shifter and Butterworth filter with multiple feedback The user may be able to create and implement circuit configurations in addition to those presented in this document using the THS4140 EVM Topic Page isl MEDescriptionm CERERI MIU 1 2 1 2 Evaluation Module Features eese 1 2 1 3 THS4140 EVM Specification cece eee eee eee eee 1 3 1 4 Schematic of the Populated Circuit Default Configuration 1 3 15 THS4140 EVM Schematie AAAA 1 4 1 6 Additional Sample Schematics sseeeseeeees 1 5 1 7 THS4140 EVM Layout earannan I EE A ES 1 7 Description 1 1 Description The THS4140 EVM is a good example of PCB design and layout for high speed operational amplifier applications It is a complete circuit for the high speed operational amplifier The EVM is made of the THS4140 high speed operational amplifier a number of passive components and various features
19. terminal of the power supply to the positive terminal of the current meter number 1 Connect the negative terminal of the current meter number 1 to the Voc of the EVM J7 Connect the common ground terminal of the power supply to the ground GND on the EVM J9 Connect the negative terminal of the power supply to the negative terminal of the second current meter Connectthe positive terminal ofthe current meter number 2 to the Vcc of the EVM J8 Figure 2 1 Power Supply Connection CURRENT CURRENT METER 2 METER 1 2 2 EVM THS4140 Figures are not drawn to scale Using the THS4140 EVM 2 3 Input and Output Setup Ensure that JUS JU4 and JU1 are not installed open circuit Set the function generator to generate a 1 MHz 0 5 V 1 Vpp sine wave with no dc offset Turn off the function generator before proceeding to the next step Using a BNC to SMA cable connect the function generator to J1 Vj on the EVM Using a BNC to SMA cable connect the oscilloscope to J3 Vo on the EVM Using a BNC to SMA cable connect the oscilloscope to J4 Vo on the EVM Set the oscilloscope to 0 5 V division and a time base of 0 2 us division Note The oscilloscope must be set to use a 50 Q input impedance for proper results Figure 2 2 Signal Connections FUNCTION GENERATOR 1 MHz 1 Vpp 0 V Offset 50 Q Source Impedance OSCILLOSCOPE 50 Q Impedance
20. wer level and calibrate the network analyzer F7 1 Note If a differential probe is used verify that resistors R1a R1b R4b and R4a are in place The resistors are 0 O values providing the path to the differential probe terminals a 5 Place the probe at the output nodes if a differential probe is used insert the probe into the provided jumper and measure the frequency response Using the THS4140 EVM 2 5 Butterworth Filter 71 Note Transformers are used to change the single ended signals to differential signal or vice versa On this EVM they can be populated according to the application or the experiment The Voc pin of the device may be connected to the center tap of the transformer or maybe set via an external source such as Vref Of a data converter If the Vocm pin is not connected to an external source it will be set at the center point of the power supply For example if 5 sources are used the VocM level will be set to zero LLLLLLL 2 7 Butterworth Filter An example of a Butterworth filter implemented with multiple feedback archi tecture is provided The following circuit is implemented on the EVM board The following figures represent the circuit configuration and the component values The corner frequency of the filter C3dB is set at 1 MHz For verification of jumper locations and other bypass compon
21. x0 C17 Vcc 7106 24 9 0 L Vocm L m R6a 402 Q NOTE Default populated footprints on the EVM from the input nodes to the output terminals Gain 1 Introduction and Description 1 3 THS4140 EVM Schematic 1 5 THS4140 EVM Schematic Figure 1 2 Schematic NN LXH LNOA T eor 9xu 4nO tl g ey PY FII QN9 QNO QNO ONO dl 9dl Sdl pdl an vel gei ONO GD NN dn8 9 T ran 85 enr NN H amp j ap lt 99 Hn zZ 0 WOOA tet Gar ciu A t I S o wel anvo E d 19 s NN nN veo vo La an v NIA enr 0 CM 4n ro NN 90 deo TL nN Tl tar 6X3 B NIA edly i Uum 9 tdl exu Me abu 4 6 6v XOL A LIY AN alo me 79 SF NN NN aggcu vagey GL gp C00 as M H zz gza Introduction and Description 1 4 Additional Sample Schematics 1 6 Additional Sample Schematics For verification of jumper locations and other bypass components see the complete EVM schematic in Figure 1 2 Figure 1 3 Fully Differential In Fully Differential Out Without Transformer R3B R6b G4 Voc e 50Q RX1 Rib Source 00 00 R4b Rx4 R10 VIN NNV e AC R16 Termination 02 02 PIBBIBIOT R4a Rx5 Rx6 e RX2 Ria e 02 02 00 02 E C1 Voc C6 VocM L R3a R6a WN Note Fully differentia
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