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User Manual Oct. 2011 PCI

1. Trigger methods B Software trigger B Pacertrigger 16 bit programmable timer counter B External trigger Pre trigger Post trigger external Pacer trigger Pacer or software trigger External trigger Start End Start End Normal trigger mode Post trigger mode extemal trigger External trigger ELLE cr i a z External pacer trigger mode Pre trigger mode Figure 1 2 Trigger methods of PCI 1002 series PCI 1002 Series User Manual Ver 2 8 Oct 2011 PMH 015 28 DEM 1 3 5 Interrupt Channel B Interrupt INTA Automatically assigned by PCI initiator Enable Disable Via PCI control register and add on control register B Interrupt source Selected by on board control register 1 A D conversion interrupt Pacer 0 interrupt Timer 0 Pacer 1 interrupt Timer 1 ro de External interrupt End of Conversion i Falling edge of Pacer 0 4 Falling edge of Falling edge of Pacer 1 External trigger External Pacer 1 __ Trigger Figure 1 3 Programmable interrupt source 1 3 6 Programmable Timer Counter Type 82C54 8 programmable timer counter Timers Timer O for Pacer triggers and interrupts Timer 1 for External trigger and interrupt Timer 2 for software machine independent timer 1 4 Applications Signal analysis FFT frequency analysis Transient analysis Speech analysis Temperature monitor Vibration analysis Energy management Other industrial an
2. Demo Programs for Windows Please note that none of the demo programs will work normally if the DLL driver has not been installed correctly During the DLL driver installation process the install shield will register the correct kernel driver to the operating system and copy the DLL driver and demo programs to the correct location depending on the driver software package you have selected Win98 Me NT 2000 and 32 bit Win XP 2003 Visa 7 After installing the driver the related demo programs development library and declaration header files for the different development environments will be available in the following folders The demo program is contained in CD NAPDOS PCI PCI 1002 DLL_OCX Demo http ftp icpdas com pub cd iocard pci napdos pci pci 1002 dll ocx demo BCB 4 gt For Borland C Builder4 P100X H gt Header files P1100xbc LIB gt Linkage library for Delphi4 gt For Delphi 4 P100X PAS gt Declaration files VB6 gt For Visual Basic 6 P100x BAS gt Declaration files VC6 gt For Visual C 6 P100x H gt Header files P100x LIB Linkage library for VC6 VB NET2005 gt For VB NET2005 P100x vb gt Declaration files CSharp2005 gt For C NET2005 P100x cs gt Declaration files A list of available demo programs is as follows ChScan Interrupt demo ChScan Pacer demo ChScan polling demo Config demo DIO demo Interrupt demo Pacer demo Polling demo PCI 1002 Series User Manual Ver 2 8
3. 12 V B CON 2 Digital input connector pin assignments SNE Pin Name Pin Name DI 0 gt DI 1 Digital input 0 Digital input 1 DI 2 DI 3 DI 4 5 q DI 5 Digital input 2 Digital input 3 DI 6 f gt DI7 Digital input 4 EN Digital input 5 DI 821 DI 9 Digitalinput6 8 Digitalinput 7 DI 10 11 WS DI 11 DI 12 13 DI 13 9 Digital input 8 Digital input 9 DI 14 7 5 DI 15 Digital input 10 Digital input 11 pis o BN hen Digital input 12 Digital input 13 Digital input 14 Digital input 15 PCB ground PCB ground PCB 5 V PCB 12 V B CONS Analog input output connector pin assignment CON3 eme Homo 1 Pin Pin Ob 2 x Al 16 0 E Diff Diff a 22 3 po mer 3 puo aioe 20 ar Ao 2 E R 0 pn ass a a as Al 4 4 b nca es 7 ld Al 21 5 Al Tr 5 A 226 Al 8 64 ieri e Al 25 9 Se naen e ur re 27 zo nz Al 12 124 135 FS A 9 ars AI8 28 AI24 Ag Al 14 14 E Al 30 14 EU M Al 31 15 Nc 18 P N C Ext Ty H4 rem AGND 36 NC olean O Note Once differential analog input is selected JP1 3 5 4 6 Pins 1 16 will be assign as the positive inputs while Pins 20 35 will act as the negative inputs of the channel 2 N C is short for Not Connected mM 3 Software Installation The PCI 1002 series can be used in DOS and Windows 98 NT 2K and 32 bit 64 bit Windows XP 2003 Vista 7 The recommended installation procedure for windows is given in Sec
4. 2 6 2 DB 8225 The DB 8225 provides an on board CJC Cold Junction Compensation circuit for thermocouple measurement and a terminal block for easy signal connection and measurement The CJC is connected to A D channel_0 The PCI 1002 series can connect CON3 directly to DB 8225 through a 37 pin D sub connector Refer to DB 8225 User Manual for details 2 6 3 DB 37 The DB 37 is a general purpose daughter board for D sub 37 pins It is designed for easy wire connection 2 6 4 DN 37 The DN 37 is a general purpose daughter board for DIN Rail Mounting It is designed for easy wire connection It is Din Rail mounted e 2 6 5 DB 16P Isolated Input Board The DB 16P is a 16 channel isolated digital input daughter board The optically isolated input of the DB 16P consists of a bi directional optocoupler with a resistor for current sensing You can use the DB 16P to sense DC signal from TTL levels up to 24 V or use the DB 16P to sense a wide range of AC signals You can use this board to isolate the computer from large common mode voltage ground loops and transient voltage spikes that often occur in industrial environments Opto lsolated DB 16P PCI 1002 HL AC or DC Signal OV to 24V 2 6 0 DB 16R Relay Board The DB 16R a 16 channel relay output board consists of 16 Form C relays for efficient load switching via programmable controls lt is connected and functionally compatible w
5. 3 1 3 3 Or refer to Quick Start Guide CD NAPDOS PCI PCI 1002 Manual QuickStart http ftp icodas com pub cd iocard pci napdos pci pci 1002 manual QuickStart 3 1 Software Installing Procedure B UniDAQ SDK driver 32 bit 64 bit Windows XP 2003 Vista 7 Insert the companion CD into the CD ROM drive and after a few seconds the installation program should start automatically If it doesnt start automatically for some reason double click the AUTO32 EXE file in the NAPDOS folder on this CD Click the item PCI Bus DAQ Card Click the item UniDAQ Click the item DLL for Windows 2000 and XP 2003 Vista 32 bit Double Click UniDAQ Win Setup x x x x xxxx exe file in the Driver folder B Windows driver Windows 98 NT 2K and 32 bit Windows XP 2003 Vista 7 Insert the companion CD into the CD ROM drive and after a few seconds the installation program should start automatically If it doesn t start automatically for some reason double click the AUTO32 EXE file in the NAPDOS folder on this CD Click the item PCI Bus DAQ Card Click the item PCI 1002L H Click the item DLL and OCX for Win95 98 2000 NT Choose the Win2K XP Win98 or WinNT folders for setup according to your PC platform and then double Click exe to install driver PCI 1002 Series User Manual Ver 2 8 Oct 2011 PMH 015 28 NN The setup program will then start the driver installation and copy the relevant
6. Layout JU c U E a lt E N lt pa 16 HZz00L X3d 12001 X3d Figure 2 2 PEX 1002 board layout CON 1 16 channel D O CON2 16 channel D I CON3 32 single ended or 16 differential analog input channels SW1 Card ID function JP1 Analog input type selection JP2 Pull high pull low jumper for D 2 2 Jumper Settings The PCI 1002 series has only one jumper JP1 is used to select the analog input type For single ended inputs users should connected Pins 1 3 and Pins 2 4 For differential inputs Pins 3 5 and Pins 4 6 should be connected 5 0 6 Single ended Differential I nputs Default Inputs B Single ended Input wiring as follows Wire the signal source to analog input channel O AIO of CON3 The detailed PCI 1002 series pin assignments information refer to section 2 8 Pin Assignments CON3 AIO analog input channel 0 gt signal source CON3 A GND analog ground lt gt signal source QOOCWOWWOWWOOOOOOOOC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 Qu 0 oignal Source Dry Battery B Differential I nput wiring as follows Wire the signal source to analog input channel O AIO of CON3 The detailed PCI 1002 series pin assignments information refer to section 2 8 Pin Assignments CON3 AI0 analog input channel 0 signal source CON3 AI O analog input channel 0 signal source signal Source Dry Battery 2 3 A D Calibr
7. Oct 2011 PMH 015 28 SS 6 2 Demo Programs for DOS The related DOS software and demos are located on the CD as below CD NAPDOS PCI PCI 1002 dos http ftp icodas com pub cd iocard pci napdos pci pci 1002 dos After installing the software the following drivers will be installed onto your hard disk B 1002 BC LARGE DEMO gt demo program B 1002 BC LARGE LIB gt lt library and driver A list of available demo programs is as follows DEMO1 Digital output DEMOJ2 Digital output and Digital input test by itself DEMO3 ADC Polling for channel 0 DEMOA ADC Polling for channel 0 1 2 3 using different gains 1 2 4 or 8 DEMOS ADC Pacer trigger DEMOS AD Calibration DEMO Find card number 6 3 Diagnostic Program 6 3 1 Power ON Plug amp Play Test The operation steps for a power on Plug amp Play test are as follows Step 1 Power off PC otep 2 Install PCI 1002 without any extra external connector otep 3 Power on PC and check the PC screen very carefully Step 4 The PC will perform a self test first Step 5 Detect the non PCI physical devices installed in the system Step 6 Show the information of these device in screen otep 7 Detect the PCI Plug amp Play devices installed in the system Show all PCI device information gt check here carefully gt There will be a PCI device with vendor IDz1234 device ID21002 PCI 1002 series If the Plug 4 Play ROM BIOS detects the PCI 1002 series
8. SetupTimer WORD wChannel WORD wCoef WORD cmd wChannel wChannel amp 0x03 cmd 0x34 wChannel lt lt 6 outpw wBaseAddr 3 4 cmd outp wBaseAddr wChannel 4 UCHAR wCoef amp Oxff outp wBaseAddr wChannel 4 UCHAR wCoef gt gt 8 void main int i WORD wBoards wRetVal wPLX WORD Drdy wAdData 0 char C cirscr P1002 Driverl nit amp wBoards printf n 1 Threr are d PCI 1002 Cards in this PC wBoards if wBoards 0 putch 0x07 putch 0x07 putch 0x07 printf 1 There are no PCI 1002 card in this PC An exit 0 printf n 2 Show the Configuration Space of all PCI 1002 for i20 i wBoards i P1002 GetConfigAddressSpace i amp wBaseAddr amp wl rq amp wPLX printf n Card d wBaseAddr x wlrq x wPLX x i wBaseAddr wl rq wPLX P1002 GetConfigAddressSpace 0 amp wBaseAddr amp wl rq amp wPLX select card O printf n 3 Card O wBaseAddr x XAn wBaseAddr SetupTimer 0 1 AdPolling have to disable timer O AdPolling 0 0 23 channel 0 gain 10 delay 23us for i 0 i lt 10 i outp wBaseAddr 0x1c 01 A D software trigger while 1 if inpw wBaseAddr 0x10 amp 0x01 2 1 check if A D ready break wAdData inpw wBaseAddr 0x30 amp OxOfff printf nRang 10V Counter d ADC channel O value 0x xH i wAdData P1002 DriverClose mM 6 Software and Demo Program 6 1
9. There are four interrupts selectable for PCI 1002 refer to section 1 3 5 Bit4 Bit3 Bit2 Descriptions No interrupt source disable all interrupts 0 0 1 Interrupt after A D completes conversion 0 1 0 Interrupt after 8254 timer 0 falls 0 1 1 Interrupt after external trigger falls 1 0 0 Interrupt after 8254 timer 1 falls No interrupt source Disable all interrupts Note Bit 2 4 of general control register is set to O after hardware reset PCI 1002 Series User Manual Ver 2 8 Oct 2011 PMH 015 28 B Trigger method selection Here s a list of our trigger options refer to section 1 3 4 Bit1 BitO Descriptions General trigger mode 8254 timer O trigger internal pacer trigger or software trigger 0 1 External clock trigger mode 1 0 Note 1 In general trigger mode both 8254 timer O and software triggers are treated as A D trigger signals In this mode 8254 timer O and software trigger should not work at the same time This means users should not generate the software trigger while 8254 timer 0 is activated 2 n external clock trigger mode external trigger input is taken as the A D trigger signal An event of the external trigger input fall falling edge will generate one A D trigger 3 The pre trigger mode is used for pre trigger method The mode is incorporated with the 8254 timer 1 First setup 8254 timer 1 properly Then set the trigger mode to pre trigger Once pre t
10. max Logic 1 2 4 V min 1 0 MHz Typical Timer Counter Channels Resolution Compatibility nput Frequency Reference Clock 3 Independent x 1 Internal pacer x 1 External pacer x 1 16 bit 5 V TTL 10 MHz max Internal 4 MHz PCI 1002 Series User Manual Ver 2 8 Oct 2011 PMH 015 28 A 1 3 2 PEX 1002L H Model Name PEX 1002L PEX 1002H Channels A D Converter Sampling Rate max FIFO Size Over voltage Protection Continuous 35 Vp p Input Impedance Software Internal programmable pacer UNJONI OST External 5 V TTL compatible Data Transfer Accuracy Zero Drift Channels Compatibility Input Voltage Logic 0 0 8 V max Logic 1 2 0 V min Response Speed Channels Compatibility Output Voltage Logic 0 0 4 V max Logic 1 2 4 V min Output Capability Response Speed Channels Resolution Compatibility Input Frequency Reference Clock Bus Type PCI Express x 1 Data Bus Card ID VO Connector Dimensions L x W x D Power Consumption Operating Temperature Storage Temperature Humidity PCI 1002 Series User Manual Ver 2 8 Oct 2011 PMH 015 28 EN 1 3 3 Analog Input Range Analog Input Range Model PCI 1002 L LU and PEX 1002L Low Gain Gain Gan 3 2 J 4 1 25 Sampling Rate 110 kS s 110 kS s 110 kS s 110 kS s Max Model PCI 1002 H HU and PEX 1002H High Gain Gain 0 01 1000 4 001 v ampingiiate 44 kS s 36 kS s 0 8 kS s Max 1 3 4 A D Trigger Methods
11. or 801 Step 10 Check channel 2 000 or 001 6 4 PIO PISO EXE for Windows The PIO _PISO exe utility is located on the CD as below and is useful for all PIO PISO series cards CD NAPDOS PC I Utility Win32 PIO_PISO http ftp icpdas com pub cd iocard pci napdos pci utility win32 pio piso After executing the utility detailed information for all PIO PISO cards that are installed in the PC will be shown as illustrated below zhow the detail information TT Dew ID SubYen Sublle AUX BoardHameiVerzoin xlz234 O 1002 xClA 2 zo 23 Ox PCI IUU Manual E W Port Address HEX Address Value Width Vin XP Service Pack 2 EE AA E 8 aM in C 16 Read BAR 0 Bust BAR 1 Device BAR 2 Address BAR 3 IRE Note The PIO PISO EXE application is valid for all PIO PISO cards The user can execute the PIO PISO EXE file to retrieve the following information B List all PIO PISO cards installed in the PC B List the resources allocated to each PIO PISO card B List the Ven ID and Dev ID details for identification of specific PIO PISO cards Refer to Sec 4 1 for more information
12. setaicudaidostenadtudeb o onte Usine vas oiie dava aso dade sesta ta stessa eu Laon busta 12 2 HARDWARE CONFIGURATION eere eene eene tree en eene tne tn etna e ense seen sees ene se esae en een esae epe eaae 13 2 1 BOARD oj 13 2 2 JUMPER SETTINGS mtasbdsteu aca 15 2 3 AID CALIBRATION c 16 2 4 CARDIO SWITCH snie i 17 2 5 SYS IEM BLOCK rcrum EA 18 2 6 DAUGHTER BOARDS dao o 19 20 DB OZI Ag EUM E E RM ME RCM UE M 19 A WU OO tuu LE MUR MU ML M UM URL MEME LR LE UE E 19 GAME B gt I ORR rn Tes 19 2b d INE 20 26 9 DB216P Isolated InDUEBOASF xac dei te b dida 20 260 O A uu MM LE EU IE I E 21 2 1 ANALOG INPUT SIGNAL CONNECTIONS cios ai aa a a aia 22 2 8 FINS SIGNI NIRS AAA E DEDE DERE RR rS 26 9 SOFTWARE INSTALLATION naa ata 28 3 1 SOFTWARE INSTALLING PROCEDURE ooocccccccccccnnccccnnnnnnnononononnnnnnnnnnnonnnnnnnnnnnnnnnnnnnnononnnnnnnnnanns 28 32 PNE DRIVER INSTALLATION a ici 29 3 3 CONFIRM THE SUCCESSFUL INSTALLATION ul teiccevailercese d suse veas UR ust Re rd nuUo da 30 4 VO REGISTER ADDRESS too D REIN adas 31 4 1 HOWTO FIND THE I O ADDRESSG ccccccccccccececececececececececececucueuneneceuececececececececueetseucucecucecececes 31 422 THE VO ADDRESS MAP xou issus tt cdi al a da 33 22 A Mu EE 34 LA SP eres ae ae ET AA OE 35 FUNCTION OPERA TT ON Si ores tue ee hn 40 NA P 40 OZ TE 0254 TIME R to
13. trigger to the A D At the end of the A D conversion it is possible to transfer the data in two ways by polling a status register and reading data when ready or by generating a hardware interrupt signal to call service routine All operating modes are selected by a control register on the PCI 1002 series Before using the A D conversion function please follow this checklist B A D data register BASE 30h gt store the A D conversion data B A D data conversion ready register BASE 10h gt Check A D conversion ready B A D gain control register BASE 14h gt Select gain B A D multiplex control register BASE 10h gt Select analog input channel B A D mode control register BASE 18h gt Select trigger mode and interrupt source A D software trigger control register BASE 1Ch JP1 to select single ended or differential input 3 Trigger logic Software Pacer or External trigger 2 Transfer logic Polling or Interrupt Here s the block diagram 16 8 to 1 Gain 12 bits Control Al Buffer gt Memory BASE 10h BASE 14h Trigger BASE 30h eus Logic BASE 1Ch Software Trigger PCI 1002 PCI 1002 Series User Manual Ver 2 8 Oct 2011 PMH 015 28 SS A D conversion flow Before using the A D converter please select either single ended or differential input JP1 The software driver supports two different modes polling and interrupt The user can control the A D conversion by polling m
14. 234 Device ID 0x1002 We provide the following necessary functions 1 P1002 Driverlnit amp wBoard This function can detect how many PCI 1002 series cards are in the system The function is implemented based on the PCI Plug amp Play mechanism 1 It will find all PCI 1002 series cards installed in this system amp save all their resources in the library B wBoard 1 only one PCI 1002 in this PC system B wBoard 2 gt there are two PCI 1002 in this PC system 2 P1002 GetConfigAddressSpace wBoardNo wBase wlrq wPLX Use this function to save resources of all PCI 1002 installed in this system Then the application program can control all functions of PCI 1002 directly wBoardNo 0 to N gt totally N 1 cards of PCI 1002 wBase gt base address of the board control word wirq gt allocated IRQ channel number of this board El m E B wPLX gt base address of PCl interface IC B Here s the sample program source code Step1 Detect all PCI 1002 cards first wRetVal P1002 Driverl nit amp wBoards printf Threr are 96d PCI 1002 Cards in this PC n wBoards Step2 Save resources of all PCI 1002 cards installed in this PC for i20 i wBoards P1002 GetConfigAddressS pace i amp wBase amp wl rq amp wPLX printf nCard 96d wBase x wlrq 96x wPLX x i wBase wl rq wPLX wConfigSpace i 0 wBaseAddress save all resource of this card wConfigSpace i 1 wl rg save all resource o
15. E 1Ch and it will initiate an A D conversion cycle This mode is very simple but controlling the sampling rate very difficult 2 Pacer Trigger Mode See section 4 2 for a block diagram for this pacer timer The sample rate of pacer is very precise 3 External Trigger Mode When a rising edge of external trigger signal is applied an A D conversion will be performed The external trigger source comes from Pin 19 of CON3 5 4 2 A D Transfer Modes PCI 1002 series supports two transfer modes 1 Polling transfer This mode can be used with all trigger modes You have to disable timer 0 before polling The software reads the A D data register from BASE 30h when READY bit of Register BASE 10h 71 2 Interrupt transfer This mode can be used with either a pacer trigger or external A hardware interrupt signal is sent to the PC when an A D conversion is completed If using interrupt transfer it is recommended to use PCI 1002 software driver PCI 1002 Series User Manual Ver 2 8 Oct 2011 PMH 015 28 6 5 4 3 Software Triggers and Polling Techniques The easiest way to control is by following these steps Send 00h to A D mode control register software trigger polling transfer Send channel number to multiplexer control register Send the gain control code value to gain control register po 9 eS oend any value to software trigger control register to generate a software trigger signal Scan the READY bit un
16. O O ai 41 9 9 THE AD TEE did 41 OE ADS ON VER SION td x EN 43 5 4 1 A D Conversion Trigger IMOUES oooooooccooooconooncnonancnananonananonnna conan anonnnnnconnn nora nnns 45 tz AD ATANGIOr MOCCS aida 45 5 43 Software Triggers and Polling Techniques sese 46 SOFTWARE AND DEMO PROGRAM eee eee eere eene neto etta sten etas tense netos senes ense ease en eese eaa eca 49 6 1 DEMO PROGRAMS FOR WINDOWS 5 etn ioe baa DD deat Dv nts Lin uide 49 6 2 DEMO PROGRAMS FOR DO Samaria o fuat ctam ai ug Spe M AER d 50 6 3 DIAGNOSTIC PROGRAM atrae lilas leales 51 601 ROWerON Fug E Flay TOS Ec tiet eitis tune ete esito iia 51 032 DIVE FUO S EIE cm CRT 51 O REED c LM cL 52 DOM TI POS uua o 52 6 4 PIO PISO EXE FOR WINDOWS os udo Uta dio e o 53 mM 1 Introduction The PCI 1002LU HU and PEX 1002LU HU cards are the new generation product that ICP DAS provides to meet RoHS compliance requirement and is designed as completely compatible with the PCI 1002L H Users can replace the PCI 1002L H by the PCI 1002LU HU and PEX 1002LU HU directly without software driver modification The PCI 1002L H supports 5 V PCI bus and PCI 1002LU HU supports 3 3 V 5 V PCI bus while the PEX 1002L H supports PCI Express bus The PCI 1002 series is a family of AD board and features low gain 110 kS s or high gain 44 kS s analog input It provides 12 bit 32 single ended analog input channels or 16 differential analog inp
17. ata register 3 S D S s PCI 1002 Series User Manual Ver 2 8 Oct 2011 PMH 015 28 mo 4 2 1 Section 1 Although there are 128 l O ports used by the on board PCI interface controller only one register is used in real applications Users should keep the other registers from being modified The PCI interrupt control register 4Ch controls the interrupt sent to your system The register is set to disable interrupt after power on or a hardware reset signal Thus no interrupt will be generated before this register is activated even if user enables the add on interrupt In order to enable the PCI interrupt always write 43h to this register Write 03h to this register if you want to disable the PCI interrupt Here s the format of the PCI interrupt control register Bit 31 Bit 7 Bite Bit5 Bit3 Bit2 Biti BitO Not used Interrupt Enable Not used Interrupt Flag Interrupt Select Bit 6 Write a 1 to enable the PCl interrupt and a O to disable PCI interrupt Bit 2 This bit is readable but can t be written A 1 indicates that Add on has generated interrupt O means that add on hasn t generated interrupt Bit 1 0 Always write 1 to these two bits e Note 1 Because PCI 1002 series supports Plug amp Play the interrupt number will be automatically assigned by your system Use the standard PCI mechanism or the software in our library to find out the interrupt number 2 f your system suppor
18. ation AD Calibration for PCI 1002 series card Step 1 Apply 10 V to channel O Step 2 Apply 0 V to channel 1 Step 3 Apply 10 V to channel 2 Step 4 Run DEMOG EXE of DOS Step 5 Adjust VR1 until channel O fff or ffe VR1 VR2 VR3 Step 6 Adjust VR2 until channel 1 800 or 801 Step 7 Adjust VR3 until channel 2 000 or 001 otep 8 Repeat Step 4 Step 5 and Step 6 until all are OK 2 4 Card ID Switch The PEX 1002L H has a Card ID switch with which users can recognize the board by the ID via software when using two or more PEX 1002L H cards in one computer The default Card ID is 0x0 For detail SW1 Card ID settings please refer to Table 2 1 Default Settings Table 2 1 Default Settings OFF gt 1 ON 0 OF 1 ce B B Hex X Card ID Switch for PEX 1002L H only 2 5 System Block E Data AID PCI PEX interrupt Trigger AID Interface controller Logic Converter Controller Dispatch L j Multiplexers controller NVRA Gain Amp Scale Adj External Trigger PCI PEX Figure 2 2 PCI 1002 series System Function Block 2 6 Daughter Boards 2 6 1 DB 1825 The DB 1825 is a daughter board designed for 32 channels AD cards such as ISO AD32 and PCI 1002 series that can easy signal connection and measurement Refer to Appendix A for DB 1825 User Manual aeri p zr eri tr m a apro iz oe n a 7 i 4 az a n olakoa alli 2 SEES BED AAA
19. card during the power on time the software driver of DOS and Windows 95 NT 2000 XP will function well later If the Plug amp Play ROM BIOS cant find the PCI 1002 series all software drivers will not function Therefore the user must make sure that the power on procedure is correct 6 3 2 Driver Plug amp Play Test Step 1 Power off PC Step 2 Install PCI 1002 without any extra external connectors Step 3 Power on PC Run DEMO7 EXE of DOS Step 4 The I O base address of all PCI 1002 installed in the system will be shown in screen Step 5 Is the total number of boards correct Step 6 Install a 20 pin flat cable into one of these PCI 1002 cards Step 7 One card s D O D I gt This is the physical card number Remember this number Step 8 Repeat the previous two steps to find the physical card number for each board PCI 1002 Series User Manual Ver 2 8 Oct 2011 PMH 015 28 S 6 3 3 DIO Test otep 1 Power off PC Step 2 Install one PCI 1002 card with a 20 pin flat cable between CON1 and CONZ2 Step 3 Power on PC Then run DEMO2 EXE of DOS Step 4 The DO and DI will show either TEST OK or TEST ERROR 6 3 4 A D Test Step 1 Power off PC Step 2 Install one PCI 1002 card Step 3 Power on PC run DEMO6 EXE of DOS Step 4 Apply 10V to channel 0 Step 5 Apply 0V to channel 1 Step 6 Apply 10V to channel 2 Step 7 Run DEMOG EXE Step 8 Check channel 0 fff or ffe Step 9 Check channel 1 800
20. d laboratory measurement and control Signal Analysis Multi I O signals Process Control Temperature PCI 1002 E RES Frequency series PROA Other Laboratory Vibration use PCI PEX Interface Single task or multitask Figure 1 4 PCI 1002 series multifunction cards 1 5 Product Check List The shipping package includes the following items B One PCI 1002 series card as follows e PCI 1002L PCI 1002H e PCI 1002LU PCI1002HU e PEX 1002L PEX 1002H B One software utility PCI CD B One Quick Start Guide It is recommended that you read the Quick Start Guide first All the necessary and essential information is given in the Quick Start Guide including B Where to get the software driver demo programs and other resources B How to install the software B How to test the card Attention If any of these items is missing or damaged contact the dealer from whom you purchased the product Please save the shipping materials and carton in case you need to ship or store the product in the future 2 Hardware Configuration 2 1 Board Lavout B PCI 1002LU HU Board Layout O A O O N T C T m lt w gL Figure 2 1 PCI 1002 board layout CON1 16 channel D O CON2 16 channel D I CONS 32 single ended or 16 differential analog input channels JP1 Analog input type selection PCI 1002 Series User Manual Ver 2 8 Oct 2011 PMH 015 28 B PEX 1002L H Board
21. f this card wConfigSpace i 2 2wPLX save all resource of this card Step3 Control the PCI 1002 directly wBase wConfigSpacel0 0 get base address the card O outpw wBase 0x20 wDoValue control the D O states of card O wDiValue inpw wBase 0x20 read the D l states of card O wBase wConfigSpace 1 0 get base address of card 1 outpw wBase 0x20 wDoValue control the D O states of card_1 wDiValue inpw wBase 0x20 read the D I states of card 1 wPLX wConfigSpace 2 2 get PCl interface base address of card 2 _outpd wPLX 0x4c 0x41 channel 1 interrupt active Low _outpd wPLX 0x4c 0 disable all interrupt 4 2 Thel O Address Map The list of PCI 1002 registers is given below The address of each register is found by simply adding the offset to the base address of the corresponding section More detailed descriptions of each register will be shown in the following text and the software manual Section Offset Name Access Length PCI MSE control RIW 8 16 32 bits register 8254 timer1 RIW 8 16 32 bits 8254 timer2 R W 8 16 32 bits 8254 timer3 R W 8 16 32 bits 8254 control register W 8 16 32 bits 10h Analog input SOS W 8 16 32 bits control register 2 otatus register R 8 16 32 bits Analog input gain control ELM dd 8 16 32 bits register 8 16 32 bits 8 16 32 bits 8 16 32 bits 16 32 bits 16 32 bits 16 32 bits 30 h A D d
22. files to the specified directory and register the driver on your computer The directory where the drive is stoned is different for different windows versions as shown below B Windows 64 bit Windows XP 2003 Vista 7 The UniDAQ DLL file will be copied into the C WINNT SYSTEM32 folder The NAPWNT SYS and UniDAQ SYS files will be copied into the CAWINNT SYSTEM32 DRIVERS folder O For more detailed UniDAQ DLL function information please refer to UniDAQ SDK user manual CD NAPDOS PCI UniDAQ Manual http ftp icpdas com pub cd iocard pci napdos pci unidag maunal B Windows NT 2K and 32 bit Windows XP 2003 Vista 7 The P100X DLL file will be copied into the CIWWINNTISYSTEM32 folder The NAPWNT SYS and PCI1002 SYS files will be copied into the CNWINNTYSYSTEMS32WDRIVERS folder B Windows 95 98 ME The P100X DLL and P100X Vxd files will be copied into the C Windows SYSTEM folder For more detailed P100X DLL function information please refer to o PCI 1002 Series Software Manual pdf CD NAPDOS PCI PCI 1002 Manual http ftp icpdas com pub cd iocard pci napdos pci pci 1002 manual 3 2 PnP Driver Installation Power off the computer and install the PCI 1002 series card Turn on the computer and Windows 98 ME 2K and 32 bit 64 bit Windows XP 2003 Vista 7 should automatically defect the new PCI device s and then ask for the location of the driver files forthe hardware If a problem is encountered during installation refe
23. he lower 4 bits of the channel number are shown in this register Bit 11 0 The A D data 4 2 3 4 The status register Address 10h is used by the status register Reading from this address will get the data from the status register The format of status register is Bit7 6 Bit5 Bit4 Bit3 Bit2 Bit1 Bito ARG Control Timer 1 Timer O Timer 2 input type Bit 7 6 Current A D gain control Bit5 Output of 8254 timer 1 Bit 4 Output of 8254 timer O Bit 3 Output of 8254 timer 2 Bit 2 Reserved Used for hardware testing Bit 1 Analog input type 1 indicates that analog input type is single ended and O indicates analog input is differential Bit 0 A D ready signal 0 indicates not ready A D is under conversion 1 indicates ready A D is completely converted and is idle now 4 2 3 5 The A D software trigger register Writing to this port 1Ch will generate an A D trigger pulse signal Note Although a very fast trigger can be performed more than the speed of A D controller 110 K via this method a reasonable delay time should be left between the two triggers Software Delay time trigger Conversion Time Figure 4 1 Software trigger delay time PCI 1002 Series User Manual Ver 2 8 Oct 2011 PMH 015 28 6 4 2 3 6 Clear interrupt Reading from 1Ch will clear the add on interrupt 4 2 9 7 The analog input selection register Address 10h is used by the analog input channel selectio
24. ith 785 series board but feature an industrial type terminal block Relays are energized by applying 5 volt signal to the appropriate relay channel on the 20 pin flat connector There are 16 enunciator LEDs for each relay light when their associated relay is activated To avoid overloading your PC s power supply this board provides a screw terminal for an external power supply Form C Relay Normally Open Normally Closed 00000000 000000090 PCI 1 O02 Series O Channel 16 Form C Relay Relay Switching up to 0 5 A at 110 Vac or 1 A at 24 Voc PCI 1002 Series User Manual Ver 2 8 Oct 2011 PMH 015 28 mo 2 Analog Input Signal Connections The PCI 1002 series can measure single ended or differential type analog input signal Some analog signals can be measured in both modes However some analog signals only can be measured in one or the other The user must decide which mode is suitable for measurement In general there are 4 different analog signal connection methods shown from Figure 2 3 to Figure 2 6 The connection in Figure 2 3 is suitable for ground analog input signals The Figure 2 4 connection is used to measure more channels than in Figure 2 3 but it is only suitable for analog input signals that large than 1 V The connection in Figure 2 5 is suitable for thermocouple and the Figure 2 6 connection is suitable for floating source analog input signals Note In Figure 2 5 the maximum common mode
25. n register and address 14h is used by the analog gain control selection register Write 0 31 to port 10h to select the channel number for differential input write 0 15 Write 0 3 to port 14h to select the gain control UY _ o E O o vU t Gain control Channel select Figure 4 2 Analog input control Note 1l For single ended inputs channels 0 31 are available For differential inputs channels 0 15 are available Input numbers which are more than the available channel will be discarded Thus for single ended inputs only the last 5 bits are taken as the channel number And for differential inputs only the last 4 bits are taken as the channel number 2 Only the last two digits are taken as the gain control code The gain control code and the corresponding gain is For PCI 1002L LU and PEX 1002L Gaincode wo mu no nu O ea q 5 T 8 Jd 49 L 9 For PCI 1002H HU and PEX 1002H Bitt Bit 0 po fon i 2 Gan 1 10 3 These registers are set to O after powered on or hardware reset signals PCI 1002 Series User Manual Ver 2 8 Oct 2011 PMH 015 28 E 4 2 3 8 The general control register A general control register 18h is used to control the add on interrupt signal source and the A D trigger method The format of this register is Bit4 2 Bit 1 0 Interrupt source selection A D trigger method selection register register B interrupt source selection
26. ode very easy Using the software driver is recommended if using interrupt The multiplexer can select 32 single ended or 16 differential signals into the gain control module The settling time of multiplexer depends on the impedance of the signal source Because the software doesn t control the settling time please make sure to leave enough settling time if switching from one channel to the next channel The gain control module also needs settling time if gain control code changed Again because the software doesn t control settling time please delay enough settling time if the gain control code is changed Remember to delay the extra setting time when gain of channel is changed The software driver provides a machine independent timer P1002 Delay for settling time delays This subroutine assumes a machine independent timer will be implemented However if using call P1002 Delay the counter O will be reserved and can t be used as a user programmable timer counter The gain control module s output feeds into the A D converter The A D converter needs a trigger signal to start an A D conversion cycle The PCI 1002 series supports three trigger modes software pacer and external trigger PCI 1002 Series User Manual Ver 2 8 Oct 2011 PMH 015 28 T 5 4 1 A D Conversion Trigger Modes The PCI 1002 series supports three trigger modes 1 Software Trigger Write any value to the A D software trigger control register BAS
27. r to the PCI ISA PnP Driver Installation in Win9x 2x xp pdf CD NAPDOS PCI Manual for more information PCI 1002 Series User Manual Ver 2 8 Oct 2011 PMH 015 28 SS 3 3 Confirm the Successful Installation Make sure the PCI 1002 series cards installed are correct on the computer as follows Step 1 Select Start gt Control Panel and then double click the System icon on Windows Step 2 Click the Hardware tab and then click the Device Manager button Step 3 Check the PCI 1002 series cards which listed correctly or not as Illustrated below Li Device Manager File Action wiew Help c amp EE ER uas He Computer BS DAG Card BB UniDAG PCI 100x Series Multi function Board HE LUSK FES m Display adapters 4 DVD CD ROM drives EE Floppy disk controllers fa Floppy disk drives 42 IDE ATAJATAPI controllers e Keyboards g T Mice and other pointing devices 2g Monitors BB Network adapters Parts COM amp LPT EE Processors me Sound video and game controllers Hd System devices E Universal Serial Bus controllers Successful mE 4 I O Register Address y 4 1 How to find the I O Address The Plug amp Play BIOS will assign a proper l O address to every PCI 1002 series cards in the power on stage The IDs of PCI 1002 series are as follows PCI 1002 L H Model Name PCI 1002 LU HU PEX 1002 L H Vendor ID 0x1
28. rigger mode has been activated the 8254 timer 1 will automatically turn on and start to perform A D triggers It will continue until the A D trigger logic receives a falling external trigger signal Any change to the trigger mode selection will turn off the pre trigger mode 4 The post trigger mode is used for post trigger method The mode working incorporated with the 8254 timer 1 First setup 8254 timer 1 properly Then set the trigger mode to post trigger Once post trigger mode has been activated the 8254 timer 1 will automatically turn off until it receives a falling external trigger signal Any change to the trigger mode selection will turn off the post trigger mode 5 The A D trigger is set to O after either power on or hardware reset PCI 1002 Series User Manual Ver 2 8 Oct 2011 PMH 015 28 SI M 5 Function Operations 5 1 Digital I O The PCI 1002 series provide 16 digital input channels and 16 digital output channels All levels are TTL compatible The connection diagram and block diagram are given below BaseAddr 20h read signal Local Data Bus BaseAddr 20h write signal Figure 5 1 DIO function diagram PCI 1002 Series User Manual Ver 2 8 Oct 2011 PMH 015 28 o 9 2 he 8254 Timer The PCI 1002 series provide 3 independent 16 bit timer counters Each timer has different functions Timer O is uses Pacer 0 Timer 1 is uses Pacer 1 Timer 2 is uses a machine independent timer The block diagram i
29. s Buffer Figure 1 1 The PCI 1002 series block diagram 1 2 Features The following is a list of general features for the PCI 1002 series Check section 1 3 for more details Bus 5 V PCI Peripherals Component Interface bus for PCI 1002L H Universal PCI card supports both 5 V and 3 3 V PCI bus for PCI 1002LU HU PCI Express card supports PCI Express x1 for PEX 1002L H Card ID function for PEX 1002L H y A D The sampling rate of single channel or multiple channels is 110 kS s for low gain model and 44 kS s for high gain model 32 single ended 16 differential programmable inputs Provides three different A D trigger methods Provides three different external trigger methods Programmable gain control programmable offset control DIO 16 digital inputs and 16 digital outputs TTL compatible High speed data transfer rate 2 7 M word sec non burst mode Digital input port can be set to pull high or pull low PCI 1002 LU HU and PEX 1002L H only E ie N i Timer One 16 bit machine independent timer for software Timer 2 B Two 16 bit pacer timers for A D converter and interrupt TimerO Timer1 1 3 Specifications 1 3 1 PCI 1002L H and PCI 1002LU HU Model Name PCI 1002L PCI 1002H PCI 1002LU PCI 1002HU Software Internal programmable pacer 0 01 96 of FSR 1 LSB 25 C 10 V Logic 0 0 8 V max Logic 1 2 0 V min 1 0 MHz Typical Logic 0 0 4 V
30. s given as follows EN TimerO Local Data Bus i User Figure 5 2 8254 control diagram 5 3 The A D Trigger The A D trigger is controlled by on board A D trigger controller The function diagram of A D trigger is shown below 8254 Timer 0 2 or Trigger i External Trigger 8254 External os CE Timer Select Trigger NT 4 MHz Trigger Select Figure 5 3 A D trigger controller PCI 1002 Series User Manual Ver 2 8 Oct 2011 PMH 015 28 A D trigger logic receives the external trigger and then performs the correct A D trigger function In order to be recognized by the A D trigger controller the external trigger signal must be a TTL compatible signal with the minimum duration of pulse width to avoid noise This signal must satisfy the following specifications External trigger EE RES Minimum Maximum Note The PCI 1002 series is designed only as a time sensitive trigger trigger depends only on receiving a falling edge external trigger signal For a level sensitive external trigger trigger depends only on the level of the input signals make the following circuit outside the PCI 1002 series Comparator Input External Trigger PCI 1002 DAC TTL buffer D O PCI 1002 Series User Manual Ver 2 8 Oct 2011 PMH 015 28 NN 5 4 A D Conversion An A D conversion can be initiated in one of three ways software command internal programmable interval timer or by external
31. the computer Note If the input signal is not thermocouple the user should use an oscilloscope to measure common mode voltage of Vin before connecting to PCI 1002 series Don t use a voltage meter or multimeter CAUTION In Figure 2 5 the maximum common mode voltage between the analog input source and the AGND is 70 Vp p Make sure that the input signal is under specification first If the common mode voltage is over 70 Vp p the input multiplexer will be permanently damaged Figure 2 6 Connecting to floating source configuration PCI 1002 A D CH 0 HI A D CHOLO A GND A D CH n HI A D CHnLO A GND Signal Shielding B Signal shielding connections in Figure 2 3 to Figure 2 6 are all the same B Use a single point connection to frame ground not A GND or D GND PCI 1002 series Vin 7 AGND D GND V Fane Gnd 2 8 Pin Assignments B CONT Digital output connector pin assignments CON1 Pin Name Pin Name DO 0 DO 1 Digital output O Digital output 1 DO 2 b DO 3 Digital output 2 Digital output 3 DO 4 3 Lb DO 5 DO 6 7 gt DO 7 Digital output 4 EN Digital output 5 DO 8 9 gt DO 9 Digital output 6 26 Digital output 7 11 DO 10 b sd 9 Digital output 8 Digital output 9 DO 12 13 L5 DO13 DO 14 10 N DO15 Digital output 10 Digital output 11 GND a GND Digital output 12 Digital output 13 5V gt 12V Digital output 14 Digital output 15 PCB ground PCB ground PCB 5 V PCB
32. til READY bit 71 Read the 12 bit A D data 7 Convert this 12 bit binary data to the floating point value p x For example fas POSER ARR SN SEE TUER NIE AO SERERE AA NER RHONE A T NR TJ DEMO 3 AdPolling ny Compiler Borland C 3 1 Mode Large vnl Output Code HEX code T i S EA TE AE Aya E OU RE erly snes Set EN Pian AA Wed OR Page Re BEA NTEGER E a nea PA include P1002 H WORD wBaseAddr wlrg WORD P1002_Delay WORD wDownCount WORD h I int count wDownCount Ox7fff if wDownCount 1 wDownCount 1 Clock in 4M gt count 4000 1 ms count 1 0 25 us I wDownCount amp Oxff wDownCount wDownCount 256 h wDownCount amp Oxff outp wBaseAddr 3 4 0xB0 mode O counter 2 outp wBaseAddr 2 4 1 counter 2 low byte first outp wBaseAddr 2 4 h counter 2 high byte 0x07D0 2000 outp wBaseAddr 3 4 0x80 latch counter 2 I inp wBaseAddr 2 4 delay starting two CLKs h inp wBaseAddr 2 4 for count 32767 count gt 0 count outp wBaseAddr 12 0x80 latch counter_2 I inp wBaseAddr 8 h inp wBaseAddr 8 if h gt 0x80 return NoError return TimeOut poop soos ooo Smo Sot SS RaSh Se poo posos osa E Sh Sosa void AdPolling UCHAR channel UCHAR gain WORD delay outp wBaseAddr 0x18 0 Select Mode O outp wBaseAddr 0x10 channel outp wBaseAddr 0x14 gain P1002 Delay delay outp wBaseAddr 0x1c 01 A D software trigger void
33. ts Shared I RQ several peripherals will share the same IRQ at the same time You must use Bit 2 to find out if this IRQ was generated from your PCI 1002 series 3 For more information about the PCI interrupt control refers to the PLX 9050 user reference manual PCI 1002 Series User Manual Ver 2 8 Oct 2011 PMH 015 28 TN 4 2 3 Section 2 This section is used by the add on control logic 64 bytes of I O locations are used Detailed descriptions are shown below 4 2 3 1 The 8254 registers The 8254 programmable timer counter is used to generate periodic A D trigger signals periodic interrupt signals and the machine independent timer for PCI 1002 Addresses 00h 04h 08h and OCh are used to control the 8254 Timer O is used as Pacer 0 Timer 1 is used as Pacer 1 Timer 2 is used as a machine independent timer P1002 Dealy For more details about the programming information please refer to Intells Microsystem Components Handbook 4 2 3 2 The DI DO register Address 20h is used for DI DO ports Writing to this port will write data to DO register Reading from this port will read the data from DI 4 2 3 3 The A D buffer Address 30h is used for A D buffer Only read operations are available at this address Reading from this port will read the data from A D buffer The format of A D buffer is Bit15 12 Bit11 0 Analog input channel A D data Bit 15 12 The channel number of analog input Only t
34. ut channels 16 digital input channel and 16 digital output channel The PCI 1002LU HU and PEX 1002L U provide pull high low jumpers allow user to predefine the DI status instead of floating when the DI channels are unconnected or broken The PEX 1002L H adds a Card ID switch for users to recognize the board by the ID via software when using two or more PEX 1002L H cards in one computer PCI 1002LU HU Universal PCI version and PEX 1002L H PCI Express is fully compatible with the PCI 1002L H PCI version PCI 1002LU HU and PEX 1002L H new version sell now PCI 1002L H old version will be phase out These cards support various OS such as Linux DOS Windows 98 NT 2000 and 32 64 bit Windows 7 Vista XP DLL and Active X control together with various language sample program base on Turbo C Borland c Microsoft C Visual C Borland Delphi Borland C Builder Visual Basic C NET Visual Basic NET and LabVIEW are provided in order to help users to quickly and easily develop their own applications PCI 1002 Series User Manual Ver 2 8 Oct 2011 PMH 015 28 DENN 1 1 The Block Diagrams Here s the block diagram of PCI 1002 series X86 System PCI Interface System A Local System Controller Status Control He lai KE bits DI to a Digital Inputs pis H t Digital Outputs he i Generator A D control logic A D 12 bit A D Gain Data Converter Analog Input
35. voltage between the analog input source and the AGND is 70 Vp p so the user must take care that the input signal is under this specification first If the common mode voltage is over 70 Vp p the input multiplexer will be permanently damaged The simple way to select your input signal connection configuration is listed below 1 Grounding source input signal gt select Figure 2 3 2 Thermocouple input signal select Figure 2 5 3 Floating source input signal select Figure 2 6 4 If Vin gt 0 1 V the gain lt 10 and more channels are needed select Figure 2 4 If you are unsure of the characteristics of your input signal follow these test step 1 Step1 Try Figure 2 3 and record the measurement result 2 Step2 Try Figure 2 6 and record the measurement result 3 Step3 Try Figure 2 4 and record the measurement result 4 Compare the three results and select the best one PCI 1002 Series User Manual Ver 2 8 Oct 2011 PMH 015 28 moo Figure 2 3 Connecting to grounding source input Right way A D CHO HI T 3 A D CHOLO A GND 1 A D CH n HI A D CHn LO A GND n Figure 2 3 Wrong way O A D CHOH O A D CHOLO AGND O A D CHnHI O A D CHnI V AGND Figure 2 4 Connecting to single ended input configuration PCI 1002 AID CH n t Figure 2 5 Connecting to thermocouple configuration PCI 1002 A D CH 0 HI A D CH 0 LO A D CH n HI A D CH n LO A GND 1 Do not join LO to A GND at
36. w PCI 1002 Series I ncludes PCI 1002L 1002H 1002LU 1002HU and PEX 1002L 1002H Version 2 8 Oct 2011 Warranty All products manufactured by ICP DAS are warranted against defective materials for a period of one year from the date of delivery to the original purchaser Warning ICP DAS assumes no liability for damages consequent to the use of this product ICP DAS reserves the right to change this manual at any time without notice The information furnished by ICP DAS is believed to be accurate and reliable However no responsibility is assumed by ICP DAS for its use nor for any infringements of patents or other rights of third parties resulting from its use Copyright Copyright 2011 by ICP DAS All rights are reserved Trademark Names are used for identification only and may be registered trademarks of their respective companies Tables of Contents 1s INTRODUCTION eR 4 1 1 THE BEOCK DIAGRAMS ura ds 5 1 2 FEATURES stoaciant TA 6 1 3 SPECIFICATIONS sce cent nse tian 7 Lo JTORIQUSEFand POMFTOO2LU HU suere eii ladat 7 hoe FEX TOOG IS dai mcm td unm a 8 Porc ooo oae M 9 1 3 4 A D Trigger Metho0dS o oooooocconococcnnoocnnonnonnnannnannnonac a a ennt nns e nnns sinensis enses 9 GOO CUTE T NT UT Umm 10 19 65 Programmable Timer COUME ec E bu re es oO OS 10 1 4 APPS AON CEN NEEDS 11 1 5 PRODUCT CHECK EIS T

User Manual Oct. 2011 PCI

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