q0420 phase-locked oscillator (plo) evaluation system
Contents
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3. 22 6 0 RELATED LITERATURE 22 7 0 APPENDIX 23 7 1 Appendix A Q0420 Schematic 24 7 2 Appendix Q0420 Parts List 30 7 3 Appendix Q0420 layout Drawings 32 QUALCOMM PRODUCTS 36 E mail asic products qualcomm com Telephone 619 658 5005 Fax 619 658 1556 Data Subject to ChangeWithout N otice 1 0 GETTING STARTED The Q0420 PLO Evaluation System requires the following computer hardware as a minimum to operate in Remote M ode PC 80386 or better 4MBRAM Math Coprocessor e Hard Drive e Mouse Windows Version 3 1 or better SVGA Video Card 1024 X 768 resolution small fonts The Q0420 PLO Evaluation System consists of a Q0420 Evaluation Board Q0420 Shield Q0420 Control Software Control Cable Digital DIO Board and DIO Board Installation Software In order to operate the Q0420 Evaluation Board in Remote M ode the DIO Board needs be installed in a PC The DIO Driver Software and the Q0420 Control Software needs to be installed on the hard drive of the PC To usethe Q0420 in Stand alone M ode aPC is not required Note Windows is a trademark of Microsoft Corporation 11 DIGITAL I O BOARD INSTALLATION Install the DIO Board in any open slot in your PC accordingto the CIO DIO24 User s M anual provided with the evaluation system We recommend
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6. 3 1 5 PREEN The PRE EN switch selects the internal mode of operation of the Q3236 When the PRE EN is enabled the PRE EN valueis low or zero volts In this mode frequency division is accomplished with a pulse swallow counter made up of the 10 11 front end dual modulus prescaler In this mode frequency division up to 3 0 GHz on the Q0420 Evaluation Board is possible When the PRE EN switch is disabled the Q3236 internal prescaler is bypassed so that the VCO input frequency is divided by the M counter and the A counter isignored TheM counter operates at frequencies up to 300 MHz In this mode frequency division ratios are continuous from 1 to 511 31 6 QUIT When the Quit button is selected the current programming mode is exited and the Programming M ode Selection Window is displayed 15 QUALCOMM Incorporated ASIC Products E mail asic products qualcomm com 6455 Lusk Boulevard San Diego CA 92121 2779 USA Telephone 619 658 5005 Q0420 Phase Locked Oscillator PLO Evaluation System Fax 619 658 1556 User s Guide Data Subject to ChangeWithout N otice 3 2 PING PONG MODE When either Ping Pong Eight Bit Bus ode or Ping Pong Serial Bus Mode is selected from the Programming M ode Selection Menu Figure 8 the window shown in Figure 10 will appear The software will ask you if you want to go through the jumper setting windows If you are a first time user of the evaluation board it is suggested that you go through the jum
7. Receiver Receiver Line Receiver Table 2 Reference Selection REFERENCE SELECTION JP1 2 PB OnBoard Reference 1125 23 23 External Reference without Line Receiver 23 12 12 8 QUALCOMM Incorporated ASIC Products E mail asic products qualcomm com 6455 Lusk Boulevard San Diego CA 92121 2779 USA Telephone 619 658 5005 Q0420 Phase Locked Oscillator PLO Evaluation System Fax 619 658 1556 User s Guide Data Subject to ChangeWithout Notice 232 LOOP FILTERS Two loop filters are provided the Q0420 Evaluation Board The first loop filter is a second order filter which is populated and optimized for 100 kHz closed loop bandwidth for frequency operation between 2000 3000 M Hz The second loop filter can be configured as a second order or third order loop filter This loop is not populated and is provided to the user for prototyping purposes In order to select the first loop filter connect jumpers JP10 pin 1 and 2 JP11 pin 1 and 2 and JP14 pin 1 and 2 In order to select the second unpopulated loop filter connect jumpers JP10 pin 2 and 3 JP11 pin 2 and 3 and JP14 pin 2 and 3 See Figure 3 and Table 3 Figure 3 Loop Filter Selection Jumpers Loop Filter 2 Table 3 Loop Filter Select Loop 1 233 OPAMP NEGATIVE RAIL VOLTAGE SELECTION The negative rail of the LT 1357 OP Amp can be set to either ground or 5 volts In order to set the negative rail of the
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9. E QU rated Produ asic products qualcom 645 Boul an Diego CA 92 el ephone 619 658 5005 004 hase Locked Oscillator 619 65 Usel uide bject to ChangeWithout 00420 Evaluation Board Bottom Traces 34 QUALCOMM Incorporated ASIC Products 6455 Lusk Boulevard San Diego 92121 2779 USA Q0420 Phase Locked Oscillator PLO Evaluation System User s Guide X PI PSIPS CSSM PSIHS CS PIMQOI e E mail asic products qualcomm com Telephone 619 658 5005 Fax 619 658 1556 Data Subject to ChangeWithout N otice 35 QUALCOMM Incorporated ASIC Products E mail asic products qualcomm com 6455 Lusk Boulevard San Diego 92121 2779 USA Telephone 619 658 5005 Q0420 Phase Locked Oscillator PLO Evaluation System Fax 619 658 1556 User s Guide Data Subject to ChangeWithout N otice QUALCOMM ASIC PRODUCTS PRODUCT DESCRIPTION Dual Direct Digital Synthesizer DDS Direct Digital Synthesizer DDS Dual Direct Digital Synthesizer DDS 50 MHz 20 MHz Direct Digital Synthesizer DDS Phase Locked Loop PLL Frequency Synthesizer DDS Evaluation Board valuation of Q2334 PLO Evaluation System valuation of 03236 DDS Driven PLL Frequency Synthesizer valuation of Q2334 amp 03236 Viterbi Decoder Viterbi Decoder 25 Mbps 10 Mbps 2 5 Mbps Trelis Codec Vocoder Vocoder Vocoder Evaluation Board oco
10. R Counter M Counter A Counter 2700 MHz 2800 MHz 19 QUALCOMM Incorporated ASIC Products E mail asic products qualcomm com 6455 Lusk Boulevard San Diego CA 92121 2779 U SA Telephone 619 658 5005 Q0420 Phase Locked Oscillator PLO Evaluation System Fax 619 658 1556 User s Guide Data Subject to ChangeWithout N otice 4 0 DESCRIPTION OF BOARD FEATURES 4 1 Q3236 PHASE LOCKED LOOP FREQUENCY SYNTHESIZER Please refer to the Q 3236 Technical Data Sheet for details and features of this integrated PLL device 4 2 REFERENCE OSCILLATOR The Q0420 s on board reference is a 40 MHz oscillator with ECL level output This oscillator was selected for its excellent short term noise performance The device does not have temperature compensation for long term frequency drift It is recommended that when performing phase noise measurements on the Q0420 PLO Evaluation System a stable low noise external reference be used The output from an HP8662B Signal Generator back panel reference provides an excellent 10 M Hz reference for performing phase noise measurements 4 3 LINE RECEIV ER most synthesizer applications phase noise performance is invariably a driving design requirement The VCO and Reference Dividers are edge tri ggered circuits Random jitter on the input clock edges results in phase noise in the synthesizer output spectrum Additive AM noise on the input reference signal can cause random jitter The
11. VDC 596 500 mA capability power supply is required to operate the Q0420 The 15VDC input is the red banana jack while ground is the black banana jack The Q0420 converts and conditions the 4L5VDC input to HVDC A 415VDC to 5VDC voltage converter circuit is provided on the board for applications that require a negati ve rail be supplied to the op amp The 5V regulation is a switching device and may cause spurious components on the output of the synthesizer The 5V circuit is disabled when the board is shipped Proper voltage input and conversion is indicated by the three yellow LED s DS1 DS3 2 1 2 EXTERNAL REFERENCE INPUT J1 The External Reference Input allows the user to bypass the on board 40 M Hz reference oscillator This input can be used to characterize the synthesizer output when using other reference sources When the External Reference Input is used the reference signal can be selected to be processed by the input line receiver or the reference si gnal can bypass the line receiver Figure2 illustrates the proper way to connect the on board jumpers for various operating modes for the reference inputs The nominal input to J1 is 100 MHz 10 to 45 dBm for a 50 ohm source If you choose to use an external reference the power to the 40 M Hz on board reference should be disabled to minimize on board oscillations 6 QUALCOMM Incorporated ASIC Products E mail asic products qualcomm com 6455 Lusk Boulevard San Diego CA 92121 2
12. and PRE EN If N is an integer the LED will illuminate green The and A values are calculated based upon the value of the VCO Divide and are displayed below the block diagram The software calculates if M is within range of the M counter bits available depending on the programming mode If M is within range the in Range LED will illuminate green if M is out of range the LED will bered The Q0420 Evaluation Board was designed to generate output frequencies from 2 0 to 3 0 GHz 5M Hz steps 3 1 3 PHASE DETECTOR FREQUENCY The phase detector frequency synthesizer step size is chosen from the control located under the Phase Detector Frequency block of the block diagram T he phase detector frequency can be as large as 100 M Hz or small as desired as long as the values of R and M are within range The Q0420 Evaluation Board was designed with a default value of 2 5 M Hz phase detector frequency 3 1 4 DIVIDE BY TW O PRESCALER An external divide by two prescaler is provided on the evaluation board for output frequency operation up to 3 0 GHz If usingthe prescaler in the output frequency feedback path the switch should be placed in the IN position The software automatically calculates the M and A values based upon the divide by two prescaler in the feedback path If not usingthe prescaler in the feedback path the position should be switched to the OUT position When the prescaler is not used the maximum frequency of the PLL is 2 0 GHz
13. signal to the Phase Frequency Detector on the Q3236 This output can also be used along with the VCO Div Out to drive an external Phase Frequency detector or other external circuitry if desired Refer to the Q 3236 Technical Data Sheet for nominal output levels 223 VCO DIV OUT J7 The VCO Div Out provides a test point to view the divided VCO input signal that is being input to the Phase Frequency Detector This output can also be used along with Ref Div Out to drive an external Phase Frequency detector or other external circuitry if desired Refer to the 3236 Technical Data Sheet for nominal output levels 224 PRESCALER OUT J8 The Prescaler Out provides atest point to view the VCO divide by two prescaler output signal which is also routed to the Q3236 VCO input The output power of this signal is 25 dBm dBm 2 2 5 EXT VCO CONTROL J5 The Ext VCO Control is provided for use with an external VCO The Ext VCO Control provides the tuning voltage to the external VCO The external VCO output can be fed back to the PLL device via Ext VCO Input By using an external VCO the Q0420 can generate frequencies from L Band to Ku Band or higher When output frequencies exceed 3000 M Hz an external prescaler is necessary prior to the Ext VCO Input 7 QUALCOMM Incorporated ASIC Products E mail asic products qualcomm com 6455 Lusk Boulevard San Diego CA 92121 2779 USA Telephone 619 658 5005 Q0420 Phase Locked Oscillator
14. 00420 PHASE LOCKED OSCILLATOR PLO EVALUATION SYSTEM USER S GUIDE INTRODUCTION The Q0420 PLO Evaluation System is a complete evaluation board designed on a compact 5 x 7 5 printed circuit card for the Q3236 PLL The evaluation platform includes a fixed demonstration as well as a custom prototyping design A block diagram of the Q0420 is shown in Figure 1 The Q0420 demonstration platform consists of a phase locked oscillator system which generates frequencies from 2 GHz to GHz with a minimum step size of 5 M Hz over the full output frequency range 2 prescaler included on board The custom prototyping option allows the designer to rapidly configure a custom synthesizer by adding a VCO loop filter and reference suppressi on filter components to the alternative circuit sections of the board The user can easily select between the demonstration platform and the custom prototyping design via on board jumper options Additional input and output connectors are also provided to easil y support the use of off board VCO s and prescalers to quickly evaluate the performance tradeoffs between alternative components The Q0420 can be computer controlled for remote operation or alternatively controlled through the on board frequency control switches for stand alone operation Remote operation is accomplished through the custom software program Data 1 0 Card and cabling provided with the Q0420 board The menu driven software will automatically com
15. 1 OUTPUT FREQUENCY In Ping Pong M ode two frequencies are programmed on the front panel Figure 10 and the output frequency is selected from the Frequency Select Switch These two frequencies are programmed in Q3236 primary and secondary registers When the switch is down the phase locked loop will lock at the frequency displayed in the Frequency One box and the associated values of VCO Divide and A are displayed When the switch is up the phase locked loop will lock at the frequency displayed in the Frequency Two box and the associated values of VCO Divide M and A aredisplayed If the VCO Divide value is not an integer based upon the desired output frequency the frequency of the phase detector the state of the Divide by Two Prescaler Switch and PRE EN the is Not an Integer LED will illuminate red If N is integer the LED will illuminate green The M values are calculated based upon the value of the VCO Divide and are displayed below the block diagram The software calculates if M is within range depending the programming mode If M is within range the M in Range LED will illuminate green if M is out of range the LED will bered 3 3 DIP SWITCH SETTINGS The Q0420 can also be operated without the control software and programmed directly through the di p switches located on the evaluation board Removethe Q0420 Programming Cable before operati ng the board through the DIP switches In order to operate the Q0420 Evalu
16. 11 DD lt gt lt gt 1 57 051 053 4 D ec gt lt gt lt gt lt gt lt gt c 470 01902 0002 474 02449 0037 480 01064 0057 480 01453 0022 1 090 24083 1 12 500013500308 500024890044 1 1 325 06841 0050 Fuse N America 1 2 1 4X1 1 4 Fast No Delay 520 01805 0011 Heatsink 0 5 D 75 Press On 1216 4401020000 MSB 2360 100 AU _ Jumper Terminal _ c RR E a lt gt c 1 D fe T lt gt lt gt lt gt c 3l QUALCOMM Incorporated ASIC Products E mail asic products qualcomm com 6455 Lusk Boulevard San Diego CA 92121 2779 USA Telephone 619 658 5005 Q0420 Phase Locked Oscillator PLO Evaluation System Fax 619 658 1556 User s Guide Data Subject to ChangeWithout Notice 7 3 APPENDIX 00420 LAYOUT DRAWINGS Q0420 Evaluation Board Top Silk Bd 4 E gt a chy 5 5 E LI I bOThz ZASSUHTNOT Il ENS EM 03009 NOILIUX TWAS 02h00 hy __ 999 WNOO TINO Le c 2 2m z3 d z EUM SEE genios 8 2E D LN 69H 5 i LL 294 5 T 38 L JIL 238 582 g 269 Z ig E Lhe 83 eg 2822 Lt Lees b9 m hbO 26 __ Lh n 1F TI e mao
17. 779 USA Telephone 619 658 5005 Q0420 Phase Locked Oscillator PLO Evaluation System Fax 619 658 1556 User s Guide Data Subject to ChangeWithout N otice 2 1 3 EXTERNAL VCO INPUT J10 The External VCO Input is provided as a means to input a signal directly into the differential VCO inputs to the Q3236 This is necessary when using an external VCO or for troubleshooting the synthesizer system The nominal input to J10 is 10 dBm to 43 dBm 2 1 4 PING PONG CONTROL IN J10 The Ping Pong Control Input is only used when operating the Q3236 in the PingPongMode Theinput is routed to either FSELS or FSELP depending on the jumper position of JP16 and resistors R87 and R88 Thisinput allows an external CM OS compatible input to switch between the data in the primary registers and the secondary registers When FSELS FSELP is high the synthesizer output frequency is obtai ned from the frequency word stored in the primary registers Conversely when FSELS FSELP is low the synthesizer output frequency is obtained from the frequency stored in the secondary registers This input isideal for creating a FSK modulator for slow data rates 2 2 OUTPUTS 2 2 1 SYNTHESIZER OUT J9 The Synthesizer Out signal provides the 2000 3000 M Hz output in 5 0 MHz steps when using the on board 40 MHz reference and VCO The output power ranges from 0 to 7 dBm 222 DIV OUT J2 The Ref Div Out provides a test point to view the divided Input Reference
18. A 92121 2779 USA Telephone 619 658 5005 Q0420 Phase Locked Oscillator PLO Evaluation System Fax 619 658 1556 User s Guide Data Subject to ChangeWithout Notice 4 6 REFERENCE SUPPRESSION FILTER The purpose of the Reference Suppression Filter is to attenuate undesired signals A flip flop type phase frequency detector produces error pulses at Fpp These pulses modulate the VCO and produce sidebands at FPD and at harmonics of Fpp The Reference Suppression Filter is typically alow pass filter with fast transition times from passband to stopband i e Elliptic Topology The Reference Suppression Filter designed for the Q0420 PLO Evaluation System is a five pole elliptical low pass filter See Figure 12 Thefilter was designed to provide a wide notch at Fpp 2 5 MHz the Q0420 phase detector frequency This design results in more than 70 dBc reference suppression for frequencies greater than 2 5 MHz as seen in Figure 13 Utilizingthe five pole reference suppression filter sideband spurs are suppressed to acceptable levels but the phase margin of the loop is also degraded The Reference Suppression Filter on the Q0420 Evaluation Board degrades the phase margin by 12 5 at 100 kHz Phase margin can be increased by designing narrower loop filters or by using a 3 pole elliptical filter See the Q 3236 Technical Data Sheet Figure 13 Reference Suppression Filter Graph Amplitude Phase dBc Degrees 20 180 100 kHz 100
19. ESCALER SELECT R78 R75 R85 R84 MODE SELECT JUMPERS JP7 Connection I IN IN OUT OUT Enhanced Mode Access to M7 8 R4 R5 Pins and 2 Bes OUT our J IN IN 03036 Model Pins 2 and 3 237 03036 MODE The Q3236 is pin for pin compatible with the Q3036 PLL and be used as a direct replacement Pin 44 of the Q3236 must be pulled low to operate in the Q3036 mode Connect pins 2 and 3 of JP7 to pull pin 44 low To use the Q3236 in N ormal M ode and have access to the upper M and A counter bits connect JP7 pins 1 and 2 which pulls pin 44 high see Table 10 238 PING PONG MODE EXTERNAL CONTROL When operating the Q0420 in Ping Pong M ode the output frequency register selected can be controlled either through the control software or through the external Ping Pong Control In Connector J6 If you areusingthe software to control which frequency register is selected then the Q0420 does not need to be modified To usethe External Ping Pong Control Input to control frequency selection then board modifications are required If using Eight Bit Bus Ping Pong M ode connect pins 2 and 3 of J16 and remove R88 This will route the input on J6 to the FSELP pin on the Q3236 and will disable the software from controllingthe FSELP pin If using Serial Bus Ping M ode connect pins 1 and 2 of JP16 and remove R87 This will route the input of J6 to the FSELS pin on the Q3236 and will disable the software from controllingth
20. NG TO THE NEXT STEP REMOVE ALL EXTERNAL CONNECTIONS TO THE DIO BOARD 9 Select Internal Test then yes 10 The software will test the DIO Board checking the input and output registers If the test is successful you will receive a message that states the DIO Board has been found and the registers have been written to and read back This completes the DIO installation process If you receive an error message recheck the jumper settings on the DIO Board and rerun the Instacal program Step of Digital Software Configuration If you continue to receive an error message contact Computer Boards Inc 11 Exit from the Instacal program 13 00420 PLO EVALUATION SYSTEM SOFTWARE INSTALLATION The following procedure describes the Q0420 Control Software installation process 1 Insert the Q0420 Control Software into the floppy drive of your computer 2 Accessthe floppy drive using the Windows file manager 3 Doubleclick your mouse on Setup exe 5 QUALCOMM Incorporated ASIC Products E mail asic products qualcomm com 6455 Lusk Boulevard San Diego CA 92121 2779 USA Telephone 619 658 5005 Q0420 Phase Locked Oscillator PLO Evaluation System Fax 619 658 1556 User s Guide Data Subject to ChangeWithout N otice 4 Thesoftware will ask you where you want the files to be installed on your hard drive The default is C QUALCOM M Q0420 The software will require approxi mately 3 M B of hard drive space Select Ok to p
21. NN z 2 i 2 5 6 22 2 7 E 9 LNO 6 8 MT S 8S2GIZOTIIT L Lu ea 8S2L0011T zn MEAS MI 89 m ANOOT I ou eu zo AST we u zu AS T U ant o ANOT EO bo S2 UNIO OS HAEE I 29 ews ow goin o o ECS 599 2510 ve 98 o lt 0 gr o o 6455 Lusk Boulevard San Diego 92121 2779 USA Q0420 Phase Locked Oscillator PLO Evaluation System QUALCOMM Incorporated ASIC Products User s Guide Data Subject to ChangeWithout Notice 7 2 APPENDIX 00420 PARTS LIST REFERENCE MANUFACTURERS DESIGNATOR QUALCOMM MCN NUMBER PART DESCRIPTION Pf 2524004 25 24109 1 PWB 00420 Eval Board R31 R39 M1 R60 R62 R64 R66 R69 R75 R78 R87 R88 29 R 22 en R55 R11 R15 R16 R8 R83 lt gt lt gt lt gt lt gt lt gt lt gt 223 lt gt lt gt lt gt R5 R6 R14 R28 R29 R58 R71 R9 R43 R49 R50 R59 R4 R89 R90 R73 R76 R77 R79 R81 R13 R37 R32 R54 R26 R27 R17 R24 R25 R R R72 R74 R44 R46 R48 R52 R47 R57 R36 R45 R56 R70 c lt gt lt gt lt gt lt gt lt gt lt gt m lt gt lt gt lt gt e oo lt gt gt o lt gt o
22. O U8 Connect JP5 pins 2 and to route the tune voltage to the second VCO U8 R23 the zero ohm resistor should be removed for optimum performance Install R82 a zero ohm resistor and remove R69 and R86 to select the correct RF output path Also an AC coupling capacitor C95 needs to beinstalled This capacitor is not provided The capacitor value selected should be opti mized for the frequency output of the VCO Configuration 3 External VCO Remove the jumper on JP6 and install a zero ohm resistor in R23 to route the tune voltage to an external VCO The external VCO tune voltage will be present on J5 a BN C connector Install R86 a zero ohm resistor and remove R69 and R82 Also an AC coupling capacitor C94 needs to be installed This capacitor is not provided The capacitor value selected should be optimized for the frequency output of the VCO Fifteen volts or five volts can be routed to the power pin of either VCO depending on the operating voltage of the user s VCO Installing R31 a zero Ohm resistor routes 15 volts to jumper J9 When R30 is installed 45V is routed toJ9 See Table8 CAUTION R30 and R31 cannot be installed at the same ti me Damage may occur to the board if this happens As stated above the Q0420 can accommodate two VCO s Each VCO pad can accept two types of VCO footprints either a standard 0 81 square pin type package or a standard 0 91 square surface mount package In order to accommodate the two VCO footpri
23. ON The evaluation board can accommodate two VCO s or utilize an external VCO The board is shipped with a 2000 3000 MHz VCO 07 already installed The user can install a different VCO 8 or route the tune voltage off the evaluation board to an external VCO Oncethe VCO is properly installed the voltage tune path and the VCO output path needs to be configured Figure 5 Table 7 and Table 8 show the VCO voltage tune paths and the VCO RF output paths Figure 5 VCO Selection Jumpers 5V 15 R30 R31 0 0 Conditioning External VCO Input Table 7 VCO Select VCOSELECT 5 R23 R69 R86 R82 12 OUT IN our our 0 23 our our OUT IN External Open n OUT n OUT 10 QUALCOMM Incorporated ASIC Products 6455 Lusk Boulevard San Diego CA 92121 2779 USA Q0420 Phase Locked Oscillator PLO Evaluation System User s Guide External VCO Control Table 8 VCO Power CO POWER R30 R31 JP9 ee NEQUE TE 7 Nf EN EUN ES 23 E mail asic products qualcomm com Telephone 619 658 5005 Fax 619 658 1556 Data Subject to ChangeWithout N otice Configuration 1 Default VCO U7 Connect JP5 pins 1 and 2 to route the tune voltage to the default VCO R23 the zero ohm resistor should be removed for optimum performance Install R69 a zero ohm resistor and remove R82 and R86 to select the correct RF output path Configuration 2 Second VC
24. PLO Evaluation System Fax 619 658 1556 User s Guide Data Subject to ChangeWithout Notice 2 3 JUMPER SETTINGS The Q0420 Evaluation Board has several jumpers which allow the option of choosing multiple configurations The evaluation board is shipped with jumpers in default positions The default jumper positions are listed in Table 1 Table 1 Default Jumper Positions 2 3 1 REFERENCE FREQUENCY JUMPERS There are three possible configurations for the reference jumpers see Figure 2 and Table 2 We suggest using the line receiver for frequencies under 40 M Hz Configuration 1 Use the 40 MHz on board reference Use the supplied bi pin jumpers and connect JP6 1 and 2 JP2 pin 2 and 3 JP8 pin 2 and 3 Configuration 2 Usethe Ext Ref Input and select the line receiver Usethe supplied bi pin jumpers and connect JP1 pin 2 and 3 JP2 pin 1 and 2 JP8 pin 2 and 3 When not using the on board reference connect JP16 pin 2 and3 This will power down the on board 40 M Hz reference and decrease extraneous signal generati on Configuration 3 Usethe Ext Ref Input and bypass the line receivers Usethe supplied bi jumpers and connect JP1 pin 1 and 2 JP8 pin 1 and 2 When not usingthe on board reference connect JP6 pin 2 and 3 This will power down the on board 40 M Hz reference and decrease extraneous signal generati on Figure 2 Reference Jumpers External 03236 Reference fing Line Reference Input Input
25. Reference Divider s sensitivity to this jitter can be decreased by ensuring that the input clock passes through the zero crossing threshold transition zone as quickly as possible The line receiver performs this function by squari ng up the edges of the input reference signal We recommend using the on board line receiver for input frequencies below 40 MHz if theinput reference does not already have squared transitions 4 4 VOLTAGE CONTROLLED OSCILLATOR VCO The 00420 can accommodate two VCOs simultaneously One VCO used on the Q0420 Evaluation Board has Ky 95 MH2 V and atuning range of 2000 3000 MHz This high performance VCO helps demonstrate the low phase noise performance of PLO synthesizer systems designed around the QUALCOMM PLL device The second VCO footprint is left unpopulated Each VCO footprint accepts a pin type or surface mount device 45 LOOP FILTER The differential phase detector outputs of the 3236 input to an active loop filter The loop filter type is modified loop filter with a pre integrator The loop filter was designed with a closed loop bandwidth of 100 kHz and a damping constant of 0 9 The values of the loop filter components were computed using the equations found in the Q 3236 Technical Data Sheet Appendix A lists component values Figure 12 Reference Suppression Filter From Loop Filter 20 QUALCOMM Incorporated ASIC Products E mail asic products qualcomm com 6455 Lusk Boulevard San Diego C
26. System from typical lab RF emissions 54 PHASE OFFSET TRIMPOT The Phase Frequency Detector of the 3236 is linearized i e there is no dead zone due to the addition of a residual pulse onto both phase detector outputs This situation can be exploited by a phase offset adjust circuit to optimize the comon mode rejection of the phase detector output pulses as they are subtracted from one another in the differential active loop filter The Q0420 introduces this phase offset by using the method descri bed page 37 of the Q 3236 Technical Data Sheet A trimpot R51 is used to bias the phase detector outputs The phase offset allows you to trade off between reference spurs and phase noise The optimum phase offset allows the phase detector output PD U OUT or PD D OUT to reach its full amplitude Typically a phase offset of 10 ns is sufficient and also allows for mismatches in temperature coefficients of the differential active loop filter 6 0 RELATED LITERATURE Q 3236 2 0 GHz Low Power PLL Frequency Synthesizer Technical Data Sheet Hybrid PLL DDS Frequency Synthesizers AN 2334 4 22 QUALCOMM Incorporated ASIC Products E mail asic products qualcomm com 6455 Lusk Boulevard San Diego CA 92121 2779 USA Telephone 619 658 5005 Q0420 Phase Locked Oscillator PLO Evaluation System Fax 619 658 1556 User s Guide Data Subject to ChangeWithout N otice 7 0 APPENDIX 23 QUALCOMM Incorporated ASIC Products E mail asic products qualco
27. a MIOS TE PE a GSOHd VIVIS aa a pW n gg d dd INO AIG mH 6 0 L lt ys HA Oo AORN WE 295 E MHS Ge Qe HH Ho at w Z o Z Z Z4 Zo a eS 80vZ O6dO E Is en a fs fk lo MOOT Ed fo lt 58 D gt 992 T a cW csnad a ZW Q lt no a ON NB ARTS a c a anT O epo ANI ovo a 9 ING a 5612 Bow gc CI O Oa 5 UR RACK 9 T lt gt Ag st V L i ts I 91 i pum 5 E i oO Ems SvIHNH 012 gt Leu au 5 553 9 Lap L 054 c o OSL 8 o lo nsu e 5 1 zo d AS M oe za 2 a Os He o 2 Io PIN US no SAS ea odo Data Subject to ChangeWithout N otice User s Guide OHLNOO ODA LXu ING CLA TLA AGOOST ego
28. ard is above 300 MHz the VCO Divider is programmed to the Prescaler M ode which is selected by setting PRE EN low switches 0 The above information is then used to program S1 and S2 S1 and S2 are programmed by setting the respective switch to the 0 position to set the control input to alow and to the 1 position to set the control input to a high To program the Q0420 PLO Evaluation System to output FVCO 2000 MHz thetotal divide ratio is Fyco Fpp Prescaler 22000 MHz 2 5 2 2400 M Integer N 10 1 Integer 00 10 1 39 decimal 0100111 binary M1 M2 M5 high switch 1 4 low switch 0 N 10 1 400 10 39 1 0 decimal 0000 binary Al A2 low switch 0 18 QUALCOMM Incorporated ASIC Products E mail asic products qualcomm com 6455 Lusk Boulevard San Diego 92121 2779 USA Telephone 619 658 5005 Q0420 Phase Locked Oscillator PLO Evaluation System Fax 619 658 1556 User s Guide Data Subject to ChangeWithout N otice This same procedure can be followed to program the 90420 PLO Evaluation System to output any frequency in the range of 2000 3000 MHz in 5 0 M Hz steps Table 11 shows the correct switch settings in 100 MHz increments Table 11 Output Frequency Switches Synthesizer Ref Divider VCO Divider Synthesizer Ref Divider VCO Divider Output Freq J1 R Counter M Counter A Counter Output Freq J1
29. ation Board in Direct Parallel M ode connect JP7 pins 2 and 3 This will pull pin 44 Q3036 M ode and pin 22 Busmode will float high thus configuring the Q3236 to operate in Direct Parallel Mode In this mode the upper M counter bits M 7 M8 and the upper R counter bits R4 and R5 are not available The Q0420 has two DIP style 8 position switches S1 and S2 that provide the R M A and PRE EN control inputs to the Q3236 Figure 11 Theinputs control the division moduli for the REFERENCE RO R3 and VCO Dividers M 0 M and 3 as well as the selection of the PRESCALER or NON PRESCALER M odes PRE EN Thefollowing paragraphs describe how to program S1 and S2 Figure 11 DIP Switch Control Q3236 PHASE LOCKED LOOP FREQUENCY SYNTHESIZER 17 QUALCOMM Incorporated ASIC Products E mail asic products qualcomm com 6455 Lusk Boulevard San Diego CA 92121 2779 USA Telephone 619 658 5005 Q0420 Phase Locked Oscillator PLO Evaluation System Fax 619 658 1556 User s Guide Data Subject to ChangeWithout N otice 3 3 1 REFERENCE DIVIDER The QUALCOMM Q3236 has an on chip Reference Divider The divider is 4 bit counter and will divide the reference input by 1 16 in unit steps this corresponds to the 3236 functioning 3036 M ode Refer to Q 3236 Technical Data Sheet For the Reference Divider to divide the 40 MHz reference to 2 50 MHz it must be programmed with a divide ratio of 16 The pr
30. der Evaluation System Evaluation of Q4401 eceive Automatic Gain Control Amplifier ransmit Automatic Gain Control Amplifier Station Modem MSM2 2 nalog Baseband Processor BBA2 ell Site Modem CSM Data books application notes and user s guides are available for detailed design informati on E 2 DDS Evaluation Board Evaluation of 02220 E E 2 Zo 00420 Phase Locked Oscillator PLO Evaluation System User s Guide Data Subject to Change Without N otice For customer service or technical assistance please contact QUALCOMM Incorporated ASIC Products 6455 Lusk Boulevard San Diego 92121 2779 USA E mail asic products qualcomm com Telephone 619 658 5005 Fax 619 658 1556 80 24112 1 7 96
31. e FSELS pin 2 3 9 TEST POINTS Test points are located throughout the evaluation board for your convenience during testing and evaluation Refer to the schematic in Appendix A for test points 12 QUALCOMM Incorporated ASIC Products E mail asic products qualcomm com 6455 Lusk Boulevard San Diego 92121 2779 USA Telephone 619 658 5005 Q0420 Phase Locked Oscillator PLO Evaluation System Fax 619 658 1556 User s Guide Data Subject to ChangeWithout N otice 3 0 00420 FREQUENCY CONTROL The frequency of the Q0420 can either be controlled through software and the Digital 1 0 Board or by setting the DIP Switches The software that is provided with the Q0420 Evaluation Board allows the user to program the 03236 in each of the five programming modes Direct Parallel Eight Bit Bus Serial Bus Ping Pong Eight Bit Bus Ping Pong Serial Bus The control software calculates the value of the and counters and programs the Q3236 Before executing the Q0420 Control Software make sure all DIP switches S1 and S2 are set to 0 From Windows double click on the Q0420 Control Software icon to execute the software The window shown in Figure 8 will appear If this window or subsequent windows do not fit on your monitor then your video driver needs to be changed For optimum performance choose a video driver that supports a resolution of 1024 by 768 and at least 256 colors You may move or resize the window as required Choose the method in
32. gital 1 0 Board Software Configuration 3 1 3 00420 PLO Evaluation System Software Installation etc 5 1 4 00420 Evaluation System Setup 6 2 0 SYNTHESIZER OPERATION 6 24 2 1 1 Power Supply Requirements 6 2 1 2 External Reference Input 1 6 2 1 3 External VCO Input 10 7 2 1 4 Ping Pong Control In 10 7 2 2 QUEDUEtS ine eee 7 2 2 1 Synthesizer Out J9 7 2 2 2 Ref Div Out 2 7 2 2 3 VCO Div Out J7 7 2 2 4 Prescaler Out 8 7 2 2 5 Ext Control J5 7 2 3 Jumper 5 5 8 2 3 1 Reference Frequency Jumpers 8 2 3 2 Loop 5 9 2 3 3 Op Amp Negative Rail Voltage Selection 9 2 3 4 Reference Suppression Filter 10 2 3 5 VCO Selection 10 2 3 6 12 2 3 7 Q3036 Mode 12 2 3 8 Ping Pong M ode External Gontrol 12 2 3 9 Test 12 3 0 Q0420 FREQUENCY CONTROL 13 3 1 Direct Parallel Mode Eight Bit Bus M ode Serial M
33. ibl c D c mn m 1 1 c 89 090 91 093 C84 C08 52 054 67 C70 68 C71 105 C29 C32 38 C74 C81 25 28 56 69 C17 C39 061 063 065 083 85 C96 C90 C11 019 33 34 6 C3 C18 C21 035 037 040 042 044 048 60 062 064 C66 C69 C82 096 C87 C97 C98 05 05 05 Ru i aA 2 1 HE EE RS 2 BR 2 RRB R14 R28 R29 R58 R71 P5 R9 RA3 RA9 R50 R59 E I ee BB o o 4 2 _ or RURMRS 0 23 1 2 MMRGRAGRS2 MT 2 RGGRSRSONO 2 Od 3 2 09 02380481 B 105086669 C17 39 061 063 65083 085 096 09 9 Q109 03400 5 30 QUALCOMM Incorporated ASIC Products 6455 Lusk Boulevard San Diego CA 92121 2779 USA Q0420 Phase Locked Oscillator PLO Evaluation System User s Guide 100 01011 000 RM73Z2B000 RES Chi lt gt lt gt gt gt lt gt lt gt gt mm c c c c 100 06723 01R 100 06723 039 ile m lt gt lt gt lt gt T T E T T c ibl c 1 c eo 1 c lt gt lt gt lt gt lt gt lt gt lt gt lt gt lt gt ick Film Zero 5 1 8W Size 1206 1 01 F F F F F F m
34. in calculating the R value If the value of is 14 QUALCOMM Incorporated ASIC Products E mail asic products qualcomm com 6455 Lusk Boulevard San Diego CA 92121 2779 USA Telephone 619 658 5005 Q0420 Phase Locked Oscillator PLO Evaluation System Fax 619 658 1556 User s Guide Data Subject to ChangeWithout N otice not an integer based on the reference frequency and the frequency of the phase detector R Reference FPD 1 the R is not an Integer LED will illuminate red Conversely if the value of R is an integer the LED will illuminate green If the value of R exceeds the number of R counter bits the R Out of Range LED will illuminate red If the value of isin range the LED will illuminate green The Out of Range Condition is calculated differently depending on the programming mode Refer to the Q3236 Specifications for the different ranges of R 3 1 2 OUTPUT FREQUENCY The output frequency of the VCO is selected from the four slides and the number of kHz selected Thesum of the slides is displayed next to the VCO block The slides can be changed to move the VCO in course steps or fine steps The resultant VCO divide value is shown in the VCO Divide Block is Not an Integer LED will illuminate red if the VCO divide value is not an integer based upon the desired output frequency the frequency of the phase detector Frequency Frequency of the Phase Detector the state of the Divide by Two Prescaler Switch
35. indows You may also choose to bypass the jumper setti ng windows The programming window shown in Figure 9 represents a block diagram of a phase locked loop The user has control of the Reference Frequency Output Frequency Phase Detector Frequency Divide by Two Prescaler PRE EN and QUIT TheReference Divide VCO Divide R Value M Value A Value R is not an Integer R out of Range and N is not an Integer are calculated from the inputs selected by the user These values are then programmed into the Q3236 automatically Thelock detect LED monitors pin 43 of the Q3236 and indicates if the synthesizer is locked Figure 9 Q0420 Front Panel Software Screen Reference Frequency MHz Divide Output Frequency MHz 40 Loop utput Frequency MHz 3000 000 16 Detector Filter PRE EN R is not an Integer Enable E Q Disable 250 MHz Lock Detect R out of Range VCO ivi S Divide eve 600 Prescalar N EB N is not an Intege M out of Range M Value A Value Output Frequency Selection 1000 MHz 100 MHz 10 MHz A 4 10 10 QUALCOMM 00420 EVALUATION BOARD SOFTWARE VER 1 0 3 1 1 REFERENCE FREQUENCY The reference frequency can be changed to match the frequency being supplied to 3236 The Q0420 Board is supplied with a 40 M Hz reference crystal oscillator therefore the default is set to 40 MHz Changingthis icon does not change the frequency supplied to the 3236 it only aids
36. kHZ Marker 1 2 5 MHZ Marker 2 5 0 MHZ Marker 3 AMPLITUDE 4 7 PRESCALER The Q0420 provides a divide by 2 prescaler in the feedback path This allows frequencies greater than 2 0 GHz to be synthesized using the 3236 This prescaler operates up to 3 0 GHz With the installation of two 0 Q resistors the prescaler can be utilized or bypassed 21 QUALCOMM Incorporated ASIC Products E mail asic products qualcomm com 6455 Lusk Boulevard San Diego CA 92121 2779 USA Telephone 619 658 5005 Q0420 Phase Locked Oscillator PLO Evaluation System Fax 619 658 1556 User s Guide Data Subject to ChangeWithout Notice 5 0 DESIGN HINTS AND SUGGESTIONS 5 1 POWER SUPPLIES Passive filtering of the power supply inputs is provided on board the Q0420 For optimal synthesizer performance it is recommended that a clean voltage suppl y be used to supply power to the PLL deviceto eliminate any contri butions of extraneous noise coupling through the power bus lines to the synthesizer s output 5 2 EXTERNAL REFERENCE SOURCE The external reference input is provided to enable you to use PLL reference of your choice This feature is important when performing low noise measurements or to have a reference source other than the on board 40 MHz reference 5 3 Q0420 EMI SHIELD The Q0420 Evaluation Board comes complete with an EMI Circuit Card Assembly Shield This shield was designed to reduce the effect of RF coupling to the Q0420 PLO Evaluation
37. m m m m m m m m m m m m m m m m m m aN F F eie 100 06723 08R2 MCR10JW8R2 RES Chip Thick Film 8 2 5 1W 200 PPM 100 06725 150 ip 010 5 COG NPO 50V 105 01073 6101 VJ0603A101 XAA CAP Chip Ceramic 100PF 5 COG NPO 50V ip Ceramic 1000PF 10 X7R 50V 2 500R15W0102KW2 CAP Chip Ceramic 1000PF 10 X7R 50V 03 VJ0805Y103KXBM Chip Ceramic 01UF 10 X7R 50V ip Ceramic 1UF 20 770 50V E mail asic products qualcomm com Telephone 619 658 5005 Fax 619 658 1556 Data Subject to ChangeWithout N otice REFERENCE MANUFACTURERS 5 105 07490 0106 THCS5OELEI06ZT CAP Chip Ceramic OUF 80 20 Y5U 105 10036 0336 106 01067 0226 106 02646 0107 106 02648 0686 106 10018 0101 CAP Solid AL 100 UF 20 20V Hi Freq 617 110 02161 0833 1B 110 06324 0330 4 5 Inductor VAR Shield 15UH 08473 4000 01263 0914 31260 0581 01028 2222 01028 3904 100172219 711 02623 0115 781 02268 1003 781 10014 0000 781 10015 0000 781 10019 0000 784 08150 0003 300 01668 0001 310 06441 1001 3100611003 1 00 146 06598 0000 6 49010860001 149 01086 0003 70 01902 0001 n n n D Re 1 D 1 H H pan D a c 6 U10
38. mm com 6455 Lusk Boulevard San Diego CA 92121 2779 USA Telephone 619 658 5005 Q0420 Phase Locked Oscillator PLO Evaluation System Fax 619 658 1556 User s Guide Data Subject to ChangeWithout N otice 7 1 P1 J1 BNC RN EXT REF IN DB37M T WNP NNPPPPPPPHPH BOOM IM U BW N APPENDIX Q0420 SCHEMATIC DRAWINGS SMODE_A3 M2 WR A2 A1 FSELP AO FSELS DBUS7 PRE SCLK DBUS6 M6 SDATA DBUSS M5 SEN DBUSA 22 24 QUALCOMM Incorporated ASIC Products LOCK DETECT HOP WR WR M1 WR BUSMODE DBUS3 DBUS2 M2 DBUS1 M1 DBUSO MO RS R2 R1 J6 BNC PING_PONG_CNTRL J10 SMA aa EXT_VCO_IN 6455 Lusk Boulevard San Diego CA 92121 2779 USA Q0420 Phase Locked Oscillator PLO Evaluation System User s Guide J4 J3 GND 15V_IN 92 BNC REF DIV OUT 77 BNC DIV OUT d J9 SMA SYNTH OUT J8 SMA PRESCALER OUT J5 BNC EXT VCO CONTROL E mail asic products qualcomm com Telephone 619 658 5005 Fax 619 658 1556 Data Subject to ChangeWithout N oti ce
39. nts thetune voltage supply voltage and VCO output are routed through 0Q resistors The Q0420 is manufactured with the resistors configured for the pin type VCO s If the user would liketo use a surface mount VCO footprint the OO resistors need to be configured according to Figure 6 Figure 6 VCO Pad Configuration VCO Supply VCO Supply Voltage Voltage VCO Tune VCO Tune Voltage Voltage VCO 1 VCO 1 VCO 2 VCO 2 Pin Type Surface Mount Pin Type Surface Mount Footprint Footprint Footprint Footprint VCO Output VCO Output VCO Output VCO Output R60 R61 R64 R65 ll QUALCOMM Incorporated ASIC Products E mail asic products qualcomm com 6455 Lusk Boulevard San Diego CA 92121 2779 USA Telephone 619 658 5005 Q0420 Phase Locked Oscillator PLO Evaluation System Fax 619 658 1556 User s Guide Data Subject to ChangeWithout Notice 2 3 6 PRESCALER A divide by two prescaler is provided in the VCO feedback path on the evaluation board as shown in Figure 7 and Table9 Thisallows the Q3236 to synthesize frequencies above 2 0 GHz The prescaler can beused in the feedback path to the Q3236 or it can be bypassed Install zero ohm resistors in R78 and R75 and remove resistors R85 and R84 to utilize the prescaler In order to bypass the prescaler remove resistors R78 and R75 and install zero ohm resistors in R85 and R84 Figure 7 Prescaler Select Jumpers 2 Prescaler Table 9 Prescaler Select Table 10 Mode Select 2 PR
40. ocedure for computing the binary values of RO R1 R2 are as follows Frer Fpp 1 Fpp 1 40 MHz 2 5 MHz 1 15 decimal 21111 binary RO R1 R2 R3 high switches 1 3 3 2 DIVIDER When using the Prescaler M ode the VCO Divider has the capability of dividing the VCO input by values ranging from 90 1295 in unit steps For the Q0420 to synthesize the output frequency range of 2000 M Hz to 3000 MHz using the FPD of 2 50 MHz the VCO Divider must be programmed through the moduli range of 400 to 600 The Q0420 provides 2 prescaler in the VCO frequency feed back path to Q3236 which allows the 3236 to synthesize frequencies greater than 2000 MHz The 2 prescaler divides the VCO output frequency by two thus the Q3236 only sees frequencies from 1000 MHz to 1500 MHz The following section describes the procedure for programming the and A control inputs to the QUALCOMM PLLFS To program the Q0420 PLO Evaluation System to output 2500 M Hz the total divide ratio is Fyco Fpp External Prescaler 22500 MHz 2 5 MHz 2 500 The binary values for M and A are computed as follows M zInteger N 10 1 Integer 500 10 1 49 decimal 0110001 binary M4 M5 high switches 1 M1 2 low switches 0 N 10 1 500 10 49 1 0 decimal 0000 binary low switches 0 Sincethe output frequency of the synthesizer bo
41. ode 14 3 1 1 Reference Frequency 14 3 1 2 Output Frequency 15 3 1 3 Phase Detector Frequency 15 3 1 4 Divide by Two Prescaler 15 345 PREEN 15 SLO QUIC a 15 3 2 Ping PONG 16 3 2 1 Output Frequency 17 2 QUALCOMM Incorporated ASIC Products 6455 Lusk Boulevard San Diego 92121 2779 USA Q0420 Phase Locked Oscillator PLO Evaluation System User s Guide 3 3 DIP Switch 5 17 3 3 1 Reference Divider 18 3 3 2 VCO 18 4 0 DESCRIPTION OF BOARD FEATURES 20 4 1 Q3236 Phase Locked Loop Frequency Synthesizer 20 4 2 Reference Oscillator 20 4 3 LineReceiver 20 4 4 Voltage Controlled Oscillator VCO 20 4 5 Loop Filter uere qe 20 4 6 Reference Suppression Filter 21 4 7 Prescaler oce 21 5 0 DESIGN HINTSAND SUGGESTIONS 22 5 1 Power 22 5 2 External Reference Source 22 5 3 Q0420 EMI 22 5 4 Phase Offset T rimpot
42. op amp to 5 volts on the first loop filter connect JP13 pins 1 and 2 To set the negative rail to ground connect pins 2 and 3 Connect JP3 pins 1 and 2 to select 5 volts on the second loop filter or pins 2 and 3 for ground See Figure 3 Table 4 and Table 5 Table 4 Negative OP Amp Rail Selection Loop 1 Table 5 Negative OP Amp Rail Selection Loop 2 NEGATIVE RAIL SELECTION LOOP 1 JP13 NEGATIVE RAIL SELECTION LOOP 2 JP3 12 12 9 QUALCOMM Incorporated ASIC Products E mail asic products qualcomm com 6455 Lusk Boulevard San Diego 92121 2779 USA Telephone 619 658 5005 Q0420 Phase Locked Oscillator PLO Evaluation System Fax 619 658 1556 User s Guide Data Subject to ChangeWithout N otice 2 3 4 REFERENCE SUPPRESSION FILTER A reference suppression filter is provided on the board to attenuate the phase frequency detector error pulses at the rate FPD The reference suppression filter was optimized for 2 5 M Hz and may need to be redesigned for different phase detector frequencies In order to use the reference suppression filter connect JP15 pins 1 and 2 and JP4 pins 1 and 2 If the user does not want to utilize the filter connect JP15 pins 2 and 3 and JP4 pins 2 and See Figure 4 and Table 6 Figure 4 Reference Suppression Filter Jumpers Reference Suppression Filter Table 6 Reference Filter Select REFERENCE FILTER SELECT JP15 JP4 fajn 23 23 2 3 5 VCO SELECTI
43. per setting windows You may also choose to bypass the jumper setti ng windows The programming window shown in Figure 10 represents a block diagram of a phase locked loop The user has control of the Reference Frequency Output Frequency Phase Detector Frequency Divide by Two Prescaler PRE EN and QUIT TheReference Divide VCO Divide R Value M Value A Value R is not an integer R out of range and N is not an integer is calculated from the inputs selected by the user Thelock detect LED monitors pin 43 of the Q3236 and indicates if the synthesizer is locked control features are the same as previously descri bed except for the output frequency control Figure 10 Ping Pong Mode Front Panel Software Screen Reference Frequency MHz A Divide v 40 Phase 16 Detector R is not an Integer A 2 250 R out of Range VCO Divide 600 R Value Q N is not an Intege PRE EN Enable Disable M out of Range M Value A Value 59 0 QUALCOMM Q0420 EVALUATION BOARD SOFTWARE VER 1 0 16 QUALCOMM Incorporated ASIC Products 6455 Lusk Boulevard San Diego CA 92121 2779 USA Q0420 Phase Locked Oscillator PLO Evaluation System User s Guide 2500 Frequency 2 MHz E Frequency Select 2400 Frequency 1 MHz VCO Loop Filter Lock Detect Divide by 2 Prescalar E mail asic products qualcomm com Telephone 619 658 5005 Fax 619 658 1556 Data Subject to ChangeWithout Notice 3 2
44. pute all desired frequency programming and can exercise the following Q3236 modes of operation 16 bit Direct Parallel Control 8 bit Data Ping Pong Control 8 bit Data Bus Control e 20 bit Serial Ping Pong Control e 20 bit Serial Control Stand alone operati on with the Q0420 requires only a single 15VDC power supply but can only utilizethe Q3236 s direct parallel interface for frequency programming using on board DIP switches This User s Guide provides all the information needed to use the Q0420 PLO Evaluation System Appendices are also provided which contain the Q0420 schematics layout and a complete parts list When designing custom synthesizers using the Q0420 it is recommended that the designer also read QUALCOMM s 3236 Technical Data Sheet It contains numerous design hints and discusses not only the electrical performance of the Q3236 but also has an application section that discusses how a PLL synthesizer can be designed The Q0420 PLO Evaluation System is meant to be a demonstration circuit and evaluation tool QUALCOMM does not make any warranty as to the Q0420 s suitability for a specific application without further design modifications However we believe you will find the Q0420 a useful system to further your understandi ng of synthesizer design with QUALCOMM s integrated PLL devices CONTENTS 10 GETTING STARTED 3 1 1 Digital 1 0 Board Installation 3 1 2 Di
45. roceed The software will copy and decompress all files onto your hard drive into the directory you selected 5 Onceall files have been written to your hard drive the software will ask you if you want it to automatically create a Windows program group The default program group nameis QUALCOMM If you select Create the software will automatically create a program group and a program item for the Q0420 Control Software If you select skip the software will not create the program group and program item 6 This completes the Q0420 Control Software installation process Select Ok 14 Q0420 PLO EVALUATION SYSTEM SETUP First turn off the computer connecting the Q0420 Control Cable while the PC is on may damage the PC Connect the DIO Board located in the PC to the Q0420 Evaluation Board through the DB37 Control Cable provided Turn on PC and run Windows Before running the Q0420 Evaluation Board Software ensurethe dip switches S1 and S2 are set to the off or logical zero position Operatingthe software whilethe dip switches the 1 or high position may damage the DIO Board Execute the Q0420 Control Software from the QUALCOMM program group in Windows 2 0 SYNTHESIZER OPERATION Figure 1 shows the Q0420 PLO Evaluation System block diagram The following paragraphs descri be the function and operation of each of the circuit elements shown in the block diagram 2 1 INPUTS 211 POWER SUPPLY REQUIREMENTS A single 15
46. t the software is communicating with the DIO board 3 QUALCOMM Incorporated ASIC Products E mail asic products qualcomm com 6455 Lusk Boulevard San Diego CA 92121 2779 USA Telephone 619 658 5005 Q0420 Phase Locked Oscillator PLO Evaluation System Fax 619 658 1556 User s Guide Data Subject to ChangeWithout N otice Figure 1 00420 PLO Evaluation System Block Diagram 4 QUALCOMM Incorporated ASIC Products E mail asic products qualcomm com 6455 Lusk Boulevard San Diego CA 92121 2779 USA Telephone 619 658 5005 Q0420 Phase Locked Oscillator PLO Evaluation System Fax 619 658 1556 User s Guide Data Subject to ChangeWithout N otice 1 Oncethe software installation is complete run Instacal exe located in the drive and directory you chose during installation most likely CACB 2 From the Instacal M enu double click your mouse on the Install pull down menu 3 Doubleclick your mouse on Board 0 4 Select Board type and choosethe CIO DIO24 5 Select the base address to match the address you selected via dip switches located on the CIO DIO24 Board most likely 300H 6 Select the Interrupt Level to match the interrupt level you selected via the interrupt jumper located the CIO DIO24 Board most likely none 7 After the board is configured it can be tested To do this double click your mouse the Test pull down menu 8 Select Board 0 CIO DIO24 WARNING BEFORE PROCEEDI
47. the base address of the CIO DIO be set to 300H and the interrupt level set in the X position Oncethe DIO Board is installed in your PC the board needs to be configured with the Instacal software provided Place the Instacal disk in your floppy drive access the floppy drive usually A and type Install This can be accomplished in DOS or Windows The Computer Boards Software Installation title screen will appear once the Install exefileis run From this menu select I Install to proceed and complete installation 2 Oncethe PCMCIA installation window appears select No Likewise select No to theUniversal Library and Labview Driver Installation Window 3 Select the drive and directory you want the Instacal program to reside We suggest using the default C ACB The software will automatically copy all files from the disk into the specified directory on your hard drive 4 Onceall files are copied to your hard drive the software will ask if you would liketo havethe AUTOEXEC BAT file modified automatically select Yes The program will automatically add C CB to your path 5 After all files have been copied to your hard drive reboot your computer to complete the installation process 1 2 DIGITAL I O BOARD SOFTWARE CONFIGURATION Once the software installation is complete it is necessary to configure the software to control the Digital board The following procedure will configure and test the DIO drivers to ensure tha
48. which you want to program the Q 3236 by selecting the programming method and then selecting the execute button One of five programming windows will appear The window for Direct Parallel M ode Eight Bit Bus M ode and Serial M ode look the same but the programming of the Q3236 is carried out differently Likewise the Ping Pong Eight Bit Bus M ode and the Ping Pong Serial M ode front panels look the same but the programming of the Q3236 is carried out differentl y Figure 8 Programming Mode Selection Softw are Screen Programming Mode Selection Direct Parallel Mode Eight Bit Bus Mode Serial Bus Mode Ping Pong Eight Bit Bus Mode QUALCOMM Q0420 EVALUATION BOARD SOFTWARE VER 1 0 Ping Pong Serial Bus Mode 13 QUALCOMM Incorporated ASIC Products E mail asic products qualcomm com 6455 Lusk Boulevard San Diego CA 92121 2779 USA Telephone 619 658 5005 Q0420 Phase Locked Oscillator PLO Evaluation System Fax 619 658 1556 User s Guide Data Subject to ChangeWithout N otice 3 1 DIRECT PARALLEL MODE EIGHT BUS MODE SERIAL MODE When either Direct Parallel M ode Eight Bit Bus M ode or Serial Bus M odeis selected from the Programming M ode Selection Menu Figure 8 the window shown in Figure 9 will appear The software will ask you if you want to go through the jumper setting windows If you are a first time user of the evaluation board it is suggested that you go through the jumper setting w
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